JP3695402B2 - Sound generator - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a sound source device including waveform signal generation means for generating a waveform signal.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, a sound source device provided in an electronic musical instrument or the like has a sound source control register that stores various musical sound parameters used when generating a musical sound waveform. Normally, the tone generator performs a tone generation process for each channel by time division processing in order to simultaneously generate a plurality of tone signals. The processing of each channel in the time division channel processing is executed while sequentially reading out the musical tone parameters used in each processing stage from the sound source control register. Therefore, the tone generator control register is provided with a plurality of storage areas capable of storing a plurality of musical tone parameters used in each processing stage for each channel.
[0003]
[Problems to be solved by the invention]
FIG. 8 shows a partial configuration of a sound source device provided in a conventional electronic musical instrument or the like. FIG. 8 shows a configuration of an envelope generator (EG) 132 that generates an envelope in the sound source device. The operation for generating the envelope waveform shown in FIG. 9 in the EG 132 will be described. The EG 132 uses the envelope parameter written in the EG parameter register 130b in the sound source control register 130 to generate the envelope waveform shown in FIG. When note-on is instructed, the generation of the envelope waveform is started from the level of the initial envelope value INEG. Therefore, the initial envelope value INEG is written in the EG parameter register 130b, and the initial envelope value INEG is read out and written in the current value register 132c in the EG unit 132a that generates the envelope waveform.
[0004]
The envelope value and the rate information can be written in the EG parameter register 130b. When the note is on, the CPU 110 writes the initial envelope value INEG and the rate information into the EG parameter register 130b via the bus line 124. Yes. When the initial envelope value INEG is written, the output of the initial register (INIT) 130a rises. Then, the initial envelope value INEG written in the EG parameter register 130b is written in the current value register 132c by the output of the initial register 130a. In this way, when the initial envelope value INEG is written to the current value register 132c, the CPU 110 writes the next first envelope value EG1 to the EG parameter register 130b. In this case, the output of the initial register 130a does not rise. In this state, when the note-on is instructed and generation of the envelope waveform is started, the EG unit 132a adds a predetermined value determined by the rate information to the value of the current value register 132c at every calculation timing, and thereby calculates the current value register. Write to 132c. At the same time, the value of the current value register 132c is compared with the first envelope value 130b written in the EG parameter register 130b to detect whether or not the first envelope value EG1 has been reached.
[0005]
As a result, the value of the current value register 132c goes from the initial envelope value INEG to the first envelope value EG1. When the value of the current value register 132c is added at each calculation timing and the value reaches the first envelope value EG1, the arrival detection means 132b in the EG unit 132a sends the arrival flag to the arrival flag generation unit 132d. Gives the output to generate. As a result, the arrival flag generation unit 132d generates and outputs the arrival flag. Further, the arrival flag is supplied to the interrupt generation unit 132e, and a CPU interrupt signal is generated and output in the interrupt generation unit 132e. When the CPU 110 receives the CPU interrupt signal, the CPU 110 detects the cause because there are a plurality of causes of the CPU interrupt.
[0006]
In this case, since the arrival flag is detected as a cause of the CPU interruption, the CPU 110 supplies the second envelope value EG2 to the sound source control register 130 and writes it in the EG parameter register 130b. As a result, the value of the current value register 132c goes from the first envelope value EG1 to the second envelope value EG2. Then, by adding a predetermined value to the value of the current value register 132c at every calculation timing, the value reaches the second envelope value EG2, and the above-described operation is repeated. As a result, as shown in FIG. 9, the EG unit 132a goes to the first envelope value EG1, and when it reaches the first envelope value EG1, it goes to the second envelope value EG2, and further, a third envelope value (not shown). An envelope waveform toward is generated and output.
[0007]
By the way, in the register to which data is sequentially written, when the written data is read and written to the second register, the next data is stored in the register when the data writing to the second register is effectively completed. If writing is not performed, data writing to the second register may fail. For example, in the tone generator shown in FIG. 8, when the initial envelope value INEG is written into the EG parameter register 130b, the initial envelope value INEG is read and written into the current value register 132c, the CPU 110 writes to the EG parameter register 130b. Depending on the timing, the next first envelope value EG1 is written to the EG parameter register 130b before the writing of the initial envelope value INEG to the current value register 132c is completed. In this case, the writing of the initial envelope value INEG to the current value register 132c fails, and the first envelope value EG1 is written, so that a desired waveform signal is not generated.
[0008]
When the next musical sound parameter is written in the sound source control register 130 by detecting the arrival flag, the detected arrival flag is reset and the arrival flag is not output. That is, the interrupt signal is stopped. However, it takes some time for the next musical sound parameter to be written to be reflected in the arrival flag and to stop the interrupt signal. Then, when the arrival flag that caused the interruption is detected by the interruption signal, the next musical sound parameter is written to the sound source control register 130, and the waveform generation process is continued, the interruption signal is not stopped. In such a case, there is a problem that malfunction occurs.
[0009]
Further, in the sound source device shown in FIG. 8, a plurality of types of envelope waveforms such as an amplitude envelope and a filter envelope are generated by time division processing, and each type of envelope waveform is generated for a plurality of channels by time division channel processing. ing. Then, when a CPU interrupt occurs and the CPU 110 reads out the arrival flags for all channels in a specific envelope type, it takes time until the arrival flags for all channels are prepared. In this case, if the arrival flags of all channels in a specific envelope type are read immediately upon receiving a CPU interrupt, there is a problem that the accurate arrival flag states in all channels cannot be read.
In order to solve these problems, it is conceivable that processing is started after the data becomes valid. However, since the operation timing of the CPU 110 is different from the operation timing of the sound source device, the CPU 11 It is not possible to detect what the current state is. For this reason, the waiting time must be set long enough for the data to be valid. Then, there arises a problem that this waiting time causes a control delay in the CPU 110.
[0010]
Accordingly, an object of the present invention is to provide a sound source device that can wait until data becomes valid without causing a control delay.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, the sound source device of the present invention includes: A tone generator control register to which a tone parameter supplied from the control means is written when a tone is generated, and a current value register to which a tone parameter written at the start of waveform generation is written in the tone generator control register. Using the musical tone parameters written in the register to generate a waveform signal, Said A waveform generator that generates a waveform signal by processing the next same tone parameter written in the tone generator control register as the target value by the tone parameter in the current value register, and the waveform parameter written in the current value register When the musical tone parameter reaches the target value, the generation parameter for generating the arrival flag and the interrupt signal, and the musical tone parameter written in the sound source control register are read out and written into the current value register. First timer means for counting the time until completion; When the control means receives the interrupt signal and writes the next musical sound parameter to the sound source control register, the result of the writing is reflected in the arrival flag. More than the operation delay time A second timer for counting the time of After the first timer means has timed out, the control means writes the next similar musical tone parameter to the sound source control register, and The arrival flag and the interrupt signal are masked until the second timer expires.
[0013]
Further, in the sound source device of the present invention, the sound parameter corresponding to each of a plurality of types of waveform signals is written in the sound source control register, and the waveform generation unit uses each of the music sound parameters. A plurality of types of waveform signals are respectively generated, and when the control unit performs a read setting regarding the specific waveform signals of the plurality of types of the waveform generation unit, The arrival flags for all channels are aligned A given period of time A third timer for counting time, and when the interrupt signal is generated, the control means performs a read setting for a specific waveform signal of the plurality of types of the waveform generation unit, and then performs the third timer The arrival flag may be detected in response to the time-up of the timer, and the next musical sound parameter for the corresponding channel may be written into the sound source control register.
[0014]
According to the present invention, the first timer means for counting the time until the musical sound parameter written in the sound source control register becomes valid and the writing of the next musical sound parameter is permitted is provided. Yes. As a result, it is possible to prevent the next target value from being written to the sound source control register before the writing of the initial envelope value to the current value register is completed.
In addition, the arrival flag and the interrupt signal are masked until the second timer for counting the time until the writing result is reflected in the arrival flag is up, so that the writing is reflected in the arrival flag. It will not malfunction even if it takes a long time. Furthermore, since the third timer for counting the time until the arrival flags are arranged is provided, it is possible to read out the accurate arrival flag states in a plurality of channels.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a block diagram showing a configuration of an electronic musical instrument including a sound source device according to an embodiment of the present invention.
The electronic musical instrument shown in this figure includes a sound source device according to the present invention as a sound source 20. In this electronic musical instrument, a central processing unit (CPU) 10 generates musical sounds according to performance data by controlling the operation of the entire electronic musical instrument based on a control program stored in a ROM 11 or a RAM 12. Further, according to the operation of the panel switch 18, a tone color selection process of a musical tone signal generated by the sound source 20 is executed, and an effect selection process applied by the mixer & DSP unit 37 is executed. The tone signal generated by the tone generator 20 is controlled in accordance with the performance input from the MIDI interface 16. For example, when note-on is input, a tone generation channel in the sound source 20 is assigned to the note-on, and generation of a musical sound signal corresponding to the note-on is instructed in the assigned tone generation channel. The CPU 10 also performs control processing for other blocks in the electronic musical instrument.
[0016]
The ROM 11 is a storage unit that stores various programs executed by the CPU 10 and various data, and is configured by a read-only memory (ROM). The RAM 12 is a random access memory, in which a work memory area for temporarily storing various data generated when the CPU 10 executes a program and a storage area for storing various data are set, such as a register, a flag, and a buffer. It is used as. The timer 13 indicates an elapsed time during operation or generates a timer interrupt at a specific interval, and is used for automatic performance time management and the like.
[0017]
The disk 15 is a recording medium such as a hard disk, floppy disk, or removable disk, and stores waveform data to be loaded into the waveform memory 21. The drive 14 is a disk drive for reading / writing the set disk 15. The MIDI interface 16 is a MIDI interface that transmits a MIDI message created inside the electronic musical instrument to the outside and receives a MIDI message from the outside. The network interface 17 is a network interface for connecting to a server computer via a communication network such as a LAN (Local Area Network), the Internet, or a telephone line. The panel switch (panel SW) 18 is various switches provided on the panel of the electronic musical instrument, and various instructions can be given to the electronic musical instrument by operating this switch. The panel display 19 is a display on which various information is displayed when a musical sound is generated.
[0018]
The sound source 20 is a sound source that generates a musical sound signal by a waveform memory reading method that sequentially reads musical sound waveform data from the waveform memory 21 in accordance with frequency data (F number) corresponding to the pitch of the musical sound to be generated. The sound source 20 can simultaneously generate a plurality of musical tone signals using a plurality of sound generation channels, and performance data (data conforming to the MIDI standard, etc.) given via the bus line 24. Is input, and a musical tone signal is generated based on this data. In this embodiment, the electronic musical instrument operates in, for example, 64-channel time division.
[0019]
The tone generator control register 30 in the tone generator 20 conforms to performance data (pitch data KC, note-on, waveform start address (WSA), envelope parameters, various other parameters, and MIDI standards) necessary for generating a musical tone signal. Data, etc.) is supplied and written, and musical data is generated using these data. The generated musical tone data is converted into an analog musical tone signal by a DAC (digital / analog converter) 22 and emitted from the sound system 23. The sound source 20 includes a time measurement unit 31, a multi-EG unit 32, an address generation unit 33, an interpolation unit 34, a filter control unit (DCF) 35, an amplitude control unit 36, and a mixer & DSP unit 37 in addition to the sound source control register 30. ing.
[0020]
As will be described later, the time measuring unit 31 includes three timers. These three timers are timers for waiting for processing until the data becomes valid and for masking the flag. These timers allow the multi-EG unit 32 to accurately generate various envelope waveforms without causing a control delay. The multi-EG unit 32 is an envelope waveform generator having a plurality of functions, and includes a pitch envelope waveform (PEG waveform), a filter envelope waveform (FEG waveform), an amplitude envelope waveform (AEG waveform), and an effect envelope waveform (EEG waveform). Generation, filter coefficient offset (F offset), volume level, modulation level interpolation, etc. are executed in a time division manner in a common hardware circuit. The multi-EG unit 32 is supplied with initial value information and target value information of various envelopes and rate information thereof from the sound source control register 30.
[0021]
The address generator 33 generates a read address of the waveform memory 21 based on the pitch data and the read start address supplied from the sound source control register 30. Specifically, the F number, which is pitch data, is accumulated at each calculation timing, the integer part is supplied to the waveform memory 21 as a read address, and the decimal part is supplied to the interpolation unit 34 as interpolation information. The interpolation unit 34 interpolates between the two samples read out from the waveform memory 21 based on the fractional part supplied from the address generation unit 33, so that the sample corresponding to the read address generated in the address generation unit 33 is obtained. I try to get data. Note that the interpolation unit 34 may obtain sample data not only by two-point interpolation but also by four-point interpolation. The DCF 35 adjusts the frequency characteristics by filtering the interpolated sample data obtained by the interpolation unit 34 based on the filter coefficient supplied from the sound source control register 30. Further, the FEG waveform generated by the multi-EG unit 32 is supplied to the DCF 35, and the filter characteristic of the DCF 35 is changed by this FEG waveform. Therefore, the frequency characteristic of the musical sound data output from the DCF 35 also changes on the time axis. Will come to do.
[0022]
The amplitude controller 36 controls the volume of the musical sound data output from the DCF 35 based on the volume information supplied from the sound source control register 30. The amplitude control unit 36 is supplied with the AEG waveform generated by the multi-EG unit 32, and the volume level of the musical sound data changes according to the AEG waveform. Thereby, the volume level characteristic of the musical tone data output from the amplitude control unit 36 also changes on the time axis. The address generator 33 or the amplitude controller 36 described above performs time-division channel processing to generate musical tone data of, for example, 64 sound channels simultaneously. Then, the generated independent tone data for each channel is supplied to the mixer & DSP 37. The mixer & DSP 37 mixes the generated musical sound data of a plurality of channels and the musical sound data to which a plurality of DSP effects are applied in a plurality of ways, and supplies a plurality of mixing waveforms generated as a result to the DAC 22. An analog tone signal output from the DAC 22 is emitted from the sound system 23. Note that a plurality of effects by the DSP may be further added to the mixing waveform. Further, the DSP executes a plurality of effect processes for a plurality of input mixing waveforms based on the microprogram set by the CPU 10. Furthermore, the DSP can perform effect processing such as reverberation processing, distortion processing, and chorus processing in parallel by time division processing.
[0023]
Next, the configuration of the multi-EG unit 32 in the sound source 20 and the configuration of the sound source control register 30 related to the multi-EG unit 32 are shown in FIG.
The multi-EG section 32 shown in FIG. 2 generates a pitch envelope waveform (PEG waveform), a filter envelope waveform (FEG waveform), an amplitude envelope waveform (AEG waveform), and an effect envelope waveform (EEG waveform) as shown in FIG. ing. These plural types of envelope waveforms are generated for the sound generation channels by time division channel processing. As an example, an operation for generating the envelope of the PEG waveform shown in FIG. 3 will be described. The multi-EG unit 32 uses the envelope parameter written in the target value register 30d in the sound source control register 30 to generate the PEG waveform shown in FIG. When note-on is instructed, the generation of the PEG waveform is started from the level of the initial envelope value INPEG. Therefore, the CPU 10 writes the PEG initial envelope value INPEG in the target value register 30d, and writes the PEG initial envelope value INPEG in the current value register 32d built in the multi-EG unit 32.
[0024]
The tone generator control register 30 is provided with a target value register 30d into which an envelope value as a target value is written, and a rate register 30e into which envelope rate information is written. During the note-on event processing, the CPU 10 The initial envelope value (INPEG, INFEG, INAEG, INEEG) and rate information are written to the sound source control register 30 via the bus line 24. When an initial envelope value such as the PEG initial envelope value INPEG is written, the output of the initial register (INIT) 30b rises. Then, a load signal is generated from the load signal generator 32e by the output of the initial register 30b, and the selector 32c to which this load signal is supplied selects the input b from the target value register 30d and supplies it to the current value register 32d. To do. As a result, the PEG initial envelope value INPEG written in the target value register 30d is written in the current value register 32d.
[0025]
In this way, when the PEG initial envelope value INPEG is written in the current value register 32d, the CPU 10 writes the next first PEG envelope value PEG1 in the target value register 30d. In this case, since it is not the initial envelope value, the output of the initial register 30b does not rise. In this state, when note-on is written into the note-on register 30c, note-on is instructed and generation of an envelope waveform is started. Then, the comparator 32a compares the first PEG envelope value PEG1 in the target value register 30d with the PEG initial envelope value INPEG in the current value register 32d. Give instructions. As a result, the adder / subtractor 32b adds a predetermined value determined by the rate information to the PEG initial envelope value INPEG of the current value register 32d, and writes the added value to the current value register 32d. In this case, since the load signal is not supplied to the selector 32c, the a input from the adder / subtractor 32b is selected.
[0026]
At the next calculation timing, the comparator 32a compares the first PEG envelope value PEG1 of the target value register 30d with the envelope value of the current value register 32d. If the value of the first PEG envelope value PEG1 is larger, the adder / subtracter An addition instruction is given to 32b. As a result, the adder / subtractor 32b further adds a predetermined value determined by the rate information to the envelope value of the current value register 32d, and writes the added value to the current value register 32d. Such an addition operation is performed until the envelope value of the current value register 32d reaches the first PEG envelope value PEG1. When the envelope value of the current value register 32d reaches the first PEG envelope value PEG1, the comparator 32a determines that the envelope value of the current value register 32d has reached the first PEG envelope value PEG1, and the load signal generator The arrival signal is supplied to 32e and the arrival flag generator 32f.
[0027]
As a result, the load signal generator 32e generates a load signal and supplies it to the selector 32c, so that the value of the current value register 32d becomes the first PEG envelope value PEG1. Further, the arrival flag generation unit 32f generates and outputs an arrival flag. The arrival flag is supplied to the interrupt generation unit 32g, and a CPU interrupt signal is generated and output from the interrupt generation unit 32g. The current value register 32d outputs a PEG waveform that rises sequentially so as to reach the first PEG envelope value PEG1 from the PEG initial envelope value INPEG. When the CPU 10 receives the output CPU interrupt signal, the CPU 10 detects the cause because there are a plurality of causes of the CPU interrupt. In this case, since the arrival flag of the PEG waveform is detected as a cause of the CPU interruption, the CPU 10 supplies the second PEG envelope value PEG2 to the sound source control register 30 and writes it in the target value register 30d.
[0028]
At the next calculation timing, the comparator 32a compares the second PEG envelope value PEG2 of the target value register 30d with the first PEG envelope value PEG1 of the current value register 32d, but the value of the second PEG envelope value PEG2 is reduced. Therefore, a subtraction instruction is given to the adder / subtractor 32b. As a result, the adder / subtracter 32b subtracts a predetermined value determined by the rate information from the envelope value of the current value register 32d, and writes the subtracted value to the current value register 32d. Such a subtraction operation at each calculation timing is performed until the envelope value of the current value register 32d reaches the second PEG envelope value PEG2. When the envelope value of the current value register 32d reaches the second PEG envelope value PEG2, the comparator 32a determines that the envelope value of the current value register 32d has reached the second PEG envelope value PEG2, and the load signal generator The arrival signal is supplied to 32e and the arrival flag generator 32f.
[0029]
As a result, the load signal generator 32e generates a load signal and supplies it to the selector 32c, so that the value of the current value register 32d becomes the second PEG envelope value PEG2. Further, the arrival flag generation unit 32f generates and outputs an arrival flag. The arrival flag is supplied to the interrupt generation unit 32g, and a CPU interrupt signal is generated and output from the interrupt generation unit 32g. The current value register 32d outputs a PEG waveform that rises from the PEG initial envelope value INPEG, reaches the first PEG envelope value PEG1, and then falls to reach the second PEG envelope value PEG2. When the CPU 10 receives the output CPU interrupt signal, the CPU 10 detects the cause because there are a plurality of causes of the CPU interrupt. In this case, since the arrival flag of the PEG waveform is detected as a cause of the CPU interrupt, the CPU 10 supplies the third PEG envelope value PEG3 (not shown) to the sound source control register 30 and writes it in the target value register 30d. To.
[0030]
Thereafter, the above-described operation is repeatedly performed. As a result, the multi-EG unit 32 rises from the PEG initial envelope value INPEG to the first PEG envelope value PEG1, as shown in FIG. A PEG waveform that reaches the second PEG envelope value PEG2 and rises to reach the third PEG envelope value PEG3 is output. Similarly, a filter envelope waveform (FEG waveform), an amplitude envelope waveform (AEG waveform), and an effect envelope waveform (EEG waveform) as shown in FIG. 3 can be generated. Such a plurality of types of envelope waveforms are generated for each channel by time division channel processing.
[0031]
Next, three timers provided in the time measuring unit 31 that is a feature of the present invention will be described.
In the sound source 20 according to the present invention, musical tone data of a plurality of channels are generated simultaneously by time division channel processing. In this case, the writing period of the tone parameter of each tone generation channel written in the tone generator control register 30 is assigned as shown in FIG. For example, assuming that the maximum number of sound generation channels is 64, each tone parameter of 64 channels is sequentially written in the sound source control register 30 in one sampling period (1 DAC) from time t0 to time t1. In this case, since registers for all channels for each type of musical sound parameter are prepared in the sound source control register, the writing period is partially overlapped with other channels so that only the writing period of the same musical sound parameter is different. Has been.
[0032]
Here, in the target value register 30d in the sound source control register 30 shown in FIG. 2, the initial envelope value and the first envelope value are written at the time of note-on as described above. Although the initial envelope value is written in the current value register 32d, it takes some time to be effectively written in the current value register 32d. If the first envelope value is written to the target value register 30d before the initial envelope value is effectively written to the current value register 32d, the writing of the initial envelope value to the current value register 32d may fail. That is, when the first envelope value is written to the target value register 30d too quickly, the first envelope value is written to the current value register 32d. Therefore, the timer 1 in the time measuring unit 31 is started when the initial envelope value is written in the target value register 30d. Then, after detecting that the timer 1 has timed up, the CPU 10 writes the first envelope value in the target value register 30d. The timer 1 is set so as not to time out before the initial envelope value is effectively written to the current value register 32d.
[0033]
This state is shown as timer 1 in FIG. In the timer 1 in FIG. 5, three modes of measurement time are illustrated by taking the fourth sound generation channel (# 4ch) as an example. The musical sound parameter writing period in # 4ch is shown by a hatched period in 1DAC. When the initial envelope value is written from the CPU 10 to the target value register 30d at the time t01 in the DAC cycle from the time t0 to the time t1 as indicated by the measurement time A, the timer 1 is started at the time t01. . As information for starting the timer 1, some bits of the write address supplied from the CPU 10 to the sound source control register 30 can be used. The timer 1 times up at time t12 when the writing period of # 4ch in the next DAC cycle ends. In this case, the CPU 10 writes the first envelope value in the target value register 30d after detecting the time-up of the timer 1 that does not time-up until the writing period of # 4 ends. Thereby, after the initial envelope value is effectively written in the current value register 32d, the first envelope value is written in the target value register 30d.
[0034]
In the example indicated by the measurement time B, the initial envelope value is written from the CPU 10 to the target value register 30d at time t11 in the DAC cycle from time t1 to time t2. In this case, the timer 1 is started at this time t11. The timer 1 expires at time t12 when the writing period of # 4ch in the DAC cycle ends. In this case, after detecting the time-up of the timer 1, the CPU 10 writes the first envelope value to the target value register 30d, so that the initial envelope value is effectively written to the current value register 32d and then the first envelope value. Is written into the target value register 30d.
[0035]
Further, in the example indicated by the measurement time C, the initial envelope value is written from the CPU 10 to the target value register 30d at the time t13 during the writing period of # 4ch in the DAC cycle from the time t1 to the time t2. In this case, the timer 1 is started at this time t13. The timer 1 times up at time t21 when the writing period of # 4ch in the next DAC cycle ends. Also in this case, the CPU 10 writes the first envelope value into the target value register 30d after detecting the time-up of the timer 1, so that the first envelope value is written after the initial envelope value is effectively written into the current value register 32d. Is written into the target value register 30d.
As shown in the measurement time A to the measurement time C, the timer 1 is timed up without waiting for one DAC period depending on the timing at which the CPU 10 writes the initial envelope value in the target value register 30d. As described above, the initial envelope value can be effectively written to the current value register 32d and the first envelope value can be written to the target value register 30d with the minimum waiting time.
[0036]
As described above, when the envelope waveform is generated in the multi-EG unit 32, when the target value is reached, an arrival flag is output and a CPU interrupt is output. The CPU 10 detects the CPU interrupt, reads the cause of the CPU interrupt from the arrival flag, and writes the next target value in the target value register 30d in the sound source control register 30. When the next target value is written in the target value register 30d, the output of the comparator 32a is restored to the original value, so that the arrival flag is reset and the CPU interrupt signal is also stopped. . However, it takes some operation delay time until the next target value written is reflected in the arrival flag and the CPU interrupt signal stops. Then, when the arrival flag that caused the interrupt is detected by the CPU interrupt signal, the next target value is written in the target value register 30d of the sound source control register 30, and the envelope waveform generation process is continued, the CPU In some cases, the interrupt signal has not been stopped, and in such a case, a malfunction occurs. Therefore, the timer 2 in the time measuring unit 31 is started when the arrival flag that has caused the interruption is detected and the next target value is written in the target value register 30d of the sound source control register 30. Then, the arrival flag and the CPU interrupt signal are stopped by masking the arrival flag output from the arrival flag generation unit 32f until the timer 2 expires. The timer 2 does not time out until the arrival flag generator 32f resets the arrival flag.
[0037]
This state is shown as timer 2 in FIG. In the timer 2 in FIG. 5, three modes of measurement time are illustrated by taking the fourth sound generation channel (# 4ch) as an example. The writing to reading period from the time when the musical sound parameter in # 4ch is written to when it is read and reflected in the flag is shown as a hatched period in 1DAC. This period is slightly longer than the writing period in the timer 1. Here, as indicated by the measurement time A, when the arrival flag that caused the interruption is detected at time t01 in the DAC cycle from time t0 to time t1, and the next target value is written from the CPU 10 to the target value register 30d The timer 2 is started at the time t01. At the same time, “1” is set in the mask register 30a, and the output of the arrival flag generator 32f is masked. As a result, the arrival flag is not supplied to the interrupt generator 32g, and the interrupt generator 32g stops the CPU interrupt signal. As information for setting “1” in the mask register 30a, some bits of the write address supplied from the CPU 10 to the sound source control register 30 can be used, and the timer 2 can also be started by this bit. . The timer 2 is timed up at time t14 when the writing and reading period of # 4ch in the next DAC cycle ends, whereby the mask register 30a is reset to "0". Therefore, even if there is an operation delay time until the target value newly written in the target value register 30d is reflected in the arrival flag output by the arrival flag generation unit 32f, an incorrect arrival flag and CPU interrupt signal are displayed. It will not be output.
[0038]
Further, in the example indicated by the measurement time B, the arrival flag that is the cause of the interruption is detected at time t11 in the DAC cycle from time t1 to time t2, and the next target value is written from the CPU 10 to the target value register 30d. In this case, the timer 2 is started at this time t11. At the same time, “1” is set in the mask register 30a, and the output of the arrival flag generator 32f is masked. As a result, the arrival flag is not supplied to the interrupt generation unit 32g, and the interrupt generation unit 32g stops the CPU interrupt signal. The timer 2 times up at time t14 when the writing and reading period of # 4ch in the DAC cycle ends, whereby the mask register 30a is reset to "0". Therefore, even if there is an operation delay time until the target value newly written in the target value register 30d is reflected in the arrival flag output by the arrival flag generation unit 32f, an incorrect arrival flag and CPU interrupt signal are displayed. It will not be output.
[0039]
Further, in the example indicated by the measurement time C, the arrival flag which is the cause of the interrupt is detected at time t13 during the writing to reading period in the DAC cycle from time t1 to time t2, and the next target value is transferred from the CPU 10 to the target value register. 30d. In this case, the timer 2 is started at this time t13. At the same time, “1” is set in the mask register 30a, and the output of the arrival flag generator 32f is masked. As a result, the arrival flag is not supplied to the interrupt generation unit 32g, and the interrupt generation unit 32g stops the CPU interrupt signal. The timer 2 is timed up at time t22 when the writing and reading period of # 4ch in the next DAC cycle ends, whereby the mask register 30a is reset to "0". Therefore, even if there is an operation delay time until the target value newly written in the target value register 30d is reflected in the arrival flag output by the arrival flag generation unit 32f, an incorrect arrival flag and CPU interrupt signal are displayed. It will not be output.
As shown in the measurement time A to the measurement time C, the timer 2 is timed up without waiting for one DAC period depending on the timing at which the CPU 10 writes the next target value in the target value register 30d.
[0040]
Further, in the multi-EG section 32 shown in FIG. 2, a plurality of types of envelope waveforms such as a pitch envelope waveform (PEG waveform), a filter envelope waveform (FEG waveform), an amplitude envelope waveform (AEG waveform), and an effect envelope waveform (EEG waveform) are displayed. In addition to time division processing, each type of envelope waveform is generated for each sound generation channel by time division channel processing. Then, when a CPU interrupt occurs and the CPU 10 reads out the arrival flags for each channel in a specific envelope type, it takes time until the arrival flags for all channels are prepared. The arrival flags for all channels are prepared as a bitmap. In this case, if the CPU interrupt is received and the arrival flags of the respective channels in the specific envelope type are read out before the arrival flags are obtained, the accurate arrival flag states in all the sound generation channels cannot be read out. Therefore, the timer 3 in the time measuring unit 31 is activated when reading the arrival flags of all sound generation channels in the envelope type that generated the interrupt. Then, after detecting that the timer 3 has timed up, the CPU 10 reads the arrival flags of all the sound generation channels. The timer 3 is configured not to time out until the arrival flags of all the sound generation channels are aligned on the bitmap.
[0041]
This state is shown as timer 3 in FIG. In the timer 3 in FIG. 5, three modes of measurement time are illustrated. Here, as indicated by the measurement time A, it is assumed that an instruction to read arrival flags for all channels in a specific envelope type is supplied from the CPU 10 to the sound source control register 30 at time t01 in the DAC cycle from time t0 to time t1. In this case, the timer 3 is started at this time t01. As information for starting the timer 3, some bits of a read address constituting a read command supplied from the CPU 10 to the sound source control register 30 can be used. The timer 3 times up at time t15 in the next DAC cycle. In this case, the period from time t01 to t15 is set to a period sufficient for the arrival flags of all the channels to be arranged on the bitmap, so that the arrival flags of all the channels read when the timer 3 times out are It shows the channel status accurately.
[0042]
Further, as indicated by the measurement time B, it is assumed that a read instruction for arrival flags for all channels in a specific envelope type is supplied from the CPU 10 to the sound source control register 30 at time t11 in the DAC cycle from time t1 to time t2. In this case, the timer 3 is started at this time t11. The timer 3 is timed up at time t23 in the next DAC cycle. In this case, since the period from time t11 to t23 is the same length as the period from time t01 to t15, the arrival flags of all channels read when the timer 3 times out are It shows the state accurately.
[0043]
Furthermore, it is assumed that, as indicated by the measurement time C, a read instruction for arrival flags for all channels in a specific envelope type is supplied from the CPU 10 to the sound source control register 30 at time t13 in the DAC cycle from time t1 to time t2. In this case, the timer 3 is started at this time t13. The timer 3 times up at time t24 in the next DAC cycle. In this case, since the period from time t13 to t24 is the same length as the period from time t01 to t15, the arrival flags of all channels read when the timer 3 times out are It shows the state accurately. Note that the period during which the arrival flags of all the channels are aligned on the bitmap is a substantially constant period regardless of the envelope type.
[0044]
Next, a flowchart of note-on event processing executed by the CPU 10 in the electronic musical instrument shown in FIG. 1 is shown in FIG.
The note-on event process shown in FIG. 6 is started when a note-on event is detected. In step S1, the part information in the note-on event is stored in the PT register, the note number is stored in the NN register, and the velocity is stored in the VEL register. Stored. Next, in step S2, the number of layers required for the timbre selected for the part PT is stored in the LN register. In step S3, the sound generation channel having the layer number LN is assigned to the part PT. Here, n is set to 1 (step S4), and in step S5, each initial value of the n (= 1) layer is set in the sound source control register 30 for the n (= 1) -th assigned channel. This initial value includes the initial envelope value set in the target value register 30d. In step S6, the output of the initial register (INIT) 30b is raised to start the timer 1, and the load signal generator. A load signal is generated at 32e.
[0045]
Next, in step S 7, tone color parameters other than the envelope parameter of the same layer of the same channel are written into the sound source control register 30. Here, it waits until the timer 1 expires (step S8), and it is confirmed that the initial envelope value is effectively written in the current value register 32d by the timer 1 being timed up. When the timer 1 times out, the attack level and attack rate, which are envelope parameters of the first state in the same layer of the same channel, are written in the sound source control register 30 in step S9. In this case, the attack level is written in the target value register 30d as the target first envelope value, and the attack rate is written in the rate register 30e. Further, in step S10, it is determined whether n is equal to or greater than the number of layers LN. If it is determined that n is not equal to or greater than the number of layers LN, the process branches to step S11. In step S11, n is incremented by 1 and n = 2 is set, and the process returns to step S5, and the setting in layer 2 is similarly performed. When the processing from step S5 to step S11 is repeatedly performed and the setting in all layers is completed, YES is determined in step S10, the process proceeds to step S12, and simultaneous note-on is instructed to all assigned channels. The on-event process ends. As a result, the sound source 20 starts generating the musical sound of the sound generation channel corresponding to the number of layers. Note that simultaneous note-on is performed by setting “1” to all channels assigned in the note-on bitmap.
[0046]
Next, FIG. 6 shows a flowchart of EG interrupt event processing executed by the CPU 10 in the electronic musical instrument shown in FIG.
The EG interrupt event process shown in FIG. 7 is started when a CPU interrupt is generated in the envelope generation process, and the envelope type that generated the CPU interrupt is detected in step S20. Next, reading of arrival flags of all channels in the envelope type detected in step S21 is set, and the timer 3 is started. Here, the process waits until the timer 3 expires (step S22), and when the timer 3 expires, the arrival flags of all the sound channels are arranged on the bitmap. When the timer 3 expires, the process proceeds to step S23, the arrival flags of all channels are read, and all the channels that have generated the CPU interrupt are detected. Therefore, the envelope parameter (next target value) of the next state is written in the target value register 30d in the first channel detected in step S24. At the same time, "1" is set in the mask register 30a to mask the arrival flag and the CPU interrupt signal, and the timer 2 is started.
[0047]
Here, the process waits until the timer 2 expires, and when it is detected that the timer 2 has expired (step S26), the process proceeds to step S27 and the mask is released. As a result, even if there is an operation delay time before the envelope parameter of the next state is reflected in the arrival flag output by the arrival flag generation unit 32f, an incorrect arrival flag and CPU interrupt signal are not output. In step S28, it is determined whether or not there is a remaining channel detected in step S23. If there is a remaining channel, the process returns to step S24. Then, the processing from step S24 to step S28 is repeated until there are no remaining channels, and the envelope parameter of the next state is set to all the corresponding channels. Next, if there is a remaining envelope type that generated an interrupt in step S29, the process returns to step S21, and the processes in steps S21 to S29 are repeated until there is no remaining envelope type. As a result, the envelope parameter of the next state is set to all the channels in all the envelope types that have generated the CPU interrupt.
[0048]
【The invention's effect】
As described above, according to the present invention, the first timer means for counting the time until the musical tone parameter written in the tone generator control register becomes valid and the writing of the next musical tone parameter is permitted is provided. Yes. As a result, it is possible to prevent the next target value from being written to the sound source control register before the writing of the initial envelope value to the current value register is completed.
In addition, the arrival flag and the interrupt signal are masked until the second timer for counting the time until the writing result is reflected in the arrival flag is up, so that the writing is reflected in the arrival flag. It will not malfunction even if it takes a long time. Furthermore, since the third timer for counting the time until the arrival flags are arranged is provided, it is possible to read out the accurate arrival flag states in a plurality of channels.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an electronic musical instrument including a sound source device according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating a configuration of a multi-EG and a configuration of a sound source control register in the sound source device according to the embodiment of the present invention.
FIG. 3 is a diagram illustrating an example of an envelope waveform in which multi-EG occurs in the sound source device according to the embodiment of the present invention.
FIG. 4 is a diagram illustrating a musical sound parameter writing period in the tone generator according to the embodiment of the present invention;
FIG. 5 is a diagram showing operations of timers 1 to 3 in the sound source device according to the embodiment of the present invention.
FIG. 6 is a flowchart of note-on event processing in the electronic musical instrument provided with the tone generator according to the embodiment of the present invention.
FIG. 7 is a flowchart of EG interrupt event processing in the electronic musical instrument provided with the sound source device according to the embodiment of the present invention.
FIG. 8 is a diagram illustrating a partial configuration of a conventional sound source device.
FIG. 9 is a diagram illustrating an example of an envelope waveform.
[Explanation of symbols]
10 CPU, 11 ROM, 12 RAM, 13 timer, 14 drive, 15 disk, 16 MIDI interface, 17 network interface, 18 panel switch, 19 panel display, 20 sound source, 21 waveform memory, 22 DAC, 23 sound system, 24 Bus line, 30 sound source control register, 30a mask register, 30b initial register, 30c note-on register, 30d target value register, 30e rate register, 31 time measurement unit, 32 multi-EG unit, 32a comparator, 32b adder / subtractor, 32c selector 32d Current value register, 32e Load signal generator, 32f Arrival flag generator, 32g Interrupt generator, 33 Address generator, 34 Interpolator, 35 DCF, 36 Amplitude controller, 37 Mixer & DSP unit, 1 4 bus lines, 130 sound source control register, 130a initial register, 130b envelope value, 130b EG parameter register, 132 envelope generation unit, 132a EG unit, 132b arrival detection means, 132c current value register, 132d arrival flag generation unit, 132e interrupt Generator

Claims (2)

A sound source control register to which a musical sound parameter supplied from the control means is written when a musical sound is generated;
The tone generator control register has a current value register in which a musical tone parameter written at the start of waveform generation is written, generates a waveform signal using the musical tone parameter written in the current value register, and A waveform generation unit that generates a waveform signal by performing a process in which the next musical tone parameter that has been written is set to a musical tone parameter of the current value register as a target value;
Generating means for generating an arrival flag and an interrupt signal when the musical sound parameter written in the current value register reaches a target value;
First timer means for counting the time from when the musical sound parameter written in the sound source control register is read until the writing to the current value register is completed;
When the control means receives the interrupt signal and writes the next musical tone parameter to the tone generator control register, it counts a time longer than the operation delay time until the writing result is reflected in the arrival flag. 2 timers,
After the first timer means has timed out, the control means writes the next musical tone parameter of the same type to the sound source control register, and the arrival flag and the interrupt signal until the second timer expires. A sound source device characterized by masking. Musical tone parameters corresponding to a plurality of types of waveform signals are written in the sound source control register, and the waveform generation unit generates the plurality of types of waveform signals using the musical tone parameters, respectively. And when the read-out setting for the specific waveform signal among the plurality of types of the waveform generation unit is performed by the control means, the arrival flags of all the channels in the specific waveform signal are sufficient. A third timer that counts a predetermined period of time, and when the interrupt signal is generated, the control means performs a read setting for the specific waveform signal of the plurality of types of the waveform generator. Then, the arrival flag is detected in response to time-out of the third timer, and the next musical sound parameter in the corresponding channel is detected. Sound source apparatus according to claim 1, characterized in that was to be written into the tone generator control register.

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