JP3692898B2 - Debugger and data processing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a debugger and a data processing method for developing an application program using a virtual processor code devised for efficient application development.
[0002]
[Prior art]
Running application programs on various CPU platforms without any change has a great impact on the reduction of development costs and distribution costs. In recent years, virtual processors and translator technology are becoming reality.
[0003]
Usually, when developing an application program, a device called a debugger is used to check its operation. A debugger is a device that supports the task of tracking, identifying, and eliminating bugs in application programs. There are several basic methods for debuggers:
[0004]
(1) The display side of the debugger and the host side that issues operation instructions and the target side that is the actual machine are connected by a serial cable, Ethernet cable, etc., and the target side communicates with the host side and executes instructions issued by the host A method in which there is a debugger code and a program to be debugged (remote method).
[0005]
(2) The display side of the debugger and the host side that issues an operation instruction and the target side that is the actual machine are connected by a ROM socket, and the debugger code that executes communication and instructions issued by the host and the program to be debugged are connected to the host side. Existing method (method called ROM-ICE or soft ICE). A part of the debugger program is placed in the target CPU space.
[0006]
(3) A method in which the display part of the debugger and the host side that issues an operation instruction are connected to a debugging terminal attached to the CPU of the actual machine (JTAG method or the like). The debugger program is not placed in the target CPU space.
[0007]
(4) A system (in-circuit emulator (ICE) system) composed of a debugger display portion and a host side that issues an operation instruction, and a dedicated CPU that replaces the actual CPU. The debugger program is generally placed in the space of a dedicated CPU that replaces the actual machine.
[0008]
In any of the above methods, when developing a debugger, even if there is one already developed for another CPU, if the target CPU is different, it is impossible to divert the existing debugger as it is. This is because the interrupt function of each CPU, the number of registers, the usage method, the memory allocation method of the program, and the like differ depending on each CPU.
[0009]
Conventionally, even if the content is basically the same program, the CPU and OS are different, so that the corresponding code has to be developed or ported. For example, the fact that a specific game software can be operated only by a specific game device includes many non-technical elements such as a sales strategy, but is also technically difficult. In order to develop to cope with a plurality of different devices, a great deal of time and labor has been required.
[0010]
In order to correct such inefficiency of application development, a solution by a virtual processor that defines a VP (Virtual Processor) assembly language that does not depend on a specific CPU and its execution code is disclosed in Japanese Patent Publication No. 8-502612. Is disclosed. According to this, an application program is written in a high-level language such as C or a VP assembly language, and becomes a VP execution code by a compiler or a VP assembler. The VP execution code is converted into a real CPU execution code by a translator corresponding to the real CPU and executed. By preparing a translator for each CPU, any type of real CPU can be used, and various types of real CPUs can be used in combination. The VP execution code is guaranteed to run on supported translators and CPUs. Thus, a program file in VP executable code format can be transferred to any supported processor and executed there.
[0011]
[Problems to be solved by the invention]
Usually, a debugger required for developing an application program is made up of software developed for the real CPU in consideration of the real CPU. Even if there is something that has already been developed for another CPU, it is impossible to divert the existing debugger as it is if the actual CPU is different. This is because the CPU interrupt function, the number of registers, the usage method, the memory allocation method of the program, and the like are different.
[0012]
In addition, a debugger necessary for developing an application program that runs on an embedded device or the like has conventionally had a problem that when it corresponds to a new CPU, it does not function at all unless the software set is developed together. An object of the present invention is to provide a debugger and a data processing method for performing debugging at a high level language such as C language, a VP assembly language, and a VP execution code level without developing the entire software set.
[0013]
[Means for Solving the Problems]
In view of the above-described conventional problems, in the present invention, a command sending unit uses a virtual processor that defines a VP assembly language that does not depend on a specific CPU and a VP execution code corresponding to the VP assembly language. The code file and the information indicating the relationship between the source code file of the program and the VP execution code file described in the VP execution code are recorded, and an instruction in the VP execution code is issued to the command receiving unit for debugging. .
[0014]
That is, according to the present invention, a debugger that uses a VP assembly language that does not depend on a specific CPU and a virtual processor that defines a VP execution code corresponding to the VP assembly language,
And VP executable code file, to the command receiver side VP executable code file has a recording means for recording the information indicating the relationship between the native executable code file written in native executable code is a CPU-specific code A command sending unit for issuing an instruction in the VP execution code ;
An interface for delivering the instruction and delivering a response from the command receiving unit to the command sending unit in response to the instruction;
The command sending unit records recording means for recording a source code file of a program to be debugged and information indicating a relationship between the source code file of the program and a VP execution code file described in the VP execution code A debugger is provided.
[0015]
According to the present invention, there is provided a debugger that uses a VP assembly language that does not depend on a specific CPU and a virtual processor that defines a VP execution code corresponding to the VP assembly language,
A command sending unit that issues an instruction in the VP execution code;
A command receiving unit that receives the instruction and executes the instruction;
An interface for delivering the instruction and delivering a response from the command receiving unit to the command sending unit in response to the instruction;
The command sending unit records recording means for recording a source code file of a program to be debugged and information indicating a relationship between the source code file of the program and a VP execution code file described in the VP execution code Have
The command receiving unit includes recording means for recording the VP execution code file and information indicating a relationship between the native execution code file described in a native execution code in which the VP execution code file is a CPU-specific code. A debugger is provided.
[0017]
According to the present invention, there is provided a debugger that uses a VP assembly language independent of a specific CPU and a virtual processor that defines a VP execution code corresponding to the VP assembly language, and issues an instruction in the VP execution code. The command sending unit side, the command receiving unit side that receives the instruction and executes the instruction, the instruction delivery, and the response to the instruction from the command receiving unit side to the command sending unit side The command sending unit side includes information indicating a relationship between a source code file of a program to be debugged and a VP execution code file in which the source code file of the program is described by the VP execution code. And the command receiving unit side is configured to record the VP execution code. Files and, in the debugger having a recording means for the VP executable code file records and information indicating the relationship between the native executable code file written in native executable code is a CPU-specific code, it does not depend on the particular CPU VP A data processing method using an assembly language and a virtual processor that defines a VP execution code corresponding to the VP assembly language,
The command sending unit refers to information indicating a relationship between a source code file of a program to be debugged and a VP execution code file in which the source code file of the program is described by the VP execution code. Issuing processor level instructions; and
The command receiving unit receiving the instruction via an interface;
The command receiving unit refers to information indicating a relationship between the VP execution code file and a native execution code file described in a native execution code in which the VP execution code file is a CPU-specific code;
The command receiving unit side executing the instruction;
A data processing method is provided.
[0018]
According to the present invention, there is provided a debugger that uses a VP assembly language independent of a specific CPU and a virtual processor that defines a VP execution code corresponding to the VP assembly language, and issues an instruction in the VP execution code. The command sending unit side, the command receiving unit side that receives the instruction and executes the instruction, the instruction delivery, and the response to the instruction from the command receiving unit side to the command sending unit side The command sending unit side includes information indicating a relationship between a source code file of a program to be debugged and a VP execution code file in which the source code file of the program is described by the VP execution code. And the command receiving unit side is configured to record the VP execution code. Files and, in the debugger having a recording means for the VP executable code file records and information indicating the relationship between the native executable code file written in native executable code is a CPU-specific code, it does not depend on the particular CPU VP A data processing method using an assembly language and a virtual processor that defines a VP execution code corresponding to the VP assembly language,
The command sending unit issues an instruction at the virtual processor level with reference to information indicating the relationship between the source code file of the program to be debugged and the source code file of the program and the VP execution code file. Steps,
The command receiving unit receiving the instruction via an interface;
The command receiving unit side refers to information indicating a relationship between the VP execution code file and a native execution code file described in a native execution code in which the VP execution code file is a CPU-specific code;
There is provided a data processing method for sequentially executing the steps using a CPU-specific step execution function.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
The debugger and data processing method of the present invention will be described below with reference to the drawings. In the present invention, a VP assembly language independent of a specific CPU and a virtual processor that defines a VP execution code corresponding to the VP assembly language are used. The application program is described in a high-level language such as C language or a VP assembly language.
[0020]
FIG. 1 is a block diagram showing a debug record in the embodiment of the present invention. The relationship between each C language line and each line offset of the VP execution program is recorded in the debug record recording means DBGR1. On the other hand, the translator for converting the VP execution file into the execution code (Native code) of the real CPU records the offset of the Native code corresponding to each offset of the VP execution code in the debug record recording means DBGR2.
[0021]
Translators are created for each type of real CPU, but the format of the debug record between the VP execution code and the Native execution code is unified to be unchanged. For example, as shown in FIG. 1, the debug record recording unit DBGR2 records the position where each line in the VP execution code corresponds to the offset of the Native execution code. Also, mapping information for function names and variables defined in the C source is recorded in the debug record recording means DBGR3 as shown in FIG. In other words, a memory or VP register in which the function name or variable name and its entity are allocated, and an item indicating whether the function name or variable name and its entity are allocated in the memory or the register are recorded. Although not shown, the scope of functions and variables is also recorded in the debug record recording means DBGR3 at the same time.
[0022]
Although the above description has been given of a source program written in C language, the source program written in VP assembly language is equivalent in terms of debug record generation. That is, except for the stabs described above, the source code is equivalent in terms of debug record generation. That is, a program written in the VP assembly language generates DBGR1 with the VP assembly language as a source. The debug records DBGR1 and DBGR3 are generated by a compiler or assembler that generates VP execution code. On the other hand, DBGR2 and DBGR4 are generated by a translator.
[0023]
The present invention relates to a debugging method for debugging an application program, characterized in that the DBGR2 and DBGR4 equivalent debug records are held together with the application program on the target side of an interface (host-target interface). A debugger and a data processing method. Note that this interface is not necessarily a physical interface. For example, in the case of full ICE or JTAG-ICE, there is an interface between the PC called the host or the probe connected to the PC, so-called host called PC side and remote such as serial or Ethernet or ROM socket When a real machine is connected by connection, an interface exists between the PC side and the real machine. That is, the host (command sending unit) and the target (command receiving unit) here are clarified from the location of the interface.
[0024]
In other words, the present invention can be said to be a debugging method characterized by providing an interface between the side including DBGR1 and DBGR3 and the side including DBGR2 and DBGR4. That is, the host is normally configured as software on a PC, and the target is physically configured by a serial cable, Ethernet, or the like, but the interface may actually be on the PC. . Hereinafter, for convenience of explanation, DBGR2 and DBGR4 will be described as being on the actual machine target. Further, when the interface is on the PC, it is interpreted that a part of the target function is physically on the PC.
[0025]
An embodiment according to the debugger and data processing method of the present invention will be described on the assumption that an application program is downloaded to a target in advance. DBGR1 determines the position of the line designated in the C language in the VP execution code. When the user requests step execution of the line in C language, the debugger host obtains an offset in VP from the information of DBGR1, and uses the value as an argument to execute an instruction to execute VP code corresponding to one line of C. Send to target via interface.
[0026]
The target interprets the execution instruction received via the interface. Refer to DBGR3 to obtain the actual execution address by referring to the actual native address offset and the physical address map of the function. The function physical address map determines the actual placement of the function on the target. It instructs to convert the relocatable (offset-based) native execution code output by the translator into a file format (for example, an industry standard format such as Intel Hex) for mapping to an address specified by the user.
[0027]
Variables defined in C language are defined in DBGR3. When the user tries to refer to a variable defined in the C language, DBGR3 is first referred to, and it is known where it is arranged in the VP register or data area. If it is located in the VP register, the target side requests the value of the VP register from the target via the interface. The target side refers to the DBGR4, and when the VP register corresponds to the native register, acquires the value and returns the value to the host through the interface. When the VP register is arranged in the memory, if the information is in the memory, the value is obtained from the offset indicated by DBGR4 and the known variable area start address, and the value is sent to the host side via the interface. return it.
[0028]
On the other hand, if it becomes clear at this point that the variable defined in C language is located in the memory as a result of the search of DBGR3, the memory address and the known variable area start address are transmitted via the interface. Get the value and return the value through the interface. As described above, if debug records DBGR1 to DBGR4 are provided, an interface is provided between (DBGR1, DBGR3) and (DBGR2, DBGR4), the former is placed on the host side, and the latter is placed on the target side, the debugger host The side software can exchange with the target side at the VP level. On the other hand, the VP execution code of the application program is generated by a common compiler and assembler together with debug records corresponding to DBGR1 and DBGR3.
[0029]
Therefore, when creating a debugger for a new CPU, a translator is developed as the first point, and real processor code is generated together with a debug record equivalent to DBGR2 and DBGR4 for an application program that is a VP execution code. Secondly, if a debugger stub code that communicates with the host PC is developed, the host-side debugger that has already been developed (if developed) can be used via the interface. .
[0030]
That is, according to the present invention, an interface is provided between (DBGR1, DBGR3) and (DBGR2, DBGR4), the former is arranged on the host side, and the latter is arranged on the target side, and the exchange between them is performed on a VP basis. Thus, if the above two developments are performed, debugging in a high-level language such as C language or the VP code level becomes possible. This solves the problem that the debugger does not function at all unless the host and target are developed in pairs.
[0031]
It is also possible to record a program for performing the data processing method of the present invention on a recording medium. By reading a program from a recording medium on which the data processing method is recorded, a function performed by the debugger of the present invention can be realized, and the data processing method of the present invention can be executed. The recording medium can be read by a computer. Specific examples of the recording medium include a magnetic recording medium such as a hard disk and a floppy disk, an optical recording medium, and a recording means including a magneto-optical recording medium. Furthermore, it is possible to transmit a program for performing the data processing method of the present invention on a transmission medium. When a computer connected by a transmission medium reads a program for performing the data processing method, the function performed by the debugger of the present invention can be executed, and the data processing method of the present invention can be executed. The transmission medium can transmit digital data in a predetermined format to a computer. Specific examples of the transmission medium include an optical cable, a wireless LAN, a public line, an ISDN, a satellite broadcast line, a cable TV line, and the like. Is mentioned.
[0032]
【The invention's effect】
According to the present invention, the conventional problem that the debugger does not function at all when the host side software and the target side software are not developed or ported in pairs is solved, and debugging is performed at the C or VP code level without any change on the host side. Therefore, before developing a debugging function depending on individual CPUs such as seeing the detailed value of the native register, it becomes possible to debug at the C language or VP level using the already developed debugger host. . Also, in the case of development in C language or the like, it is not always necessary to debug with a native register or a native assembler base, and it is often sufficient at the C language source level. If it goes around, there is an advantage that it is not necessary to develop a debugger after that.
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing a debug record in an embodiment of the present invention.
[Explanation of symbols]
1, 3 Debug record recording means DBGR (host side)
2, 4 Debug record recording means DBGR (target side)

Claims (4)

A debugger that uses a VP assembly language independent of a specific CPU and a virtual processor that defines a VP execution code corresponding to the VP assembly language,
And VP executable code file, to the command receiver side VP executable code file has a recording means for recording the information indicating the relationship between the native executable code file written in native executable code is a CPU-specific code A command sending unit for issuing an instruction in the VP execution code ;
An interface for delivering the instruction and delivering a response from the command receiving unit to the command sending unit in response to the instruction;
The command sending unit records recording means for recording a source code file of a program to be debugged and information indicating a relationship between the source code file of the program and a VP execution code file described in the VP execution code Debugger with A debugger that uses a VP assembly language independent of a specific CPU and a virtual processor that defines a VP execution code corresponding to the VP assembly language,
A command sending unit that issues an instruction in the VP execution code;
A command receiving unit that receives the instruction and executes the instruction;
An interface for delivering the instruction and delivering a response from the command receiving unit to the command sending unit in response to the instruction;
The command sending unit records recording means for recording a source code file of a program to be debugged and information indicating a relationship between the source code file of the program and a VP execution code file described in the VP execution code Have
The command receiving unit includes recording means for recording the VP execution code file and information indicating a relationship between the native execution code file described in a native execution code in which the VP execution code file is a CPU-specific code. Has a debugger. A debugger that uses a VP assembly language that does not depend on a specific CPU and a virtual processor that defines a VP execution code corresponding to the VP assembly language, the command sending unit issuing an instruction in the VP execution code; A command receiving unit that receives the instruction and executes the instruction; and an interface that transfers the instruction and passes a response from the command receiving unit to the command sending unit in response to the instruction, The command sending unit includes recording means for recording a source code file of a program to be debugged and information indicating a relationship between the source code file of the program and a VP execution code file described by the VP execution code. The command receiving unit side includes the VP execution code file and the V In debugger having a recording means for executing code file records and information indicating the relationship between the native executable code file written in native executable code is a CPU-specific code, and VP assembly language that is independent of the particular CPU, the A data processing method using a virtual processor that defines a VP execution code corresponding to a VP assembly language,
The command sending unit refers to information indicating a relationship between a source code file of a program to be debugged and a VP execution code file in which the source code file of the program is described by the VP execution code. Issuing processor level instructions; and
The command receiving unit receiving the instruction via an interface;
The command receiving unit refers to information indicating a relationship between the VP execution code file and a native execution code file described in a native execution code in which the VP execution code file is a CPU-specific code;
The command receiving unit side executing the instruction;
A data processing method. And VP assembly language that is independent of the particular CPU, a said a debugger utilizes the virtual processor that defines the VP execution code corresponding to the VP assembly language, command sending portion that emits an indication in the VP execution code, The command receiving unit side that receives the instruction and executes the instruction, and an interface that performs the delivery of the instruction and the delivery of a response from the command receiving unit side to the command sending unit side with respect to the instruction, The command sending unit records recording means for recording a source code file of a program to be debugged and information indicating a relationship between the source code file of the program and a VP execution code file described in the VP execution code The command receiving unit side includes the VP execution code file and the V In debugger having a recording means for executing code file records and information indicating the relationship between the native executable code file written in native executable code is a CPU-specific code, and VP assembly language that is independent of the particular CPU, the A data processing method using a virtual processor that defines a VP execution code corresponding to a VP assembly language,
The command sending unit issues an instruction at the virtual processor level with reference to information indicating the relationship between the source code file of the program to be debugged and the source code file of the program and the VP execution code file. Steps,
The command receiving unit receiving the instruction via an interface;
The command receiving unit side refers to information indicating a relationship between the VP execution code file and a native execution code file described in a native execution code in which the VP execution code file is a CPU-specific code;
A data processing method for sequentially executing the steps using a step execution function unique to a CPU.

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