JP3691890B2 - IC card clock switching control method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a control method in an apparatus for reading data from or writing data to a so-called IC card as a data storage medium, and in particular for switching the frequency of a clock signal applied to the IC card. It is related with the thing which aimed at the improvement of control.
[0002]
[Prior art]
An IC card has a memory in which data can be electrically written and read, a microcomputer for controlling the operation of the entire card, etc., and is formed in a card shape. In recent years, the range of use has been expanded due to the advantages.
Such an IC card is capable of reading and writing data by receiving supply of power, clock, etc. from an IC card reading / writing device. Regarding the supplied signal, the International Organization for Standardization (ISO) Has been internationally standardized (see ISO / IEC7816-3).
[0003]
[Problems to be solved by the invention]
However, the frequency of the clock signal used in the IC card has not yet been unified, and currently, roughly divided, two frequencies of 3.5712 MHz and 4.9152 MHz are used.
For this reason, most IC card reading / writing devices are configured to be compatible with these two clock frequencies in order to be highly versatile.
[0004]
As described above, in an IC card reading / writing device capable of dealing with two types of clock signal frequencies, when determining the frequency of the clock signal supplied to the IC card, first, at any one of the clock signal frequencies. If the IC card is determined to be compatible, and if it is determined to be non-compatible, the IC card reading / writing device performs processing such as determining whether the other clock signal frequency is compatible. This is done every time it is connected.
[0005]
For this reason, for example, when an IC card used is always only one of the clock signal frequencies, or an IC card that requires the other clock signal frequency is rarely used. In the IC card reading / writing device, there is no problem if the clock signal frequency determined first matches that of the IC card. In this case, since it is determined that the clock signal frequency is different first, and then the determination is made regarding the suitable frequency, processing time is required.
Therefore, particularly when a large number of IC cards are read / written continuously, there is a problem that the time loss due to the above-described duplication processing cannot be ignored.
[0006]
Further, with regard to the IC card, there is no problem if the applied clock signal frequency matches the clock signal frequency of the IC card in the so-called activation process performed by the IC card reading / writing device. If they are different, a clock signal having a frequency different from the clock signal frequency of the IC card is applied in the first activation process every time the IC card reading / writing device is used. For this reason, electrical stress is applied to electronic components such as a semiconductor memory used in the IC card, and the life of these electronic components, and hence the life of the IC card, is shortened, and the reliability of the IC card is reduced. There was a problem.
[0007]
The present invention has been made in view of the above-described circumstances, and provides an IC card clock switching control method that can minimize the duplication process when connecting an IC card and can improve the working efficiency. .
Another object of the present invention is to provide a clock switching control method for an IC card that minimizes stress applied to electronic components.
[0008]
[Means for Solving the Problems]
An IC card clock switching control method according to the present invention includes:
A clock switching control method at the time of activation processing of an IC card in an IC card reading / writing device capable of generating a clock signal at a plurality of frequencies, which is connected immediately before the IC card is connected. When the frequency of the clock signal supplied to the IC card is generated and supplied to the IC card, the frequency of the clock signal first supplied to the IC card is determined to be incompatible. A clock signal having a frequency of 1 is sequentially generated and supplied.
[0009]
In this configuration, when the clock signal is supplied to the IC card, the clock signal having the same frequency as the clock signal supplied to the IC card processed immediately before is supplied. When a large number of IC cards using the IC are continuously processed, it is possible to avoid duplicate processing such as determining for each IC card which frequency is suitable from among a plurality of clock signals, which is efficient. The IC card can be processed.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 3.
The members and arrangements described below do not limit the present invention and can be variously modified within the scope of the gist of the present invention.
First, the configuration of an IC card reading / writing device (hereinafter referred to as “this device”) using the IC card clock switching control method according to the embodiment of the present invention will be described with reference to FIG.
[0011]
The so-called hardware configuration of this apparatus is basically the same as this type of conventional apparatus.
That is, this apparatus reads data from the IC card 10 and writes data to the IC card 10, and includes a central control unit 1, a power supply unit 2, a clock signal generation unit (in FIG. 3 ”).
[0012]
The central control unit 1 controls the operation of the entire apparatus, and performs an IC card activation process, which will be described later, by executing a program stored in a memory (not shown) of the central control unit 1. It is what has become.
The power supply unit 2 outputs a power supply voltage Vcc to be supplied to the IC card 10 in accordance with control from the central control unit 1.
[0013]
The clock signal generating unit 3 generates a clock signal to be applied to the IC card 10 and can generate clock signals having two frequencies in accordance with the control of the central control unit 1. .
[0014]
In addition to the power supply voltage Vcc from the power supply unit 2 and the clock signal from the clock signal generation unit 3, the connection unit 4 to which the IC card 10 is connected has a reset signal (“RST” in FIG. 1). ”Is output, and the I / O terminal (indicated as“ I / O ”in FIG. 1) of the central control unit 1 is connected to exchange data with the IC card 10. Has been made.
[0015]
Note that the above-described configuration is the minimum necessary configuration. Actually, a display unit for displaying read data from the IC card 10, a keyboard for inputting commands and the like, and the IC card 10. More preferably, it is configured to have a printing unit for printing the reading result and the writing result from the printer.
[0016]
Next, with reference to FIGS. 2 and 3, the operation of this apparatus, in particular, the procedure of the clock switching control method during the activation process will be described.
First, when the IC card 10 is connected via the connection unit 4 of this apparatus, it is determined whether or not the power supply voltage Vcc is normally applied to the IC card 10 (see step 100 in FIG. 2). This determination is performed, for example, by determining whether or not the output current value of the power supply unit 2 is in a predetermined range.
[0017]
If it is determined that the voltage is not normally applied (in the case of YES), the error bit is cleared, and predetermined predetermined data corresponding to the fact that the power supply voltage Vcc is not normally applied. Is output from the I / O terminal of the central control unit 1 and transmitted to the IC card 10 via the connection unit 4, and this activation process is completed (steps 116 and 118 in FIG. 2 and FIG. 3). reference). The error bit is determined to identify whether or not an abnormality has occurred, and is stored in a memory (not shown) of the central control unit 1.
[0018]
On the other hand, when it is determined that the application of the power supply voltage Vcc is normal (in the case of NO), it is determined whether or not the IC card 10 is completely connected to the present apparatus (see step 102 in FIG. 2). When it is determined that the IC card 10 is not completely connected (in the case of NO), predetermined predetermined data corresponding to incomplete connection of the IC card 10 is transmitted to the IC card 10 Then, the process ends (see step 120 in FIG. 2 and FIG. 3).
[0019]
On the other hand, when it is determined that the connection of the IC card 10 is normal (in the case of YES), the frequency of the clock signal applied to the IC card can be output by this apparatus at the time of the previous IC card connection. Which of the two frequencies is determined from the frequency information of the clock signal used last time stored in a memory (not shown) of the central control unit 1 (see step 104 in FIG. 2).
[0020]
Then, the control signal is output from the central control unit 1 so that the clock signal is output from the clock signal generation unit 3 at the frequency of the previous clock signal, and the clock signal generation unit 3 oscillates at the frequency of the previous use. (Step 106 in FIG. 2).
Subsequently, a reset signal is output from the central control unit 1 to the IC card 10, so that the IC card 10 is supplied with power and reset (power-on reset) (see step 108 in FIG. 2). .
[0021]
After the power-on reset, it is determined whether or not the power supply voltage Vcc is normal (see step 110 in FIG. 2). If it is determined that the power supply voltage Vcc is abnormal (in the case of NO), the power supply voltage Vcc is determined. Predetermined predetermined data corresponding to the abnormality is output from the I / O terminal of the central control unit 1 and transmitted to the IC card 10 via the connection unit 4, and this activation process is completed. (See step 122 in FIG. 2 and FIG. 3).
[0022]
On the other hand, when the power supply voltage Vcc is determined to be normal (in the case of YES), it is determined whether or not the initial response data (Answer to Reset) from the IC card 10 is normal (step in FIG. 2). 112).
Then, when it is determined that the initial response data (indicated as “ATR” in FIG. 2) is normal (in the case of YES), a predetermined term called ATR data is sent from the apparatus to the IC card 10. Is transmitted, and the series of activation processes is completed (see step 124 in FIG. 2).
[0023]
If it is determined in step 112 that the ATR is abnormal (in the case of NO), it is determined whether or not the above-described series of processing from steps 108 to 112 has been repeated three times, and has been repeated three times. If it is determined that there is not (in the case of NO), the process returns to the previous step 108, and each process after the step is repeated, while if it is determined that the process has been repeated three times (in the case of YES). In this case, the frequency of the clock signal is switched (see step 126 in FIG. 3).
[0024]
That is, even if the series of steps 108 to 112 is repeated three times, it is determined that the ATR is abnormal because the frequency of the clock signal supplied to the IC card 10 is not suitable, and the first applied clock The clock signal generator 3 generates a clock signal different from the frequency of the signal, that is, the other frequency of the apparatus.
[0025]
After the frequency of the clock signal is switched, basically the same processing as the processing of the previous steps 108 to 112 and steps 122 and 124 is executed. That is, a power-on reset (see step 128 in FIG. 3), a determination as to whether the power supply voltage Vcc is normal (see step 130 in FIG. 3), and a determination as to whether the ATR is normal (see step 132 in FIG. 3). When it is determined that the ATR abnormality has occurred (in the case of NO), it is further determined whether or not a series of these processes has been performed three times (step 134 in FIG. 3). reference).
[0026]
When the power supply voltage Vcc is determined to be abnormal (in the case of NO), predetermined predetermined data corresponding to the power supply voltage Vcc being abnormal is transmitted from the I / O terminal of the central control unit 1. The data is output and transmitted to the IC card 10 via the connection unit 4, and the activation process ends (see step 140 in FIG. 3).
When it is determined that the ATR is normal (in the case of YES), it is assumed that the frequency of the clock signal switched in the previous step 126 is compatible with the IC card 10 and the ATR data and The predetermined data referred to is transmitted, and a series of activation processes is completed (see step 142 in FIG. 3).
[0027]
On the other hand, if it is determined in step 134 that the processes in steps 128 to 132 are repeated three times (in the case of YES), the frequency of the clock signal is switched again, and in step 106 (see FIG. 2). The frequency of the first applied clock signal is set (see step 136 in FIG. 3), and then predetermined data is transmitted to the IC card 10 to complete a series of processes (see step 138 in FIG. 3). ).
[0028]
Here, the data transmitted to the IC card 10 by the execution of step 138 is transmitted in response to the fact that none of the frequencies of the clock signals applied to the IC card 10 by the present apparatus conform to the IC card 10. Therefore, the data is predetermined data required to stop reading data from the IC card 10.
[0029]
As described above, in this apparatus, the frequency of the clock signal in the previous IC card connection is first applied when the next IC card is connected. When processing a large number of cards in a row, unlike the conventional method, a process is first performed to determine whether or not a clock signal with a different frequency is suitable, and then to determine the original frequency. The so-called duplication processing that is performed for each IC card can be avoided, and the processing time is shortened and the work efficiency is improved.
[0030]
In the above-described embodiment of the present invention, the case where the IC card reading / writing device can generate the clock signal at two frequencies has been described. However, the frequency of the clock signal that can be generated is limited to two. Of course, the clock switching control method of the IC card according to the present invention can be similarly applied even when there are three or more cases.
[0031]
【The invention's effect】
As described above, according to the present invention, when an IC card activation process is performed, a clock signal suitable for the IC card is determined and selected from a plurality of clock signals, and is wasted. By configuring so that processing need not be performed as much as possible, when supplying a clock signal to an IC card, a clock signal having the same frequency as that of the IC card processed immediately before is applied first. When processing a large number of IC cards that use the same clock signal, it is possible to avoid a wasteful process in which a clock signal with a different frequency is applied first, and to improve the efficiency of the clock signal switching process. Furthermore, work efficiency can be improved.
[0032]
In addition, since the probability that an incompatible clock signal is applied to the IC card can be reduced, it is possible to reduce the stress on the electronic components inside the IC card and contribute to the extension of the life of the IC card. It is possible to improve the reliability of the IC card.
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing a configuration example of an IC card reading / writing device using an IC card clock switching control method according to an embodiment of the present invention.
FIG. 2 is a flowchart showing a procedure of an IC card activation process in the IC card reading / writing device shown in FIG. 1;
FIG. 3 is a flowchart showing a procedure of an IC card activation process in the IC card reading / writing device shown in FIG. 1;
[Explanation of symbols]
1 Central control unit 2 Power supply unit 3 Clock signal generation unit 4 Connection unit

Claims (1)

A clock switching control method at the time of activation processing of an IC card in an IC card reading / writing device capable of generating a clock signal at a plurality of frequencies, which is connected immediately before the IC card is connected. When the frequency of the clock signal supplied to the IC card is generated and supplied to the IC card, the frequency of the clock signal first supplied to the IC card is determined to be incompatible. A clock switching control method for an IC card, which sequentially generates and supplies a clock signal having a frequency of.

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