JP3687732B2 - Motor speed control signal generator - Google Patents

Motor speed control signal generator Download PDF

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JP3687732B2
JP3687732B2 JP2000178132A JP2000178132A JP3687732B2 JP 3687732 B2 JP3687732 B2 JP 3687732B2 JP 2000178132 A JP2000178132 A JP 2000178132A JP 2000178132 A JP2000178132 A JP 2000178132A JP 3687732 B2 JP3687732 B2 JP 3687732B2
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signal
operational amplifier
input terminal
voltage level
capacitor
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JP2001061289A (en
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充正 久保
正 田中
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Teac Corp
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Teac Corp
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【０００１】
【発明の属する技術分野】
本発明は、ＣＤ−ＲＯＭ装置等の光ディスク装置の光学ピックアップの移送等に使用されるモータの速度制御信号形成装置に関する。
【０００２】
【従来の技術】
ブラシレス直流モータをデータ記録又は再生用ディスク装置のディスク回転用モータ又は光学ピックアップの送りモータとして使用する場合には、例えば、特開平４−３６２５６６号公報に示されているようにモータの回転速度の制御が要求される。このため、従来のブラシレス直流モータは、速度検出器を有している。
また、ブラシレス直流モータの固定子にホール素子を配置し、このホール素子の出力を整流して速度信号を得ることが特開平３−１６０６６号公報に開示されている。
【０００３】
【発明が解決しようとする課題】
ところで、速度検出器を独立に設けると、必然的にモータの制御回路がコスト高になる。また、特開平３−１６０６６号公報に開示されている方法では回路構成が複雑になり且つ速度信号のリップルが大きくなる。
【０００４】
そこで、本発明の目的は速度検出信号又は速度制御信号を簡単な回路によって形成することができるモータの速度制御信号形成装置を提供することにある。また本発明の別の目的はリップルを小さくすることができるモータの速度制御信号形成装置を提供することにある。
【0005】
【課題を解決するための手段】
上記課題を解決し、上記目的を達成するための本発明は、第１、第２及び第３の固定子巻線と、永久磁石から成る回転子と、前記第１、第２及び第３の固定子巻線に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記永久磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記第１、第２及び第３相固定子巻線と前記永久磁石との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の固定子巻線の励磁電流の切換を行うと共に、前記回転子を目標速度に回転させるように前記第１、第２及び第３の固定子巻線の励磁電流を制御する励磁制御手段とを備えたブラシレス直流モータの速度制御信号を形成するための装置であって、前記第１、第２及び第３の位置検出信号をそれぞれ微分して前記第１，第２及び第３の位置検出信号に対して９０度の進み位相を有する第１、第２及び第３の微分信号を形成する第１、第２及び第３の微分回路と、前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、前記第１の微分回路から得られた前記第１の微分信号を前記第３の二値信号の前記第１の電圧レベルの期間のみ通過させるための第１のスイッチと、前記第２の微分回路から得られた前記第２の微分信号を前記第１の二値信号の前記第１の電圧レベルの期間のみ通過させる第２のスイッチと、前記第３の微分回路から得られた前記第３の微分信号を前記第２の二値信号の前記第１の電圧レベルの期間のみ通過させる第３のスイッチと、前記第１、第２及び第３のスイッチの出力を加算して前記回転子の回転速度検出信号を出力する加算手段と、前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、前記目標回転速度を示す信号と前記回転速度検出信号との差に対応する値を求め、この値を速度制御信号として前記励磁制御手段に供給する演算手段とを備えたモータの速度制御信号形成装置に係わるものである。
【０００６】
なお、請求項７〜１２に示すように回転子と共に回転する磁石を設け、この磁石の磁束を磁電変換素子で検出し、回転速度を検出することが出来る。この場合のモータは、ブラシを有しているＤＣモータであっても良いし，また交流モータであっても良い。
また、請求項２，３，８，９に示すように１つの演算増幅器を微分と加算との両方に使用することが望ましい。また、第４、第５及び第６のスイッチを設け、微分用の第１、第２及び第３のコンデンサを選択的に放電させることが望ましい。
また、請求項３，５，６，９，１１，１２に示すように、１つの演算増幅器を微分と加算の他に速度制御信号を形成するための減算にも使用することができる。
また、請求項４，５，１０，１１に示すように、第４〜第６のスイッチを設け、第１〜第３のスイッチと反対に動作させ、微分信号を全波整流したと等価な速度検出信号を得ることができる。
また、請求項１３に示すように、二値信号形成回路を第１、第２及び第３の遅延位置信号形成回路と第１、第２及び第３の波形整形回路で構成することが望ましい。
請求項１４に示すように第１、第２及び第３の遅延位置信号を第１、第２及び第３の位置検出信号から選択された２つの位置検出信号の加算即ちベクトル合成に基づいて形成することができる。
また、請求項１５に示すように位置検出手段を第１、第２及び第３の磁電変換素子にて構成することができる。
また、請求項１６に示すように、位置検出手段を、第１及び第２の位置検出信号を得るための第１及び第２の磁電変換素子と、第１及び第２の位置検出信号に基づいて第３の位置検出信号を形成する回路とで構成することができる。
【０００７】
【発明の効果】
各請求項の発明によれば、次の効果が得られる。
（イ）３０度遅延位置検出信号を使用することによって微分信号抽出を理想的に行うことができ、速度検出信号又は速度制御信号のリプルを良好に低減することができる。
（ロ）第３、第１及び第２の二値信号によって第１、第２及び第３のスイッチを制御するという簡単な回路でリプルの比較的小さい速度検出信号又は速度制御信号を容易に得ることができる。
また、請求項１〜６の発明においては、独立した速度検出器が設けられておらず、位置検出用の磁電変換素子（例えばホール素子）の出力に基づいて速度検出信号又は速度制御信号が形成されている。従って、速度検出回路又は速度制御信号形成回路の低コスト化又は小型化が達成される。また、速度検出信号又は速度制御信号が形成する時には、第１、第２及び第３の位置検出信号を微分し、この微分信号を選択的に抽出するか、又は整流と等価な変換を行うことが必要になる。本発明ではこの抽出又は整流を第１、第２及び第３の位置検出信号の３０度遅延信号に基づく第３、第１及び第２の二値信号によって第１、第２及び第３のスイッチを制御して行っている。従って、１つの直流の速度検出信号又は速度制御信号を得る時に必要になる第１〜第３のスイッチの制御を容易に達成することができる。
また、請求項２〜５，８〜１１の発明によれば、１つの演算増幅器を微分と微分信号の加算とに使用するために回路構成の単純化が達成される。
また、請求項３，４，９，１０の発明によれば、１つの演算増幅器を微分と、微分信号の加算と、速度検出信号と目標速度信号との減算とに使用するので、回路構成が更に単純化される。
請求項３〜５、１０，１１の発明によれば、第１、第２及び第３のスイッチと第４、第５及び第６のスイッチとの組み合せによって第１、第２及び第３の微分信号を全波整流したと等価な速度検出信号又は速度制御信号を得ることができ、これ等のリプルが更に小さくなる。
請求項１３及び１４の発明によれば３０度遅延位置検出信号及びこれに基づく二値信号を容易に形成することができる。
請求項１５の発明によれば、第１、第２及び第３の位置検出信号を第１、第２及び第３の磁電変換素子に基づいて容易に得ることができる。
請求項１６の発明によれば、２個の磁電変換素子によって第１、第２及び第３の位置検出信号が得られるので、コストの低減を図ることができる。
【０００８】
【実施形態及び実施例】
次に、図１〜図１７を参照して本発明の実施形態及び実施例を説明する。
【０００９】
【第１の実施例】
まず、図１〜図５に示す第１の実施例のブラシレス直流モータ装置を説明する。このブラシレス直流モータ装置は、図１に概略的に示すようにブラシレス直流モータ本体部１と、励磁制御手段としての制御及び駆動回路２と、第１、第２及び第３の磁電変換素子としてのホール素子３、４、５と、速度検出回路６と、目標速度信号発生器７と、速度制御信号形成用誤差増幅器８とから成る。なお、速度検出回路６と目標速度信号発生器７と誤差増幅器８とによって本発明に従う速度制御信号形成回路が構成されている。
【００１０】
ブラシレス直流モータ本体部１は、図２に原理的に示すように固定子９と回転子１０とから成り、アウターロータ型に構成されている。固定子９は、第１、第２及び第３の固定子巻線９ｕ、９ｖ、９ｗと磁性体から成るコア１１とから成る。コア１１は等角度間隔に配置された１２個のスロット１１ａによって分割され、１２個の歯１１ｂを有する。固定子巻線９ｕ、９ｖ、９ｗは９個の歯１１ｂに分割して巻回されている。ｕ、ｖ、ｗ相の固定子巻線９ｕ、９ｖ、９ｗが互いに隣接するように繰返して配置されているので、２つのスロット１１ａの相互間及び２つの歯１１ｂの相互間の電気角は１２０度即ち２π／３である。図２の例ではコア１１の３つの歯１１ｂに固定子巻線９ｕ、９ｖ、９ｗが巻回されていない。第１、第２及び第３のホール素子３、４、５は固定子巻線９ｕ、９ｖ、９ｗが巻回されていない歯１１ｂに隣接する３つのスロット１１ａの中央に電気角１２０度の相互間隔を有して順次に配置されている。これにより、ホール素子３、４、５に対する固定子巻線９ｕ、９ｖ、９ｗに基づく磁界の影響が軽減される。また、１２０度の位相差を順次に有する第１、第２及び第３の位置検出信号を第１、第２及び第３のホール素子３、４、５から得ることが可能になる。なお、ホール素子３、４、５に対する固定子巻線９ｕ、９ｖ、９ｗの磁界の影響をさほど問題にしない場合には、１２個の全ての歯１１ｂに固定子巻線９ｕ、９ｖ、９ｗを巻回することができる。
【００１１】
回転子１０は、８個のＮ極と８個のＳ極とを交互に有する円筒状永久磁石から成り、固定子９を囲むように配置されている。ホール素子３、４、５は、固定子巻線９ｕ、９ｖ、９ｗと一定の位置関係を有するように配置され且つ回転子１０に基づく磁束変化を検出することができる位置に配置されているので、回転子１０が回転すると、第１、第２及び第３のホール素子３、４、５から３相交流電圧から成る図５に示す第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3が得られる。第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3は相互に１２０度の位相差を有する正弦波３相交流電圧である。
【００１２】
図１において、モータの励磁制御手段としてのモータ制御及び駆動回路２は、固定子巻線９ｕ、９ｖ、９ｗの励磁電流の制御及び供給を行うものであり、ライン１２、１３、１４によって第１、第２及び第３のホール素子３、４、５に接続され、ライン１５によって速度制御信号形成用誤差増幅器８に接続されている。
【００１３】
図３はモータ制御及び駆動回路２を詳しく示すものである。このモータ制御及び駆動回路２は、直流電源１６、速度制御回路１７、トランジスタから成る第１、第２、第３、第４、第５及び第６の励磁切換用スイッチ１８、１９、２０、２１、２２、２３と、第１、第２及び第３の増幅器２４、２５、２６と、スイッチ切換信号形成回路２７とを有する。第１、第２及び第３の固定子巻線９ｕ、９ｖ、９ｗの一端は、第１、第３及び第５のスイッチ１８、２０、２２と速度制御回路１７とを介して直流電源１６の一端に接続され、且つ第２、第４及び第６のスイッチ１９、２１、２３を介して直流電源１６の他端に接続されている。第１、第２及び第３の固定子巻線９ｕ、９ｖ、９ｗの他端は互いに共通に接続されている。
スイッチ切換信号形成回路２７は第１、第２及び第３のホール素子３、４、５から得られたライン１２、１３、１４の第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3に応答して第１〜第６の励磁切換用スイッチ１８〜２３を２相励磁方式で順次にオン状態にするためのスイッチ制御信号を周知の方法で作成し、第１〜第６のスイッチ１８〜２３の制御端子即ちベースに供給するものである。
例えば、固定子巻線９ｕ、９ｖに同時に励磁電流を流す時には、第１のスイッチ１８と第４のスイッチ２１とを同時にオンにする。また、第２及び第３の固定子巻線９ｖ、９ｗに同時に励磁電流を流す時には、第３のスイッチ２０と第６のスイッチ２３とを同時にオンにする。また、第１及び第３の固定子巻線９ｕ、９ｗに同時に励磁電流を流す時には、第５のスイッチ２２と第２のスイッチ１９とを同時にオンにする。
速度制御回路１７は直流電源１６と第１〜第３の固定子巻線９ｕ、９ｖ、９ｗとの間に接続されており、第１〜第３の固定子巻線９ｕ、９ｖ、９ｗに供給する電力をライン１５の速度制御信号に応答して制御する。即ち、回転子１０の回転速度を高める時には、固定子巻線９ｕ、９ｖ、９ｗに対する電力供給量を大きくし、回転速度を低める時には固定子巻線９ｕ、９ｖ、９ｗに対する電力供給量を低減させるか、あるいは、スイッチ切換信号形成回路２７のスイッチングタイミングを、現在の回転方向と逆にしてブレーキを掛ける。
【００１４】
図３では速度制御回路１７が独立に設けられているが、この独立の速度制御回路１７を省き、図３で鎖線１５ａで示すように速度制御信号ライン１５をスイッチ切換信号形成回路２７に接続し、スイッチ切換信号形成回路２７の中に第１〜第６のスイッチ１８〜２３を介して電力供給量を制御する手段を設けることができる。即ち、第１〜第６のスイッチ１８〜２３を励磁切換のためのオン・オフ周期よりも十分に短い周期のＰＷＭ（パルス幅変調）信号を形成し、これによって第１〜第６のスイッチ１８〜２３をこれ等のオン期間（励磁駆動期間）に高周波でオン・オフして励磁電流の大きさを制御することができる。または、第１〜第６のスイッチ１８〜２３のオン期間の抵抗値を制御してモータの速度を制御することもできる。
【００１５】
図１の速度検出回路６は、本発明に従う新しい回路であり、独立した速度検出器を有さず、ライン３１、３２、３３から入力する第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3に基づいて速度検出信号Ｖt を作成してライン３４に出力するように形成されている。
【００１６】
図４は図１の速度検出回路６を詳しく示すものであって、第１、第２及び第３の入力段増幅器３５、３６、３７と、第１、第２及び第３の微分回路３８、３９、４０と、第１、第２及び第３の速度検出用スイッチ４１、４２、４３と、二値信号形成回路４４と、加算器４５とから成る。
【００１７】
第１、第２及び第３の微分回路３８、３９、４０は、増幅器３５、３６、３７を介して第１、第２及び第３の位置検出信号ライン３１、３２、３３に接続されており、図５に示す第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3をそれぞれ微分し、これよりも位相が９０度進んでいる図９のＶd1、Ｖd2、Ｖd3に示す第１、第２及び第３の微分信号即ち微分出力電圧を発生する。第１、第２及び第３の微分出力電圧Ｖd1、Ｖd2、Ｖd3は速度情報を含む。第１、第２及び第３の微分出力電圧Ｖd1、Ｖd2、Ｖd3を単に加算すると、相互の打ち消し合いが生じて１つの直流速度検出電圧を得ることができない。そこで、第１、第２及び第３の微分出力電圧Ｖd1、Ｖd2、Ｖd3をダイオードで全波整流して加算することが考えられる。しかし、ダイオード全波整流回路は、回転子１０の回転速度が低い時の微小レベルの微分出力電圧の整流に不適である。この問題を解決するためにダイオード整流回路の代りに、スイッチ又は増幅器を選択的に動作させて微分回路３８、３９、４０の出力電圧Ｖd1、Ｖd2、Ｖd3を全波整流することが考えられる。しかし、スイッチ又は増幅器を使用して全波整流回路を構成すると、スイッチ又は増幅器が必要となり、この回路構成が必然的に複雑になる。
そこで、本実施例では、第１、第２及び第３の微分回路３８、３９、４０の出力段に第１、第２及び第３の速度検出用スイッチ４１、４２、４３を接続し、このスイッチ４１、４２、４３によって第１、第２及び第３の微分出力電圧Ｖd1、Ｖd2、Ｖd3の一部を抽出している。また、第１〜第３のスイッチ４１、４２、４３のオン・オフ制御するための二値信号を第１〜第３の位置検出信号Ｖh1、Ｖh2、Ｖh3に基づいて作成している。
【００１８】
本実施例の第１、第２及び第３の速度検出用スイッチ４１、４２、４３をオン・オフ制御するための二値信号形成回路４４は、第１、第２及び第３の波形整形回路４６ａ、４６ｂ、４６ｃから成る極めて簡単な回路である。第１、第２及び第３の波形整形回路４６ａ、４６ｂ、４６ｃは第１、第２及び第３の二値信号形成回路であって、それぞれコンパレータから成り、図５に示す正弦波状の第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3の正の半波を方形波に波形成形した信号から成る第１、第２及び第３の二値信号Ｖc1、Ｖc2、Ｖc3を出力する。なお、第１、第２及び第３の二値信号Ｖc1、Ｖc2、Ｖc3は、各コンパレータの一方の入力端子を基準電位（グランド又は所定電位）とし、他方の入力端子に第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3を入力することによって得られ、第１の電圧レベル（高レベル）と第２の電圧レベル（低レベル）とを交互に有する方形波電圧である。
【００１９】
図５の第１の微分出力電圧Ｖd1と第３の二値信号Ｖc3との比較から明らかなように、第３の二値信号Ｖc3は第１の微分出力電圧Ｖd1よりも僅かに３０度進んでいるのみである。従って、第３の二値信号Ｖc3を第１の速度検出用スイッチ４１のオン・オフ制御に使用することが可能である。このため、図４では第３の波形整形回路４６ｃの出力ラインが第１の速度検出用スイッチ４１のベース（制御端子）に接続されている。この結果、第１の速度検出用スイッチ４１の出力段に図５に第１の速度検出信号Ｖs1が得られる。この第１の速度検出信号Ｖs1は第１の微分出力電圧Ｖd1の−３０度〜１５０度の区間の成分に相当する。この第１の速度検出信号Ｖs1は−３０〜０度区間に負の電圧を含むが、０〜１５０度区間の正の電圧に比べて時間幅及び振幅の両方において小さい。
【００２０】
図５の第２の微分出力電圧Ｖd2と第１の二値信号Ｖc1との間、及び第３の微分出力電圧Ｖd3と第２の二値信号Ｖc2との間にも、前述した第１の微分出力電圧Ｖd1と第３の二値信号Ｖc3との間の関係と同様な位相関係を有する。従って、図４の第１の波形整形回路４６ａの出力ラインが第２の速度検出用スイッチ４２のベースに接続され、また第２の波形整形回路４６ｂの出力ラインが第３の速度検出用スイッチ４３のベースに接続されている。これにより、第２及び第３の速度検出用スイッチ４２、４３の出力段に図５に示す第２及び第３の速度検出信号Ｖs2、Ｖs3が得られる。
【００２１】
図４の加算器４５は、第１、第２及び第３の速度検出用スイッチ４１、４２、４３の出力段に得られた第１、第２及び第３の速度検出信号Ｖs1、Ｖs2、Ｖs3を加算して直流の速度検出信号Ｖt を発生する。第１、第２及び第３の速度検出信号Ｖs1、Ｖs2、Ｖs3は互いに１２０度の位相差を有し、それぞれが３０度区間において負方向成分を有するのみであるから、加算器４５から得られる直流の速度検出信号Ｖt は平滑性の良い信号となり、最大リプル率ΔＶは５０％である。
【００２２】
図１において、速度制御信号形成用誤差増幅器８の一方の入力端子にはライン７ａによって目標速度信号発生器７が接続され、他方の入力端子には速度検出信号Ｖt のライン３４が接続されている。目標速度信号発生器７は目標速度を示す電圧を目標速度信号として発生するので、誤差増幅器８からは目標速度信号の電圧値と速度検出信号Ｖt の電圧値との差を示す信号が速度制御信号Ｖcon として得られ、ライン１５によってモータ制御及び駆動回路２に送られる。これにより、回転子１０を目標速度で回転することが可能になる。
【００２３】
上述から明らかなように、本実施例では回転子１０の回転速度を検出するための専用の速度検出器が設けられておらず、ブラシレス直流モータの励磁切換制御に必要な第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3を使用して速度検出信号Ｖt を作成している。即ち、位置検出用のホール素子３、４、５の出力を使用して速度検出信号Ｖt を作成している。従って、速度検出を簡単な構成で行うことができ、ブラシレス直流モータの速度制御信号形成回路の小型化、低コスト化を図ることができる。
また、本実施例では、第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3を第１、第２及び第３の波形整形回路４６ａ、４６ｂ、４６ｃで二値信号Ｖc1、Ｖc2、Ｖc3に波形整形し、第１の二値信号Ｖc1で第２の速度検出スイッチ４２を制御し、第２の二値信号Ｖc2で第３の速度切換用スイッチ４３を制御し、第３の二値信号Ｖc3で第１の速度切換用スイッチ４１を制御するという簡単な回路でリプルの比較的小さい速度検出信号Ｖt を得ることができる。
【００２４】
【第２の実施例】
次に、図６を参照して第２の実施例のブラシレス直流モータ装置を説明する。但し、図６及び後述する図７〜図１７において、図１〜図５と共通する部分には図１の符号を付してその説明を省略する。また、第２〜第８の実施例において第１の実施例と実質的に同一の部分は図示を省略し、図１〜図５を参照する。
【００２５】
第２の実施例のブラシレス直流モータ装置は、第１の実施例では設けた第３のホール素子５を省き、第３の位置検出信号Ｖh3を第１及び第２の位置検出信号Ｖh1、Ｖh2に基づいて作成した点を除き、第１の実施例と同一に構成したものである。
【００２６】
図６に示すように第３の位置検出信号形成回路４９は、第１及び第２の増幅器４９ａ、４９ｂと、加算器４９ｃと、位相反転回路４９ｄとから成る。加算器４９ｃの２つの入力端子は増幅器４９ａ、４９ｂを介して第１及び第２のホール素子３、４の出力ラインに接続されており、相互に１２０度（２π／３）の位相差を有する第１及び第２の位相検出信号Ｖh1、Ｖh2を加算即ちベクトル合成する。位置反転回路４９ｄは加算器４９ｃの出力の位相を反転して第３の位置検出信号Ｖh3を出力する。この第３の位置検出信号Ｖh3は図５で同一参照記号で示す電圧波形と実質的に同一である。
【００２７】
第２の実施例によれば、２つのホール素子３、４で３つの位置検出信号Ｖh1、Ｖh2、Ｖh3を得るので、ホール素子の数の低減による小型化及び低コスト化が可能になる。なお、第２の実施例においても第１の実施例の速度検出回路６と同一のものを設けるので、第１の実施例と同一の効果も有する。
【００２８】
【第３の実施例】
第３の実施例は図４の二値信号形成回路４４を図７の第１、第２及び第３の二値信号形成回路４４ａ、４４ｂ、４４ｃに変形し、この他は第１の実施例のブラシレス直流モータと同一に構成したものである。
【００２９】
図７の第１、第２及び第３の二値信号形成回路４４ａ、４４ｂ、４４ｃは第１、第２及び第３の波形整形回路４６ａ、４６ｂ、４６ｃと第１、第２及び第３の３０度遅延回路４７ａ、４７ｂ、４７ｃとから成る。第１、第２及び第３の３０度遅延回路４７ａ、４７ｂ、４７ｃは、第１、第２及び第３の増幅器３５、３６、３７と第１、第２及び第３の波形整形回路４６ａ、４６ｂ、４６ｃとの間に接続され、図１０の第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3を３０度遅延させた第１、第２及び第３の遅延位置信号Ｖh1、Ｖh2’、Ｖh3を出力する。第１、第２及び第３の波形整形回路４６ａ、４６ｂ、４６ｃは図１０の第１、第２及び第３の二値信号Ｖc1、Ｖc2、Ｖc3を出力する。
【００３０】
なお、第１、第２及び第３の二値信号形成回路４４ａ、４４ｂ、４４ｃを、第１、第２及び第３の３０度遅延回路４７ａ、４７ｂ、４７ｃと第１、第２及び第３の波形整形回路４６ａ、４６ｂ、４６ｃとを一体化した構成にすることができる。図８は３０度遅延回路４７ａと波形整形回路４６ａとを一体化した第１の二値信号形成回路４４ａの１例を示す。この第１の二値信号形成回路４４ａは、３０度遅延回路４７ａの一部として機能する第１及び第２の加算用抵抗Ｒ1 、Ｒ2 と、演算増幅器即ちオペアンプ４８と、基準電圧源Ｅr とから成る。加算と比較との両方の機能を有するオペアンプ４８の一方の入力端子は第１及び第２の抵抗Ｒ1 、Ｒ2 を介して図７の増幅器３５、３６に接続されている。従って、第１及び第２の抵抗Ｒ1 、Ｒ2 には第１及び第２の位置検出信号Ｖh1、Ｖh2が印加される。オペアンプ４８の他方の入力端子には基準電圧源Ｅr が接続されている。なお、基準電圧源Ｅr の基準電圧は第１〜第３の位置検出信号Ｖh1〜Ｖh3の中心電位（例えば２．５Ｖ）に一致するように設定される。第２の抵抗Ｒ2 は第１の抵抗Ｒ1 の２倍の抵抗値を有する。この結果、図９に示すように互いに１２０度の位相差を有する第１及び第２の位置検出信号Ｖh1、Ｖh2が２：１の割合で加算され、第１の位置検出信号Ｖh1よりも３０度遅れた第１の遅延位置信号Ｖh1′が得られる。
オペアンプ４８は波形整形回路４６ａの機能を有し、第１及び第２の位置検出信号Ｖh1、Ｖh2に基づく第１の遅延位置信号Ｖh1′がこの中心値に等しい基準電圧Ｅr よりも高い時に第１の電圧レベルを出力し、第１の遅延位置信号Ｖh1′が基準電圧Ｅr よりも低い時に第２の電圧レベルを出力する。即ち、オペアンプ４８は図１０の第１の二値信号Ｖc1を出力する。なお、図７の第２及び第３の二値信号形成回路４４ｂ、４４ｃも第１の二値信号形成回路４４ａと同一の原理で形成することができる。即ち、第２の二値信号形成回路４４ｂは第２の位置検出信号Ｖh2と第３の位置検出信号Ｖh3とを２：１の割合で加算して第２の遅延位置信号Ｖh2′を形成する。また、第３の第３の二値信号形成回路４４ｃは第３の位置検出信号Ｖh3と第１の位置検出信号Ｖh1とを２：１の割合で加算して第３の遅延位置信号Ｖh3′を形成する。
【００３１】
図７における第１、第２及び第３の遅延位相信号Ｖh1′、Ｖh2′、Ｖh3′は、図１０の第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3を３０度遅れ方向に位相をシフトしたものに相当する。従って、コンパレータから成る第１、第２及び第３の波形整形回路４６ａ、４６ｂ、４６ｃからは図１０の第１、第２及び第３の二値信号Ｖc1、Ｖc2、Ｖc3が得られる。図１０の第１、第２及び第３の二値信号Ｖc1、Ｖc2、Ｖc3は図５で同一記号で示す二値信号を３０度遅らせたものに相当する。図１０の第１、第２及び第３の二値信号Ｖc 、Ｖc2、Ｖc3の位相は第２、第３及び第１の微分出力電圧Ｖd2、Ｖd3、Ｖd1の位相に一致するので、図７のスイッチ４１、４２、４３の出力段に得られる第１、第２及び第３の速度検出信号Ｖs1、Ｖs2、Ｖs3は図１０に示すように０〜１８０度の正の半波になる。図７の加算器４５は図１０の３相の正の半波を加算して図１０の直流の速度検出信号Ｖt を出力する。図１０の速度検出信号Ｖt の最大リプル率ΔＶは１３％であり、図５のリプル率（５０％）よりも大幅に小さい。
【００３２】
第３の実施例のモータ装置は３０度遅延回路４７ａ、４７ｂ、４７ｃ以外は第１の実施例と実質的に同一に構成されているので、上記効果の他に第１の実施例と同一の効果も有する。
【００３３】
【第４の実施例】
第４の実施例のブラシレス直流モータ装置は、図１１に示すように、図１の速度検出回路６と誤差増幅器８とを一体化した速度制御信号形成回路５０を設け、この他は図１と同一に構成したものである。
【００３４】
図１１の速度制御信号形成回路５０は、図７の速度検出回路６ａと図１の誤差増幅器８との両方の機能を有するように構成されている。即ち、速度制御信号形成回路５０は、第１、第２及び第３のバッファ増幅器３５、３６、３７と、正半波抽出用第１、第２及び第３のスイッチ４１、４２、４３と、放電用第４、第５及び第６のスイッチ５１、５２、５３と、第１、第２及び第３の二値信号形成回路４４ａ、４４ｂ、４４ｃと、第１、第２及び第３の反転回路５４、５５、５６と、オペアンプ（演算増幅器）５７と、基準電圧源５８と、目標速度信号反転回路５９と、第１、第２及び第３のコンデンサＣ1 、Ｃ2 、Ｃ3 と、第１、第２、第３、第４及び第５の抵抗Ｒ1 、Ｒ2 、Ｒ3 、Ｒ4 、Ｒ5 とを有する。
【００３５】
図１１における第１、第２及び第３の位置検出信号ライン３１、３２、３３と、第１、第２及び第３の増幅器３５、３６、３７と、第１、第２及び第３のスイッチ４１、４２、４３と、第１、第２及び第３の二値信号形成回路４４ａ、４４ｂ、４４ｃと、第１、第２及び第３の波形整形回路４６ａ、４６ｂ、４６ｃと、第１、第２及び第３の遅延回路４７ａ、４７ｂ、４７ｃとは、図７でこれ等と同一符号で示すものと実質的に同一である。また、図１１で第１、第２及び第３の増幅器３５、３６、３７と第１、第２及び第３のスイッチ４１、４２、４３との間に接続されたＣ1 Ｒ1 直列回路３８ａ、Ｃ2 Ｒ2 直列回路３９ａ、Ｃ3 Ｒ3 直列回路４０ａは図７の第１、第２及び第３の微分回路３８、３９、４０の一部に相当する機能を有する。なお、以下において、図１１の３８ａ、３９ａ、４０ａを第１、第２及び第３のＣＲ直列回路と呼ぶことにする。
【００３６】
オペアンプ５７は微分回路及び加算回路の構成要素として設けられている。オペアンプ５７の一方の入力端子は第１、第２及び第３のスイッチ４１、４２、４３を介して第１、第２及び第３のＣＲ直列回路３８ａ、３９ａ、４０ａに接続され、且つ第４の抵抗Ｒ4 と極性反転回路５９とを介して目標速度信号ライン７ａに接続されている。オペアンプ５７の一方の入力端子と出力端子との間には帰還用抵抗として第５の抵抗Ｒ5 が接続されている。オペアンプ５７の他方の入力端子とグランドとの間には基準電圧Ｅr ＝２．５Ｖを与える基準電圧源５８が接続されている。また、基準電圧源５８は第４、第５及び第６のスイッチ５１、５２、５３を介して第１、第２及び第３のＣＲ直列回路３８ａ、３９ａ、４０ａに接続されている。第４、第５及び第６のスイッチ５１、５２、５３は、第３、第１及び第２の二値信号形成回路４４ｃ、４４ａ、４４ｂの出力を第１、第２及び第３の反転回路５４、５５、５６で位相反転した信号で制御され、第１、第２及び第３のスイッチ４１、４２、４３と逆に動作する。第４、第５及び第６のスイッチ５１、５２、５３は第１、第２及び第３のスイッチ４１、４２、４３のオフ期間中に第１、第２及び第３のコンデンサＣ１、Ｃ２、Ｃ３をリセット（放電）させるためのものである。
【００３７】
図１１の回路は、図７の速度検出回路６ａに図１の誤差増幅器８を加えたものと同様に動作する。
【００３８】
図１１の二値信号形成回路４４ａ、４４ｂ、４４ｃからは、図７と同様に図１０に示す第１、第２及び第３の二値信号Ｖc1、Ｖc2、Ｖc3が得られる。第１、第２及び第３のスイッチ４１、４２、４３は第３、第１及び第２の二値信号Ｖc3、Ｖc1、Ｖc2の高レベル期間にオンになり、低レベル期間にオフになる。第４、第５及び第６のスイッチ５１、５２、５３は第３、第１及び第２の二値信号Ｖc3、Ｖc1、Ｖc2の低レベル期間にオンになり、高レベル期間にオフになる。
今、第１の位置検出信号Ｖh1のみが入力していると仮定すると、第３の二値信号Ｖc3に基づいて第１のスイッチ４１のオン期間（例えば図１０のｔ9 〜ｔ15）に第１の微分出力電圧Ｖd1の正の半波が抽出され、第４のスイッチ５１のオン期間（例えばｔ3 〜ｔ9 ）に第１のコンデンサＣ１が放電され、図１０の第１の速度検出信号Ｖs1と同様なものが得られる。
図１１の回路で第２の位置検出信号Ｖh2のみが発生していると仮定すると、第２及び第５のスイッチ４２、５２が第１の二値信号Ｖc1に基づいて制御され、図１０の第２の速度検出信号Ｖs2に相当するものが得られる。
図１１の回路で第３の位置検出信号Ｖh3のみが発生していると仮定すると、第３及び第６のスイッチ４３、５３が第２の二値信号Ｖc2に基づいて制御され、図１０の第３の速度検出信号Ｖs3に相当するものが得られる。
【００３９】
図１１の回路では、第１、第２及び第３のスイッチ４１、４２、４３の出力側端子が共通接続され、これがオペアンプ５７の一方の入力端子に接続されて、また、第４、第５及び第６のスイッチ５１、５２、５３の出力側端子が共通接続され、これが基準電圧源５８に接続されている。従って、もし目標速度信号Ｖr を無視すれば、第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3が同時に入力している時に、図１０に示す第１、第２及び第３の速度検出信号Ｖs1、Ｖs2、Ｖs3を加算した直流速度検出信号Ｖtに相当するもの がオペアンプ５７から得られる。従って、図１０には速度制御信号Ｖｃｏｎ が示されていないが、速度制御信号Ｖcon は速度検出電圧Ｖt から目標速度信号Ｖr を減算したものである。
なお、請求項３，４，１５，１６の発明は、図１１においてライン７ａ目標速度信号Ｖｒをオペアンプ５７に入力させたものに相当する。
【００４０】
図１１のオペアンプ５７は微分用、加算用の他に、速度制御信号Ｖcon を形成するための誤差増幅器としても機能している。即ち、目標速度ライン７ａの目標速度信号Ｖr は反転回路５９で−Ｖr に変換され、第４の抵抗Ｒ4 を介してオペアンプ５７の一方の入力端子に入力している。従って、第１、第２及び第３のスイッチ４１、４２、４３がオンの期間には、これ等のスイッチ４１、４２、４３を通って帰還抵抗Ｒ5 に電流が流れ込む。他方、負極の目標速度信号−Ｖr に基づいて帰還抵抗Ｒ5 に流れる電流は、帰還抵抗Ｒ5 から目標速度反転回路５９に流れ込む向きになるので、帰還抵抗Ｒ5 において電流の減算が生じ、結果としてオペアンプ５７の出力段に速度検出電圧Ｖt と目標速度信号Ｖr との差を示す速度制御信号Ｖcon が得られる。
【００４１】
第４の実施例は第１〜第３の実施例と同様な効果を有し、更に、１つのオペアンプ５７によって微分、加算、誤差信号形成を達成することができ、回路構成が単純になるという効果も有する。また、第１、第２及び第３のコンデンサＣ１、Ｃ２、Ｃ３でＤＣオフセット分を除去して交流分のみをオペアンプ５７に送るので、オフセットを容易に除去できる。また、第４，第５及び第６のスイッチ５１、５２、５３で第１、第２及び第３のコンデンサＣ１、Ｃ２、Ｃ３のリセットを確実且つ容易に達成することができる。
なお、請求項３，４，１５，１６の発明に従う回路とするために、図１１において、目標速度ライン７ａ、反転回路５９、抵抗Ｒ４を省くことができる。この様に変形した場合には、オペアンプ５７から図７と同様に直流の速度検出電圧Ｖtが得られるので、この速度検出電圧Ｖtを図１の誤差増幅器８に入力させる。これにより、第１及び第４の実施例と同様な効果が得られる。
【００４２】
【第５の実施例】
次に、図１２及び図１３を参照して第５の実施例を説明する。但し、図１２及び図１３において、図７、図１０及び図１１と共通する部分には同一の符号を付してその説明を省略する。
図１２は第５の実施例のブラシレス直流モータの速度検出回路６ｂは、図１１の速度制御信号形成回路５０を変形したものである。即ち、図１２の速度検出回路６ｂは、図１１の速度制御信号形成回路５０から反転回路５９及び抵抗Ｒ４の回路を省いて速度検出信号Ｖｔを出力するように構成し、また、第１、第２及び第３の位置検出信号Ｖｈ１、Ｖｈ２、Ｖｈ３の微分信号の全波整流出力に相当する速度検出信号Ｖｔを得るために、第４、第５及び第６のスイッチ５１，５２、５３と第２のオペアンプ６０と、第２の帰還抵抗Ｒ６と、加算用抵抗Ｒ７とを設けた他は、図１１の速度制御信号形成回路５０と同一に構成されている。
第２のオペアンプ６０の第１の入力端子(負端子)は第４、第５及び第６のスイッチ５１、５２、５３の出力端子にそれぞれ接続されている。第２のオペアンプ６０の第２の入力端子（正端子）は、基準電圧源５８に接続されている。第２の帰還用抵抗Ｒ６は第２のオペアンプ６０の第１の入力端子と出力端子との間に接続されている。第２のオペアンプ６０の出力端子は抵抗Ｒ７を介して第１のオペアンプ５７の第１の入力端子に接続されている。図１２の第１のオペアンプ５７の第１の入力端子は図１１と同様に第１、第２及び第３のスイッチ４１、４２、４３に接続され、また第２の入力端子は基準電圧源５８に接続されている。
【００４３】
図１２の二値信号形成回路４４ａ、４４ｂ、４４ｃからは、図７と同様に図１３に示す第１、第２及び第３の二値信号Ｖc1、Ｖc2、Ｖc3が得られる。第１、第２及び第３のスイッチ４１、４２、４３は第３、第１及び第２の二値信号Ｖc3、Ｖc1、Ｖc2の高レベル期間にオンになり、低レベル期間にオフになる。第４、第５及び第６のスイッチ５１、５２、５３は第３、第１及び第２の二値信号Ｖc3、Ｖc1、Ｖc2の低レベル期間にオンになり、高レベル期間にオフになる。
今、第１の位置検出信号Ｖh1のみが入力していると仮定すると、第３の二値信号Ｖc3に基づいて第１のスイッチ４１のオン期間（例えばｔ9 〜ｔ15）に第１の微分出力電圧Ｖd1の正の半波が抽出され、第４のスイッチ５１のオン期間（例えばｔ3 〜ｔ9 ）に第１の微分出力電圧Ｖd1の負の半波が抽出され、図１３の第１の速度検出信号Ｖs1が得られる。図１３の第１の速度検出信号Ｖs1は図１３の第１の微分出力電圧Ｖd1の全波整流波形に相当する。
図１２の回路で第２の位置検出信号Ｖh2のみが発生していると仮定すると、第２及び第５のスイッチ４２、５２が第１の二値信号Ｖc1に基づいて制御され、図１３の第２の速度検出信号Ｖs2が得られる。
図１２の回路で第３の位置検出信号Ｖh3のみが発生していると仮定すると、第３及び第６のスイッチ４３、５３が第２の二値信号Ｖc2に基づいて制御され、図１３の第３の速度検出信号Ｖs3が得られる。
【００４４】
図１２の回路では、第１、第２及び第３のスイッチ４１、４２、４３の出力側端子が共通接続され、これが第１のオペアンプ５７の第１の入力端子に接続されて、また、第４、第５及び第６のスイッチ５１、５２、５３の出力側端子が共通接続され、これが第２のオペアンプ６０の第１の入力端子に接続されている。また、第２のオペアンプ６０の出力端子は第１のオペアンプ５７の第１の入力端子に接続されている。従って、第２のオペアンプ６０は電圧Vd1、Vd2,Vd3の第１、第２及び第３の微分出力の負の半波の整流波形の合成を出力する。また、第１のオペアンプ５７は第１、第２及び第３の微分出力電圧Vd1、VVｄ２、Vd3の正の半波の整流波形を合成し、同時に第２のオペアンプ６０の出力を合成する。この結果、図１２の速度検出回路６ｂに第１、第２及び第３の位置検出信号Ｖh1、Ｖh2、Ｖh3が同時に入力している時に、図１３に示す第１、第２及び第３の速度検出信号Ｖs1、Ｖs2、Ｖs3を加算した直流速度検出信号Ｖt が第１のオペアンプ５７から得られる。従って、直流の速度検出電圧Ｖt のリプルは比較的小さい。図１２のライン３４の速度検出電圧Ｖtは、図１の誤差増幅器８に相当するものに送られ、速度制御信号Ｖconの作成に使用される。
【００４５】
第５の実施例は第１〜第４の実施例と同様な効果を有し、更に、リプルの小さい速度検出電圧Ｖtが得られるという効果も有する。
【００４６】
【第６の実施例】
図１４に示す第６の実施例の速度制御信号形成回路５０ａは、図１２の速度検出回路６ｂに反転回路５９と抵抗Ｒ４とを付加し、その他は図１２と同一に構成したものに相当する。図１４の反転回路５９及び抵抗Ｒ４は、図１１で同一符号で示すものと実質的に同一であって、ライン７ａの目標速度信号Ｖｒの位相反転信号を第１のオペアンプ５７に入力させるものである。
【００４７】
図１４のオペアンプ５７は微分用、加算用の他に、速度制御信号Ｖconを形成するための誤差増幅器としても機能している。即ち、目標速度ライン７ａの目標速度信号Ｖr は反転回路５９で−Ｖr に変換され、第４の抵抗Ｒ4 を介して第１のオペアンプ５７の第１の入力端子に入力している。負極の目標速度信号−Ｖr に基づいて帰還抵抗Ｒ5 に流れる電流は、帰還抵抗Ｒ5 から反転回路５９に流れ込む向きになるので、帰還抵抗Ｒ5 において電流の減算が生じ、結果としてオペアンプ５７の出力段に速度検出電圧Ｖt と目標速度信号Ｖr との差を示す速度制御信号Ｖcon が得られる。
【００４８】
第６の実施例は第４及び第５の実施例と同様な効果を有する。
【００４９】
【第７の実施例】
図１５に示す第７の実施例の速度検出回路６ｃは、図１２の速度検出回路６ｂを変形したものであり、第２のオペアンプ６０を第１のオペアンプ５７の第１の入力端子に接続せずに、反転回路７０と加算器７１とを設け、第１のオペアンプ５７の出力と第２のオペアンプ６０の出力の反転信号とを加算器７１で加算して速度検出信号を得ている他は図１２と同一に構成したものに相当する。加算器７１からは図１２に示す速度検出信号Ｖｔと同一の微分信号の全波整流波形が得られる。従って、
第７の実施例は第５の実施例と同様な効果を有する。
【００５０】
【第８の実施例】
図１６は本発明が適用されたブラシを有するモ−タの速度制御装置を示す。図１６のモ−タ１ａは固定子９ａ回転子１０ａとブラシ組立体８０とから成る。図１７に概略的に示すように固定子９ａは一対の磁石８６、８７から成る。回転子１０ａは巻線８５とコア（図示せず）とから成る。巻線８５はブラシ８１、８２を介してモ−タ制御及び駆動回路２ａに接続されている。モ−タ制御及び駆動回路２ａは、図３と同様に構成された直流電源１６と速度制御回路１７とから成る。速度制御回路１７は巻線８５に直流電源１６から供給する電力を制御する機能を有する。
【００５１】
回転子１０ａが結合されたシャフト８３が円板状磁石８４の中心に結合されている。従って、円板状磁石８４は回転子１０ａに従って回転する。円板状磁石８４はその円周方向に交互に分割された８個のN極領域と８個のS極領域とを有する。図１６の第１、第２及び第３のホ−ル素子３、４、５と速度検出回路６と目標速度信号発生器７と誤差増幅器８は、図１でこれ等と同一符号で示すものと同一に構成されている。第１、第２及び第３のホ−ル素子３、４、５は、円板状磁石８４によって発生する磁束を検出することができるように例えば固定子９ａに固着されている。なお、第１、第２及び第３のホ−ル素子３、４、５の相互間の電気角度は図２の場合と同様に１２０度であり、また、図１６の円板状磁石８４と第１〜第３のホ−ル素子３〜５との相互関係は、図２のN極とS極を有する回転子１０と第１〜第３のホ−ル素子３〜５との相互関係と同一である。従って、固定子９ａに相対的に回転子１０ａ及び円板状磁石８４が回転すると、第１〜第３のホ−ル素子３〜５から図５のVh1、Vh2、Vh3に示すように相互に１２０度の位相差を有する正弦波３相交流電圧が得られる。これにより、図１６においても図１と同様にモ−タ１ａの速度検出を行うことができる。従って、第８の実施例によっても実施例１と同一の効果を得ることができる。
【００５２】
図１６の円板状磁石８４を使用して回転速度を検出する方式は、図４の実施例のみでなく、図６、図７、図１１、図１２、図１４、図１５の実施例及びこれらの変形例にも適用することもできる。即ち、請求項１〜１２の発明における速度制御信号形成回路の技術を、請求項１３〜２４の発明に示すように回転子１０ａに結合された磁石８４を有するものに適用することができる。
【００５３】
【変形例】
本発明は上述の実施例に限定されるものでなく、例えば次の変形が可能なものである。
（１） 図７の第３の実施例及び図１１の第４の実施例、図１２の第５の実施例、図１４の第６の実施例、図１５の第７の実施例、図１６の第８の実施例においても第３の位置検出信号Ｖh3を図６の第２の実施例の第３の位置検出信号形成回路４９ａで作成することができる。
（２） 図５及び図１０及び図１３において、第１、第２及び第３の速度検出信号Ｖs1、Ｖs2、Ｖs3の極性を反転させることができる。また、図５及び図１０及び図１３において、微分出力電圧Ｖd1、Ｖd2、Ｖd3の負の半波側を第１、第２及び第３のスイッチ４１、４２、４３で抽出することができる。
（３） 請求項３，５，7，９，１１，15，17，１９，２１，２３等に従う回路を得るために、図１１、図１２、図１４、及び図１５の回路において、遅延回路４７ａ、４７ｂ、４７ｃを省いて波形整形回路４６ａ、４６ｂ、４６ｃの入力端子を増幅器３５、３６、３７に接続することができる。
【図面の簡単な説明】
【図１】第１の実施例のブラシレス直流モータ装置を示すブロック図である。
【図２】図１のモータ本体部の断面とホール素子の配置とを示す図である。
【図３】図１のモータ制御及び駆動回路を原理的に示す回路図である。
【図４】図１の速度検出回路を示すブロック図である。
【図５】図４の各部の電圧を示す波形図である。
【図６】第２の実施例のモータ本体部の断面と２つのホール素子の配置と第３の位置検出信号形成回路を示す図である。
【図７】第３の実施例の速度検出回路を示すブロック図である。
【図８】図７の第１の３０度遅延回路と第１の波形整形回路とを示す回路図である。
【図９】図８の回路による３０度遅延信号の形成を説明するためのベクトル図である。
【図１０】図７の各部の電圧を示す波形図である。
【図１１】第４の実施例の速度制御信号形成回路を示すブロック図である。
【図１２】第５の実施例の速度検出回路を示すブロック図である。
【図１３】図１１の各部の状態を示す波形図である。
【図１４】第６の実施例の速度制御信号形成回路を示すブロック図である。
【図１５】第７の実施例の速度検出回路を示すブロック図である。
【図１６】第８の実施例のモータ及びその速度制御装置を示すブロック図である。
【図１７】図１６のモータ及びこの駆動制御回路を示すブロック図である。
【符号の説明】
１ モータ本体部
２ モータ制御及び駆動回路
３、４、５ 第１、第２及び第３のホール素子
６ 速度検出回路
７ 目標速度信号発生器
８ 誤差増幅器
３８、３９、４０ 微分回路
４１、４２、４３ 第１、第２及び第３の速度検出用スイッチ
４５ 加算器
４６ａ、４６ｂ、４６ｃ 波形整形回路
４７ａ、４７ｂ、４７ｃ ３０度遅延回路[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a speed control signal forming device for a motor used for transferring an optical pickup of an optical disk device such as a CD-ROM device.
[0002]
[Prior art]
When a brushless DC motor is used as a disk rotating motor of a data recording or reproducing disk device or a feed motor of an optical pickup, for example, as shown in Japanese Patent Laid-Open No. 4-362666, the rotational speed of the motor is reduced. Control is required. For this reason, the conventional brushless DC motor has a speed detector.
Japanese Patent Laid-Open No. 3-16066 discloses that a Hall element is arranged on a stator of a brushless DC motor, and a speed signal is obtained by rectifying the output of the Hall element.
[0003]
[Problems to be solved by the invention]
By the way, if the speed detector is provided independently, the motor control circuit inevitably increases the cost. Further, the method disclosed in Japanese Patent Laid-Open No. 3-16066 makes the circuit configuration complicated and increases the ripple of the speed signal.
[0004]
SUMMARY OF THE INVENTION An object of the present invention is to provide a motor speed control signal forming apparatus capable of generating a speed detection signal or a speed control signal by a simple circuit. Another object of the present invention is to provide a motor speed control signal forming apparatus capable of reducing the ripple.
[0005]
[Means for Solving the Problems]
  In order to solve the above problems and achieve the above object, the present invention provides first, second and third stator windings, a rotor made of a permanent magnet, and the first, second and third A plurality of magnetoelectric transducers arranged so as to have a fixed positional relationship with respect to the stator winding, and based on the outputs of the plurality of magnetoelectric transducers indicating a change in magnetic field according to the rotation of the permanent magnet; First, second, and third position detection signals indicating the relative positional relationship between the first, second, and third phase stator windings and the permanent magnet are sequentially generated with a phase difference of 120 degrees. Switching the excitation currents of the first, second, and third stator windings based on the first, second, and third position detection signals, and setting the rotor to the target Excitation control for controlling the excitation current of the first, second and third stator windings to rotate at speed An apparatus for generating a speed control signal of a brushless DC motor having a stage, wherein the first, second and third position detection signals are differentiated to differentiate the first, second and third position detection signals, respectively. First, second and third differentiating circuits for forming first, second and third differential signals having a leading phase of 90 degrees with respect to the position detection signal, and the first, second and third differential circuits; Based on position detection signalThe phase is 30 degrees behind the first, second and third position detection signals.And first, second and third binary signal forming circuits for forming first, second and third binary signals each comprising a first voltage level and a second voltage level; A first switch for passing the first differential signal obtained from one differentiating circuit only during the period of the first voltage level of the third binary signal, and obtained from the second differentiating circuit. A second switch for allowing the second differential signal to pass only during a period of the first voltage level of the first binary signal, and the third differential signal obtained from the third differential circuit. A third switch that passes the second binary signal only during the first voltage level period, and outputs of the first, second, and third switches are added to detect the rotational speed of the rotor Adding means for outputting a signal and generating a signal indicating a target rotational speed of the rotor; A target rotational speed signal generating means; and a computing means for obtaining a value corresponding to a difference between the signal indicating the target rotational speed and the rotational speed detection signal and supplying the value to the excitation control means as a speed control signal. The present invention relates to a motor speed control signal forming apparatus.
[0006]
  Claims7-12As shown in FIG. 4, a magnet that rotates together with the rotor is provided, and the magnetic flux of this magnet is detected by a magnetoelectric conversion element, so that the rotation speed can be detected. The motor in this case may be a DC motor having a brush or an AC motor.
  Claims2, 3, 8, 9It is desirable to use one operational amplifier for both differentiation and addition as shown in FIG. In addition, it is desirable to provide fourth, fifth and sixth switches to selectively discharge the first, second and third capacitors for differentiation.
  Claims3, 5, 6, 9, 11, 12In addition to differentiation and addition, one operational amplifier can be used for subtraction to form a speed control signal.
  Claims4, 5, 10, 11As shown in FIG. 4, the fourth to sixth switches are provided and operated opposite to the first to third switches, and a speed detection signal equivalent to full-wave rectification of the differential signal can be obtained.
  Claims13As shown in FIG. 5, it is desirable that the binary signal forming circuit is composed of first, second and third delay position signal forming circuits and first, second and third waveform shaping circuits.
  Claim14As shown in FIG. 1, the first, second and third delayed position signals are formed based on the addition of two position detection signals selected from the first, second and third position detection signals, ie, vector synthesis. it can.
  Claims15As shown in FIG. 2, the position detecting means can be constituted by the first, second and third magnetoelectric transducers.
  Claims16As shown in FIG. 3, the position detection means includes the first and second magnetoelectric transducers for obtaining the first and second position detection signals, and the third position based on the first and second position detection signals. And a circuit for forming a detection signal.
[0007]
【The invention's effect】
According to the invention of each claim,The following effects can be obtained.
(I)By using the 30-degree delayed position detection signal, differential signal extraction can be performed ideally, and ripple of the speed detection signal or speed control signal can be reduced well.
(B) A simple circuit in which the first, second, and third switches are controlled by the third, first, and second binary signals.Ripple'sRelativelyA small speed detection signal or speed control signal can be easily obtained.
  Further, in the inventions of claims 1 to 6, an independent speed detector is not provided, and a speed detection signal or a speed control signal is formed based on the output of a magnetoelectric conversion element (for example, Hall element) for position detection Has been. Therefore, cost reduction or size reduction of the speed detection circuit or the speed control signal forming circuit is achieved. Further, when the speed detection signal or the speed control signal is formed, the first, second and third position detection signals are differentiated, and the differential signals are selectively extracted, or conversion equivalent to rectification is performed. Is required. In the present invention, this extraction or rectification is performed by first, second and third position detection.SignalBased on 30 degree delayed signalThird, first and secondBy binary signalFirst, second and thirdThis is done by controlling the switch. Therefore, it is possible to easily achieve the control of the first to third switches required when obtaining one DC speed detection signal or speed control signal.
  Claims2-5, 8-11According to the invention, since one operational amplifier is used for differentiation and addition of differential signals, the circuit configuration can be simplified.
  Claims3, 4, 9, 10According to this invention, since one operational amplifier is used for differentiation, addition of the differential signal, and subtraction of the speed detection signal and the target speed signal, the circuit configuration is further simplified.
  Claim3-5, 10, 11According to the invention, it is equivalent to full-wave rectification of the first, second, and third differential signals by combining the first, second, and third switches with the fourth, fifth, and sixth switches. Speed detection signals or speed control signals can be obtained, and these ripples are further reduced.
  ClaimItem 13 and 14According to the invention, a 30-degree delayed position detection signal and a binary signal based thereon can be easily formed.
  Claim15According to the invention, the first, second, and third position detection signals can be easily obtained based on the first, second, and third magnetoelectric transducers.
  Claim16According to the invention, the first, second, and third position detection signals can be obtained by the two magnetoelectric transducers, so that the cost can be reduced.
[0008]
Embodiment and Examples
Next, embodiments and examples of the present invention will be described with reference to FIGS.
[0009]
[First embodiment]
First, the brushless DC motor device of the first embodiment shown in FIGS. 1 to 5 will be described. As schematically shown in FIG. 1, the brushless DC motor device includes a brushless DC motor main body 1, a control and drive circuit 2 as excitation control means, and first, second, and third magnetoelectric transducers. It comprises Hall elements 3, 4, 5, a speed detection circuit 6, a target speed signal generator 7, and a speed control signal forming error amplifier 8. The speed detection circuit 6, the target speed signal generator 7, and the error amplifier 8 constitute a speed control signal forming circuit according to the present invention.
[0010]
The brushless DC motor main body 1 includes a stator 9 and a rotor 10 as shown in FIG. 2 in principle, and is configured as an outer rotor type. The stator 9 includes first, second, and third stator windings 9u, 9v, 9w and a core 11 made of a magnetic material. The core 11 is divided by twelve slots 11a arranged at equiangular intervals and has twelve teeth 11b. The stator windings 9u, 9v, 9w are divided into nine teeth 11b and wound. Since the u, v, w phase stator windings 9u, 9v, 9w are repeatedly arranged adjacent to each other, the electrical angle between the two slots 11a and between the two teeth 11b is 120. Degree, ie 2π / 3. In the example of FIG. 2, the stator windings 9 u, 9 v, 9 w are not wound around the three teeth 11 b of the core 11. The first, second, and third Hall elements 3, 4, and 5 are electrically connected to each other at an electrical angle of 120 degrees at the center of the three slots 11a adjacent to the teeth 11b around which the stator windings 9u, 9v, and 9w are not wound. They are sequentially arranged with an interval. Thereby, the influence of the magnetic field based on the stator windings 9u, 9v, 9w on the Hall elements 3, 4, 5 is reduced. In addition, it is possible to obtain the first, second, and third position detection signals sequentially having a phase difference of 120 degrees from the first, second, and third Hall elements 3, 4, 5. If the influence of the magnetic field of the stator windings 9u, 9v, 9w on the Hall elements 3, 4, 5 is not so much of a problem, the stator windings 9u, 9v, 9w are attached to all 12 teeth 11b. Can be wound.
[0011]
The rotor 10 is formed of a cylindrical permanent magnet having 8 N poles and 8 S poles alternately, and is arranged so as to surround the stator 9. Since the Hall elements 3, 4, and 5 are arranged so as to have a certain positional relationship with the stator windings 9 u, 9 v, and 9 w and are arranged at positions where the magnetic flux change based on the rotor 10 can be detected. When the rotor 10 rotates, the first, second and third position detection signals Vh1 and Vh2 shown in FIG. 5 composed of three-phase AC voltages from the first, second and third Hall elements 3, 4, 5 are shown. Vh3 is obtained. The first, second and third position detection signals Vh1, Vh2, and Vh3 are sinusoidal three-phase AC voltages having a phase difference of 120 degrees from each other.
[0012]
In FIG. 1, a motor control and drive circuit 2 as motor excitation control means controls and supplies the excitation current of the stator windings 9u, 9v, 9w. Are connected to the second and third Hall elements 3, 4 and 5, and are connected to a speed control signal forming error amplifier 8 by a line 15.
[0013]
FIG. 3 shows the motor control and drive circuit 2 in detail. The motor control and drive circuit 2 includes a DC power source 16, a speed control circuit 17, and first, second, third, fourth, fifth and sixth excitation switching switches 18, 19, 20, 21 comprising transistors. , 22, 23, first, second and third amplifiers 24, 25, 26, and a switch switching signal forming circuit 27. One ends of the first, second and third stator windings 9u, 9v, 9w are connected to the DC power supply 16 via the first, third and fifth switches 18, 20, 22 and the speed control circuit 17. It is connected to one end and connected to the other end of the DC power supply 16 via the second, fourth and sixth switches 19, 21, 23. The other ends of the first, second and third stator windings 9u, 9v, 9w are connected in common.
The switch switching signal forming circuit 27 includes first, second, and third position detection signals Vh1, Vh2, and lines 12, 13, and 14 obtained from the first, second, and third Hall elements 3, 4, and 5, respectively. In response to Vh3, a switch control signal for sequentially turning on the first to sixth excitation changeover switches 18 to 23 by the two-phase excitation method is created by a well-known method, and the first to sixth switches 18 to 23 are supplied to control terminals or bases.
For example, when the exciting current is simultaneously supplied to the stator windings 9u and 9v, the first switch 18 and the fourth switch 21 are simultaneously turned on. Further, when the exciting current is simultaneously supplied to the second and third stator windings 9v and 9w, the third switch 20 and the sixth switch 23 are simultaneously turned on. Further, when the exciting current is simultaneously supplied to the first and third stator windings 9u and 9w, the fifth switch 22 and the second switch 19 are simultaneously turned on.
The speed control circuit 17 is connected between the DC power source 16 and the first to third stator windings 9u, 9v, 9w, and is supplied to the first to third stator windings 9u, 9v, 9w. The power to be controlled is controlled in response to the speed control signal on line 15. That is, when the rotation speed of the rotor 10 is increased, the power supply amount for the stator windings 9u, 9v, 9w is increased, and when the rotation speed is decreased, the power supply amount for the stator windings 9u, 9v, 9w is decreased. Alternatively, the brake is applied with the switching timing of the switch switching signal forming circuit 27 reversed from the current rotation direction.
[0014]
In FIG. 3, the speed control circuit 17 is provided independently. However, the independent speed control circuit 17 is omitted, and the speed control signal line 15 is connected to the switch switching signal forming circuit 27 as shown by a chain line 15a in FIG. The switch switching signal forming circuit 27 can be provided with means for controlling the power supply amount via the first to sixth switches 18 to 23. That is, the first to sixth switches 18 to 23 form a PWM (pulse width modulation) signal having a cycle sufficiently shorter than the on / off cycle for excitation switching, and thereby the first to sixth switches 18. ˜23 can be turned on / off at a high frequency during these on periods (excitation drive periods) to control the magnitude of the excitation current. Alternatively, the motor speed can be controlled by controlling the resistance value of the first to sixth switches 18 to 23 during the ON period.
[0015]
The speed detection circuit 6 of FIG. 1 is a new circuit according to the present invention, does not have an independent speed detector, and the first, second, and third position detection signals Vh1, input from the lines 31, 32, and 33, A speed detection signal Vt is created based on Vh2 and Vh3 and is output to the line 34.
[0016]
FIG. 4 shows the speed detection circuit 6 of FIG. 1 in detail, and includes first, second, and third input stage amplifiers 35, 36, 37, first, second, and third differentiation circuits 38, 39, 40, first, second and third speed detection switches 41, 42, 43, a binary signal forming circuit 44, and an adder 45.
[0017]
The first, second, and third differentiation circuits 38, 39, and 40 are connected to the first, second, and third position detection signal lines 31, 32, and 33 through amplifiers 35, 36, and 37, respectively. The first, second and third position detection signals Vh1, Vh2, Vh3 shown in FIG. 5 are differentiated, respectively, and the phases shown in Vd1, Vd2, Vd3 of FIG. Second and third differential signals or differential output voltages are generated. The first, second and third differential output voltages Vd1, Vd2 and Vd3 include speed information. If the first, second and third differential output voltages Vd1, Vd2, and Vd3 are simply added, mutual cancellation occurs, and one DC speed detection voltage cannot be obtained. Therefore, it is conceivable that the first, second and third differential output voltages Vd1, Vd2, and Vd3 are full-wave rectified with a diode and added. However, the diode full-wave rectifier circuit is not suitable for rectifying a minute level differential output voltage when the rotation speed of the rotor 10 is low. In order to solve this problem, it is conceivable to perform full-wave rectification of the output voltages Vd1, Vd2, and Vd3 of the differentiating circuits 38, 39, and 40 by selectively operating a switch or an amplifier instead of the diode rectifying circuit. However, when a full-wave rectifier circuit is configured using a switch or an amplifier, a switch or an amplifier is required, and this circuit configuration is necessarily complicated.
Therefore, in this embodiment, the first, second, and third speed detection switches 41, 42, 43 are connected to the output stages of the first, second, and third differentiation circuits 38, 39, 40. A part of the first, second and third differential output voltages Vd1, Vd2 and Vd3 is extracted by the switches 41, 42 and 43. In addition, binary signals for on / off control of the first to third switches 41, 42, and 43 are created based on the first to third position detection signals Vh1, Vh2, and Vh3.
[0018]
The binary signal forming circuit 44 for controlling on / off of the first, second, and third speed detection switches 41, 42, and 43 of the present embodiment includes first, second, and third waveform shaping circuits. It is a very simple circuit comprising 46a, 46b and 46c. The first, second, and third waveform shaping circuits 46a, 46b, 46c are first, second, and third binary signal forming circuits, each comprising a comparator, and each of the first sinusoidal waveforms shown in FIG. The first, second and third binary signals Vc1, Vc2, and Vc3, which are formed by shaping the positive half waves of the second and third position detection signals Vh1, Vh2, and Vh3 into square waves, are output. . The first, second, and third binary signals Vc1, Vc2, and Vc3 have one input terminal of each comparator as a reference potential (ground or predetermined potential), and the other input terminal receives the first, second, and second signals. This is a square wave voltage obtained by inputting the third position detection signals Vh1, Vh2, and Vh3 and alternately having a first voltage level (high level) and a second voltage level (low level).
[0019]
As is apparent from the comparison between the first differential output voltage Vd1 and the third binary signal Vc3 in FIG. 5, the third binary signal Vc3 is slightly 30 degrees ahead of the first differential output voltage Vd1. There is only. Therefore, the third binary signal Vc3 can be used for the on / off control of the first speed detection switch 41. For this reason, in FIG. 4, the output line of the third waveform shaping circuit 46 c is connected to the base (control terminal) of the first speed detection switch 41. As a result, the first speed detection signal Vs1 shown in FIG. 5 is obtained at the output stage of the first speed detection switch 41. The first speed detection signal Vs1 corresponds to a component in a section of −30 degrees to 150 degrees of the first differential output voltage Vd1. The first speed detection signal Vs1 includes a negative voltage in the -30 to 0 degree interval, but is smaller in both time width and amplitude than the positive voltage in the 0 to 150 degree interval.
[0020]
The above-described first differential is also applied between the second differential output voltage Vd2 and the first binary signal Vc1 in FIG. 5 and between the third differential output voltage Vd3 and the second binary signal Vc2. The phase relationship is similar to the relationship between the output voltage Vd1 and the third binary signal Vc3. Therefore, the output line of the first waveform shaping circuit 46a of FIG. 4 is connected to the base of the second speed detection switch 42, and the output line of the second waveform shaping circuit 46b is the third speed detection switch 43. Connected to the base. Thereby, the second and third speed detection signals Vs2 and Vs3 shown in FIG. 5 are obtained at the output stage of the second and third speed detection switches 42 and 43, respectively.
[0021]
The adder 45 in FIG. 4 includes first, second and third speed detection signals Vs1, Vs2, Vs3 obtained at the output stages of the first, second and third speed detection switches 41, 42, 43. Is added to generate a DC speed detection signal Vt. The first, second, and third speed detection signals Vs1, Vs2, and Vs3 have a phase difference of 120 degrees from each other, and each has only a negative direction component in the 30-degree section, and thus is obtained from the adder 45. The DC speed detection signal Vt is a signal with good smoothness, and the maximum ripple rate ΔV is 50%.
[0022]
In FIG. 1, a target speed signal generator 7 is connected to one input terminal of a speed control signal forming error amplifier 8 by a line 7a, and a speed detection signal Vt line 34 is connected to the other input terminal. . Since the target speed signal generator 7 generates a voltage indicating the target speed as the target speed signal, a signal indicating the difference between the voltage value of the target speed signal and the voltage value of the speed detection signal Vt is output from the error amplifier 8 as the speed control signal. Vcon is obtained and sent to the motor control and drive circuit 2 by line 15. As a result, the rotor 10 can be rotated at the target speed.
[0023]
As is clear from the above, in this embodiment, a dedicated speed detector for detecting the rotational speed of the rotor 10 is not provided, and the first, second, and second necessary for excitation switching control of the brushless DC motor are provided. The speed detection signal Vt is generated using the third position detection signals Vh1, Vh2, and Vh3. That is, the speed detection signal Vt is created using the outputs of the position detecting Hall elements 3, 4, and 5. Accordingly, speed detection can be performed with a simple configuration, and the speed control signal forming circuit of the brushless DC motor can be reduced in size and cost.
In this embodiment, the first, second, and third position detection signals Vh1, Vh2, and Vh3 are converted into binary signals Vc1, Vc2, and the first, second, and third waveform shaping circuits 46a, 46b, and 46c, The waveform is shaped to Vc3, the second speed detection switch 42 is controlled by the first binary signal Vc1, the third speed switching switch 43 is controlled by the second binary signal Vc2, and the third binary value is controlled. A speed detection signal Vt having a relatively small ripple can be obtained with a simple circuit in which the first speed changeover switch 41 is controlled by the signal Vc3.
[0024]
[Second embodiment]
Next, the brushless DC motor device of the second embodiment will be described with reference to FIG. However, in FIG. 6 and FIGS. 7 to 17 described later, portions common to FIGS. Also, in the second to eighth embodiments, the parts substantially the same as those of the first embodiment are not shown, and FIGS. 1 to 5 are referred to.
[0025]
In the brushless DC motor device of the second embodiment, the third hall element 5 provided in the first embodiment is omitted, and the third position detection signal Vh3 is changed to the first and second position detection signals Vh1, Vh2. The configuration is the same as that of the first embodiment except for the points created based on the above.
[0026]
As shown in FIG. 6, the third position detection signal forming circuit 49 includes first and second amplifiers 49a and 49b, an adder 49c, and a phase inverting circuit 49d. The two input terminals of the adder 49c are connected to the output lines of the first and second Hall elements 3 and 4 via amplifiers 49a and 49b, and have a phase difference of 120 degrees (2π / 3) from each other. The first and second phase detection signals Vh1 and Vh2 are added, that is, vector synthesized. The position inversion circuit 49d inverts the phase of the output of the adder 49c and outputs a third position detection signal Vh3. The third position detection signal Vh3 is substantially the same as the voltage waveform indicated by the same reference symbol in FIG.
[0027]
According to the second embodiment, since the three position detection signals Vh1, Vh2, and Vh3 are obtained by the two Hall elements 3 and 4, the size and cost can be reduced by reducing the number of Hall elements. In the second embodiment, since the same circuit as the speed detection circuit 6 of the first embodiment is provided, the same effect as that of the first embodiment is obtained.
[0028]
[Third embodiment]
In the third embodiment, the binary signal forming circuit 44 of FIG. 4 is modified into the first, second and third binary signal forming circuits 44a, 44b and 44c of FIG. 7, and the others are the first embodiment. This is the same configuration as the brushless DC motor.
[0029]
The first, second, and third binary signal forming circuits 44a, 44b, and 44c in FIG. 7 are the first, second, and third waveform shaping circuits 46a, 46b, and 46c, and the first, second, and third waveform shaping circuits 46a, 46b, and 46c. 30 degree delay circuits 47a, 47b and 47c. The first, second, and third 30 degree delay circuits 47a, 47b, 47c include first, second, and third amplifiers 35, 36, 37, and first, second, and third waveform shaping circuits 46a, 46b, 46c, and the first, second and third delayed position signals Vh1, obtained by delaying the first, second and third position detection signals Vh1, Vh2, Vh3 of FIG. 10 by 30 degrees, Vh2 'and Vh3 are output. The first, second and third waveform shaping circuits 46a, 46b and 46c output the first, second and third binary signals Vc1, Vc2 and Vc3 of FIG.
[0030]
The first, second and third binary signal forming circuits 44a, 44b and 44c are replaced with the first, second and third 30 degree delay circuits 47a, 47b and 47c and the first, second and third. The waveform shaping circuits 46a, 46b, and 46c can be integrated. FIG. 8 shows an example of the first binary signal forming circuit 44a in which the 30-degree delay circuit 47a and the waveform shaping circuit 46a are integrated. The first binary signal forming circuit 44a includes first and second addition resistors R1 and R2, which function as a part of the 30-degree delay circuit 47a, an operational amplifier or operational amplifier 48, and a reference voltage source Er. Become. One input terminal of the operational amplifier 48 having both addition and comparison functions is connected to the amplifiers 35 and 36 in FIG. 7 via the first and second resistors R1 and R2. Accordingly, the first and second position detection signals Vh1 and Vh2 are applied to the first and second resistors R1 and R2. A reference voltage source Er is connected to the other input terminal of the operational amplifier 48. The reference voltage of the reference voltage source Er is set so as to coincide with the center potential (for example, 2.5 V) of the first to third position detection signals Vh1 to Vh3. The second resistor R2 has a resistance value twice that of the first resistor R1. As a result, as shown in FIG. 9, the first and second position detection signals Vh1, Vh2 having a phase difference of 120 degrees are added at a ratio of 2: 1, and 30 degrees from the first position detection signal Vh1. A delayed first delay position signal Vh1 'is obtained.
The operational amplifier 48 has a function of the waveform shaping circuit 46a. When the first delay position signal Vh1 'based on the first and second position detection signals Vh1 and Vh2 is higher than the reference voltage Er equal to the center value, the first operational amplifier 48 has a function. When the first delay position signal Vh1 'is lower than the reference voltage Er, the second voltage level is output. That is, the operational amplifier 48 outputs the first binary signal Vc1 of FIG. Note that the second and third binary signal forming circuits 44b and 44c in FIG. 7 can also be formed on the same principle as the first binary signal forming circuit 44a. That is, the second binary signal forming circuit 44b adds the second position detection signal Vh2 and the third position detection signal Vh3 at a ratio of 2: 1 to form the second delayed position signal Vh2 '. The third third binary signal forming circuit 44c adds the third position detection signal Vh3 and the first position detection signal Vh1 at a ratio of 2: 1 to obtain the third delayed position signal Vh3 '. Form.
[0031]
The first, second and third delayed phase signals Vh1 ', Vh2' and Vh3 'in FIG. 7 are delayed by 30 degrees from the first, second and third position detection signals Vh1, Vh2 and Vh3 in FIG. Corresponds to the phase shifted. Accordingly, the first, second, and third binary signals Vc1, Vc2, and Vc3 of FIG. 10 are obtained from the first, second, and third waveform shaping circuits 46a, 46b, and 46c formed of comparators. The first, second, and third binary signals Vc1, Vc2, and Vc3 in FIG. 10 correspond to signals obtained by delaying the binary signal indicated by the same symbol in FIG. 5 by 30 degrees. Since the phases of the first, second, and third binary signals Vc, Vc2, and Vc3 in FIG. 10 match the phases of the second, third, and first differential output voltages Vd2, Vd3, and Vd1, FIG. The first, second and third speed detection signals Vs1, Vs2 and Vs3 obtained at the output stage of the switches 41, 42 and 43 are positive half waves of 0 to 180 degrees as shown in FIG. The adder 45 in FIG. 7 adds the three-phase positive half-waves in FIG. 10 and outputs the DC speed detection signal Vt in FIG. The maximum ripple rate ΔV of the speed detection signal Vt in FIG. 10 is 13%, which is significantly smaller than the ripple rate (50%) in FIG.
[0032]
Since the motor device of the third embodiment is configured substantially the same as the first embodiment except for the 30-degree delay circuits 47a, 47b, 47c, in addition to the above effects, the motor device is the same as the first embodiment. It also has an effect.
[0033]
[Fourth embodiment]
As shown in FIG. 11, the brushless DC motor device of the fourth embodiment is provided with a speed control signal forming circuit 50 in which the speed detection circuit 6 and the error amplifier 8 of FIG. 1 are integrated. The same configuration.
[0034]
The speed control signal forming circuit 50 of FIG. 11 is configured to have both functions of the speed detection circuit 6a of FIG. 7 and the error amplifier 8 of FIG. That is, the speed control signal forming circuit 50 includes first, second, and third buffer amplifiers 35, 36, and 37, positive and negative half wave extraction first, second, and third switches 41, 42, and 43. Discharge fourth, fifth and sixth switches 51, 52 and 53, first, second and third binary signal forming circuits 44a, 44b and 44c, and first, second and third inversions Circuits 54, 55, 56, operational amplifier (operational amplifier) 57, reference voltage source 58, target speed signal inversion circuit 59, first, second and third capacitors C 1, C 2, C 3, first, Second, third, fourth and fifth resistors R1, R2, R3, R4 and R5 are provided.
[0035]
11, first, second, and third position detection signal lines 31, 32, 33, first, second, and third amplifiers 35, 36, and 37, and first, second, and third switches. 41, 42, 43, first, second, and third binary signal forming circuits 44a, 44b, 44c, first, second, and third waveform shaping circuits 46a, 46b, 46c, The second and third delay circuits 47a, 47b, 47c are substantially the same as those shown by the same reference numerals in FIG. In FIG. 11, C1 R1 series circuits 38a, C2 connected between the first, second, and third amplifiers 35, 36, 37 and the first, second, and third switches 41, 42, 43 are also shown. The R2 series circuit 39a and the C3 R3 series circuit 40a have functions corresponding to a part of the first, second and third differentiation circuits 38, 39 and 40 of FIG. In the following, 38a, 39a, and 40a in FIG. 11 are referred to as first, second, and third CR series circuits.
[0036]
The operational amplifier 57 is provided as a component of the differentiation circuit and the addition circuit. One input terminal of the operational amplifier 57 is connected to the first, second, and third CR series circuits 38a, 39a, 40a via the first, second, and third switches 41, 42, 43, and the fourth Are connected to the target speed signal line 7a through the resistor R4 and the polarity inversion circuit 59. Between the one input terminal and the output terminal of the operational amplifier 57, a fifth resistor R5 is connected as a feedback resistor. A reference voltage source 58 that provides a reference voltage Er = 2.5 V is connected between the other input terminal of the operational amplifier 57 and the ground. The reference voltage source 58 is connected to the first, second and third CR series circuits 38a, 39a and 40a via the fourth, fifth and sixth switches 51, 52 and 53. The fourth, fifth, and sixth switches 51, 52, and 53 output the outputs of the third, first, and second binary signal forming circuits 44c, 44a, and 44b to the first, second, and third inverting circuits, respectively. It is controlled by the signal whose phase is inverted by 54, 55 and 56, and operates in reverse to the first, second and third switches 41, 42 and 43. The fourth, fifth and sixth switches 51, 52 and 53 are connected to the first, second and third capacitors C1, C2 and C1 during the OFF period of the first, second and third switches 41, 42 and 43, respectively. This is for resetting (discharging) C3.
[0037]
The circuit of FIG. 11 operates in the same manner as the speed detection circuit 6a of FIG. 7 with the error amplifier 8 of FIG.
[0038]
The binary signal forming circuits 44a, 44b, and 44c in FIG. 11 obtain the first, second, and third binary signals Vc1, Vc2, and Vc3 shown in FIG. 10, similarly to FIG. The first, second, and third switches 41, 42, and 43 are turned on during the high level period of the third, first, and second binary signals Vc3, Vc1, and Vc2, and are turned off during the low level period. The fourth, fifth, and sixth switches 51, 52, and 53 are turned on during the low level period of the third, first, and second binary signals Vc3, Vc1, and Vc2, and are turned off during the high level period.
Assuming that only the first position detection signal Vh1 is input, the first switch 41 is turned on (for example, t9 to t15 in FIG. 10) based on the third binary signal Vc3. A positive half-wave of the differential output voltage Vd1 is extracted, and the first capacitor C1 is discharged during the ON period (eg, t3 to t9) of the fourth switch 51, which is the same as the first speed detection signal Vs1 in FIG. Things are obtained.
Assuming that only the second position detection signal Vh2 is generated in the circuit of FIG. 11, the second and fifth switches 42 and 52 are controlled based on the first binary signal Vc1, and the second of FIG. 2 corresponding to the speed detection signal Vs2 of 2 is obtained.
Assuming that only the third position detection signal Vh3 is generated in the circuit of FIG. 11, the third and sixth switches 43 and 53 are controlled based on the second binary signal Vc2, and the 3 corresponding to the speed detection signal Vs3 of 3 is obtained.
[0039]
In the circuit of FIG. 11, the output side terminals of the first, second and third switches 41, 42 and 43 are connected in common, which is connected to one input terminal of the operational amplifier 57, and the fourth, fifth, And the output side terminals of the sixth switches 51, 52, 53 are connected in common, and this is connected to the reference voltage source 58. Therefore, if the target speed signal Vr is ignored, the first, second and third position detection signals Vh1, Vh2 and Vh3 shown in FIG. A signal corresponding to the DC speed detection signal Vt obtained by adding the speed detection signals Vs1, Vs2, and Vs3 is obtained from the operational amplifier 57. Accordingly, although the speed control signal Vcon is not shown in FIG. 10, the speed control signal Vcon is obtained by subtracting the target speed signal Vr from the speed detection voltage Vt.
The inventions of claims 3, 4, 15, and 16 correspond to those in which the line 7a target speed signal Vr is input to the operational amplifier 57 in FIG.
[0040]
The operational amplifier 57 of FIG. 11 functions as an error amplifier for forming the speed control signal Vcon in addition to the differentiation and addition. That is, the target speed signal Vr of the target speed line 7a is converted to -Vr by the inverting circuit 59 and is input to one input terminal of the operational amplifier 57 via the fourth resistor R4. Therefore, during the period when the first, second and third switches 41, 42 and 43 are on, the current flows into the feedback resistor R5 through these switches 41, 42 and 43. On the other hand, the current flowing through the feedback resistor R5 based on the negative target speed signal -Vr is directed to flow into the target speed inversion circuit 59 from the feedback resistor R5, so that current subtraction occurs in the feedback resistor R5, resulting in the operational amplifier 57. A speed control signal Vcon indicating the difference between the speed detection voltage Vt and the target speed signal Vr is obtained at the output stage.
[0041]
The fourth embodiment has effects similar to those of the first to third embodiments, and further, differentiation, addition, and error signal formation can be achieved by one operational amplifier 57, and the circuit configuration is simplified. It also has an effect. Further, since the first, second and third capacitors C1, C2 and C3 remove the DC offset and send only the alternating current to the operational amplifier 57, the offset can be easily removed. In addition, the fourth, fifth, and sixth switches 51, 52, and 53 can reliably and easily achieve the resetting of the first, second, and third capacitors C1, C2, and C3.
In order to obtain the circuit according to the third, fourth, fifteenth and sixteenth aspects of the present invention, the target speed line 7a, the inverting circuit 59, and the resistor R4 can be omitted in FIG. In the case of such modification, since the DC speed detection voltage Vt is obtained from the operational amplifier 57 in the same manner as in FIG. 7, this speed detection voltage Vt is input to the error amplifier 8 in FIG. As a result, the same effects as those of the first and fourth embodiments can be obtained.
[0042]
[Fifth embodiment]
Next, a fifth embodiment will be described with reference to FIGS. However, in FIG. 12 and FIG. 13, the same reference numerals are given to the portions common to FIG. 7, FIG. 10, and FIG.
In FIG. 12, the speed detection circuit 6b of the brushless DC motor of the fifth embodiment is a modification of the speed control signal forming circuit 50 of FIG. That is, the speed detection circuit 6b of FIG. 12 is configured to output the speed detection signal Vt by omitting the inverting circuit 59 and the resistor R4 from the speed control signal forming circuit 50 of FIG. In order to obtain a speed detection signal Vt corresponding to the full-wave rectified output of the differential signals of the second and third position detection signals Vh1, Vh2, and Vh3, the fourth, fifth, and sixth switches 51, 52, and 53 and Except for the provision of the second operational amplifier 60, the second feedback resistor R6, and the adding resistor R7, the configuration is the same as the speed control signal forming circuit 50 of FIG.
The first input terminal (negative terminal) of the second operational amplifier 60 is connected to the output terminals of the fourth, fifth and sixth switches 51, 52 and 53, respectively. A second input terminal (positive terminal) of the second operational amplifier 60 is connected to the reference voltage source 58. The second feedback resistor R6 is connected between the first input terminal and the output terminal of the second operational amplifier 60. The output terminal of the second operational amplifier 60 is connected to the first input terminal of the first operational amplifier 57 via the resistor R7. The first input terminal of the first operational amplifier 57 in FIG. 12 is connected to the first, second, and third switches 41, 42, and 43 as in FIG. 11, and the second input terminal is the reference voltage source 58. It is connected to the.
[0043]
From the binary signal forming circuits 44a, 44b, and 44c in FIG. 12, the first, second, and third binary signals Vc1, Vc2, and Vc3 shown in FIG. 13 are obtained as in FIG. The first, second, and third switches 41, 42, and 43 are turned on during the high level period of the third, first, and second binary signals Vc3, Vc1, and Vc2, and are turned off during the low level period. The fourth, fifth, and sixth switches 51, 52, and 53 are turned on during the low level period of the third, first, and second binary signals Vc3, Vc1, and Vc2, and are turned off during the high level period.
Assuming that only the first position detection signal Vh1 is being input, the first differential output voltage during the ON period (eg, t9 to t15) of the first switch 41 based on the third binary signal Vc3. The positive half-wave of Vd1 is extracted, and the negative half-wave of the first differential output voltage Vd1 is extracted during the ON period of the fourth switch 51 (for example, t3 to t9), and the first speed detection signal of FIG. Vs1 is obtained. The first speed detection signal Vs1 in FIG. 13 corresponds to the full-wave rectified waveform of the first differential output voltage Vd1 in FIG.
Assuming that only the second position detection signal Vh2 is generated in the circuit of FIG. 12, the second and fifth switches 42 and 52 are controlled based on the first binary signal Vc1, and the second of FIG. Two speed detection signals Vs2 are obtained.
Assuming that only the third position detection signal Vh3 is generated in the circuit of FIG. 12, the third and sixth switches 43 and 53 are controlled based on the second binary signal Vc2, and the third position detection signal Vh3 of FIG. 3 speed detection signal Vs3 is obtained.
[0044]
In the circuit of FIG. 12, the output side terminals of the first, second, and third switches 41, 42, and 43 are connected in common, and this is connected to the first input terminal of the first operational amplifier 57. The output side terminals of the fourth, fifth and sixth switches 51, 52, 53 are connected in common, and this is connected to the first input terminal of the second operational amplifier 60. The output terminal of the second operational amplifier 60 is connected to the first input terminal of the first operational amplifier 57. Accordingly, the second operational amplifier 60 outputs a composite of negative half-wave rectified waveforms of the first, second, and third differential outputs of the voltages Vd1, Vd2, and Vd3. The first operational amplifier 57 synthesizes the positive half-wave rectified waveforms of the first, second, and third differential output voltages Vd1, VVd2, and Vd3, and simultaneously synthesizes the output of the second operational amplifier 60. As a result, when the first, second and third position detection signals Vh1, Vh2 and Vh3 are simultaneously input to the speed detection circuit 6b of FIG. 12, the first, second and third speeds shown in FIG. A DC speed detection signal Vt obtained by adding the detection signals Vs1, Vs2, and Vs3 is obtained from the first operational amplifier 57. Therefore, the ripple of the DC speed detection voltage Vt is relatively small. The speed detection voltage Vt of the line 34 in FIG. 12 is sent to the one corresponding to the error amplifier 8 in FIG. 1 and used to generate the speed control signal Vcon.
[0045]
The fifth embodiment has the same effect as the first to fourth embodiments, and further has the effect that a speed detection voltage Vt with a small ripple can be obtained.
[0046]
[Sixth embodiment]
The speed control signal forming circuit 50a of the sixth embodiment shown in FIG. 14 corresponds to the speed detection circuit 6b of FIG. 12 with the addition of an inverting circuit 59 and a resistor R4, and the rest of the configuration of FIG. . The inversion circuit 59 and the resistor R4 in FIG. 14 are substantially the same as those indicated by the same reference numerals in FIG. 11, and are used to input the phase inversion signal of the target speed signal Vr on the line 7a to the first operational amplifier 57. is there.
[0047]
The operational amplifier 57 shown in FIG. 14 functions as an error amplifier for forming the speed control signal Vcon in addition to differentiation and addition. That is, the target speed signal Vr of the target speed line 7a is converted to -Vr by the inverting circuit 59 and is input to the first input terminal of the first operational amplifier 57 via the fourth resistor R4. Since the current flowing through the feedback resistor R5 based on the negative target speed signal -Vr is directed to the inverting circuit 59 from the feedback resistor R5, current subtraction occurs at the feedback resistor R5, resulting in the output stage of the operational amplifier 57. A speed control signal Vcon indicating a difference between the speed detection voltage Vt and the target speed signal Vr is obtained.
[0048]
The sixth embodiment has the same effect as the fourth and fifth embodiments.
[0049]
[Seventh embodiment]
A speed detection circuit 6 c of the seventh embodiment shown in FIG. 15 is a modification of the speed detection circuit 6 b of FIG. 12, and the second operational amplifier 60 is connected to the first input terminal of the first operational amplifier 57. In addition, an inverting circuit 70 and an adder 71 are provided, and the speed detection signal is obtained by adding the output of the first operational amplifier 57 and the inverted signal of the second operational amplifier 60 by the adder 71. This corresponds to the same configuration as in FIG. From the adder 71, a full-wave rectified waveform of the same differential signal as the speed detection signal Vt shown in FIG. 12 is obtained. Therefore,
The seventh embodiment has the same effect as the fifth embodiment.
[0050]
[Eighth embodiment]
FIG. 16 shows a motor speed control apparatus having a brush to which the present invention is applied. The motor 1a shown in FIG. 16 comprises a stator 9a rotor 10a and a brush assembly 80. As schematically shown in FIG. 17, the stator 9 a includes a pair of magnets 86 and 87. The rotor 10a includes a winding 85 and a core (not shown). The winding 85 is connected to the motor control and drive circuit 2a via brushes 81 and 82. The motor control and drive circuit 2a includes a DC power supply 16 and a speed control circuit 17 configured in the same manner as in FIG. The speed control circuit 17 has a function of controlling the power supplied from the DC power supply 16 to the winding 85.
[0051]
A shaft 83 to which the rotor 10 a is coupled is coupled to the center of the disk-shaped magnet 84. Therefore, the disk-shaped magnet 84 rotates according to the rotor 10a. The disk-shaped magnet 84 has eight N-pole regions and eight S-pole regions that are alternately divided in the circumferential direction. The first, second and third hole elements 3, 4, 5 in FIG. 16, the speed detection circuit 6, the target speed signal generator 7, and the error amplifier 8 are indicated by the same reference numerals in FIG. It is configured identically. The first, second and third hall elements 3, 4, 5 are fixed to, for example, the stator 9 a so that the magnetic flux generated by the disc-shaped magnet 84 can be detected. The electrical angle between the first, second and third hall elements 3, 4 and 5 is 120 degrees as in FIG. 2, and the disk-shaped magnet 84 in FIG. The mutual relationship between the first to third hall elements 3 to 5 is the mutual relation between the rotor 10 having the north pole and the south pole shown in FIG. 2 and the first to third hall elements 3 to 5. Is the same. Therefore, when the rotor 10a and the disc-shaped magnet 84 rotate relative to the stator 9a, the first to third hole elements 3 to 5 are mutually connected as shown by Vh1, Vh2, and Vh3 in FIG. A sinusoidal three-phase AC voltage having a phase difference of 120 degrees is obtained. Thereby, the speed detection of the motor 1a can be performed in FIG. 16 as well as in FIG. Therefore, the same effect as that of the first embodiment can be obtained by the eighth embodiment.
[0052]
The method of detecting the rotational speed using the disk-shaped magnet 84 of FIG. 16 is not limited to the embodiment of FIG. 4, but also the embodiments of FIGS. 6, 7, 11, 12, 14, and 15. These modifications can also be applied. That is, the technology of the speed control signal forming circuit according to the first to twelfth aspects of the invention can be applied to one having the magnet 84 coupled to the rotor 10a as shown in the thirteenth to twenty-fourth aspects of the invention.
[0053]
[Modification]
The present invention is not limited to the above-described embodiments, and for example, the following modifications are possible.
(1) The third embodiment of FIG. 7, the fourth embodiment of FIG. 11, the fifth embodiment of FIG. 12, the sixth embodiment of FIG. 14, the seventh embodiment of FIG. 15, and the FIG. Also in the eighth embodiment, the third position detection signal Vh3 can be generated by the third position detection signal forming circuit 49a of the second embodiment of FIG.
(2) In FIGS. 5, 10, and 13, the polarities of the first, second, and third speed detection signals Vs1, Vs2, and Vs3 can be reversed. 5, 10, and 13, the negative half-wave side of the differential output voltages Vd1, Vd2, and Vd3 can be extracted by the first, second, and third switches 41, 42, and 43.
(3) In order to obtain a circuit according to claims 3, 5, 7, 9, 11, 15, 17, 19, 21, 23, etc., in the circuits of FIGS. The input terminals of the waveform shaping circuits 46a, 46b, 46c can be connected to the amplifiers 35, 36, 37 by omitting 47a, 47b, 47c.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a brushless DC motor device according to a first embodiment.
FIG. 2 is a diagram showing a cross section of the motor main body of FIG. 1 and the arrangement of Hall elements.
FIG. 3 is a circuit diagram showing in principle the motor control and drive circuit of FIG. 1;
4 is a block diagram showing the speed detection circuit of FIG. 1. FIG.
5 is a waveform diagram showing voltages at various parts in FIG. 4; FIG.
FIG. 6 is a diagram illustrating a cross section of a motor main body portion, an arrangement of two Hall elements, and a third position detection signal forming circuit according to a second embodiment.
FIG. 7 is a block diagram illustrating a speed detection circuit according to a third embodiment.
8 is a circuit diagram showing the first 30-degree delay circuit and the first waveform shaping circuit of FIG. 7; FIG.
9 is a vector diagram for explaining formation of a 30-degree delayed signal by the circuit of FIG.
10 is a waveform diagram showing voltages at various parts in FIG. 7; FIG.
FIG. 11 is a block diagram showing a speed control signal forming circuit of a fourth embodiment.
FIG. 12 is a block diagram showing a speed detection circuit according to a fifth embodiment.
13 is a waveform diagram showing the state of each part in FIG. 11. FIG.
FIG. 14 is a block diagram showing a speed control signal forming circuit of a sixth embodiment.
FIG. 15 is a block diagram showing a speed detection circuit according to a seventh embodiment.
FIG. 16 is a block diagram showing a motor and a speed control device thereof according to an eighth embodiment.
17 is a block diagram showing the motor of FIG. 16 and its drive control circuit.
[Explanation of symbols]
1 Motor body
2 Motor control and drive circuit
3, 4, 5 first, second and third Hall elements
6 Speed detection circuit
7 Target speed signal generator
8 Error amplifier
38, 39, 40 Differentiation circuit
41, 42, 43 First, second and third speed detection switches
45 Adder
46a, 46b, 46c Waveform shaping circuit
47a, 47b, 47c 30 degree delay circuit

Claims (16)

第１、第２及び第３の固定子巻線と、
永久磁石から成る回転子と、
前記第１、第２及び第３の固定子巻線に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記永久磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記第１、第２及び第３相固定子巻線と前記永久磁石との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の固定子巻線の励磁電流の切換を行うと共に、前記回転子を目標速度に回転させるように前記第１、第２及び第３の固定子巻線の励磁電流を制御する励磁制御手段と
を備えたブラシレス直流モータの速度制御信号を形成するための装置であって、
前記第１、第２及び第３の位置検出信号をそれぞれ微分して前記第１，第２及び第３の位置検出信号に対して９０度の進み位相を有する第１、第２及び第３の微分信号を形成する第１、第２及び第３の微分回路と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１の微分回路から得られた前記第１の微分信号を前記第３の二値信号の前記第１の電圧レベルの期間のみ通過させるための第１のスイッチと、
前記第２の微分回路から得られた前記第２の微分信号を前記第１の二値信号の前記第１の電圧レベルの期間のみ通過させる第２のスイッチと、
前記第３の微分回路から得られた前記第３の微分信号を前記第２の二値信号の前記第１の電圧レベルの期間のみ通過させる第３のスイッチと、
前記第１、第２及び第３のスイッチの出力を加算して前記回転子の回転速度検出信号を出力する加算手段と、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記目標回転速度を示す信号と前記回転速度検出信号との差に対応する値を求め、この値を速度制御信号として前記励磁制御手段に供給する演算手段と
を備えたモータの速度制御信号形成装置。First, second and third stator windings;
A rotor made of permanent magnets,
The plurality of magnetoelectric transducers arranged so as to have a fixed positional relationship with respect to the first, second and third stator windings, and the plurality of magnetic fields changing in accordance with the rotation of the permanent magnet The first, second and third position detection signals indicating the relative positional relationship between the first, second and third phase stator windings and the permanent magnet based on the output of the magnetoelectric transducer are 120 degrees. Position detection means that sequentially generate with a phase difference of
Based on the first, second and third position detection signals, the excitation currents of the first, second and third stator windings are switched, and the rotor is rotated to a target speed. An apparatus for forming a speed control signal of a brushless DC motor comprising excitation control means for controlling the excitation current of the first, second and third stator windings;
The first, second, and third position detection signals are differentiated, respectively, and the first, second, and third positions having a lead phase of 90 degrees with respect to the first, second, and third position detection signals, respectively. First, second and third differentiating circuits for forming a differential signal;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
A first switch for passing the first differential signal obtained from the first differentiating circuit only during a period of the first voltage level of the third binary signal;
A second switch that passes the second differential signal obtained from the second differentiating circuit only during a period of the first voltage level of the first binary signal;
A third switch for passing the third differential signal obtained from the third differentiating circuit only during a period of the first voltage level of the second binary signal;
Adding means for adding outputs of the first, second and third switches to output a rotation speed detection signal of the rotor;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
A speed control signal forming apparatus for a motor comprising: a value corresponding to a difference between the signal indicating the target rotation speed and the rotation speed detection signal; and a calculation means for supplying this value to the excitation control means as a speed control signal . 第１、第２及び第３の固定子巻線と、
永久磁石から成る回転子と、
前記第１、第２及び第３の固定子巻線に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記永久磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記第１、第２及び第３相固定子巻線と前記永久磁石との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の固定子巻線の励磁電流の切換を行うと共に、前記回転子を目標速度に回転させるように前記第１、第２及び第３の固定子巻線の励磁電流を制御する励磁制御手段と
を備えたブラシレス直流モータの速度制御信号を形成するための装置であって、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサと、
速度検出信号を出力するものであって、第１及び第２の入力端子と出力端子とを有している演算増幅器と、
前記演算増幅器の第１の入力端子と出力端子との間に接続された帰還抵抗と、
前記演算増幅器の第２の入力端子に接続された基準電位を与える基準電位手段と、
前記第１のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第１のスイッチと、
前記第２のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第２のスイッチと、
前記第３のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第３のスイッチと、
前記第１のコンデンサと前記基準電位手段との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第４のスイッチと、
前記第２のコンデンサと前記基準電位手段との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第５のスイッチと、
前記第３のコンデンサと前記基準電位手段との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第６のスイッチと、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記目標回転速度を示す信号と前記演算増幅器から得られた前記回転速度検出信号との差に対応する値を求め、この値を速度制御信号として前記励磁制御手段に供給する演算手段と
を備えたモータの速度制御信号形成装置。First, second and third stator windings;
A rotor made of permanent magnets,
The plurality of magnetoelectric transducers arranged so as to have a fixed positional relationship with respect to the first, second and third stator windings, and the plurality of magnetic fields changing in accordance with the rotation of the permanent magnet The first, second and third position detection signals indicating the relative positional relationship between the first, second and third phase stator windings and the permanent magnet based on the output of the magnetoelectric transducer are 120 degrees. Position detection means that sequentially generate with a phase difference of
Based on the first, second and third position detection signals, the excitation currents of the first, second and third stator windings are switched, and the rotor is rotated to a target speed. An apparatus for forming a speed control signal of a brushless DC motor comprising excitation control means for controlling the excitation current of the first, second and third stator windings;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitors connected in series to transmission lines of the first, second and third position detection signals;
An operational amplifier which outputs a speed detection signal and has first and second input terminals and an output terminal;
A feedback resistor connected between a first input terminal and an output terminal of the operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of the operational amplifier;
The first capacitor is connected between the first capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the third binary signal. And the switch
The second capacitor is connected between the second capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the first binary signal. And the switch
The third capacitor is connected between the third capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the second binary signal. And the switch
A fourth switch connected between the first capacitor and the reference potential means and turned on only during the second voltage level in response to the third binary signal;
A fifth switch connected between the second capacitor and the reference potential means and turned on only in the period of the second voltage level in response to the first binary signal;
A sixth switch connected between the third capacitor and the reference potential means and turned on only in the period of the second voltage level in response to the second binary signal;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
A calculation unit that obtains a value corresponding to a difference between the signal indicating the target rotation speed and the rotation speed detection signal obtained from the operational amplifier and supplies the value to the excitation control unit as a speed control signal Motor speed control signal generator. 第１、第２及び第３の固定子巻線と、
永久磁石から成る回転子と、
前記第１、第２及び第３の固定子巻線に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記永久磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記第１、第２及び第３相固定子巻線と前記永久磁石との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の固定子巻線の励磁電流の切換を行うと共に、前記回転子を目標速度に回転させるように前記第１、第２及び第３の固定子巻線の励磁電流を制御する励磁制御手段と
を備えたブラシレス直流モータの速度制御信号を形成するための装置であって、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサと、
速度検出信号を出力するものであって、第１及び第２の入力端子と出力端子とを有している演算増幅器と、
前記演算増幅器の第１の入力端子と出力端子との間に接続された帰還抵抗と、
前記演算増幅器の第２の入力端子に接続された基準電位を与える基準電位手段と、
前記第１のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第１のスイッチと、
前記第２のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第２のスイッチと、
前記第３のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第３のスイッチと、
前記第１のコンデンサと前記基準電位手段との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第４のスイッチと、
前記第２のコンデンサと前記基準電位手段との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第５のスイッチと、
前記第３のコンデンサと前記基準電位手段との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第６のスイッチと、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記演算増幅器から前記励磁制御手段に供給するための速度制御信号を得るために、前記目標回転速度を示す信号を位相反転して前記演算増幅器に供給する手段と
を備えたモータの速度制御信号形成装置。First, second and third stator windings;
A rotor made of permanent magnets,
The plurality of magnetoelectric transducers arranged so as to have a fixed positional relationship with respect to the first, second and third stator windings, and the plurality of magnetic fields changing in accordance with the rotation of the permanent magnet The first, second and third position detection signals indicating the relative positional relationship between the first, second and third phase stator windings and the permanent magnet based on the output of the magnetoelectric transducer are 120 degrees. Position detection means that sequentially generate with a phase difference of
Based on the first, second and third position detection signals, the excitation currents of the first, second and third stator windings are switched, and the rotor is rotated to a target speed. An apparatus for forming a speed control signal of a brushless DC motor comprising excitation control means for controlling the excitation current of the first, second and third stator windings;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitors connected in series to transmission lines of the first, second and third position detection signals;
An operational amplifier which outputs a speed detection signal and has first and second input terminals and an output terminal;
A feedback resistor connected between a first input terminal and an output terminal of the operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of the operational amplifier;
The first capacitor is connected between the first capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the third binary signal. And the switch
The second capacitor is connected between the second capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the first binary signal. And the switch
The third capacitor is connected between the third capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the second binary signal. And the switch
A fourth switch connected between the first capacitor and the reference potential means and turned on only during the second voltage level in response to the third binary signal;
A fifth switch connected between the second capacitor and the reference potential means and turned on only in the period of the second voltage level in response to the first binary signal;
A sixth switch connected between the third capacitor and the reference potential means and turned on only in the period of the second voltage level in response to the second binary signal;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
Speed control signal formation of a motor comprising means for inverting the phase of a signal indicating the target rotational speed and supplying the signal to the operational amplifier in order to obtain a speed control signal to be supplied from the operational amplifier to the excitation control means apparatus. 第１、第２及び第３の固定子巻線と、
永久磁石から成る回転子と、
前記第１、第２及び第３の固定子巻線に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記永久磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記第１、第２及び第３相固定子巻線と前記永久磁石との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の固定子巻線の励磁電流の切換を行うと共に、前記回転子を目標速度に回転させるように前記第１、第２及び第３の固定子巻線の励磁電流を制御する励磁制御手段と
を備えたブラシレス直流モータの速度制御信号を形成するための装置であって、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサ抵抗直列回路と、
第１及び第２の入力端子と速度検出信号を出力する出力端子とを有している第１の演算増幅器と、
第１及び第２の入力端子と出力端子とを有している第２の演算増幅器と、
前記第１の演算増幅器の第１の入力端子と出力端子との間に接続された第１の帰還抵抗と、
前記第２の演算増幅器の第１の入力端子と出力端子との間に接続された第２の帰還抵抗と、
前記第１及び第２の演算増幅器の第２の入力端子にそれぞれ接続された基準電位を与える基準電位手段と、
前記第１のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第１のスイッチと、
前記第２のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第２のスイッチと、
前記第３のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第３のスイッチと、
前記第１のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第４のスイッチと、
前記第２のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第５のスイッチと、
前記第３のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第６のスイッチと、
前記第２の演算増幅器の出力端子を前記第１の演算増幅器の第１の入力端子に接続する手段と、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記第１の演算増幅器から得られた前記速度検出信号と目標回転速度を示す信号との差に対応する速度制御信号を形成して前記励磁制御手段に供給する演算手段と
を備えたモータの速度制御信号形成装置。First, second and third stator windings;
A rotor made of permanent magnets,
The plurality of magnetoelectric transducers arranged so as to have a fixed positional relationship with respect to the first, second and third stator windings, and the plurality of magnetic fields changing in accordance with the rotation of the permanent magnet The first, second and third position detection signals indicating the relative positional relationship between the first, second and third phase stator windings and the permanent magnet based on the output of the magnetoelectric transducer are 120 degrees. Position detection means that sequentially generate with a phase difference of
Based on the first, second and third position detection signals, the excitation currents of the first, second and third stator windings are switched, and the rotor is rotated to a target speed. An apparatus for forming a speed control signal of a brushless DC motor comprising excitation control means for controlling the excitation current of the first, second and third stator windings;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitor resistor series circuits connected in series to the transmission lines of the first, second and third position detection signals;
A first operational amplifier having first and second input terminals and an output terminal for outputting a speed detection signal;
A second operational amplifier having first and second input terminals and an output terminal;
A first feedback resistor connected between a first input terminal and an output terminal of the first operational amplifier;
A second feedback resistor connected between a first input terminal and an output terminal of the second operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of each of the first and second operational amplifiers;
Connected between the first capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the third binary signal. A first switch;
Connected between the second capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the first binary signal. A second switch;
Connected between the third capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the second binary signal. A third switch;
Connected between the first capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the third binary signal. A fourth switch;
Connected between the second capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the first binary signal. A fifth switch;
Connected between the third capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the second binary signal. A sixth switch;
Means for connecting an output terminal of the second operational amplifier to a first input terminal of the first operational amplifier;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
A speed of a motor comprising: an arithmetic means that forms a speed control signal corresponding to a difference between the speed detection signal obtained from the first operational amplifier and a signal indicating a target rotational speed and supplies the speed control signal to the excitation control means Control signal forming device. 第１、第２及び第３の固定子巻線と、
永久磁石から成る回転子と、
前記第１、第２及び第３の固定子巻線に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記永久磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記第１、第２及び第３相固定子巻線と前記永久磁石との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の固定子巻線の励磁電流の切換を行うと共に、前記回転子を目標速度に回転させるように前記第１、第２及び第３の固定子巻線の励磁電流を制御する励磁制御手段と
を備えたブラシレス直流モータの速度制御信号を形成するための装置であって、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサと、
第１及び第２の入力端子と出力端子とをそれぞれ有している第１及び第２の演算増幅器と、
前記第１の演算増幅器の第１の入力端子と出力端子との間に接続された第１の帰還抵抗と、
前記第２の演算増幅器の第１の入力端子と出力端子との間に接続された第２の帰還抵抗と、
前記第１及び第２の演算増幅器の第２の入力端子にそれぞれ接続された基準電位を与える基準電位手段と、
前記第２の演算増幅器の出力端子を前記第１の演算増幅器の入力端子に接続する手段と、
前記第１のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第１のスイッチと、
前記第２のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第２のスイッチと、
前記第３のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第３のスイッチと、
前記第１のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第４のスイッチと、
前記第２のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第５のスイッチと、
前記第３のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第６のスイッチと、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記第１の演算増幅器から前記励磁制御手段に供給するための速度制御信号を得るために、前記目標速度を示す信号の逆位相信号を前記第１の演算増幅器の第１の入力端子に供給する手段と
を備えたモータの速度制御信号形成装置。First, second and third stator windings;
A rotor made of permanent magnets,
The plurality of magnetoelectric transducers arranged so as to have a fixed positional relationship with respect to the first, second and third stator windings, and the plurality of magnetic fields changing in accordance with the rotation of the permanent magnet The first, second and third position detection signals indicating the relative positional relationship between the first, second and third phase stator windings and the permanent magnet based on the output of the magnetoelectric transducer are 120 degrees. Position detection means that sequentially generate with a phase difference of
Based on the first, second and third position detection signals, the excitation currents of the first, second and third stator windings are switched, and the rotor is rotated to a target speed. An apparatus for forming a speed control signal of a brushless DC motor comprising excitation control means for controlling the excitation current of the first, second and third stator windings;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitors connected in series to transmission lines of the first, second and third position detection signals;
First and second operational amplifiers having first and second input terminals and output terminals, respectively;
A first feedback resistor connected between a first input terminal and an output terminal of the first operational amplifier;
A second feedback resistor connected between a first input terminal and an output terminal of the second operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of each of the first and second operational amplifiers;
Means for connecting an output terminal of the second operational amplifier to an input terminal of the first operational amplifier;
Connected between the first capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the third binary signal. A first switch;
Connected between the second capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the first binary signal. A second switch;
Connected between the third capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the second binary signal. A third switch;
Connected between the first capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the third binary signal. A fourth switch;
Connected between the second capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the first binary signal. A fifth switch;
Connected between the third capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the second binary signal. A sixth switch;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
In order to obtain a speed control signal to be supplied from the first operational amplifier to the excitation control means, an antiphase signal of a signal indicating the target speed is supplied to the first input terminal of the first operational amplifier. And a motor speed control signal forming apparatus. 第１、第２及び第３の固定子巻線と、
永久磁石から成る回転子と、
前記第１、第２及び第３の固定子巻線に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記永久磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記第１、第２及び第３相固定子巻線と前記永久磁石との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の固定子巻線の励磁電流の切換を行うと共に、前記回転子を目標速度に回転させるように前記第１、第２及び第３の固定子巻線の励磁電流を制御する励磁制御手段と
を備えたブラシレス直流モータの速度制御信号を形成するための装置であって、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサ抵抗直列回路と、
第１及び第２の入力端子と出力端子とをそれぞれ有している第１及び第２の演算増幅器と、
前記第１の演算増幅器の第１の入力端子と出力端子との間に接続された第１の帰還抵抗と、
前記第２の演算増幅器の第１の入力端子と出力端子との間に接続された第２の帰還抵抗と、
前記第１及び第２の演算増幅器の第２の入力端子にそれぞれ接続された基準電位を与える基準電位手段と、
前記第１のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第１のスイッチと、
前記第２のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第２のスイッチと、
前記第３のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第３のスイッチと、
前記第１のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第４のスイッチと、
前記第２のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第５のスイッチと、
前記第３のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第６のスイッチと、
前記第２の演算増幅器に接続された反転回路と、
前記第１の演算増幅器の出力と前記反転回路の出力とを加算して速度検出信号を形成する加算手段と、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記速度検出信号と目標回転速度を示す信号との差に対応する速度制御信号を形成して前記励磁制御手段に供給する演算手段と
を備えたモータの速度制御信号形成装置。First, second and third stator windings;
A rotor made of permanent magnets,
The plurality of magnetoelectric transducers arranged so as to have a fixed positional relationship with respect to the first, second and third stator windings, and the plurality of magnetic fields changing in accordance with the rotation of the permanent magnet The first, second and third position detection signals indicating the relative positional relationship between the first, second and third phase stator windings and the permanent magnet based on the output of the magnetoelectric transducer are 120 degrees. Position detection means that sequentially generate with a phase difference of
Based on the first, second and third position detection signals, the excitation currents of the first, second and third stator windings are switched, and the rotor is rotated to a target speed. An apparatus for forming a speed control signal of a brushless DC motor comprising excitation control means for controlling the excitation current of the first, second and third stator windings;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitor resistor series circuits connected in series to the transmission lines of the first, second and third position detection signals;
First and second operational amplifiers having first and second input terminals and output terminals, respectively;
A first feedback resistor connected between a first input terminal and an output terminal of the first operational amplifier;
A second feedback resistor connected between a first input terminal and an output terminal of the second operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of each of the first and second operational amplifiers;
Connected between the first capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the third binary signal. A first switch;
Connected between the second capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the first binary signal. A second switch;
Connected between the third capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the second binary signal. A third switch;
Connected between the first capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the third binary signal. A fourth switch;
Connected between the second capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the first binary signal. A fifth switch;
Connected between the third capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the second binary signal. A sixth switch;
An inverting circuit connected to the second operational amplifier;
Adding means for adding the output of the first operational amplifier and the output of the inverting circuit to form a speed detection signal;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
An apparatus for forming a speed control signal of a motor, comprising: a calculation means that forms a speed control signal corresponding to a difference between the speed detection signal and a signal indicating a target rotational speed and supplies the speed control signal to the excitation control means. 固定子と回転子とを備えたモータの速度制御信号を形成するための装置であって、
前記回転子と共に回転するように前記回転子に結合された磁石と、
前記磁石に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記固定子と前記回転子との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号をそれぞれ微分して前記第１，第２及び第３の位置検出信号に対して９０度の進み位相を有する第１、第２及び第３の微分信号を形成する第１、第２及び第３の微分回路と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１の微分回路から得られた前記第１の微分信号を前記第３の二値信号の前記第１の電圧レベルの期間のみ通過させるための第１のスイッチと、
前記第２の微分回路から得られた前記第２の微分信号を前記第１の二値信号の前記第１の電圧レベルの期間のみ通過させる第２のスイッチと、
前記第３の微分回路から得られた前記第３の微分信号を前記第２の二値信号の前記第１の電圧レベルの期間のみ通過させる第３のスイッチと、
前記第１、第２及び第３のスイッチの出力を加算して前記回転子の回転速度検出信号を出力する加算手段と、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記目標回転速度を示す信号と前記回転速度検出信号との差に対応する値を求め、この値を速度制御信号として前記励磁制御手段に供給する演算手段と
を備えたモータの速度制御信号形成装置。An apparatus for generating a speed control signal of a motor having a stator and a rotor,
A magnet coupled to the rotor for rotation with the rotor;
A plurality of magnetoelectric transducers arranged so as to have a certain positional relationship with respect to the magnet; and Position detecting means for sequentially generating first, second and third position detection signals indicating a relative positional relationship with the rotor with a phase difference of 120 degrees;
The first, second, and third position detection signals are differentiated, respectively, and the first, second, and third positions having a lead phase of 90 degrees with respect to the first, second, and third position detection signals, respectively. First, second and third differentiating circuits for forming a differential signal;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
A first switch for passing the first differential signal obtained from the first differentiating circuit only during a period of the first voltage level of the third binary signal;
A second switch that passes the second differential signal obtained from the second differentiating circuit only during a period of the first voltage level of the first binary signal;
A third switch for passing the third differential signal obtained from the third differentiating circuit only during a period of the first voltage level of the second binary signal;
Adding means for adding outputs of the first, second and third switches to output a rotation speed detection signal of the rotor;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
A speed control signal forming apparatus for a motor comprising: a value corresponding to a difference between the signal indicating the target rotation speed and the rotation speed detection signal; and a calculation means for supplying this value to the excitation control means as a speed control signal . 固定子と回転子とを備えたモータの速度制御信号を形成するための装置であって、
前記回転子と共に回転するように前記回転子に結合された磁石と、
前記磁石に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記固定子と前記回転子との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサと、
速度検出信号を出力するものであって、第１及び第２の入力端子と出力端子とを有している演算増幅器と、
前記演算増幅器の第１の入力端子と出力端子との間に接続された帰還抵抗と、
前記演算増幅器の第２の入力端子に接続された基準電位を与える基準電位手段と、
前記第１のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第１のスイッチと、
前記第２のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第２のスイッチと、
前記第３のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第３のスイッチと、
前記第１のコンデンサと前記基準電位手段との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第４のスイッチと、
前記第２のコンデンサと前記基準電位手段との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第５のスイッチと、
前記第３のコンデンサと前記基準電位手段との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第６のスイッチと、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記目標回転速度を示す信号と前記演算増幅器から得られた前記回転速度検出信号との差に対応する値を求め、この値を速度制御信号として前記励磁制御手段に供給する演算手段と
を備えたモータの速度制御信号形成装置。An apparatus for generating a speed control signal of a motor having a stator and a rotor,
A magnet coupled to the rotor for rotation with the rotor;
A plurality of magnetoelectric transducers arranged so as to have a certain positional relationship with respect to the magnet; and Position detecting means for sequentially generating first, second and third position detection signals indicating a relative positional relationship with the rotor with a phase difference of 120 degrees;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitors connected in series to transmission lines of the first, second and third position detection signals;
An operational amplifier which outputs a speed detection signal and has first and second input terminals and an output terminal;
A feedback resistor connected between a first input terminal and an output terminal of the operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of the operational amplifier;
The first capacitor is connected between the first capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the third binary signal. And the switch
The second capacitor is connected between the second capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the first binary signal. And the switch
The third capacitor is connected between the third capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the second binary signal. And the switch
A fourth switch connected between the first capacitor and the reference potential means and turned on only during the second voltage level in response to the third binary signal;
A fifth switch connected between the second capacitor and the reference potential means and turned on only in the period of the second voltage level in response to the first binary signal;
A sixth switch connected between the third capacitor and the reference potential means and turned on only in the period of the second voltage level in response to the second binary signal;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
A calculation unit that obtains a value corresponding to a difference between the signal indicating the target rotation speed and the rotation speed detection signal obtained from the operational amplifier and supplies the value to the excitation control unit as a speed control signal Motor speed control signal generator. 固定子と回転子とを備えたモータの速度制御信号を形成するための装置であって、
前記回転子と共に回転するように前記回転子に結合された磁石と、
前記磁石に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記固定子と前記回転子との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサと、
速度検出信号を出力するものであって、第１及び第２の入力端子と出力端子とを有している演算増幅器と、
前記演算増幅器の第１の入力端子と出力端子との間に接続された帰還抵抗と、
前記演算増幅器の第２の入力端子に接続された基準電位を与える基準電位手段と、
前記第１のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第１のスイッチと、
前記第２のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第２のスイッチと、
前記第３のコンデンサと前記演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間のみにオン状態になる第３のスイッチと、
前記第１のコンデンサと前記基準電位手段との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第４のスイッチと、
前記第２のコンデンサと前記基準電位手段との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第５のスイッチと、
前記第３のコンデンサと前記基準電位手段との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間のみにオン状態になる第６のスイッチと、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記演算増幅器から前記励磁制御手段に供給するための速度制御信号を得るために、前記目標回転速度を示す信号を位相反転して前記演算増幅器に供給する手段と
を備えたモータの速度制御信号形成装置。An apparatus for generating a speed control signal of a motor having a stator and a rotor,
A magnet coupled to the rotor for rotation with the rotor;
A plurality of magnetoelectric transducers arranged so as to have a certain positional relationship with respect to the magnet; and Position detecting means for sequentially generating first, second and third position detection signals indicating a relative positional relationship with the rotor with a phase difference of 120 degrees;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitors connected in series to transmission lines of the first, second and third position detection signals;
An operational amplifier which outputs a speed detection signal and has first and second input terminals and an output terminal;
A feedback resistor connected between a first input terminal and an output terminal of the operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of the operational amplifier;
The first capacitor is connected between the first capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the third binary signal. And the switch
The second capacitor is connected between the second capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the first binary signal. And the switch
The third capacitor is connected between the third capacitor and the first input terminal of the operational amplifier, and is turned on only in the period of the first voltage level in response to the second binary signal. And the switch
A fourth switch connected between the first capacitor and the reference potential means and turned on only during the second voltage level in response to the third binary signal;
A fifth switch connected between the second capacitor and the reference potential means and turned on only in the period of the second voltage level in response to the first binary signal;
A sixth switch connected between the third capacitor and the reference potential means and turned on only in the period of the second voltage level in response to the second binary signal;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
Speed control signal formation of a motor comprising means for inverting the phase of a signal indicating the target rotational speed and supplying the signal to the operational amplifier in order to obtain a speed control signal to be supplied from the operational amplifier to the excitation control means apparatus. 固定子と回転子とを備えたモータの速度制御信号を形成するための装置であって、
前記回転子と共に回転するように前記回転子に結合された磁石と、
前記磁石に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記固定子と前記回転子との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサ抵抗直列回路と、
第１及び第２の入力端子と速度検出信号を出力する出力端子とを有している第１の演算増幅器と、
第１及び第２の入力端子と出力端子とを有している第２の演算増幅器と、
前記第１の演算増幅器の第１の入力端子と出力端子との間に接続された第１の帰還抵抗と、
前記第２の演算増幅器の第１の入力端子と出力端子との間に接続された第２の帰還抵抗と、
前記第１及び第２の演算増幅器の第２の入力端子にそれぞれ接続された基準電位を与える基準電位手段と、
前記第１のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第１のスイッチと、
前記第２のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第２のスイッチと、
前記第３のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第３のスイッチと、
前記第１のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第４のスイッチと、
前記第２のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第５のスイッチと、
前記第３のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第６のスイッチと、
前記第２の演算増幅器の出力端子を前記第１の演算増幅器の第１の入力端子に接続する手段と、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記第１の演算増幅器から得られた前記速度検出信号と目標回転速度を示す信号との差に対応する速度制御信号を形成して前記励磁制御手段に供給する演算手段と
を備えたモータの速度制御信号形成装置。An apparatus for generating a speed control signal of a motor having a stator and a rotor,
A magnet coupled to the rotor for rotation with the rotor;
A plurality of magnetoelectric transducers arranged so as to have a certain positional relationship with respect to the magnet; and Position detecting means for sequentially generating first, second and third position detection signals indicating a relative positional relationship with the rotor with a phase difference of 120 degrees;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitor resistor series circuits connected in series to the transmission lines of the first, second and third position detection signals;
A first operational amplifier having first and second input terminals and an output terminal for outputting a speed detection signal;
A second operational amplifier having first and second input terminals and an output terminal;
A first feedback resistor connected between a first input terminal and an output terminal of the first operational amplifier;
A second feedback resistor connected between a first input terminal and an output terminal of the second operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of each of the first and second operational amplifiers;
Connected between the first capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the third binary signal. A first switch;
Connected between the second capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the first binary signal. A second switch;
Connected between the third capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the second binary signal. A third switch;
Connected between the first capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the third binary signal. A fourth switch;
Connected between the second capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the first binary signal. A fifth switch;
Connected between the third capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the second binary signal. A sixth switch;
Means for connecting an output terminal of the second operational amplifier to a first input terminal of the first operational amplifier;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
A speed of a motor comprising: an arithmetic means that forms a speed control signal corresponding to a difference between the speed detection signal obtained from the first operational amplifier and a signal indicating a target rotational speed and supplies the speed control signal to the excitation control means Control signal forming device. 固定子と回転子とを備えたモータの速度制御信号を形成するための装置であって、
前記回転子と共に回転するように前記回転子に結合された磁石と、
前記磁石に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記固定子と前記回転子との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサと、
第１及び第２の入力端子と出力端子とをそれぞれ有している第１及び第２の演算増幅器と、
前記第１の演算増幅器の第１の入力端子と出力端子との間に接続された第１の帰還抵抗と、
前記第２の演算増幅器の第１の入力端子と出力端子との間に接続された第２の帰還抵抗と、
前記第１及び第２の演算増幅器の第２の入力端子にそれぞれ接続された基準電位を与える基準電位手段と、
前記第２の演算増幅器の出力端子を前記第１の演算増幅器の入力端子に接続する手段と、
前記第１のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第１のスイッチと、
前記第２のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第２のスイッチと、
前記第３のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第３のスイッチと、
前記第１のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第４のスイッチと、
前記第２のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第５のスイッチと、
前記第３のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第６のスイッチと、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記第１の演算増幅器から前記励磁制御手段に供給するための速度制御信号を得るために、前記目標速度を示す信号の逆位相信号を前記第１の演算増幅器の第１の入力端子に供給する手段と
を備えたモータの速度制御信号形成装置。An apparatus for generating a speed control signal of a motor having a stator and a rotor,
A magnet coupled to the rotor for rotation with the rotor;
A plurality of magnetoelectric transducers arranged so as to have a certain positional relationship with respect to the magnet; and Position detecting means for sequentially generating first, second and third position detection signals indicating a relative positional relationship with the rotor with a phase difference of 120 degrees;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitors connected in series to transmission lines of the first, second and third position detection signals;
First and second operational amplifiers having first and second input terminals and output terminals, respectively;
A first feedback resistor connected between a first input terminal and an output terminal of the first operational amplifier;
A second feedback resistor connected between a first input terminal and an output terminal of the second operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of each of the first and second operational amplifiers;
Means for connecting an output terminal of the second operational amplifier to an input terminal of the first operational amplifier;
Connected between the first capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the third binary signal. A first switch;
Connected between the second capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the first binary signal. A second switch;
Connected between the third capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the second binary signal. A third switch;
Connected between the first capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the third binary signal. A fourth switch;
Connected between the second capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the first binary signal. A fifth switch;
Connected between the third capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the second binary signal. A sixth switch;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
In order to obtain a speed control signal to be supplied from the first operational amplifier to the excitation control means, an antiphase signal of a signal indicating the target speed is supplied to the first input terminal of the first operational amplifier. And a motor speed control signal forming apparatus. 固定子と回転子とを備えたモータの速度制御信号を形成するための装置であって、
前記回転子と共に回転するように前記回転子に結合された磁石と、
前記磁石に対して一定の位置関係を有するように配置された複数の磁電変換素子を有し、前記磁石の回転に従う磁界の変化を示す前記複数の磁電変換素子の出力に基づいて前記固定子と前記回転子との相対的位置関係を示す第１、第２及び第３の位置検出信号を１２０度の位相差を有して順次に発生する位置検出手段と、
前記第１、第２及び第３の位置検出信号に基づいて前記第１、第２及び第３の位置検出信号よりも位相が３０度遅れており且つそれぞれが第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号を形成する第１、第２及び第３の二値信号形成回路と、
前記第１、第２及び第３の位置検出信号の伝送ラインに直列に接続された第１、第２及び第３のコンデンサ抵抗直列回路と、
第１及び第２の入力端子と出力端子とをそれぞれ有している第１及び第２の演算増幅器と、
前記第１の演算増幅器の第１の入力端子と出力端子との間に接続された第１の帰還抵抗と、
前記第２の演算増幅器の第１の入力端子と出力端子との間に接続された第２の帰還抵抗と、
前記第１及び第２の演算増幅器の第２の入力端子にそれぞれ接続された基準電位を与える基準電位手段と、
前記第１のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第１のスイッチと、
前記第２のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第２のスイッチと、
前記第３のコンデンサと前記第１の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第１の電圧レベルの期間にオン状態になる第３のスイッチと、
前記第１のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第３の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第４のスイッチと、
前記第２のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第１の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第５のスイッチと、
前記第３のコンデンサと前記第２の演算増幅器の第１の入力端子との間に接続され、前記第２の二値信号に応答してこの前記第２の電圧レベルの期間にオン状態になる第６のスイッチと、
前記第２の演算増幅器に接続された反転回路と、
前記第１の演算増幅器の出力と前記反転回路の出力とを加算して速度検出信号を形成する加算手段と、
前記回転子の目標回転速度を示す信号を発生する目標回転速度信号発生手段と、
前記速度検出信号と目標回転速度を示す信号との差に対応する速度制御信号を形成して前記励磁制御手段に供給する演算手段と
を備えたモータの速度制御信号形成装置。An apparatus for generating a speed control signal of a motor having a stator and a rotor,
A magnet coupled to the rotor for rotation with the rotor;
A plurality of magnetoelectric transducers arranged so as to have a certain positional relationship with respect to the magnet; and Position detecting means for sequentially generating first, second and third position detection signals indicating a relative positional relationship with the rotor with a phase difference of 120 degrees;
Based on the first, second, and third position detection signals, the phases are delayed by 30 degrees with respect to the first, second, and third position detection signals, and the first voltage level and the second First, second and third binary signal forming circuits for forming first, second and third binary signals comprising voltage levels;
First, second and third capacitor resistor series circuits connected in series to the transmission lines of the first, second and third position detection signals;
First and second operational amplifiers having first and second input terminals and output terminals, respectively;
A first feedback resistor connected between a first input terminal and an output terminal of the first operational amplifier;
A second feedback resistor connected between a first input terminal and an output terminal of the second operational amplifier;
Reference potential means for providing a reference potential connected to a second input terminal of each of the first and second operational amplifiers;
Connected between the first capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the third binary signal. A first switch;
Connected between the second capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the first binary signal. A second switch;
Connected between the third capacitor and the first input terminal of the first operational amplifier, and is turned on during the first voltage level in response to the second binary signal. A third switch;
Connected between the first capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the third binary signal. A fourth switch;
Connected between the second capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the first binary signal. A fifth switch;
Connected between the third capacitor and the first input terminal of the second operational amplifier, and is turned on during the second voltage level in response to the second binary signal. A sixth switch;
An inverting circuit connected to the second operational amplifier;
Adding means for adding the output of the first operational amplifier and the output of the inverting circuit to form a speed detection signal;
Target rotational speed signal generating means for generating a signal indicating the target rotational speed of the rotor;
An apparatus for forming a speed control signal of a motor, comprising: a calculation means that forms a speed control signal corresponding to a difference between the speed detection signal and a signal indicating a target rotational speed and supplies the speed control signal to the excitation control means. 前記第１、第２及び第３の二値信号形成回路は、
前記第１、第２及び第３の位置検出信号をそれぞれ３０度遅らせた第１、第２及び第３の遅延位置信号を形成する第１、第２及び第３の遅延位置信号形成回路と、
前記第１、第２及び第３の遅延位置信号を第１の電圧レベルと第２の電圧レベルとから成る第１、第２及び第３の二値信号に波形整形する第１、第２及び第３の波形整形回路と
から成ることを特徴とする請求項１乃至１２のいずれかに記載のモータの速度制御信号形成装置。The first, second and third binary signal forming circuits are:
First, second, and third delay position signal forming circuits for forming first, second, and third delay position signals obtained by delaying the first, second, and third position detection signals by 30 degrees, respectively;
First, second and third waveform shaping the first, second and third delay position signals into first, second and third binary signals comprising a first voltage level and a second voltage level. motor speed control signal forming apparatus according to any one of claims 1 to 12, characterized in that comprising a third waveform shaping circuit. 前記第１の遅延位置信号形成回路は、前記第１の位置検出信号と前記第２の位置検出信号とを２：１の割合で加算して第１の遅延位置信号を得る回路であり、
前記第２の遅延位置信号形成回路は、前記第２の位置検出信号と前記第３の位置検出信号とを２：１の割合で加算して第２の遅延位置信号を得る回路であり、
前記第３の遅延位置信号形成回路は、前記第３の位置検出信号とを２：１の割合で加算して第３の遅延位置信号を得る回路であることを特徴とする請求項１３記載のモータの速度制御信号形成装置。The first delayed position signal forming circuit is a circuit that obtains a first delayed position signal by adding the first position detection signal and the second position detection signal at a ratio of 2: 1.
The second delayed position signal forming circuit is a circuit that obtains a second delayed position signal by adding the second position detection signal and the third position detection signal in a ratio of 2: 1.
14. The circuit according to claim 13 , wherein the third delay position signal forming circuit is a circuit that obtains a third delay position signal by adding the third position detection signal at a ratio of 2: 1. Motor speed control signal generator. 前記位置検出手段は、第１、第２及び第３の固定子巻線に対して一定の位置関係を有するように配置された第１、第２及び第３の磁電変換素子を有し、前記第１、第２及び第３の磁電変換素子の出力を前記第１、第２及び第３の位置検出信号とするものである請求項１乃至１４のいずれかに記載のモータの速度制御信号形成装置。The position detecting means includes first, second, and third magnetoelectric transducers arranged to have a certain positional relationship with respect to the first, second, and third stator windings, first, the first output of the second and third magneto-electric transducer, the speed control signal formed of the motor according to any one of the second and third position detection claim signals it is an 1 to 14 apparatus. 前記位置検出手段は、
前記第１及び第２の固定子巻線に対して一定の位置関係を有するように配置され且つ前記第１及び第２の位置検出信号を出力するように形成された第１及び第２の磁電変換素子と、
前記第１及び第２の位置検出信号に基づいて前記第２の位置検出信号に対して１２０度の遅れ位相差を有する第３の位置検出信号を形成する第３の位置検出信号形成回路と
から成るものであることを特徴とする請求項１乃至１４のいずれかに記載のモータの速度制御信号形成装置。The position detecting means includes
First and second magnetoelectric elements arranged so as to have a certain positional relationship with respect to the first and second stator windings and configured to output the first and second position detection signals. A conversion element;
From a third position detection signal forming circuit that forms a third position detection signal having a delay phase difference of 120 degrees with respect to the second position detection signal based on the first and second position detection signals. motor speed control signal forming apparatus according to any one of claims 1 to 14, characterized in that made.
JP2000178132A 1999-06-14 2000-06-14 Motor speed control signal generator Expired - Lifetime JP3687732B2 (en)

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