JP3664382B2 - Sequence device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a sequence device, and more particularly to a sequence device in which the timing of input / output signals and the internal execution order of function block processing for executing sequence processing can be made independent.
[0002]
[Prior art]
One example of a sequence device in which sequence control is defined by a conventional function block is disclosed on pages 160 to 162 of sequence control engineering (published on February 25, 1997) issued by the Institute of Electrical Engineers of Japan. In principle, the signal flow is determined from left to right and then from top to bottom. Therefore, the conventional sequence device executes all the function block processes of the sequence control definition unit from the left to the right and then from the top to the bottom. This is called sequence internal execution. The sequence device constitutes a processing cycle by external signal input, sequence internal execution, and external signal output, and repeatedly executes the processing cycle.
[0003]
A conventional sequence device is disclosed, for example, in “Sequence device” of Japanese Patent Laid-Open No. Hei 5-80819. This sequence device is a sequence device that allows a code structure for executing a sequence process to be freely arranged. Specifically, the sequence device includes a sequence unit that cyclically and repeatedly processes a logical expression code that instructs execution of sequence processing, and an external signal input unit that receives an external input signal and supplies the signal to the sequence unit And an external signal output unit for sending an output signal from the sequence unit to the outside, and two internal data units for alternately storing input data or output data for each successive iteration process of codes by the sequence unit.
[0004]
[Problems to be solved by the invention]
However, the conventional sequence device described above has some problems to be solved. First, in the conventional sequence device, the timing of the input signal and the output signal differs depending on the direction of the signal flow. The reason is that as the function of the function block becomes more sophisticated, the input / output signals may flow not only from left to right, from top to bottom, but also in the opposite direction. Signals from left to right and from top to bottom are input and output in one processing cycle even after passing through multiple function blocks, but signals in the reverse direction require multiple processing cycles from input to output. It is to do.
[0005]
Secondly, the conventional sequence device takes time from inputting a signal to outputting it. The reason is that all function blocks are executed in one processing cycle, and function blocks that do not need to be executed and that have no change in input signals are collectively executed.
[0006]
OBJECT OF THE INVENTION
Therefore, the main object of the present invention is to overcome or reduce the problems of the prior art described above, the timing of the input signal and the output signal is determined only by the connection relationship between the input terminal and the output terminal between the function blocks of the sequence control definition unit, To provide a sequence device that is not affected by the direction of the connection relationship. Another object of the present invention is to provide a sequence device that shortens a signal delay from an input signal to an output signal.
[0007]
[Means for Solving the Problems]
The sequence device of the present invention includes a function block list for a plurality of function blocks, a connection list for defining input / output terminal connections between the plurality of function blocks, and a first half processing code and a second half for each of the plurality of function blocks. Processing from the function block list, a definition section for defining a processing code, a sequence control definition section having a data section including internal data, first half processing request state, second half processing request state and output terminal data for each function block A function block that includes a function block extracting unit that extracts a function block whose request state is ON, and a processing unit that executes processing of the function block extracted by the function block extracting unit. For the lock, according to the first half processing code of the definition part of the sequence control definition part, if the function block first half processing for processing data input and calculation from the input terminal is collectively executed, and the result needs to be output to the output terminal, The first half execution part for turning on the second half processing request state of its own function block, the function block extracting means for extracting the function block whose processing request state is on from the function block list, and extracted by the function block extracting means After the function block for processing data input and calculation from the input terminal according to the second half processing code of the definition part of the sequence control definition part for the function block that is on. Second-half execution unit for batch processing, an external signal input unit for inputting data from an external signal in response to an instruction from the function block, an external signal output unit for outputting data to an external signal in response to an instruction from the function block, and the first-half execution unit And a central control unit that repeatedly executes the latter half execution unit .
[0008]
Here, the central control unit includes function block initialization means for initializing internal data of the function block .
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Next, the configuration and operation of a preferred embodiment of the sequence device according to the present invention will be described in detail with reference to the accompanying drawings.
[0010]
First, FIG. 1 is a block diagram showing a configuration of a preferred embodiment of a sequence device according to the present invention. The sequence device shown in FIG. 1 has a sequence control definition unit 1 composed of a plurality of function blocks and interconnections of input / output terminals of these function blocks, and inputs to the function blocks in the sequence control definition unit 1. Batch execution of the first half execution part (hereinafter simply referred to as the first half execution part) 2 that collectively executes the first half of the function block that processes data input and calculation from the terminal, and the second half of the function block that outputs the calculation result to the output terminal The second half execution unit (hereinafter simply referred to as the second half execution unit) 3, the external signal input unit 4 that inputs data from an external signal according to an instruction from the first half execution unit 2, and the external signal that outputs data to an external signal according to an instruction from the second half execution unit 3 Central control for repeatedly executing the output unit 5, the first half execution unit 2 and the second half execution unit 3 And a 6.
[0011]
The sequence control definition unit 1 includes a static definition unit 11 that does not change in repeated execution and a dynamic data unit 12 that changes. Then, the sequence definition content is separated and held in the definition unit 11 and the data unit 12. The first half execution unit 2 includes an FB (function block) extracting unit 21 and an FB first half processing unit 22. Similarly, the latter half execution unit 3 includes an FB extraction unit 31 and an FB latter half processing means 32. Furthermore, the central control unit 6 includes FB initialization means 61.
[0012]
Next, FIG. 2 is a detailed configuration diagram of the definition unit 11 in the sequence control definition unit 1 shown in FIG. The definition unit 11 includes a plurality of FB lists 111 of various FBs, a connection list 112 of input / output terminals between the FBs, a first half processing code 113 of various FBs, and a second half processing code 114 of FBs.
[0013]
Next, FIG. 3 is a detailed configuration diagram of the data unit 12 in the sequence control definition unit 1 shown in FIG. The data unit 12 includes internal data 121, a first half processing request state 122, a second half processing request state 123, and output terminal data 124 for each FB.
[0014]
In the first half execution unit 2 of the sequence device shown in FIG. 1, the FB extraction unit 21 extracts an FB whose first half processing request state 122 is ON from the FB list 111 of the definition unit 11. The FB first half processing means 22 executes the first half processing code 113 of each extracted FB.
[0015]
On the other hand, in the second half execution unit 3 of the sequence device shown in FIG. 1, the FB extraction unit 31 extracts an FB whose second half process request state 123 is on from the FB list 111. Further, the FB latter half processing means 32 executes the extracted latter half processing code 114 of each FB. The FB initialization means 61 of the central control unit 6 initializes the internal data 121 of the FB.
[0016]
Next, the overall operation of the first embodiment of the sequence device according to the present invention shown in FIGS. 1 to 3 will be described with reference to the flowchart of FIG. The central control unit 6 first performs FB initialization (step S1). Next, it is determined whether or not the sequence is completed (step S2). If the sequence is not finished (step S2: No), the first half processing is executed by the first half execution unit 2 (step S3). Then, the latter half process is executed by the latter half execution unit 3 (step S4). And it returns to step S2 mentioned above. On the other hand, when the sequence is not finished (step S2: Yes), the operation is finished. In this way, the processing cycle is repeatedly executed until the end of the sequence.
[0017]
The operation of the first half execution unit 2 will be described with reference to the flowchart of FIG. First, the FB extraction unit 21 of the first half execution unit 2 extracts an FB whose first half processing request state 122 is on from the FB list 111 (step S11). A loop process is initialized for the extracted FB (step S12). Then, it is determined whether or not all FBs have been processed (step S13). If the processing is not finished (step S13: No), the output terminal data 124 of other FBs connected to the input terminal is referred to the input / output terminal connection list 112 according to the first half processing code 113 for each FB. Input data from. Calculation is performed using the internal data 121, and the calculation result is stored in the internal data 121 (step S14). If it is necessary to output the result to the output terminal, the second half processing request state 123 of its own FB is turned on (step S15). Finally, the first half processing request state 122 of its own FB is turned off (step S16). Then, it returns to step S13 mentioned above. Then, when all the FB processes are finished (step S13: Yes), the process is finished.
[0018]
Next, the operation of the latter half execution unit 3 will be described with reference to the flowchart of FIG. The FB extraction unit 31 of the second half execution unit 3 first extracts an FB whose second half process request state 123 is on from the FB list 111 (step S21). Then, loop processing initialization is performed on the extracted FB (step S22). Next, it is determined whether or not all FBs have been processed (step S23). If the processing of all FBs has not been completed (step S23: No), data is output from the internal data 121 to the output terminal data 124 of its own FB according to the latter half processing code 114 for each FB and stored (step S24). If it is necessary to activate another FB connected to the output terminal or its own FB, the first half processing request state 122 of the FB is turned on through reference to the connection list 112 (step S25). Finally, the second half processing request state 123 of its own FB is turned off (step S26), and the process proceeds to the above-described step S23. On the other hand, if all FBs have been processed (step S23: Yes), the process ends.
[0019]
The first half execution unit 2 inputs data from the output terminal data 124 connected to the input terminal, and stores the result in the internal data 121 instead of the output terminal data 124. Therefore, the data stored in the internal data 121 does not change depending on the processing order of the FB. The second half execution unit 3 outputs data from the internal data 121 determined by the first half execution unit 2 to the output terminal data 124. Therefore, the data stored in the output terminal data 124 does not change depending on the processing order of the FB.
[0020]
Next, the operation of a specific example of the sequence device according to the present invention will be described with reference to FIGS. An example of this sequence device is an alarm display system. This sequence device inputs binary signal alarm 1, alarm 2 and confirmation signal as external signal inputs, and outputs quaternary signal alarm 1 display, alarm 2 display and summary display as external signal outputs. The contents of the quaternary signal are unconfirmed alarm, confirmed alarm, unconfirmed normal and confirmed normal.
[0021]
Alarm 1 display and alarm 2 display output alarm when alarm 1 and alarm 2 are on, normal when alarm is off, unconfirmed when alarm changes, and confirmation when confirmation is input Is output. The summary display outputs “alarm” if either alarm 1 or alarm 2 is an alarm, “normal” if both are normal, and “unconfirmed” if either is unconfirmed. If “Confirmed” is also output, “Confirmed” is output.
[0022]
The sequence in FIG. 7 includes 4 of external signal input FB (FB-IN), alarm display FB (FB-AL1, FB-AL2), summary display FB (FB-SUM), and external signal output FB (FB-OUT). Consists of 5 types of FBs. Each FB processes the data at the input terminal in one processing cycle and outputs the data to the output terminal. The external signal input FB (FB-IN) is an always-executed FB that activates itself in the second half execution unit 3, and inputs data of alarm 1, alarm 2, and confirmation signal through the external signal input unit 4. If there is a change in these data inputs, a processing request is issued to another FB connected to the output terminal. The external signal output FB (FB-OUT) is an FB that outputs data through the external signal output unit 5.
[0023]
FIG. 8 shows a specific operation example of the sequence device shown in FIG. FIG. 8 shows processing cycles 1 to 13, alarm 1, confirmation signal, and FB processed by the first half execution unit 2 and second half execution unit 3. As a timing chart of this sequence, when alarm 1 is turned on from off, processing cycles 2 to 5 are executed in the order of FB-IN, FB-AL1, FB-SUM, and FB-OUT. Thereafter, when a confirmation signal is input (OFF → ON), processing is performed in the order of FB-IN, FB-SUM, FB-AL1, and FB-OUT until processing cycles 7 to 10. It should be noted that in each case, since four FBs are passed until an external signal is input and output, each processing time similarly requires four processing cycles.
[0024]
The preferred embodiment of the sequence device according to the present invention has been described in detail above. However, it should be noted that such embodiments are merely examples of the present invention and do not limit the present invention in any way. Those skilled in the art can easily understand that various modifications and changes can be made according to a specific application without departing from the gist of the present invention.
[0025]
【The invention's effect】
As understood from the above description, according to the sequence device of the present invention, the following remarkable practical effects can be obtained. First, the timing of the signal input / signal output of the sequence device is determined by the interconnection of the FB and FB input terminals and output terminals in the sequence definition. The reason is that the internal execution order of the FB processing does not affect the data movement between the FBs by separating the FB processing into the first half execution unit 2 and the second half execution unit 3.
[0026]
Secondly, in the sequence definition, an FB having a high function having a plurality of input terminals and output terminals can be executed regardless of the notation principle from the left to the right of the signal flow and then from the top to the bottom. It is possible to arrange in an easy-to-understand position without lengthening. The reason is that the signal timing is independent of the notation principle and only the FB having a processing request is executed.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a preferred embodiment of a sequence device according to the present invention.
FIG. 2 is a detailed configuration diagram of a definition unit of the sequence control definition unit shown in FIG. 1;
FIG. 3 is a detailed configuration diagram of a data part of the sequence control definition part shown in FIG. 1;
4 is a flowchart showing the overall operation of the sequence device of the present invention shown in FIG.
FIG. 5 is a flowchart showing the operation of the first half execution unit of the sequence device shown in FIG. 1;
6 is a flowchart showing an operation of a second half execution unit of the sequence device shown in FIG. 1. FIG.
FIG. 7 is a block diagram showing a configuration of a specific example of a sequence device according to the present invention.
8 is a diagram illustrating an operation example of the specific example illustrated in FIG. 7;
[Explanation of symbols]
1 Sequence Control Definition Unit 11 Definition Unit 111 FB List 112 FB Input / Output Terminal Connection List 113 FB First Half Process Code 114 FB Second Half Process Code 12 Data Part 121 FB Internal Data 122 FB First Half Process Request State 123 FB Second half processing request state 124 FB output terminal data 2 First half execution unit 21 FB extraction means 22 FB first half processing means 3 Second half execution part 31 FB extraction means 32 FB second half processing means 4 External signal input part 5 External signal output part 6 Central control part 61 FB initialization means

Claims (2)

A function block list for a plurality of function blocks, a connection list for defining input / output terminal connections between the plurality of function blocks, and
A definition part for defining the first half process code and the second half process code for each of the plurality of function blocks, and a data part including internal data, first half process request state, second half process request state and output terminal data for each function block. A sequence control definition section comprising:
Function block extraction means for extracting a function block whose processing request state is on from the function block list, and processing means for executing processing of the function block extracted by the function block extraction means. In accordance with the first half processing code of the definition part of the sequence control definition part, the function block first half process for processing data input and calculation from the input terminal is collectively executed, and if the result needs to be output to the output terminal, The first half execution part that turns on the second half processing request state of the function block,
A function block that is turned on, comprising function block extraction means for extracting a function block whose processing request state is on from the function block list, and processing means for executing processing of the function block extracted by the function block extraction means In accordance with the latter half process code of the definition part of the sequence control definition part, the latter half execution part for collectively executing the function block latter half process for processing data input and calculation from the input terminal,
An external signal input unit that inputs data from an external signal in response to an instruction from the function block, an external signal output unit that outputs data to an external signal in response to an instruction from the function block, and a center that repeatedly executes the first half execution unit and the second half execution unit A sequence device comprising: a control unit . The sequence device according to claim 1, wherein the central control unit includes a function block initialization unit that initializes internal data of the function block .

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