JP3662843B2 - System and method for compensating for codec DC offset using a DC blocking channel and modem incorporating the same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates generally to coders / decoders (codecs), and more particularly to systems and methods for compensating for codec DC offset using a DC blocking channel, and modems incorporating the same.
[0002]
[Prior art]
The “56K” modem is currently the most commonly used means for users to access the Internet. The communication speed provided to the user by the 56K modem is asymmetric. For data downloaded to the user's modem from the Internet, a connection speed of 50 Kbit / s (kbps) or higher can be provided. For data uploaded from the user's modem to the Internet, the maximum connection speed is 28.8 kbps as before. Usually, when communicating with the Internet, this asymmetry is reasonable because the downloaded data is larger than the upload.
[0003]
Although it has been difficult to achieve a higher download speed, it has become more difficult to increase the upload speed. One serious problem that arises in improving upload speed is faced with codecs used at the receiving (Internet) end. The codec is used at the receiving end to digitize the symbol stream of user data generated by the modem. The problem is that the codec is subject to a DC offset at the analog input when the user data symbol stream is averaged to a non-zero voltage over time (which is often the case). The codec is implemented with a zero balancing circuit, but the DC offset often varies with time. Zero balancing circuits have proven to be unable to reliably compensate for time-varying DC offsets.
[0004]
If the codec in question produces a linear digital output, DC offset compensation is relatively simple. In that case, the digital output of the codec may be incremented or decremented by a number corresponding to the DC offset. However, in many cases, codecs compress digital output non-linearly according to well-known A-law or μ-law compression techniques. In these codec outputs, the DC offset does not appear linear, and linear DC offset compensation is not sufficient. Nonlinear digital compensation is possible, but complex and difficult to implement.
[0005]
Of course, it would be desirable to simply bias the user data symbol stream with a DC component to compensate for the DC offset at the receiving end. However, in the case of a 56K modem, a transmission path, that is, a channel connecting the modem and the codec includes a DC blocking (blocking) element. The DC blocking element usually takes the form of a transformer and will function to block the DC component and compensate for the DC offset before it reaches the codec.
[0006]
Therefore, there is a need in the art for a method for compensating for codec DC offsets that is compatible with DC blocking channels.
[0007]
[Problems to be solved by the invention]
To address the above-mentioned problems associated with the prior art, the present invention provides a system and method for compensating for the DC offset of a codec, and a modem incorporating the system or method.
[0008]
[Means for Solving the Problems]
In one embodiment, the system includes (1) a DC offset compensator that generates and transmits a DC offset indication signal corresponding to a DC offset that exists along the transmission path to the receiving codec, and (2) DC A DC offset encoder connected to an offset compensator, receiving a DC offset indication signal, and applying a time-varying DC offset compensation signal based on the DC offset indication signal to a user data symbol stream transmitted along the transmission path With. The DC offset compensator can use the DC offset compensation signal to remove at least a portion of the DC offset compensation signal to generate a user data symbol stream.
[0009]
The present invention therefore introduces a broad concept of encoding and compensating for the codec DC offset in a fixed time-varying signal transmitted with the user data symbol stream. Thus, in practice, the DC offset is encoded in the form of AC.
[0010]
The time-varying signal passes through a DC blocking circuit such as a transformer, and can thereby reach the receiving side codec. Since the time-varying signal is deterministic, circuitry adjacent to the receiving codec can calculate and remove the time-varying signal, leaving a user data symbol stream for digitization.
[0011]
In one embodiment of the invention, the DC offset compensation signal comprises a deterministic pseudo-random number sequence. Pseudorandom numbers and the techniques for generating them are well known to those skilled in the art. The present invention can use such a technique to generate the same pseudo-random number sequence at the transmitting end and the receiving end of the communication channel. The pseudo-random number sequence is first added to the user data symbol stream and then subtracted from the user data symbol stream to compensate for DC offsets that may occur due to patterns in the user data symbol stream.
[0012]
In one embodiment of the present invention, the DC offset compensation signal has a component that averages for a negative DC offset with the opposite sign. In the illustrated and described embodiment, when the DC offset is represented by C, the component of the DC offset compensation signal is a component for averaging over -C.
[0013]
In one embodiment of the invention, a DC offset compensator removes all DC offset compensation signals. This maximizes DC offset compensation. However, in some embodiments of the invention, some of the components of the DC offset compensation signal remain or are allowed to remain. Within the broad scope of the present invention, at least some DC offset compensation is performed.
[0014]
In one embodiment of the invention, the DC offset compensator removes at least a portion of the DC offset compensation signal by recalculating the pseudo-random number sequence. Recalculation causes the pseudo-random number sequence to be at least partially removed from any user data symbol stream.
[0015]
In one embodiment of the present invention, the DC offset compensation signal can pass through the DC blocking transformer with substantially no distortion. In another embodiment of the present invention, the DC offset indication signal may be somewhat distorted (ie attenuated), but still based at least in part on DC offset compensation.
[0016]
In one embodiment of the invention, a DC offset encoder is associated with a 56K modem. Those skilled in the art will appreciate that such modems allow higher upstream communication rates by compensating for the DC offset that may occur at the receiving codec. Those skilled in the art will also appreciate that the principles of the present invention can be widely applied in various situations where a DC signal needs to be encoded in the form of an AC in order to pass through a DC blocking circuit.
[0017]
The foregoing has outlined rather broadly the preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. It will be apparent to those skilled in the art that the disclosed concepts and specific embodiments can be used to design or modify other structures to accomplish the same purposes as the present invention. Will be understood. It should also be understood by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
This patent application is based on US Provisional Patent Application No. 06 / 169,961, filed Dec. 9, 1999, entitled “Compensating Codec DC Offset Through a DC Blocking Channel”, assigned to the same assignee, That patent application is hereby incorporated herein by reference.
[0019]
For a fuller understanding of the present invention, reference should be made to the following description taken in conjunction with the accompanying drawings.
[0020]
Referring initially to FIG. 1, there is shown a block diagram of a portion of a telecommunications network, indicated generally at 100, illustrating the problem addressed by the present invention.
[0021]
The network 100 includes a pulse code modulation (PCM) type codec 110 that provides analog / digital conversion between the local loop 120 and the network 100. The 56K modem 130 is connected to the local loop 120 at the far end of the codec 110. The DC blocking transformer 140 is connected to the local loop 120 between the codec 110 and the modem 130. The DC blocking transformer 140 converts the local loop 120 into a DC blocking channel.
[0022]
As is well known to those skilled in the art, the upload speed of modem 130 is limited in particular by the DC offset that occurs at the analog input of codec 110. The present invention attenuates the DC offset while considering that any DC signal is blocked by the DC blocking transformer 140 conventionally used to compensate for the DC offset generated at the analog input of the codec 110. With the goal.
[0023]
Referring now to FIG. 2, a block diagram of a system for compensating for codec DC offset constructed in accordance with the principles of the present invention is shown. The system includes a DC offset compensator 210 (in the illustrated embodiment, associated with a receiving codec such as codec 110 in FIG. 1) and a DC offset encoder 220 (in the illustrated embodiment, modem 130 in FIG. 1). Associated with the transmitting modem). The DC offset compensator 210 detects the magnitude of the DC offset generated at the analog input of the receiving codec. The DC offset compensator 210 then sends a corresponding DC offset indication signal 230 to the DC offset encoder 220, often via a downloaded symbol stream.
[0024]
In response, the DC offset encoder 220 generates a time-varying DC offset compensation signal 250 based on the DC offset instruction signal. It is important that the DC offset compensation signal 250 varies in time since it must later pass at least partially through the DC blocking transformer.
[0025]
In one exemplary embodiment, the DC offset compensation signal has two components: a DC component and an AC component. The DC component has the same magnitude as the DC offset and has the opposite sign. For example, if the DC offset at a given time has a magnitude c, the DC component of the DC offset compensation signal has a corresponding magnitude -c.
[0026]
The AC component t _k of the DC offset compensation signal 250 is a deterministic pseudo-random number sequence that is dynamically generated to average c. In an exemplary embodiment, t _k is a function of a PCM symbol x _k containing the user data symbol stream transmitted at time _k , ie, a digital sum (RDS) Σ _k during transmission of the user data symbol stream, and Generated according to the rules of
If Σ _k / c ≧ 0, t _{k + 1} = 0
Otherwise, t _k = y _k −x _k , where y _k is the PCM encoder level uniquely defined by the following conditions:
| T _k |> | c |
| t _k | is as small as possible and t _k / c> 0.
Here, RDS Σ _k is defined to be equal to Σ S _k .
[0027]
Once the time varying DC offset compensation signal 250 is generated, the DC offset encoder 220 applies (adds) the signal 250 to the user data symbol stream 240. User data symbol stream 240 is then transmitted from the modem to the receiving codec along a local loop.
[0028]
In the middle of the path, the user data symbol stream 240 encounters a DC blocking transformer 140 (represented as a block in FIG. 2 rather than the graphical symbol shown in FIG. 1). Assuming that the DC offset compensation signal includes a DC component, the DC blocking transformer 140 substantially removes at least the DC component and allows it to pass through the AC component and user data symbol stream 240. Since the user data symbol stream 240 (including the remaining AC component of the DC offset compensation signal 250) is averaged to 0V, when the user data symbol stream reaches the input of the codec, the DC bias is Reduced and probably largely eliminated.
[0029]
The codec then converts the user data symbol stream to a digital format. At this point, it is necessary to remove the converted AC component of the DC offset compensation signal from the user data. This is done by recalculating the AC component and subtracting it from the user data. In an exemplary embodiment, since the AC component is a deterministic pseudo-random number sequence, the DC offset compensator 210 can accurately recalculate the AC component. Once recalculated, the AC component can be subtracted from the user data to restore the user data to a valid form.
[0030]
Referring now to FIG. 3, a method for compensating for codec DC offset performed in accordance with the principles of the present invention is shown.
[0031]
The method, indicated generally at 300, begins at start step 305. In that step, it is desirable to upload user data from the modem (possibly to another modem (not shown)) via a codec that is part of the telecommunications network. Method 300 continues with step 310, where a DC offset is detected at the input of the receiving codec. The DC offset is preferably at least reduced, and a DC offset indication signal is generated at step 315 and transmitted to the circuit associated with the modem at step 320.
[0032]
In step 325, a time-varying DC offset compensation signal is generated based on the DC offset indication signal (many as described above, but there are other suitable methods). The DC offset compensation signal is then applied to the user data symbol stream and transmitted from the modem to the codec at step 330.
[0033]
Next, in step 335, the user data symbol stream (including the DC offset compensation signal) is transmitted to the input of the codec. In the middle of the path, the user data symbol stream encounters and passes through a DC blocking transformer. Since the user data symbol stream reaches the codec and its average voltage is 0V or a value close to 0V, the DC offset at the codec input is at least reduced. The codec then digitizes the user data symbol stream at step 340 to generate digitized data.
[0034]
Here, since it is necessary to remove the DC offset compensation signal from the user data, in step 345, the DC offset compensation signal is recalculated by a circuit related to the codec, and in step 350, the DC offset compensation signal is subtracted from the user data. To do. This generates user data in an effective form for continuous transmission to the telecommunications network. The method 300 then ends at end step 355, at which point user data is transferred over the telecommunications network.
[0035]
Referring now to FIG. 4, a block diagram of a 56K modem incorporating the system of FIG. 2 or the method of FIG. 3 is shown. The 56K modem indicated generally by 400 includes a symbol stream generation circuit 410. Those skilled in the art are familiar with the configuration and function of the symbol stream generation circuit. The 56K modem 400 of the present invention advantageously uses such a circuit 410 to generate a user data symbol stream for uploading user data to a receiving codec (not shown in FIG. 4).
[0036]
The 56K modem 400 further comprises a DC offset indication signal receiver 420 that has the capability to receive a DC offset indication signal from circuitry associated with the receiving codec. A DC offset indicator indicates the DC offset that exists along the transmission path that couples the 56K modem 400 and the receiving codec.
[0037]
The 56K modem 400 further includes a DC offset encoder 430 having the ability to receive a DC offset indication signal from the DC offset indication signal receiver 420 and generate a time varying DC offset compensation signal therefrom, the time varying DC offset compensation signal being Even if there is any DC blocking circuit in the local loop connecting the modem 400 and the receiving side codec, it is applied to the user data symbol stream generated by the symbol stream generating circuit 410. Offset can be compensated.
[0038]
Although the invention has been described in detail, those skilled in the art will recognize that various modifications, alternatives and alternatives can be made in the present invention without departing from the spirit and scope of the invention in its broad form. I want you to understand.
[0039]
【The invention's effect】
As described above, according to the present invention, it is possible to solve the conventional problems and realize a system and method for compensating for the DC offset of the codec, and a modem incorporating the system or method.
[Brief description of the drawings]
FIG. 1 is a block diagram of a portion of a telecommunications network illustrating the problems addressed by the present invention.
FIG. 2 is a block diagram of a system for compensating for codec DC offset constructed in accordance with the principles of the present invention.
FIG. 3 illustrates a method for compensating for codec DC offset performed in accordance with the principles of the present invention.
4 is a block diagram of a 56K modem incorporating the system of FIG. 2 or the method of FIG.
[Explanation of symbols]
100 Telecommunications Network 110 Codec 120 Local Loop 130 Modem 140 DC Blocking Transformer 210 DC Offset Compensator 220 DC Offset Encoder 230 DC Offset Signal 240 User Data Symbol Stream 250 DC Offset Compensation Signal 400 56K Modem 410 Symbol Stream Generation Circuit 420 DC Offset Signal Receiver 430 DC offset encoder

Claims (21)

A system for compensating for codec DC offset, comprising:
A DC offset compensator for generating and transmitting a DC offset indication signal corresponding to the DC offset present along the transmission path to the receiving codec;
Connected to said DC offset compensator, receiving the DC offset instruction signal, the DC offset compensating signal that varies with time based on the DC offset instruction signal, the user data symbol stream transmitted along said transmission path A system comprising a DC offset encoder for adding .   The system of claim 1, wherein the DC offset compensation signal comprises a deterministic pseudo-random number sequence.   The system of claim 1, wherein the DC offset compensation signal has a component that averages over the negatively-signed negative DC offset.   The system of claim 1, wherein the DC offset compensator removes all the DC offset.   The system of claim 1, wherein the DC offset compensator recalculates the DC offset compensation signal.   The system of claim 1, wherein the DC offset compensation signal can pass through a DC blocking transformer without substantial distortion.   The system of claim 1, wherein the DC offset encoder is associated with a 56K modem. A method for compensating for codec DC offset, comprising:
Generating a DC offset indication signal corresponding to the DC offset present along the transmission path to the receiving codec;
Based on the DC offset instruction signal, the DC offset compensating signal that varies with time, the method comprising adding to the user data symbol stream transmitted along said transmission path,
Removing at least a portion of the DC offset compensation signal to substantially generate the symbol stream. The method of claim 8, wherein the removing is performed by a transformer coupled to the receiving codec.   The method of claim 8, wherein the DC offset compensation signal comprises a deterministic pseudo-random number sequence.   9. The method of claim 8, wherein the DC offset compensation signal has a component that averages over the negatively signed DC offset.   The method of claim 8, wherein the removing comprises removing all the DC offset compensation signals.   The method of claim 8, wherein the removing comprises recalculating the DC offset compensation signal.   9. The method of claim 8, wherein the DC offset compensation signal can pass through a DC blocking transformer without substantial distortion.   The method of claim 8, wherein the DC offset encoder is associated with a 56K modem. A modem,
A DC offset indication signal receiver for receiving a DC offset indication signal corresponding to a DC offset existing along a transmission path to a receiving side codec connected to the modem;
A symbol stream generation circuit for generating a user data symbol stream including user data;
Is connected to the DC offset compensator, a modem and a DC offset encoder the DC offset compensating signal that varies with time based on said DC offset compensator, it is added to the user data symbol stream transmitted along said transmission path.   The modem of claim 16, wherein the DC offset compensation signal comprises a deterministic pseudo-random number sequence.   The modem of claim 16, wherein the DC offset compensation signal has a component that averages over the negatively signed DC offset with an opposite sign.   The modem of claim 16, wherein the DC offset compensation signal can pass through a DC blocking transformer without substantial distortion.   The modem of claim 16, wherein the DC offset indication signal varies throughout a given modem session.   The modem of claim 16, wherein the modem is a 56K modem.

Images