JP3655949B2 - Strobe device - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a strobe device that is useful as an auxiliary light source in photographing, and in particular, includes a central processing unit (hereinafter simply referred to as a CPU), and this CPU is supplied with power for a predetermined period. The present invention relates to a strobe device that prevents waste of the power source by changing from an active state in which a desired operation can be performed to a standby state in which no operation is performed when use of the device cannot be confirmed.
[0002]
[Prior art]
The strobe device is a device whose basic operation is an operation of supplying a charge of a main capacitor to a flash discharge tube in response to a light emission start signal such as a known synchro signal, and causing the flash discharge tube to emit light. When taking pictures, it is useful as an auxiliary light source, for example, when the peripheral brightness of a subject such as nighttime or indoors is low.
[0003]
In addition, recent strobe devices are equipped with a CPU, for example, to exchange shooting information such as aperture value information with a mounted camera, and in various forms of power consumption operation and flash discharge tube light emission operation. Higher functions such as control have been promoted.
[0004]
In an apparatus as described at the beginning, that is, a strobe device equipped with a CPU, an active state in which the equipped CPU can perform a desired operation when the use of the device has not been confirmed for a predetermined period while power is supplied. The strobe device has a function of prohibiting the operation of the strobe device by controlling to a standby state in which no operation is performed, thereby preventing the waste of the power source as one consumption operation mode of the power source. Is well known.
[0005]
By the way, in the strobe device having a function capable of setting the standby state as described above, it is necessary to have a configuration in which the CPU provided by releasing the standby state is returned to the active state as an essential configuration. Needless to say, conventionally, cancellation of the standby state of the CPU, that is, return to the active state, has been performed by the CPU receiving a sync signal or a single emission signal with the configuration shown in FIG. It was.
[0006]
That is, FIG. 2 is a schematic electric circuit diagram of a main part of an example of a conventional strobe device provided with a configuration for canceling the standby state by using a synchro signal or a single light emission signal and a light emission control structure in a strobe device having a function capable of setting a standby state. Is shown.
[0007]
In FIG. 2, the CPU 1 constitutes an exchange configuration for exchanging aperture value information and the like with a part of the strobe device, for example, a camera to be mounted, and the exchange operation is performed when the drive power supply 2 is supplied. The active state for performing a desired operation such as the above is controlled, and when the use of the apparatus cannot be confirmed for a predetermined period while the drive power supply 2 is supplied, the active state is controlled to a standby state in which no operation is performed. The
[0008]
Further, the CPU 1 has a light emission start terminal 1a connected to the driving power source 2 via the resistor 10, and a release terminal 1b connected to the driving power source 2 via the resistor 11, and the CPU 1 is in an active state. At a certain time, a light emission signal which is a low level signal, for example, is input to the light emission start terminal 1a to start a light emission operation of a flash discharge tube (not shown), and when in a standby state, the release terminal 1b is When a release signal that is a low level signal is input, the signal is returned to the active state.
[0009]
The X contact 3 is connected to the light emission starting terminal 1a via the diodes 4 and 5 and the resistor 6 and to the release terminal 1b via the diodes 4 and 7 and the resistor 8, and is closed to operate the diode 4 , 5 and 7 are contact points for generating a so-called sync signal, which is a low level signal, at point A in FIG.
[0010]
The single light emitting contact 9 is connected to the light emission starting terminal 1a via the diode 5 and the resistor 6 and to the release terminal 1b via the diode 7 and the resistor 8, and is closed to operate. Like FIG. 2, a contact point for generating a so-called single emission signal which is a low level signal at point A in FIG.
[0011]
That is, the previous X contact 3 and the single light emitting contact 9 are connected in parallel to the light emission starting terminal 1a and the release terminal 1b of the CPU 1. Therefore, in the configuration shown in FIG. Regardless of which operation is closed, a low level signal, which is a sync signal or a single emission signal, is generated at point A in FIG. 2, and this low level signal is applied to both the light emission activation terminal 1a and the release terminal 1b of the CPU 1. It is input via diodes 5 and 7.
[0012]
As a result, when the CPU 1 is in the active state, the light emission operation of the flash discharge tube (not shown) is performed by the low level signal input to the light emission activation terminal 1a by the operation of either one of the X contacts 3 and 9. When it is in the standby state, it operates so as to return to the active state by the low level signal input to the release terminal 1b by the operation of either one of the contacts 3 and 9.
[0013]
[Problems to be solved by the invention]
As described above, in the conventional apparatus shown in FIG. 2, either the sync signal or the single light emission signal, which is a similar low level signal, is input to the release terminal of the CPU when the X contact or the single light emission contact is operated. For example, the standby state of the CPU is released, that is, the return operation from the standby state to the active state is performed.
[0014]
However, when looking at the signal input to the CPU, the release terminal and the light emission starting terminal are connected to both the contact points regardless of whether the CPU is in an active state or a standby state. The low-level signal is always supplied by the operation. On the other hand, the standby state of the CPU as described above is usually once set unless the set state is surely released thereafter. In other words, a state in which various stable desired operations cannot be guaranteed is set. In other words, in order to expect a stable desired operation, it is necessary to reliably return to the active state. This configuration has the following disadvantages.
[0015]
For example, now considering the low level signal input to the light emission start terminal in the standby state of the CPU, the low level signal is synchronized with the low level signal input to the release terminal to cancel the standby state. Therefore, depending on the time when the CPU returns from the standby state to the active state, it may function as a signal that causes an undesired operation state of the CPU.
[0016]
Therefore, in the previous configuration, there is an annoyance that requires a prevention configuration for preventing adverse effects due to the low-level signal input to the light emission starting terminal, and the prevention configuration itself is lower than the conventional level. Even if a signal is input, it is generally configured by software processing that does not accept it as an input signal. For this reason, for example, complicated software such as interrupt processing is required. The internal signal processing software has a disadvantage.
[0017]
The present invention has been made in consideration of the above-mentioned disadvantages, and in a standby state, a circuit is provided so that only a single emission signal for releasing the standby state and returning to the active state is transmitted to the CPU. It is an object of the present invention to provide a strobe device that does not need to perform complicated software processing in the CPU.
[0018]
[Means for Solving the Problems]
The strobe device according to the present invention waits for no operation from an active state in which a desired operation can be performed when the use of the device cannot be confirmed for a predetermined period while power is supplied. A strobe device that prevents the power source from being wasted by entering a state, and in the active state, any one of a sync signal and a single light emission signal is supplied to the CPU and the CPU performs a desired operation. Control means for preventing transmission of a synchro signal to the CPU in the standby state and transmitting a single emission signal to the CPU as a control signal for switching the CPU from the standby state to the active state. Composed.
[0019]
[Action]
Since the strobe device according to the present invention has the above-described configuration, when the CPU is in the active state, as in the conventional configuration, when a sync signal or single emission signal is supplied, any signal is used as a control means. Therefore, the CPU performs a desired operation.
[0020]
On the other hand, when the CPU is in the standby state, the control means blocks the transmission of the sync signal to the CPU, and the single emission signal serves as a control signal for bringing the CPU from the standby state to the active state. As a result, the return operation to the active state by releasing the standby state is not performed by the operation of the X contact, and the single light emission signal is sent to the CPU by the operation of the single light emission contact. It is executed only when it is input to the release terminal.
[0021]
In other words, in the standby state, the sync signal or the single emission signal is not simultaneously input to both the light emission start terminal and the release terminal of the CPU, and therefore, the occurrence of inconvenience due to the configuration in which the signals are input simultaneously is prevented. Therefore, it is not necessary to perform complicated software processing in the CPU.
[0022]
【Example】
FIG. 1 is a principal circuit diagram showing an embodiment of a strobe device according to the present invention. In the figure, components having the same reference numerals as those in FIG.
[0023]
Reference numeral 12 includes the diodes 4 and 7 and the resistors 8 and 11 described in FIG. 1, the diode 13, and switch elements such as transistors 14, 15 and 16, and resistors 17 to 22, and the X contact 3 or A control means for controlling transmission of a sync signal or a single light emission signal to be generated to the CPU 1 by the operation of the single light emission contact 9 is shown.
[0024]
The mode terminal 1c of the CPU 1 is configured to output a low level signal when the CPU 1 is in an active state where a desired operation can be performed, and a high level signal when the CPU 1 is in a standby state where no operation is performed. Shows the terminals.
[0025]
The operation of the embodiment of the strobe device according to the present invention constructed as above will be described below.
[0026]
Assuming that the driving power supply 2 is supplied to the CPU 1, the CPU 1 is activated and a high level signal is supplied to the release terminal 1b.
[0027]
At the same time, the CPU 1 outputs a low level signal from the mode terminal 1c, so that the transistor 16 which is a switch element is maintained in an ON state, whereby a high level signal is supplied to the light emission activation terminal 1a of the CPU 1.
[0028]
When the X contact 3 is closed in such a state, a sync signal which is a low level signal is generated at the point B in FIG. 1, so that the transistor 16, the resistors 17 and 18, the diode 4, and the X contact are generated. 3, a current flows through the resistor 17, and the transistor 14 is turned on by a voltage drop across the resistor 17. Further, when the transistor 14 is turned on, a current flows through the resistors 19 and 20, and a voltage drop across the resistor 20. Thus, the transistor 15 is turned on.
[0029]
When the transistor 15 is turned on, the light emission activation terminal 1a of the CPU 1 is controlled to a low level. That is, when the transistor 15 is turned on, a low level signal is applied to the light emission activation terminal 1a to which a high level signal has been supplied. As a result, the CPU 1 operates to start a light emission operation of a flash discharge tube (not shown).
[0030]
In the present embodiment, the low level signal at point B is prevented from being transmitted to the anode side by the diode 13, that is, input to the release terminal 1 b of the CPU 1 via the diode 7 and the resistor 8. In other words, the present embodiment is configured such that the sync signal, which is a low level signal generated based on the closing operation of the X contact 3, is not transmitted to the release terminal 1b of the CPU 1 when the CPU 1 is in an active state. ing.
[0031]
Next, when the single emission contact 9 is closed while the CPU 1 is in an active state, a single emission signal which is a low level signal is generated at the point C in FIG. A current flows through the resistors 17 and 18 and the diode 13, and as a result, the transistor 14 is turned on by the voltage drop of the resistor 17 as in the previous case.
[0032]
Therefore, as in the previous case, when the transistor 14 is turned on, the transistor 15 is turned on, and a low level signal is input to the light emission starting terminal 1a of the CPU 1 so that the CPU 1 starts a light emission operation of a flash discharge tube (not shown). To do.
[0033]
At this time, a current flows through the resistors 11 and 8 and the diode 7 based on the low level signal at the previous point C. As a result, the low level signal is applied to the release terminal 1b to which the high level signal has been supplied. The low-level signal input to the release terminal 1b does not particularly adversely affect the CPU 1 because the CPU 1 is already active.
[0034]
On the other hand, when the CPU 1 is in a standby state in which the use of the apparatus cannot be confirmed for a predetermined period of time while the drive power supply 2 is supplied and no operation can be performed, the CPU 1 outputs a high level signal from its mode terminal 1c to switch The transistor 16 which is an element is maintained in an off state, and therefore no voltage appears at the point D in the figure on the output side of the transistor 16. Even in such a case, a high level signal is input from the drive power supply 2 through the resistor 11 to the release terminal 1b of the CPU 1 as in the previous case.
[0035]
In this standby state, when the X contact 3 is now closed, a sync signal, which is a low level signal, is generated at point B in FIG. 1 as in the previous case. Since the transistor 16 is maintained in the off state and no voltage appears at the point D in FIG. 1, no current flows through the resistors 17, 18 and so the transistors 14 and 15 are turned on. There is nothing.
[0036]
As a result, no signal is input to the light emission starting terminal 1a of the CPU 1, and of course, the CPU 1 does not operate to start the light emission operation of a flash discharge tube (not shown).
[0037]
In this standby state, as in the previous active state, it is clear from the circuit configuration of this embodiment that the low level signal at point B based on the closing operation of the X contact 3 is not input to the release terminal 1b of the CPU 1. is there.
[0038]
Next, when the single emission contact 9 is closed in the standby state of the CPU 1 as described above, a single emission signal which is a low level signal is generated at the point C in FIG. A current flows through the diode 7 and a low level signal is input to the release terminal 1b to which a high level signal has been supplied.
[0039]
Therefore, the CPU 1 operates to release the standby state based on the low level signal input to the release terminal 1b, that is, to return its own state from the previous standby state to the active state.
[0040]
It is clear from the fact that no voltage appears at point D in FIG. 1 in the standby state, even when a low level signal is generated at point C, no current flows through resistors 17, 18 and the like. Therefore, the transistor 14 and the transistor 15 are not turned on. As a result, no signal is input to the light emission starting terminal 1a of the CPU 1, and the CPU 1 naturally starts the light emission operation of the flash discharge tube not shown. Does not work as well.
[0041]
As described above, in the embodiment of the strobe device according to the present invention, the control means 12 does not input the sync signal which is a low level signal generated by the operation of the X contact 3 to the release terminal 1b of the CPU 1. Rather, only the single emission signal, which is a low level signal generated by the operation of the single emission contact 9 when the CPU 1 is in the standby state, is input to the release terminal 1b.
[0042]
【The invention's effect】
In the strobe device according to the present invention, when the CPU provided therein is in an active state, either the sync signal or the single emission signal is supplied to the CPU, and the CPU performs a desired operation. Control means for preventing the transmission of the synchro signal to the CPU in the standby state and transmitting only the single emission signal to the CPU as a control signal for changing the CPU from the standby state to the active state. Therefore, neither the sync signal or the single emission signal is transmitted to the CPU in the standby state, that is, the CPU only receives the single emission signal in the standby state without performing software processing. As a result, it is possible to realize transmission as a control signal for changing the CPU from the standby state to the active state. Complex software processing for the purpose of prevention of adverse effects due to be transmitted has the effect that would provide the required free flash device for performing the above CPU.
[Brief description of the drawings]
FIG. 1 is a main part electric circuit diagram showing an embodiment of a strobe device according to the present invention. FIG. 2 is a main part schematic electric circuit diagram of a conventional strobe device example.
1 Central processing unit (CPU)
2 Driving power supply 3 X contact 4 Diode 5 Diode 6 Resistor 7 Diode 8 Resistor 9 Single light emitting contact 10 Resistor 11 Resistor 12 Control means 13 Diode 14 Transistor 15 Transistor 16 Transistor 17 Resistor 18 Resistor 19 Resistor 20 Resistor 21 Resistor 22 Resistor 22 Resistor

Claims (3)

When the use of the apparatus cannot be confirmed for a predetermined period in a state where the power is supplied, the central processing unit provided is changed from an active state where a desired operation can be performed to a standby state where no operation is performed, thereby the power source. In the active state, the flash device transmits either the sync signal or the single emission signal to the central processing unit to perform a desired operation on the central processing unit. In the standby state , transmission of the synchro signal to the central processing unit is blocked and the single emission signal is used as a control signal for changing the central processing unit from the standby state to the active state. Strobe device with control means for transmitting to the device. The control means includes: a first diode having a cathode connected to the X contact; a second diode having a cathode connected to a single light emitting contact and an anode connected to the anode of the first diode; the anode of the first diode; Connected between the anode of the second diode and the central processing unit, and is controlled to be in an on state in the active state and in an off state in the standby state, and is electrically connected between the X contact, the single light emitting contact, and the central processing unit. The strobe device according to claim 1, further comprising: a switch element for controlling a state; and a third diode having a cathode connected to the single light emitting contact and an anode connected to the central processing unit. A central processing unit that is in a standby state in which no operation is performed from an active state in which a desired operation can be performed when the use of the device is not confirmed for a predetermined period in a state where power is supplied, and an X contact or a single light emitting contact And a control unit that controls transmission of a signal generated based on a closing operation to the central processing unit, wherein the central processing unit receives a light emission signal for starting a predetermined light emitting operation. The light emission activation terminal that is input, the release terminal that releases the standby state to return to the active state, and the mode terminal that outputs a different signal in the standby state and the active state, The control means has one end of a main pole connected to the power source and a control pole connected to the mode terminal, and is turned on in the active state and turned off in the standby state. The switching element to be controlled, the other end of the main pole of the switching element and the light emission starting terminal, and the first and second diodes to which the anodes are connected are connected to the X contact and the single light emitting contact. , Connecting the X contact or the single light emitting contact in the forward direction between the switch unit and the release terminal that transmits the closing operation of the single light emitting contact to the light emission starting terminal corresponding to the on / off state of the switch element and the single light emitting contact The third diode is configured to control only the single light emitting contact closing operation in the standby state by controlling the switch element in the off state in the standby state. A strobe device that transmits the signal to the release terminal.

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