JP3653658B2 - Power supply step-down circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power supply step-down circuit that supplies a stable voltage to circuit elements formed on a semiconductor substrate.
[0002]
[Prior art]
In general, a power source for driving an integrated circuit including a semiconductor memory device formed on a semiconductor substrate converts a power source voltage supplied from the outside into an arbitrary voltage by a power step-down circuit formed on the semiconductor substrate. Often supplied.
[0003]
Such a power supply step-down circuit is configured to supply a relatively stabilized voltage even when there is some fluctuation in the internal power supply voltage due to external power supply voltage or load fluctuation.
[0004]
For example, in Japanese Patent Laid-Open No. 6-84357, as shown in FIG. 5, a first differential amplifier transistor pair 11 and 12 that is always operating including a standby (standby) state and an active (operating) state are disclosed. A power supply step-down circuit that includes a second differential amplifier transistor pair 13 and 14 that operates when the internal voltage VINT is reached, prevents overshoot of the internal voltage VINT, and supplies a stable voltage has been proposed.
[0005]
[Problems to be solved by the invention]
The above-described power supply step-down circuit shown in FIG. 5 may oscillate when the current value of the internal voltage VINT in the standby state becomes extremely small. Further, when the current value decreases, the internal voltage VINT may become a large voltage exceeding the reference voltage Vref.
[0006]
Therefore, an object of the present invention is to provide a power supply step-down circuit that stably supplies a desired voltage in an active state, maintains a state with a low current consumption in a standby state, and has a simple structure.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a first Pch transistor for supplying a power of a predetermined voltage for driving to a load composed of circuit elements formed on a semiconductor substrate in an active state, The second Pch transistor that always supplies a standby power supply with a small current compared to the output of the Pch transistor to the load, the predetermined reference voltage, and the output sum from the first and second Pch transistors, respectively. Input, amplify the difference between them, and control the gate voltage applied to the first transistor so that the first Pch transistor outputs a voltage equivalent to the reference voltage to the load when active. In the standby state, the gate voltage applied to the first transistor is set to H level to increase the impedance between the drain and source, and A power supply step-down circuit is provided that includes a differential amplifier circuit that cuts off supply of the predetermined voltage to a load and supplies only the standby power supply from the second Pch transistor to the load.
[0008]
In the power supply step-down circuit configured as described above, when in the active state, the active power supply comprising the sum of the output of the first Pch transistor and the output of the second Pch transistor controlled by the differential amplifier circuit is loaded. In the standby state, the differential amplifier circuit increases the impedance between the drain and source of the first transistor to cut off the power supply to the load, and the load has a standby state from the second Pch transistor. Only power is supplied.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0010]
FIG. 1 shows and describes the configuration of a power supply step-down circuit according to a first embodiment of the present invention.
[0011]
This power supply step-down circuit supplies a driving power supply having a predetermined voltage and current to circuit elements including a memory element and an active element formed on a semiconductor substrate.
[0012]
As its configuration, an amplifier 1 composed of a differential amplification transistor pair that inputs a reference voltage Vref and an output voltage Vddi and amplifies and outputs the difference, and one Pch transistor for supplying active power from the output of the amplifier 1 2 and one Pch transistor 3 that is always operated by the output voltage Vddi and supplies standby power. A power supply Vdd is supplied to the transistors 2 and 3. For example, when the power supply Vdd is 3.3 V, the output voltage Vddi of the transistors 1 and 2 is provided so that about 2.5 V, which is equivalent to the reference voltage Verf, can be output. Of course, the power supply Vdd is not limited to 3.3V.
[0013]
FIG. 2 shows a configuration example of the amplifier 1 shown in FIG.
[0014]
FIG. 2A shows a configuration example of a differential amplification type amplifier using a current mirror circuit, and the amplifier in FIG. 2B shows a modification of FIG.
[0015]
The amplifier shown in FIG. 2A includes a current mirror transistor pair 5, an nMOS transistor 6 driven by a reference voltage Vref, an nMOS transistor 7 driven by a differential input signal, an nMOS transistor 8 driven by a bias signal, The nMOS transistor 9 is driven by a standby signal connected to the output terminal.
[0016]
With this configuration, during standby, the bias signal is set to the H level, and the L level is input to the gate of the nMOS transistor 5. At this time, the output of the amplifier becomes H level.
[0017]
Further, the amplifier shown in FIG. 2B has a different connection configuration. In standby mode, the bias signal is set to L level and the L level is input to the gate of the nMOS transistor 5. At this time, the output of the amplifier becomes H level.
[0018]
With reference to FIG. 3A, the case of the active (operation) state in this configuration will be described.
[0019]
The resistance value r of the load 4 composed of circuit elements connected to the output side of the power supply step-down circuit is about several ohms, and the load fluctuates with time during active. At this time, the current value flowing through the transistor 2 is ib1, the current value flowing through the transistor 3 is ib2, and the current value of the current flowing through the load 4 is Ib.
[0020]
Here, there is a relationship of ib1 >> ib2, Ib = ib1 + ib2, and the average current value of Ib is about 1.5 A, for example.
[0021]
First, an active signal instructing activation is input to the amplifier 1, the amplifier 1 is driven, and a driving output (gate voltage) is output to the transistor 2. The transistor 2 is driven by the applied driving output and outputs an output voltage Vddi whose voltage Vdd is internally reduced. The output voltage Vddi is adjusted by the amplifier 1 so as to be approximately the reference voltage Vref, and is supplied to the load 4 as a driving power source.
[0022]
Next, the standby state will be described with reference to FIG.
[0023]
Here, the current value flowing through the transistor 2 is set as is1, the current value flowing through the transistor 3 is set as is2, and the current value flowing through the load 4 is set as Is. Here, there is a relationship of is1 >> is2, Is = is1 + is2, and the average current value of Is is about several mA. The resistance value r of the load 4 is about several ΩK, and the load fluctuates slightly to the extent that it does not cause a problem during standby.
[0024]
First, a standby signal instructing standby is input to the amplifier 1, the amplifier 1 is driven, and a driving output Vdd 'having the same voltage value as that of the power supply Vdd is output to the gate of the transistor 2. When the driving output Vdd ′ is applied to the transistor 2, the source and drain are in a high impedance state, and the current is1 output from the transistor 2 is approximately 0A.
[0025]
Therefore, the output voltage Vddi and the current Is (= is2) obtained by internally reducing the voltage Vdd from the transistor 3 are supplied to the load 4 as a standby power source.
[0026]
Therefore, in this embodiment, the power supply transistor is driven using one amplifier for the active state to supply the power supply voltage to the load.
[0027]
In standby mode, the output of the amplifier is fixed at the H level, the drive of the power supply transistor is stopped, and an output of several mA is supplied to the load at a voltage almost the same as that of the power supply from the transistor that is always operating. As a result, the voltage applied to the load does not drop to 0 V even during standby, and the rise to the active state is quickly performed.
[0028]
FIG. 4 shows a modification of the transistor 3 for supplying standby power.
[0029]
FIG. 4A shows a configuration in which the Pch transistors 3 shown in FIG. 1 are connected in two stages, and an output voltage Vddi ′ that is lower than the output voltage Vddi output from the transistor 3 in FIG. 1 is output.
[0030]
FIG. 4B shows a configuration example in which the Pch transistor shown in FIG. 4A is replaced with an Nch transistor. This configuration also outputs an output voltage Vddi ′ that is lower than the output voltage Vddi output from the transistor 3.
[0031]
As described above, according to the embodiment, a pair of differential amplification transistors has been conventionally driven even during standby, but in this embodiment, only one transistor is operated, so that the structure is simple. In addition, current consumption can be further reduced.
[0032]
In addition, it is possible to prevent oscillation due to a drop in the internal voltage in the standby state, which is a problem in the prior art, and to perform power supply step-down without exceeding the reference voltage. In standby mode, the output voltage Vddi ′ is held by a transistor having a small output current, so that it is not necessary to drop it to 0V.
[0033]
【The invention's effect】
As described above in detail, according to the present invention, it is possible to provide a power supply step-down circuit that stably supplies a desired voltage when active, maintains a state with low current consumption during standby, and has a simple structure.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration example of a power supply step-down circuit according to an embodiment of the present invention.
2 is a diagram illustrating a configuration example of an amplifier illustrated in FIG. 1. FIG.
FIG. 3 is a diagram for describing an active state and a standby state according to the embodiment.
FIG. 4 is a diagram showing a modification of the power supply step-down circuit according to the present embodiment.
FIG. 5 is a diagram showing a configuration example of a conventional power supply step-down circuit.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Amplifier 2, 3 ... Transistor 4 ... Load Vddi ... Output voltage Vref (of transistor 2) Reference voltage ib1, is1 ... Current ib2, is2 flowing through transistor 2 ... Current flowing through transistor 3 Ib ... Current flowing through load

Claims (4)

First supply means for supplying power of a predetermined voltage for driving to a load made of circuit elements formed on a semiconductor substrate in an active state;
A second supply means for always supplying a standby power supply with a small current compared to the output of the first supply means to the load;
In the active state, the first supply means is controlled to supply the predetermined voltage for driving adjusted to conform to a predetermined reference voltage to the load, and in the standby state, the first supply means Power supply step-down selection means for stopping the driving of the power supply and supplying only the standby power supply to the load;
A power supply step-down circuit comprising: A first Pch transistor for supplying power of a predetermined voltage for driving to a load composed of circuit elements formed on a semiconductor substrate in an active state;
A second Pch transistor that constantly supplies a standby power supply with a small current compared to the output of the first Pch transistor to the load;
A predetermined reference voltage and a sum of outputs from the first and second Pch transistors are inputted and amplified based on the difference between them, and when in the active state, the first Pch transistor is connected to the reference voltage. The gate voltage applied to the first transistor is controlled so that a voltage equivalent to the voltage is output to the load. In the standby state, the gate voltage applied to the first transistor is set to H level so that the drain-source voltage is high. A differential amplifying circuit configured to impedance, cut off the supply of the predetermined voltage to the load, and supply only the standby power source from the second Pch transistor to the load;
A power supply step-down circuit comprising: 3. The power supply step-down circuit according to claim 2, wherein a voltage value of the standby power supply is adjusted by using a plurality of the second Pch transistors to make a multistage connection. 4. The power supply step-down circuit according to claim 3, wherein the voltage value of the standby power supply is adjusted by replacing the second Pch transistor with an Nch transistor and connecting the Nch transistors in multiple stages.

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