JP3627742B2 - VIDEO INFORMATION RECORDING MEDIUM, VIDEO INFORMATION RECORDING DEVICE AND RECORDING METHOD, AND VIDEO INFORMATION REPRODUCING DEVICE AND REPRODUCTION METHOD - Google Patents

Description

【００７１】
ここで、Ｐｓ＜Ｉｓの場合は誤差ブロックの方が入力信号ブロックより情報量が少ないと判断し、誤差ブロックを動きベクトルと共に第１スイッチ３２に出力する。一方Ｐｓ≧Ｉｓの場合は入力信号ブロックの方が誤差信号ブロックより情報量が少ないと判断し、入力ブロックとそのブロックが強制イントラブロックであることを示す強制イントラ信号とを動きベクトルの代わりに第１スイッチ３２に出力する。
【００７２】
第１スイッチ３２では、イントラモードの場合はブロック化回路２の出力を選択し、予測モードの場合は判定器３１の出力を選択し直交変換回路３３に出力する。直交変換回路３３では入力される８×８の各ブロックに対して、例えば２次元のＤＣＴを施す。量子化回路３４では、直交変換回路３３より出力される直交変換係数を可変長符号化し量子化する。また量子化回路３４では予測モードの場合は、直交変換係数に加えて、動きベクトルまたは強制イントラ信号を量子化し、直交変換係数に加えて伝送路１１に出力する。
【００７３】
一方第２スイッチ３５では動き補償予測の参照データとするために、イントラフィールドの場合のみ量子化回路３４によって量子化された直交変換係数を逆量子化回路３６に出力する。逆量子化回路３６では量子化回路３４によって可変長符号化されたデータを逆量子化し可変長復号を行ない、逆直交変換回路３７に出力する。逆直交変換回路３７では、例えば２次元の逆ＤＣＴを施してイントラフィールドのブロックを復元する。逆直交変換回路３７によって復元されたイントラフィールドの各ブロックは、画像メモリ３８に蓄えられる。画像メモリ３８では動き補償予測の場合の参照用データとして、イントラフィールドの復元画像１フィールド分を蓄える、さらに動き補償予測回路３０に対して動きベクトルの検出範囲の参照画像を出力する。
【００７４】
なお上記実施の形態では、直交変換のブロックサイズを８画素×８ラインの大きさにしているが、必ずしも８画素×８ラインである必要はなくｎ画素×ｍラインのブロックサイズで行ってもよい。また同様に動きベクトルの検出範囲も１６画素×１６ラインである必要はなく、ｋ画素×ｓライン（ｋ≧ｎ，ｓ≧ｍ）で行なってもよい。また４フィールド毎に予測符号化が完結しているが必ずしも４フィールドである必要はなく任意のフィールド毎に予測符号化が完結するようにしてもよい。
【００７５】
また任意のフィールド毎に予測符号化が完結しているが、必ずしもフィールド毎である必要はなく任意のフレーム毎に予測符号化が完結するようにしてもよい。また上記実施の形態では、判定器３１でブロック化回路２の出力と動き補償予測回路３０の出力との絶対値和の小さい方を第１スイッチ３２に出力していたが、動き補償判定を行わずに動き補償予測回路３０の出力のみを第１スイッチ３２に出力してもよい。
【００７６】
第２実施の形態．
上記第１実施の形態では、判定器３１でブロック化回路２の出力と動き補償予測回路３０の出力との絶対値和の小さい方を第１スイッチ回路３２に出力していたが、判定器３１の判定結果が予測モードよりも強制イントラモードの方が多くなるようなフィールドでは、シーンチェンジが生じたと判断し、このフィールド全体をイントラモードとして、符号化してもよい。この様にして構成した例が第２実施の形態である。
【００７７】
図２８は第２実施の形態の構成を示すブロック図である。図において４０はブロック化回路２から出力される入力ブロックと動き補償予測回路３０からの予測誤差ブロックとの絶対値和の小さい方を選択し、さらにブロック化回路２からの入力ブロックが選択される方が多いようなフィールドは、イントラフィールドであると判定する判定器、４１はブロック化回路２から出力される入力ブロックをイントラフィールドのデータとして蓄える第１フィールドメモリ、４２は判定器４０から出力される予測フィールドのブロックを蓄える第２フィールドメモリ、４３はイントラモード及び判定器４０において予測モードより強制イントラモードの方が多いと判別された場合に第１フィールドメモリ４１の出力を選択し直交変換回路３３に出力し、それ以外の場合は第２フィールドメモリ４２の出力を選択する第１スイッチである。
【００７８】
次に動作について説明する。ディジタル映像入力端子１から動き補償予測回路３０までの動作は第１実施の形態と同じであるため省略する。判定器４０は、第１実施の形態と同様にブロック化回路２から出力される入力ブロックと動き補償予測回路３０から出力される誤差ブロックとのそれぞれのブロックの各成分の絶対値和の小さい方を選択して出力する。ここで、動き補償予測回路３０の出力が選択された場合、判定器４０は動きベクトルと共に誤差信号のブロックを出力する。
【００７９】
またブロック化回路２の出力が選択された場合は、強制イントラブロックであることを示す信号と共に出力される。また判定器４０では強制イントラブロックが１フィールド内である値ｎ個以上になった場合はシーンチェンジが生じたと判断し、現在のフィールドをすべてイントラモードで符号化するような制御信号を出力する。
【００８０】
判定器４０の出力は予測モードのデータとして第２フィールドメモリ４２に蓄えられ、１フィールド分のデータが蓄えられた後、第１スイッチ４３に出力される。一方ブロック化回路２の出力は第１フィールドメモリ４１にイントラモードのデータとして蓄えられ、１フィールド分のデータが蓄えられた後、第１スイッチ４３に出力される。第１スイッチ４３ではイントラモード及び判定器４０において強制的にイントラモードにすると判断された場合は、第１フィールドメモリ４１の出力を選択し、それ以外の場合は第２フィールドメモリ４２の出力を選択して、直交変換回路３３に出力する。以下直交変換回路３３から画像メモリ３８までの動作は第１実施の形態と同じであるため省略する。但し、判定器４０でシーンチェンジが生じたと判断された場合は画像メモリ３８の内容も更新する必要があるので、第２スイッチ３５においてもイントラモードの場合と同様に量子化回路３４の出力を逆量子化回路３６に出力する。
【００８１】
ここで、あるサンプル画像に対して図２７， 図４，図２９の３種類の予測符号化を用いて、符号化、復号化を行った例について説明する。図２９に示す予測符号化方式はフレーム内でそれぞれフィールド間予測を行い、第３フィールドＦ３は第１フィールドＦ１から予測する方式である。ここで、図２７による符号化方式を方式１、図４を方式２、図２９を方式３としてシーンチェンジが存在するサンプル画像５秒分に対してシミュレーションを行った結果を図３０に示す。
【００８２】
同様にシーンチェンジが存在しない画像５秒分に対してシミュレーションを行った結果を図３１に示す。サンプル画像としては４：２：２コンポーネント信号（Ｙ：７２０ × ２４０，Ｃｂ，Ｃｒ：３６０ × ２４０，６０Ｆｉｅｌｄ／ｓｅｃ ）を用いている。図３０， 図３１の結果よりシーンチェンジを含む映像の場合はＳ／Ｎ比から見て方式３が有効である。
【００８３】
しかし、シーンチェンジを含まない映像の場合には方式１〜３では、あまり差が見られないことが分かる。この結果シーンチェンジが生じた場合は、強制的にイントラフィールドにすることにより、従来の予測符号化装置よりもハードウェアサイズが小さな高能率符号化装置を実現できる。
【００８４】
なお上記第２実施の形態では、ｎフィールド毎にイントラモードを作り、それに続くｎ−１フィールドをイントラフィールドから予測符号化し、シーンチェンジが生じた場合、強制的にイントラフィールドを作り、残りのフィールドを強制イントラフィールドより予測しているが、必ずしもｎフィールド毎にイントラフィールドがある必要はなく、強制イントラフィールドが発生した場合は強制イントラフィールドを起点にして続くｎ−１フィールドを予測符号化してもよい。また上記実施の形態ではフィールド単位で予測符号化を行っているが必ずしもフィールド単位で予測符号化を行う必要はなく、フレーム単位で予測符号化を行ってもよい。
【００８５】
以上詳述したように、第１，第２実施の形態の高能率符号化装置では、ｎフィールド毎にイントラフィールドを作り、その他のフィールドについては、このイントラフィールドを参照画像として動き補償予測を行っているので、動きベクトルを求めるための演算回路等のハードウェアサイズを小さくすることができる。
【００８６】
第３実施の形態．
図３２は第３実施の形態の高能率符号化装置の構成を示すブロック図である。図３２において、１〜１４、１６〜２０は図２における従来装置と同じものである。５０はイントラモードのブロックの個数をカウントするモードカウンタ、５１は所定のブロック数とモードカウンタからのイントラモードのブロックの個数とを比較し、次のフィールドの参照画像を決定する方向切換回路、５２は動き補償予測を行うために出力ブロックを蓄え、次のフィールドの参照画像を探索範囲として出力する画像メモリである。
【００８７】
次に動作について説明する。入力されたディジタル映像入力信号はイントラフィールド，予測フィールドに係わらずブロック化回路２によってｍ［画素］×ｎ［ライン］を１つの単位とする入力ブロックに分けられ切り出される。入力ブロックは誤差ブロックを得るために減算器３において予測ブロックとの画素単位の差分が計算される。このようにして入力ブロックと誤差ブロックとが第一スイッチ回路７にそれぞれ入力される。また誤差ブロックはその電力を算出するため誤差電力算出回路４に入力され誤差電力が計算される。
【００８８】
そして入力ブロックもその交流電力を算出するために原画電力算出回路５に入力され原画電力が計算される。誤差電力算出回路４と原画電力算出回路５との出力は判別回路６に入力され２つの電力のうち小さい方を選択し、それをモード信号として第一スイッチ回路７に入力される。この時誤差電力が原画交流電力よりも小さければ予測モードとして第一スイッチ回路７で誤差ブロックを符号化ブロックとして出力するように予測モード信号を出力する。また原画電力の方が誤差電力よりも小さければイントラモードとして第一スイッチ回路７で入力ブロックを符号化ブロックとして出力するようにイントラモード信号を出力する。
【００８９】
また判別回路６からのモード信号はモードカウンタ５０に入力される。入力されるモード信号は予測フィールドのブロック毎に生成されるのでモードカウンタ５０では１フィールド分のブロックの個数のうちイントラモードまたは予測モードを選択したブロックの個数をカウントする。そしてイントラモードまたは予測モードを選択したブロックの個数を方向切換回路５１に出力する。方向切換回路５１では所定のブロックの個数（１フィールド分のブロック数未満）とモードカウンタ５０から入力されたイントラモードを選択したブロックの個数とを比較し、画像メモリ５２に参照画像切換信号を出力する。
【００９０】
方向切換回路５１において所定のブロックの個数がイントラモード（または予測モード）を選択したブロックの個数より大きければ（小さければ）、参照画像を切り換えないように参照画像切換信号が画像メモリ５２に出力される。また、方向切換回路５１において所定のブロックの個数がイントラモード（または予測モード）を選択したブロックの個数より小さければ（大きければ）、参照画像を切り換えるように参照画像切換信号が画像メモリ５２に出力される。
【００９１】
第一スイッチ回路７は判別回路６によって決定されたモード信号に基づいて入力ブロックもしくは誤差ブロックを符号化ブロックとして出力する。この時入力ブロックがイントラフィールドである場合は第一スイッチ回路７は必ず入力ブロックを符号化ブロックとして出力する。符号化ブロックはＤＣＴ回路８に入力されＤＣＴ係数に変換される。ＤＣＴ係数は量子化回路９によってウェイティング処理やスレッショルド処理を行いそれぞれに応じて所定のビット数に量子化される。それぞれ所定のビット数に量子化されたＤＣＴ係数は第一符号化回路１０で伝送路１１に適した符号に変換され、伝送路１１に出力される。
【００９２】
また量子化回路９によってウェイティング処理やスレッショルド処理及び量子化されたＤＣＴ係数は局部復号ループ２０に入り、逆量子化回路１２によって逆ウェイティング処理及び逆量子化される。局部復号ループ２０で逆ウェイティング処理及び逆量子化されたＤＣＴ係数は逆ＤＣＴ回路１３によって復号化ブロックに変換される。次に復号化ブロックは加算器１４によって予測ブロックと画素単位で加算される。この予測ブロックは減算器３で用いたものである。
【００９３】
この加算器１４で加算された結果を出力ブロックとして画像メモリ５２の所定の位置に書き込む。画像メモリ５２は方向切換回路５１からの参照画像切換信号によって参照画像を切り換えて動き検出の探索範囲をＭＣ回路１６に出力する。この動き検出の探索範囲ブロックは例えばその大きさがｉ［画素］×ｊ［ライン］（ｉ≧ｍ， ｊ≧ｎ）である。ＭＣ回路１６には画像メモリ５２から出力された動き検出の探索範囲ブロックとブロック化回路２から出力された入力ブロックとがそれぞれ入力される。ＭＣ回路１６では入力されたそれぞれのブロックから動き検出を行い、その入力ブロックの動きベクトルを抽出する。
【００９４】
そしてＭＣ回路１６で動き検出により抽出された動きベクトルはＭＩＸ回路１７に入力される。ＭＩＸ回路１７はＭＣ回路１６から入力された動きベクトルと判別回路６で決定されたモード信号とを合成する。このようにしてＭＩＸ回路１７で合成された動きベクトルとモード信号とは第二符号化回路１８で伝送路１１に適した符号に変換され、対応する符号化されたブロックと共に伝送路１１に出力される。
【００９５】
また、ＭＣ回路１６から出力される予測ブロックはＭＣ回路１６にて動き検出の探索範囲から入力ブロックと等しい大きさｍ［画素］×ｎ［ライン］でブロック化されて出力される。この予測ブロックは第二スイッチ回路１９に入力され、現在処理されている入力ブロックのフィールド， 復号化ブロックのモード信号に応じてそれぞれの出力から出力される。第二スイッチ回路１９の一方の出力からは減算器３に処理フィールドに応じて予測ブロックが出力される。他方の出力からはその時の復号化ブロックのモード信号と処理フィールドとに応じて予測ブロックが出力される。
【００９６】
本発明では通常の映像の場合に図４のような予測方式を用いている場合にフレーム単位でシーンチェンジが生じるとシーンチェンジ直後の映像の符号化に際しイントラモードを選択するブロックが増加し、その後の参照画像を図２９のように切り換えることが可能である。
【００９７】
第３実施の形態について図３３， 図３４， 図３５のフローチャートを使用してその動作をまとめてみる。図３３は第３実施の形態の全体の動作を示すフローチャート、図３４， 図３５は図３３におけるステップＳ１０３のイントラフィールド処理， Ｓ１０４の予測フィールド処理の内容をそれぞれ示すフローチャートである。
【００９８】
まず動き補償処理単位内のフィールドを示すフィールド番号ｆｎ を０にセットする（ステップＳ１０１）。このフィールド番号ｆｎ は図４で説明すると、動き補償処理単位内の先頭のイントラフィールドＦ１をフィールド番号ｆｎ ＝０とし、予測フィールドＦ２をフィールド番号ｆｎ ＝１、次の予測フィールドＦ３のフィールド番号ｆｎ ＝２、動き補償処理単位内の最後の予測フィールドＦ４をフィールド番号ｆｎ ＝３とするものであり、今動き補償処理が開始された直後であるから始めの処理フィールドは必ず動き補償処理単位内の先頭フィールドであってイントラフィールドであるので、ステップＳ１０１ではフィールド番号ｆｎ ＝０にセットされる。またシーンチェンジの有無を判別するフラグとなる参照画像切換フラグＲｆｎ は後の予測フィールド処理時にセットされるが、ここでは初期化のためＲｆｎ ＝０としておく。
【００９９】
次に、フィールド番号ｆｎ ＝０かどうか、即ち動き補償予測処理単位内の先頭フィールドでイントラフィールドであるかどうかを判定する（ステップＳ１０２）。この時ｆｎ ＝０であればこのフィールドはイントラフィールドとして処理される（ステップＳ１０３）。一方、ｆｎ ≠０であればそのフィールドは予測フィールドとして処理される。これらの各処理は後に詳述する。各々のフィールドが処理された後、フィールド番号ｆｎ が次のフィールドを指し示すようにインクリメントされる（ステップＳ１０５）。なおこのようなフィールド番号は実際のハードウェアではマイコン等の信号で制御することが可能である。
【０１００】
続いて次のフィールドを指し示すフィールド番号ｆｎ が動き補償処理単位内のフィールドを指し示すような数値であるかどうかが判定され（ステップＳ１０６）、動き補償処理単位内のフィールドを指し示さないような数字例えば図４の例では動き補償処理単位が４フィールドで完結していて、イントラフィールドのフィールド番号ｆｎ を０と設定しているのでｆｎ ＝４というような数字であれば一連の動き補償予測単位が終了した事になり、ｆｎ ＜４であれば次のフィールドはまだ動き補償処理単位内であると判断し、処理がくり返される。
【０１０１】
一連の動き補償予測処理単位が終了した場合は、これで所望の全てのフィールドの処理が終了したかどうかが判定される（ステップＳ１０７）。これは例えばこの高能率符号化装置の終了スイッチが作動したかどうか等で判定される。そして次のフィールドを処理するのであれば次の動き補償予測処理単位の符号化のため、変数を初期化し、処理がくり返される。また高能率符号化装置の作動が終了ならば、符号化は終了する。
【０１０２】
次に、イントラフィールド処理について図３４のフローチャートで説明する。図３３のステップＳ１０２にてイントラフィールドとして処理されると決定したフィールドは、まず、その処理フィールド内で所定の大きさｍ［画素］×ｎ［ライン］にブロック化される（ステップＳ２０１）。次に、そのブロック化された大きさで例えばＤＣＴのような直交変換が施される（ステップＳ２０２）。直交変換されたデータは各々のシーケンスに設定された所定のビット数に量子化される（ステップＳ２０３）。
【０１０３】
ＤＣＴのような直交変換の場合普通直流や交流の中でも低次のシーケンスにはビット数を多く割り当て、交流の中でも高次のシーケンスにはビット数の割り当てを少なくするような量子化が行われる。量子化されたデータは伝送に適した符号に変換されて（ステップＳ２０４）、符号化されたデータが伝送される（ステップＳ２０５）。また処理ブロック数を数えるなどして１フィールドの処理が終了したかどうかを判定する（ステップＳ２０６）。１フィールド内の処理が終了していなければ再び次のブロックの処理が行われる。そして１フィールド内のブロックの処理が全て終了であればイントラフィールドの処理は終了する。
【０１０４】
次に、予測フィールド処理について図３５のフローチャートで説明する。図３３のステップＳ１０２にて予測フィールドとして処理されると決定したフィールドは、そのフィールドの前のフィールド処理時の参照画像切換フラグＲｆｎ−１ ＝０かどうか、すなわち現在処理しようとしているフィールドの前のフィールドの処理時にシーンチェンジを検出したかどうかを判定する（ステップＳ３０１）。Ｒｆｎ−１ ＝０であれば今までと同様の位置にある参照画像から動き補償予測を行い（ステップＳ３０２）、Ｒｆｎ−１ ＝１であればフィールド番号ｆｎ−１ を処理したときにシーンチェンジを検出しており、フィールド番号ｆｎ の動き補償予測には参照画像を切り換えて今までの位置ではなく異なった位置にあるフィールドの画像を参照画像として動き補償予測を行う（ステップＳ３０３）。
【０１０５】
次に、例えば処理を行う１フィールド内でイントラモードを選択したブロックの個数を数える変数ＣＯＵＮＴを０にセットする（ステップＳ３０４）。この変数ＣＯＵＮＴについては後で詳しく述べる。そして入力された画像はその処理フィールド内で所定の大きさｍ［画素］×ｎ［ライン］にブロック化される（ステップＳ３０５）。ｍ×ｎの大きさに分割されたブロックについて動き補償予測処理が施される（ステップＳ３０６）。この時ステップＳ３０２， Ｓ３０３のいずれかで設定した参照画像を用い、過去の画像の所定の領域と今分割したブロックとの画素単位の差分が誤差ブロックとして誤差電力算出回路４に入力され、その誤差電力Ｐ１が算出される（ステップＳ３０７）。即ち、設定された参照画像を用いることで動き補償予測により発生する情報量が少なくなる。また、今分割したブロックが原画電力算出回路５に入力され、原画交流電力Ｐ２が算出される（ステップＳ３０８）。
【０１０６】
各々算出された電力Ｐ１，Ｐ２はその大きさが比較される（ステップＳ３０９）。もし誤差電力Ｐ１が原画交流電力Ｐ２よりも小さければ、誤差ブロック（動き補償予測されたブロックの差分値）を選択する（ステップＳ３１０）。一方、誤差電力Ｐ１が原画交流電力Ｐ２より大きければ、入力ブロック（ブロック化されたままの原画）を選択し（ステップＳ３１１）、符号化ブロックとして入力ブロックが選択された回数、即ちイントラモードとして処理されるブロックが１フィールド内に幾つあるのかを数える（ステップＳ３１２）。この時のカウンタになる変数がステップＳ３０４で０にセットされたＣＯＵＮＴである。フィールド単位での処理が始まる時に必ず０にセットされ、１フィールドの処理中にイントラモードを選択したブロックの個数を数えていく。
【０１０７】
各々選択されたブロックは、直交変換を施され（ステップＳ３１３）、各々のシーケンスに設定された所定のビット数に量子化される（ステップＳ３１４）。例えばＤＣＴのような直交変換の場合普通直流や交流の中でも低次のシーケンスにはビット数を多く割り当て、交流の中でも高次のシーケンスにはビット数の割り当てを少なくするような量子化が行われる。量子化されたデータは伝送に適した符号に変換され（ステップＳ３１５）、符号化されたデータは伝送される（ステップＳ３１６）。処理ブロック数を数えるなどして１フィールドの処理が終了したかどうかを判定する（ステップＳ３１７）。１フィールド内の処理が終了していなければ再び次のブロックの処理が行われる。
【０１０８】
そして１フィールド内のブロックの処理が全て終了であればその１フィールドの処理内で符号化ブロックとして処理した入力ブロックの個数、すなわちイントラモードを選択したブロックの個数と予め設定してある閾値ＴＨとを比較する（ステップＳ３１８）。このＴＨは１フィールド内のブロックの個数以下の所定の数である。例えば１フィールド内の全ブロック数が２７００個であり、ＴＨはその２７００以下でＴＨ＝１０００というように設定される。符号化ブロックとして入力ブロックを選択した回数ＣＯＵＮＴが設定された閾値ＴＨよりも小さければ、今処理を行ったフィールド（フィールド番号ｆｎ ）とそのフィールドを動き補償予測するために使用した参照画像との間にはシーンチェンジがなく次のフィールド（フィールド番号ｆｎ＋１）の動き補償用の参照画像は通常通りの位置にある参照画像を使用するように参照画像切換フラグＲｆｎ ＝０にセットされる（ステップＳ３１９）。
【０１０９】
符号化ブロックとして入力ブロックを選択した回数ＣＯＵＮＴが設定された閾値ＴＨよりも大きければ、今処理を行ったフィールド（フィールド番号ｆｎ ）とそのフィールドを動き補償予測するために使用した参照画像との間にはシーンチェンジが存在し次のフィールド（フィールド番号ｆｎ＋１）の動き補償用の参照画像は通常通りの位置にある参照画像ではなく、今までとは異なった位置にあるフィールド、例えば今までは参照画像になるべき位置にはなかった、今処理し終えたフィールドを参照画像とするというように切り換える。そのために参照画像切換フラグＲｆｎ ＝１にセットされる（ステップＳ３２０） 。このように参照画像切換フラグＲｆｎ がセットされて、予測フィールド処理は終了する。
【０１１０】
図３６に第３実施の形態によって予測符号化を行ったときの５秒間の情報量の推移を、図３７に５秒間のＳ／Ｎの推移を示す。Ｂ点にシーンチェンジが存在するが、情報量の増加が図７のＡ点の場合よりも抑えられている。また目立ったＳ／Ｎ比の劣化もない。
【０１１１】
第４，第５実施の形態．
第３実施の形態において誤差ブロックと入力ブロックとから符号化ブロックを選択する方法としてそれぞれの電力を算出し、比較し、イントラモードを選択するブロックの個数を数えた。
【０１１２】
第４実施の形態は誤差ブロックと入力ブロックとから符号化ブロックを選択する方法としてそれぞれのブロック内でのエントロピーを算出し、第３実施の形態と同様に判別回路６で誤差ブロックのエントロピーと入力ブロックのエントロピーとを比較し、符号化ブロックとして誤差ブロックを選択するのか入力ブロックを選択するのかを決定するものである。
【０１１３】
第５実施の形態は誤差ブロックと入力ブロックとから符号化ブロックを選択する方法としてそれぞれのブロック内で画素の絶対値を加算し、入力ブロックと誤差ブロックとのそれぞれの絶対値和のｒ乗を算出し、第３実施の形態と同様に判別回路６で誤差ブロックの絶対値和のｒ乗と入力ブロックの絶対値和のｒ乗とを比較し、符号化ブロックとして誤差ブロックを選択するのか入力ブロックを選択するのかを決定するものである。
【０１１４】
第６実施の形態．
第３実施の形態において判別回路６にてそれぞれ入力ブロックと誤差ブロックとの電力を比較したが、第６実施の形態は入力ブロックの電力と誤差ブロックの電力とを比較する際に入力ブロックの電力もしくは誤差ブロックの電力の少なくとも一方にオフセットを与えた後に、両者をを比較するものである。例えば入力ブロックの電力に正のオフセットを与え誤差ブロックの電力と比較する。このようにすると入力ブロックの電力と誤差ブロックの電力とに大差がない場合、差分電力を選択するブロックが増加し過度のイントラモードの発生を防ぐことが可能である。
【０１１５】
第６実施の形態における予測フィールド処理を表すフローチャートを図３８に示す。図３８において、図３５と同ステップ番号を付した部分は同一部分を示す。まず、ステップＳ３０１からステップＳ３０８までは第３実施の形態と同様である。誤差ブロックより算出された誤差電力Ｐ１と、入力ブロック（原画ブロック）より算出された原画交流電力Ｐ２にαという所定のオフセットを加えたものとが比較される（ステップＳ３３０）。このようにすることでＰ１＜Ｐ２＋αの成立が第３実施の形態よりも難しくなり、イントラモードを選択するブロックの個数が少なくなる。そして過剰なイントラモードの発生が抑えられ、発生情報量も安定に保つことができる。その後のステップＳ３１０からステップＳ３２０までの動作は第３実施の形態と同様である。
【０１１６】
第７，第８実施の形態．
第７実施の形態は、第４実施の形態のように入力ブロックのエントロピーと誤差ブロックのエントロピーとを比較する際に、入力ブロックのエントロピーもしくは誤差ブロックのエントロピーの少なくとも一方にオフセットを与え、両者を比較するものである。例えば入力ブロックのエントロピーに正のオフセットを与え誤差ブロックのエントロピーと比較する。このようにすると入力ブロックのエントロピーと誤差ブロックのエントロピーとに大差がない場合、誤差ブロックを選択するブロックが増加し過度のイントラモードの発生を防ぐことが可能である。
【０１１７】
第８実施の形態は、第５実施の形態のように入力ブロックの絶対値和と誤差ブロックの絶対値和とを比較する際に、入力ブロックの絶対値和のｒ乗もしくは誤差ブロックの絶対値和のｒ乗の少なくとも一方にオフセットを与え、両者を比較するものである。例えば入力ブロックの絶対値和のｒ乗に正のオフセットを与え誤差ブロックの絶対値和のｒ乗と比較する。このようにすると入力ブロックの絶対値和のｒ乗と誤差ブロックの絶対値和のｒ乗とに与えたオフセット以上の差がない場合、誤差ブロックを選択するブロックが増加し過度のイントラモードの発生を防ぐことが可能である。
【０１１８】
第９実施の形態．
第３実施の形態においてモードカウンタ５０で１フィールド分のブロックの個数のうちイントラモードを選択したブロックの個数をすべて数えたが、第９実施の形態は、１フィールド分のブロックをカウントするのではなく、１フィールド期間中の所定のブロック数のモード信号が決定された時点で全ブロック数あるいはモード信号が決定されたブロック数に対するイントラモードを選択したブロックの個数の割合を方向切換回路５１に出力し、方向切換回路５１ではその割合から参照画像切換信号を出力する。このようにすることで１フィールド分の全てのブロックが符号化されなくても次のフィールドの参照画像を決定することが可能である。
【０１１９】
図３９は第９実施の形態の予測フィールド処理を示すフローチャートである。図３９において、図３５と同ステップ番号を付した部分は同一部分を示す。まず、ステップＳ３０１からステップＳ３０３までは第３実施の形態と同様である。次のフィールドの動き補償予測処理のための参照画像を設定した後（ステップＳ３０２， Ｓ３０３） 、例えば１フィールド処理するときにそのフィールド内で発生したイントラモードの回数、すなわち符号化ブロックとして入力ブロックを選択したブロックの個数を数える変数ＣＯＵＮＴとその１フィールド内の処理において現在までに処理しているブロックの個数を数える変数Ｂとを０にセットする（ステップＳ３４０）。
【０１２０】
その後、ステップＳ３０５からステップＳ３１６までは第３実施の形態と同様である。符号化した後、変数Ｂを１つずつインクリメントすることで現在までの処理ブロックの個数を数える（ステップＳ３４１）。Ｂは０から１フィールド内のブロックの個数の最大値まで変化する。次のフィールドの動き補償予測処理のための参照画像を切り換えるかどうかを判定するための参照画像切換判定処理が施される（ステップＳ３４２）。次のステップＳ３１７は第３実施の形態と同様である。
【０１２１】
図４０は図３９のステップＳ３４２の参照画像切換判定処理の内容を示すフローチャートであり、図４０を参照してその処理を説明する。参照画像切換フラグＲｆｎ が０かどうかを判別し（ステップＳ３５１）、フラグＲｆｎ が０でなければ処理は終了する。フラグＲｆｎ が０であれば、符号化ブロックとして入力ブロックを選択した回数ＣＯＵＮＴ及び１フィールド内の現在までの処理ブロックの個数を数える変数Ｂの比率と閾値ＴＨとを比較する（ステップＳ３５２）。その比率が閾値ＴＨより小さい場合には処理を終了し、その比率が閾値ＴＨより大きい場合にはそのフラグＲｆｎ が１にセットされ（ステップＳ３５３）、処理は終了する。
【０１２２】
第１０実施の形態．
次に、その構成を示す図４１を参照して第１０実施の形態について説明する。図４２において、１， ３〜６， ８〜１６， １８， ２０は図２示す従来装置と同様である。６０は入力される映像を蓄積する画像メモリ、６１は映像のシーンチェンジを検出し、その旨の信号を出力するＳＣ検出回路、６２は原画から切り出された入力ブロックと動き補償予測による予測ブロックから生成される誤差ブロックとを切り換える第一スイッチ回路、６３は動きベクトルと判別回路６からのブロックのモード信号とＳＣ検出回路５１からのＳＣ検出信号とを合成するＭＩＸ回路、６４は予測ブロックを切り換える第二スイッチ回路である。
【０１２３】
次に動作について説明する。動き補償予測はたとえば図４に示すような形で行うものとし４フィールドで完結するものとする。入力端子１から入力されたディジタル映像信号は、画像メモリ６０に蓄積される。画像メモリ６０は少なくとも２フィールド分のメモリから構成されており、一方にフィールドの映像信号を蓄積しながら他方からシーンチェンジ検出用あるいは処理用の映像データを所定の大きさにブロッキングして出力する。
【０１２４】
すなわち画像メモリ６０からまずＳＣ検出回路６１にディジタル映像信号が送られ、例えば映像の特徴を設定したパラメータより求め、シーンチェンジの有無を検出する。その後画像メモリ６０のもう一方の出力からディジタル映像信号が例えばｎ［画素］×ｍ［ライン］（ｍ， ｎは正の整数）の大きさでブロッキングされ出力される。このｍ［画素］×ｎ［ライン］の大きさは２次元の直交変換を行うブロックサイズであり、動き補償予測による予測ブロックのブロックサイズである。
【０１２５】
画像メモリ６０から出力された原画をブロッキングしただけの入力ブロックと減算器３によって動き補償予測された予測ブロックとの差分である誤差ブロックとが第一スイッチ回路６２に入力される。また入力ブロックと誤差ブロックとはそれぞれのブロックの電力を求めるため原画電力算出回路５と誤差電力算出回路４とに入力される。原画電力算出回路５では入力ブロックの交流電力が、そして誤差電力算出回路４では誤差ブロックの電力が算出される。それぞれ算出された入力ブロックの交流電力と誤差ブロックの電力とは判別回路６に入力される。判別回路６では誤差ブロックの電力の方が入力ブロックの電力より小さい場合には予測モード信号を、また入力ブロックの電力の方が誤差ブロックの電力よりも小さい場合にはイントラモード信号を、それぞれモード信号として第一スイッチ回路６２， ＭＩＸ回路６３及び第二スイッチ回路６４に出力する。
【０１２６】
入力ブロックと誤差ブロックとが入力された第一スイッチ回路６２は符号化ブロックとしてどちらか一方のブロックを出力する。そのため第一スイッチ回路６２はＳＣ検出回路６１からのシーンチェンジ検出信号と判別回路６からのモード信号とを受けてスイッチのモードを決定し、入力ブロック， 誤差ブロックのいずれか一方を符号化ブロックとして出力する。この時の切換状態を図４２に示す。今動き補償予測の処理過程が図４に示すように４フィールド完結であるから、通常モードはイントラフィールドが第１フィールドであり、その後予測フィールドが第２フィールドから第４フィールドまで３フィールド続き、またイントラフィールドが第１フィールド・・・というように続いていくモードのことである。
【０１２７】
図４２におけるＳＣ検出有無は、ＳＣ検出回路６１からのシーンチェンジ検出信号がシーンチェンジを検出していれば有、シーンチェンジを検出していなければ無を信号とする。判別モードは判別回路６からの出力で先に説明を付したモード信号のことである。なお図中のＸはＳＣ検出有無に関係なく、判別モードに関係なくということである。この図４２に示すように第一スイッチ回路６２は選択ブロックを決定し、その選択ブロックを符号化ブロックとして出力する。
【０１２８】
第一スイッチ回路６２で選択され出力された符号化ブロックはＤＣＴ回路８で２次元直交変換される。そして直交変換されたデータは量子化回路９でウェイティング処理（重み付け処理）やスレッショルド処理（しきい値処理）等が行われ、それぞれのシーケンスで所定のビット数に量子化される。量子化回路９で量子化されたデータは第一符号化回路１０で伝送路１１に適した符号に変換され、伝送路１１へ出力される。また量子化回路９で量子化されたデータは動き補償予測を行うために局部復号ループ２０にも入力される。局部複合ループ２０に入力されたデータは、まず逆量子化回路１２で逆量子化され、逆ウェイティング処理等を施された後、逆ＤＣＴ回路１３で逆直交変換を施される。逆ＤＣＴ回路１３出力である復号化ブロックは加算器１４において予測ブロックと画素単位で加算され再生画像となる。この時用いた予測ブロックは減算器３で用いたものと同一のものである。加算器１４で再生画像となったブロックは画像メモリ１５の所定の位置に書き込まれる。
【０１２９】
画像メモリ１５は予測方式によってその必要メモリ量が異なる。いま複数枚のフィールドメモリで構成されているとし、局部復号ループ２０で復元された出力ブロックを所定の位置に蓄積していく。この時蓄積される画像が動き補償予測の探索範囲のデータとして使用される。画像メモリ１５からＭＣ回路１６へは、過去の出力ブロックから再構成され、その再構成された画面から切り出された動き検出の探索範囲であるブロックが出力される。この動き検出用の探索範囲ブロックの大きさは、ｉ［画素］×ｊ［ライン］（ｉ≧ｍ， ｊ≧ｎ：ｉ、ｊは正の整数）である。ＭＣ回路１６には画像メモリ１５から動き補償予測の探索範囲のデータと画像メモリ６０からの入力ブロックとが参照データとして入力され、動きベクトルが抽出される。
【０１３０】
ＭＣ回路１６で抽出された動きベクトルは、ＭＩＸ回路６３に入力され、判別回路６で決定されたモード信号およびＳＣ検出回路からのＳＣ検出信号と合成される。合成された信号は、第二符号化回路１８で伝送路１１に適した符号に変換され、対応する符号化されたブロックと共に伝送路１１へ出力される。またＭＣ回路１６からは予測ブロックとして探索範囲から入力ブロックと等しい大きさ（ｍ［画素］×ｎ［ライン］）にブロック化された信号が出力される。ＭＣ回路１６から出力される予測ブロックは、過去の画像情報から生成されている。この予測ブロックは第二スイッチ回路６４に入力され、現在処理しているフィールド， 復号化ブロックのモード信号， ＳＣ検出回路５１からのＳＣ検出信号に応じて出力される。第二スイッチ回路５４の一方の出力からは減算器３に処理フィールド， ＳＣ検出信号に応じて予測ブロックが出力される。他方の出力からはその時の復号化ブロックのモード信号とＳＣ検出信号と処理フィールドとに応じて予測ブロックが出力される。
【０１３１】
この動き補償予測処理を図４３に示す。図４３では第２フィールドＦ２と第３フィールドＦ３との間にシーンチェンジがあるものとしている。第１フィールドＦ１から第２フィールドＦ２はシーンチェンジがないので第２フィールドＦ２は第１フィールドＦ１から予測される。第２， 第３フィールドＦ２， Ｆ３間のシーンチェンジが検出されて、第３フィールドＦ３は第１フィールドＦ１と同様イントラフィールドとなる。そして第４フィールドＦ４は第３フィールドＦ３から予測される。
【０１３２】
なおそのシーンチェンジより過去の映像から予測を行うことはない。そして第４フィールドＦ４の動き補償予測処理が終了すればまた次のフィールドをイントラフィールドとして動き補償予測処理を行っていく。よって動き補償予測処理がスタートしてからは必ず４フィールド毎にイントラフィールドが現れ、シーンチェンジが生じた場合にはその動き補償処理課程の間にもイントラフィールドが存在することになる。
【０１３３】
第１０実施の形態について図４４， 図４５のフローチャートを使用してその動作をまとめてみる。図４４は第１０実施の形態の全体の動作を示すフローチャート、図４５は図４４におけるステップＳ４０６の予測フィールド処理の内容を示すフローチャートである。
【０１３４】
まず、動き補償処理単位内のフィールドを示すフィールド番号を０にセットする（ステップＳ４０１）。このフィールド番号の設定は第３実施の形態と同じであり、今動き補償処理が開始された直後であるから始めの処理フィールドは必ず動き補償処理単位内の先頭フィールドであってイントラフィールドであるのでステップＳ４０１ではフィールド番号ｆｎ ＝０にセットされる。またシーンチェンジの有無を判別するためのフラグとなるシーンチェンジ検出フラグＣｆｎ は、ステップＳ４０１では初期化のため０としておく。
【０１３５】
次に、入力されてくる画像と過去の画像との性質を例えばあるパラメータで比較し、シーンチェンジの有無を検出する（ステップＳ４０２）。例えば過去の画像のいくつかの所定の領域の画素の値の分散と現処理画像の所定の領域の画素の値の分散とを比較することでシーンチェンジを検出する。シーンチェンジを検出するとシーンチェンジ検出フラグＣｆｎ ＝１にセットし、シーンチェンジを検出しなければシーンチェンジ検出フラグＣｆｎ ＝０にセットする。
【０１３６】
次に、フィールド番号ｆｎ ＝０かどうか、即ち動き補償予測処理単位内の先頭フィールドでイントラフィールドであるかどうかを判定する（ステップＳ４０３）。この時ｆｎ ＝０であればこのフィールドはイントラフィールドとして処理され（ステップＳ４０５）、ｆｎ ≠０であれば次のステップＳ４０４へ処理が進む。シーンチェンジ検出フラグＣｆｎ ＝０かどうか、即ちその処理フィールドとそのフィールドを動き補償予測で符号化するために必要な参照画像との間にシーンチェンジが存在するかどうかを判定する（ステップＳ４０４）。
【０１３７】
Ｃｆｎ ＝０であればシーンチェンジは存在せず、その現在処理使用としているフィールドは予測フィールドとして処理され（ステップＳ４０６）、Ｃｆｎ ＝１であればシーンチェンジが存在するので新たに現在処理しようとしているフィールドはイントラフィールドとして処理される（ステップＳ４０５）。従って動き補償予測処理単位内であってｆｎ ＝０でなくてもシーンチェンジが検出され、Ｃｆｎ ＝１であればそのフィールドの処理はイントラフィールドとして処理される。
【０１３８】
各々のフィールドが処理された後、フィールド番号ｆｎ が次のフィールドを指し示すようにフィールド番号がインクリメントされる（ステップＳ４０７）。なおこのようなフィールド番号は実際のハードウェアではマイコン等の信号で制御することが可能である。
【０１３９】
続いて次のフィールドを指し示すフィールド番号が動き補償処理単位内のフィールドを指し示すような数値であるかどうかが判定される（ステップＳ４０８）。動き補償処理単位内のフィールドを指し示さないような数字例えば図４の例では、動き補償予測の処理単位が４フィールドで完結であり、イントラフィールドのフィールド番号ｆｎ が０に設定してあるのでｆｎ ＝４というような数字であれば一連の動き補償予測単位が終了した事になり、ｆｎ ＜４であれば次のフィールドはまだ動き補償処理単位内であると判断し、次のフィールド処理のためシーンチェンジの検出から再び行われる。
【０１４０】
一連の動き補償予測処理単位が終了した場合は、これで所望の全てのフィールドの処理が終了したかどうかが判定され（ステップＳ４０９）。これは例えばこの高能率符号化装置の終了スイッチが作動したかどうか等で判定される。そして次のフィールドを処理するのであれば次の動き補償予測処理単位の符号化のため、変数を初期化し、シーンチェンジ検出から再び行われる。また高能率符号化装置の作動が終了ならば、符号化は終了する。
【０１４１】
次に、第１０実施の形態における予測フィールド処理（図４４のステップＳ４０６） について図４５のフローチャートで説明する。図４４のステップＳ４０４にて予測フィールドとして処理されると決定したフィールドは、そのフィールド内でその処理フィールド内で所定の大きさｍ［画素］×ｎ［ライン］にブロック化される（ステップＳ４５１）。ｍ×ｎの大きさに分割されたブロックが動き補償予測され（ステップＳ４５２）、過去の画像の所定の領域と今分割したブロックとの画素単位の差分である誤差ブロックからその誤差電力Ｐ１を算出する（ステップＳ４５３）。またブロック化されたままのブロックの状態での原画交流電力Ｐ２を算出する（ステップＳ４５４）。
【０１４２】
各々算出された電力Ｐ１， Ｐ２はその大きさが比較される（ステップＳ４５５）。誤差電力Ｐ１が原画交流電力Ｐ２よりも小さければ、誤差ブロック（動き補償予測されたブロックの差分値）を選択し（ステップＳ４５６）、一方、誤差電力Ｐ１が原画交流電力Ｐ２より大きければ、入力ブロック（ブロック化されたままの原画）を選択する（ステップＳ４５７）。各々選択されたブロックは直交変換を施された後（ステップＳ４５８）、各々のシーケンスに設定された所定のビット数に量子化される（ステップＳ４５９）。
【０１４３】
例えばＤＣＴのような直交変換の場合普通直流や交流の中でも低次のシーケンスにはビット数を多く割り当て、交流の中でも高次のシーケンスにはビット数の割当を少なくするような量子化が行われる。量子化されたデータは伝送に適した符号に変換され（ステップＳ４６０）、符号化データは伝送される（ステップＳ４６１）。また処理ブロック数を数えるなどして１フィールドの処理が終了したかどうかを判定する（ステップＳ４６２）。１フィールド内の処理が終了していなければ再びブロックの処理が行われる。そして１フィールド内のブロックの処理が全て終了であれば予測フィールドの処理を終了する。
【０１４４】
第１０実施の形態では、図４３に示すように動き補償予測過程でシーンチェンジが生じたときにそのシーンチェンジ直後のフィールドをイントラフィールドとすることでシーンチェンジ直後の画像の主観的評価を向上させることができる。
【０１４５】
第１１実施の形態．
第１０実施の形態において図４３に示すようにたとえ動き補償予測処理過程でシーンチェンジが生じ、その直後のフィールドをイントラフィールドにしても動き補償処理過程の時間的拘束長は４フィールドで固定である。すなわち動き補償予測処理がスタートしてからは必ず４フィールド毎にイントラフィールドが現れ、シーンチェンジが生じた場合にはその動き補償処理課程の間にもイントラフィールドが存在することになる。これは予測フィールドをイントラフィールドに置き換えた構成である。
【０１４６】
第１１実施の形態では図４６に示すようにシーンチェンジが生じ、その直後のフィールドをイントラフィールドとするとそのイントラフィールドは新たな動き補償処理過程の先頭フィールドとするものである。すなわち動き補償処理過程の時間的拘束長が可変であるということである。通常は例えば図４６に示すように動き補償処理過程の時間的拘束長を４フィールドとしておき、その動き補償処理過程でシーンチェンジが生じたときはそのシーンチェンジの直後のフィールドを新たなイントラフィールドとしてそのフィールドを先頭に４フィールド単位の動き補償予測処理を行う。またその動き補償処理過程内でシーンチェンジが生じれば同様にそのシーンチェンジの直後のフィールドをイントラフィールドとしてそのフィールドを先頭に４フィールド単位の動き補償予測処理を行う。
【０１４７】
図４７は第１１実施の形態の全体のフローチャートを示したものである。図４７において、図４４と同ステップ番号を付した部分は同一部分を示す。まず、ステップＳ４０１からステップＳ４０６までは第１０実施の形態と同様である。ステップＳ４０５， Ｓ４０６におけるイントラフィールド処理， 予測フィールド処理は第１０実施の形態と同様である。ステップＳ４０５にてイントラフィールドとして処理されたフィールドに対し、その処理されたフィールドを先頭フィールドとする動き補償予測処理単位に切り換えるためフィールド番号ｆｎ ＝０とする（ステップＳ４９０）。
【０１４８】
例えば図４６に示すように第１０実施の形態によるとたとえイントラフィールドとして処理をされていてもフィールド番号ｆｎ は０→１→２→３→０→・・・からと順番に変化したが、第１１実施の形態の場合は動き補償処理単位内の先頭フィールドでもないのにイントラフィールドとしてそのフィールドが処理された場合、強引にそのフィールドのフィールド番号ｆｎ ＝０にセットし、そのフィールドを新たな動き補償処理単位内の先頭フィールドとする。このことによって動き補償処理単位の時間的拘束長が可変になり、シーンチェンジがその時設定している動き補償処理単位の時間的拘束長に比べ、時間的に短い頻度で出現すればその動き補償処理単位の時間的拘束長は短いものの連続となる。なお、次のステップＳ４０７からステップＳ４０９までは第１０実施の形態と同様である。
【０１４９】
第１１実施の形態のようにすることでシーンチェンジ直後の画像をイントラフィールドとして主観的評価を向上させることができる。またシーンチェンジの起こる頻度が動き補償処理単位の時間的拘束長よりも長くその絶対数が少なければ、イントラフィールドのフィールド数が第３実施の形態の場合より少なくなり情報量を削減することができる。
【０１５０】
第１２実施の形態．
第１０実施の形態，第１１実施の形態ではシーンチェンジを検出したフィールド（またはフレーム）をイントラフィールド（またはイントラフレーム）として処理を行ったが、イントラフィールド（またはイントラフレーム）とはせずにそのフィールド（またはフレーム）の参照画像を次の動き補償予測処理単位に属しているイントラフィールド（またはイントラフレーム）にしてもかまわない。
【０１５１】
第１２実施の形態について図４８で説明する。図４８（ａ） に図４に示した方式で通常の場合の動き補償予測処理を行っている様子を示す。この場合、イントラフィールドはフィールドＦ１０ とフィールドＦ１４ である。このフィールドＦ１０ とフィールドＦ１４ とを動き補償予測処理単位の先頭フィールドとして動き補償予測が行われる。そして、図４９（ｂ） に示すように、今シーンチェンジがフィールドＦ１１ とフィールドＦ１２ との間で生じ、フィールドＦ１２ でシーンチェンジが検出されるとフィールドＦ１２ からそのフィールドＦ１２ を含む動き補償予測処理単位の最後のフィールド、この場合フィールドＦ１３ までを次の動き補償予測処理単位に結合し、フィールドＦ１２ 、フィールドＦ１３ は次の動き補償予測処理単位に属しているイントラフィールドを参照画像として動き補償予測を行う。この時結合された次の動き補償予測処理単位においては通常の動き補償予測処理と上記で付加されたフィールドの動き補償予測処理を行う。
【０１５２】
第１３実施の形態．
第１２実施の形態では動き補償予測の処理単位が通常の場合より長くなることがあった。第１３実施の形態ではシーンチェンジを検出したフィールド（またはフレーム）から通常の動き補償予測処理単位の長さであるＰフィールド（またはＰフレーム）分を動き補償予測処理する。
【０１５３】
第１３実施の形態について図４９で説明する。図４９（ａ） に図４に示した方式で通常の場合の動き補償予測処理を行っている様子を示す。この場合イントラフィールドはフィールドＦ１０ とフィールドＦ１４ とである。このフィールドＦ１０ とフィールドＦ１４ とを動き補償予測処理単位の先頭フィールドとして動き補償予測が行われる。図４９（ｂ） に示すように、今シーンチェンジがフィールドＦ１１ とフィールドＦ１２ との間で生じ、フィールドＦ１２ でシーンチェンジが検出されるとシーンチェンジが検出されたフィールドＦ１２ から４フィールド（動き補償予測処理単位が４フィールドのため）を動き補償予測の処理単位とし、通常であれば次の動き補償予測処理単位の先頭フィールドでイントラフィールドであったフィールドＦ１４ をその時の動き補償処理単位内のイントラフィールドとし、動き補償予測処理を行う。そしてフィールドＦ１２ から４フィールド分、すなわちフィールドＦ１５ までの動き補償予測処理が終了するとフィールドＦ１６ からは元の通常の動き補償予測処理を行う。
【０１５４】
第１４実施の形態．
第３実施の形態〜第１３実施の形態ではシーンチェンジについての切換を述べたが、ブロックの強制的なイントラモードの発生の数に応じて参照画像を切り換えているので、強制的なイントラモードが数多く出現するような映像、すなわち１フィールド前までは存在しなかった物体または１フィールド前までは存在していた物体が、突然フィールドに現れるかまたは突然フィールドから消滅するような場合にも同様な方法で参照画像を切り換える事が可能である。
【０１５５】
第１５実施の形態．
第３実施の形態〜第１３実施の形態までは例えば図４のような動き補償予測処理を行っている場合から図２９のような動き補償予測処理に切り換えたが、例えば図５０のように切り換える前はどのような動き補償予測処理を行っていてもよく、シーンチェンジ等を検出後例えば図２９のような切り換える前より発生情報量の減少する動き補償予測処理に切り換える。
【０１５６】
第１６実施の形態．
第３実施の形態〜第１５実施の形態は４フィールド単位の動き補償予測処理について述べたが、４フィールド単位でなくてもよく、動き補償予測処理を行い得る任意のフールド数でも行うことが可能である。
【０１５７】
第３〜第１６実施の形態では、前記のようなハードウェアの追加によりメモリ量をあまり増加させずに例えば図５０に示すようにシーンチェンジが動き補償予測の処理単位内に生じた場合でも初めに設定されている参照画像からシーンチェンジ等の影響をできるだけ受けないように参照画像を切り換え、シーンチェンジ直後の映像を動き補償予測の参照画像とし、そのシーンチェンジを検出以後その検出したシーンチェンジ以前のフィールドを動き補償予測の参照画像としないことによって、シーンチェンジによる符号量の増加を最小に抑えてかつ映像の質を劣化させることなく伝送することが可能である。
【０１５８】
普通シーンチェンジをはさんで動き補償予測を行うと予測画像の情報量が増加する。そこで、その情報量と同等の情報量でイントラ画像としてそのフィールドを処理すると画像の主観的評価が向上する。シーンチェンジを検出することでそのシーンチェンジ直後の画像をイントラ画像としてフィールド内符号化、フレーム内符号化を行うことでシーンチェンジ直後の画像の主観的評価を向上させることができる。またシーンチェンジが生じたときにその直後の画像をイントラ画像として扱い、そのイントラ画像を先頭の画像として動き補償予測を行うことで発生するイントラ画像の数を少なくすることができ、発生情報量を削減することができる。
【０１５９】
第１７実施の形態．
図５１は本発明による映像情報記録装置及び映像情報再生装置の構成を示すブロック図である。図５１において、１０１ 〜１１１ は図１８または図２４における従来装置と同じものである。
【０１６０】
記録動作について説明する。Ａ／Ｄ変換器１０１ に入力された映像信号は、ディジタル映像信号に変換され、高能率符号化器１１０ へ出力される。高能率符号化器１１０ では、映像情報の自己相関や人間の視覚特性、データ発生頻度の偏りなどを利用した冗長度の削減を行い、情報の圧縮（詳細は後述する）を行う。高能率符号化器１１０ の出力は誤り訂正エンコーダ１０２ に入力され、記録再生における伝送路誤りを訂正するための誤り訂正符号が付加される。
【０１６１】
高密度の記録を行うため、また圧縮された情報は少しの誤りでも影響が広範囲におよぶため、誤り訂正能力が高く、しかも付加する情報の少ない符号が選ばれている。誤り訂正符号が付加されたデータは、変調器１０３ で磁気ヘッド１０６ と磁気テープ１０５ とに適した記録信号に変調される。アジマス記録のためのＤＣ成分および低域成分の抑圧や、磁気ヘッド１０６ のトレースを助けるトラッキング信号の付加なども変調器１０３ で行われる。変調器１０３ で変調された記録信号は磁気ヘッド１０６ を通して磁気テープ１０５ に記録される。なお、磁気ヘッド１０６ は回転ヘッド・ドラム１０４ に搭載されており、ドラム１０４ が回転することにより磁気ヘッド１０６ も回転し、磁気テープ１０５ には、いわゆるヘリキャル・スキャンで記録される。
【０１６２】
次に再生動作について説明する。ヘリキャル・スキャンで磁気テープ１０５ に記録された信号は、回転ヘッド・ドラム１０４ に搭載された磁気ヘッド１０６ にてピックアップされ復調器１０７ で復調される。復調された信号は、誤り訂正デコーダ１０８ で誤りの検出および誤り訂正が行われる。誤り訂正済みのデータは高能率復号化器１１１ で伸長され圧縮符号から元のディジタル映像信号になる。復元されたディジタル映像信号はＤ／Ａ変換器１０９ でアナログの映像信号に変換されて出力される。
【０１６３】
図５２、図５３に第１７実施の形態におけるテープフォーマットの一例を示す。４フィールドの映像情報（｛７２０ ＋ ３６０×２｝×４８０ ×４／２ ＝１１．０６Ｍビット）は約１．３Ｍビットに圧縮符号化され、音声信号、誤り訂正符号などと共に１０本のトラックに分割して記録される。この場合アジマス方式のガードバンドレス記録で、面積記録密度は約 ２．５μｍ^２ ／ｂｉｔ となる。
【０１６４】
図５４は、図５１における高能率符号化器１１０ の内部構成を示すブロック図である。図５４において、３０１ は入力原信号と予測信号との差分を出力する減算器、３０２ は入力原信号と減算器３０１ の出力とを選択する第一スイッチ、３０３ はＤＣＴの直交変換を行うＤＣＴ回路、３０４ は符号化するデータを量子化する量子化器、３０５ は頻度が高いデータに短い符号を割当て統計的なデータの冗長度を除く可変長符号化器である。
【０１６５】
また３０６ 〜３１１ は、予測信号を求めるローカル復号器を構成しており、３０６ は量子化データを元にもどす逆量子化器、３０７ は逆ＤＣＴを施す逆ＤＣＴ回路、３０８ は予測信号と差分信号とを加算し元の信号を復元する加算器、３０９ はローカル復号した映像データを蓄えておく画像メモリ、３１０ は入力原信号の動きを検出し次の予測データを出力する動き補償予測回路、３１１ は加算器３０８ に入力するデータを切換える第二スイッチである。
【０１６６】
次に高能率符号化器１１０ の動作を説明する。記録単位ブロックの最初のフィールドは、面間予測を用いないイントラフィールドとして符号化する。第一スイッチ３０２ は上側が選択されており、入力されたディジタル映像信号は、ＤＣＴ回路３０３ で直交変換される。変換されたデータは量子化器３０４ で量子化され、可変長符号化器３０５ でハフマン符号などの可変長符号に符号化され出力される。また同時に量子化されたデータは逆量子化器３０６ で逆量子化され、逆ＤＣＴ回路３０７ に入力される。逆ＤＣＴ回路３０７ では直交変換されたデータが元の画像データに逆変換され、加算器３０８ へ出力される。イントラフィールドでは、第二スイッチ３１１ も上側が選択されており、従って加算器３０８ の一方の入力が零になるので、逆ＤＣＴ回路３０７ の出力はそのまま画像メモリ３０９ に入り記憶される。
【０１６７】
次のフィールドの符号化には、面間予測を用いる。面間予測では第一， 二スイッチ３０２，３１１ は下側が選択されている。入力されたディジタル映像信号は、減算器３０１ と動き補償予測回路３１０ とに入る。動き補償予測回路３１０ では、記憶された画像と入力された画像とを比較し、入力画像の動きベクトルと予測符号化に用いる予測画像とを出力する。減算器３０１ では、入力画像と予測画像との差分を計算し、予測誤差信号としてＤＣＴ回路３０３ へ出力する。予測誤差信号は生の画像信号と比較して、その予測精度が高いほど、情報量が減少している。例えば、全くの静止画ならばその誤差信号は零になる。
【０１６８】
ＤＣＴ回路３０３ へ入力されたデータは最初のフィールドと同じように、ＤＣＴ回路３０３，量子化器３０４ でそれぞれ直交変換， 量子化が行われ、更に可変長符号化器３０５ で可変長符号に変換され出力される。一方、量子化されたデータは逆量子化器３０６ を通して逆ＤＣＴ回路３０７ へ送られ、逆量子化と逆直交変換とを受けた後、加算器３０８ に入る。加算器３０８ の他方の入力には、予測誤差を求めたとき用いた予測画像が入力されており、加算器３０８ の出力としては入力画像と同じものが得られる。加算器３０８ の出力は画像メモリ３０９ に記憶される。以下同様にｎフィールドまで符号化される。
【０１６９】
図５５には、フレーム毎のデータ発生量の変化の一例を示す。この例では８フレーム毎に面間予測を用いないイントラフレームが挿入され情報量が多くなっていることが分かる。また、図５６には、各フィールドの記録情報とトラックへの書き込み関係の一例を示す。この例では、４フィールドのデータを１０本のトラックに記録している。フィールド１つのデータ量は、トラックの記録容量の整数倍でなくてよい。
【０１７０】
第１８実施の形態．
第１７実施の形態では、４フィールドのデータを１０本のトラックに記録していたが、毎回１０本のトラックに記録する必要はなく、記録する情報量に応じて８本または６本のトラックに記録してもよい。
【０１７１】
以上のように、第１７， 第１８実施の形態では、複数のフィールドまたはフレームの信号をまとめて１つの記録単位として所定の数のトラックに記録するため、所定の数のトラックを再生すれば、記録したフィールドが全て再現できるので、ＶＴＲに要求される特殊再生や編集に対応することができる。また、記録する情報量に応じて、記録するトラックの数を選択するので、無駄なトラックが発生せず、長時間の記録再生をすることができる。また、記録する情報を、各トラックの記録容量に合わせる必要が無いので、各トラック毎に発生する無駄がなく、効率の良い記録をすることができる。更に、各記録単位の中には必ず面間予測を用いないイントラ画像があるので、スピードサーチなどの特殊再生時に、容易に復元画像が得られる。また、面間予測を使用した予測画像より、記録する情報量を低減することができる。
【０１７２】
【発明の効果】
以上詳述したように本発明に係る映像情報記録装置及び映像情報再生装置は、複数のフィールド（またはフレーム）の信号をまとめて１つの記録単位として所定数のトラックに記録し、またこれにより、ＶＴＲ等に要求される特殊再生，編集に対応することができる効果を奏する。
【図面の簡単な説明】
【図１】ディジタルＶＴＲの構成を示すブロック図である。
【図２】従来の動き補償予測処理装置を示すブロック構成図である。
【図３】従来の動き補償予測処理装置におけるブロック選択の動作を示す図である。
【図４】動き補償予測処理におけるフィールド関係を示す図である。
【図５】動き補償予測処理におけるフィールド関係を示す図である。
【図６】従来の動き補償予測の場合の符号量とＳ／Ｎと示す図である。
【図７】参照画像を切り換えない場合の５ｓｅｃ 間の情報量の推移を示す図である。
【図８】参照画像を切り換えない場合の５ｓｅｃ 間のＳ／Ｎの変化を示す図である。
【図９】８ミリビデオ規格におけるテープフォーマットを示す図である。
【図１０】８ミリビデオ規格における１トラックのフォーマットを示す図である。
【図１１】８ミリビデオで使用される回転ヘッド・ドラムと磁気テープとの巻き付け状態を示す図である。
【図１２】８ミリビデオ規格における各信号の周波数アロケーションを示す図である。
【図１３】従来の映像情報記録再生装置の構成を示すブロック図である。
【図１４】従来の映像情報記録再生装置の構成を示すブロック図である。
【図１５】図１３、図１４に示す映像情報記録再生装置におけるヘッド切換え用パルス信号と入力映像信号との位相関係を示すタイミング図である。
【図１６】図１３、図１４に示す映像情報記録再生装置におけるゲート回路で処理された映像信号を示す波形図である。
【図１７】図１３、図１４に示す映像情報記録再生装置における時間軸多重信号を示す波形図である。
【図１８】従来の他の映像情報記録再生装置の構成を示すブロック図である。
【図１９】Ｄ１方式， Ｄ２方式ＶＴＲのテープフォーマットを示す図である。
【図２０】Ｄ１方式， Ｄ２方式ＶＴＲの全体仕様を示す図である。
【図２１】Ｄ１方式， Ｄ２方式ＶＴＲのテープフォーマット諸元を示す図である。
【図２２】Ｄ１方式， Ｄ２方式ＶＴＲの走行系諸元を示す図である。
【図２３】Ｄ１方式， Ｄ２方式ＶＴＲの記録される画素範囲を示す図である。
【図２４】高能率符号映像情報圧縮方式の通信装置の構成を示すブロック図である。
【図２５】高能率符号通信装置のバッファオペレーションを説明する図である。
【図２６】本発明の高能率符号化装置の構成を示すブロック図である。
【図２７】動き補償予測処理におけるフィールド関係を示す図である。
【図２８】本発明の他の高能率符号化装置の構成を示すブロック図である。
【図２９】動き補償予測処理におけるフィールド関係を示す図である。
【図３０】シーンチェンジが存在する場合のシミュレーション結果を示す図である。
【図３１】シーンチェンジが存在しない場合のシミュレーション結果を示す図である。
【図３２】本発明の更に他の高能率符号化装置の構成を示すブロック図である。
【図３３】図３２に示す高能率符号化装置の動作のフローチャートである。
【図３４】図３３におけるイントラフィールド処理のフローチャートである。
【図３５】図３３における予測フィールド処理のフローチャートである。
【図３６】参照画像を切り換えた場合の５ｓｅｃ 間の情報量の推移を示す図である。
【図３７】参照画像を切り換えた場合の５ｓｅｃ 間のＳ／Ｎの変化を示す図である。
【図３８】図３３における他の予測フィールド処理のフローチャートである。
【図３９】図３３における更に他の予測フィールド処理のフローチャートである。
【図４０】図３９における参照画像切換判定処理のフローチャートである。
【図４１】本発明の更に他の高能率符号化装置の構成を示すブロック図である。
【図４２】図４１に示す高能率符号化装置におけるブロック選択の動作を示す図である。
【図４３】図４１に示す高能率符号化装置における参照画像とイントラフィールドとの切り換えを示す図である。
【図４４】図４１に示す高能率符号化装置の動作のフローチャートである。
【図４５】図４４における予測フィールド処理のフローチャートである。
【図４６】図４１に示す高能率符号化装置における参照画像とイントラフィールドとの他の切り換えを示す図である。
【図４７】図４１に示す高能率符号化装置の他の動作のフローチャートである。
【図４８】動き補償予測処理におけるフィールド関係を示す図である。
【図４９】動き補償予測処理におけるフィールド関係を示す図である。
【図５０】参照画像の切り換えを示す図である。
【図５１】本発明の映像情報記録装置及び映像情報再生装置の構成を示すブロック図である。
【図５２】本発明によるテープフォーマットの一例を示す図である。
【図５３】本発明によるテープフォーマットの一例を示す図である。
【図５４】図５１における高能率符号化器の内部構成を示すブロック図である。
【図５５】フレーム毎のデータ発生量の変化の一例を示す図である。
【図５６】本発明による各フィールドの記録情報とトラックへの書き込みとの関係を説明する図である。
【符号の説明】
２ ブロック化回路、４ 誤差電力算出回路、５ 原画電力算出回路、６ 判別回路、７ 第一スイッチ回路、１６ ＭＣ回路、１９ 第二スイッチ回路、３０ 動き補償予測回路、３１ 判定器、３２ 第１スイッチ、３３ 直交変換回路、３４ 量子化回路、３５ 第２スイッチ、３６ 逆量子化回路、３７ 逆直交変換回路、４０ 判定器、５０ モードカウンタ、５１ 方向切換回路、５２ 画像メモリ、６０ 画像メモリ、６１ ＳＣ検出回路、６２ 第一スイッチ回路、６４ 第二スイッチ回路、１０３ 変調器、１０７ 復調器、１１０ 高能率符号化器、１１１ 高能率復号化器。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a video information recording apparatus and a video information reproducing apparatus for digital signals such as a video tape recorder (hereinafter abbreviated as VTR), a video disk player, an audio tape recorder and the like for digitally recording and reproducing video signals and audio signals. Is.
[0002]
[Prior art and problems to be solved by the invention]
Data compression is indispensable for consumer digital VTRs in terms of cost and hardware scale. Therefore, data compression will be described mainly using a consumer digital VTR as an example.
[0003]
FIG. 1 is a simple block diagram of a consumer digital VTR. Reference numeral 900 denotes an input terminal for inputting an analog video signal such as a television signal. 901 is an A / D converter that converts an analog video signal into a digital video signal, 902 is a data compression unit that compresses the information amount of the digital video signal to reduce the information amount, and 903 is an error so that error correction can be performed during reproduction. An error correction encoding unit for adding a correction code, 904 is a recording modulation unit that modulates a recording suitable code for recording, 905 is a recording amplifier that amplifies the recording signal, and 906 is a magnetic that records and accumulates the recording signal It is a tape. Reference numeral 907 denotes a head amplifier that amplifies the reproduction signal reproduced from the magnetic tape 906, 908 denotes a reproduction demodulation unit that demodulates the reproduction signal, and 909 denotes an error correction decoding unit that performs error correction on the signal reproduced and demodulated using the error correction code. , 910 is a data decompression unit that restores the compressed data to its original form, 911 is a D / A converter that converts a digital video signal to an analog video signal, and 912 is an output terminal.
[0004]
Next, the data compression unit (high efficiency encoding device) 902 will be described. FIG. 2 shows a block diagram of a high-efficiency encoding apparatus based on unidirectional motion compensation inter-frame prediction. 1 is a digital video input terminal, 2 is a blocking circuit that blocks the digital video input signal, 3 is a subtractor that outputs an error signal between the input block and the prediction block as an error block, and 4 is the power of the error block. Error power calculation circuit, 5 is an original image power calculation circuit for calculating the AC power of the input block, 6 is a discrimination circuit for comparing the error power and the original image AC power to determine the prediction mode or the intra mode, and 7 is the determined mode A first switch circuit that selectively outputs a coding block based on the above, 8 a DCT circuit that performs a discrete cosine transform (hereinafter abbreviated as DCT) that is orthogonal transform on the coding block, and 9 a quantization circuit that quantizes the DCT coefficients, Reference numeral 10 denotes a first encoding circuit that performs encoding suitable for the transmission path, and reference numeral 11 denotes a transmission path.
[0005]
12 is an inverse quantization circuit that inversely quantizes the quantized DCT coefficient, 13 is an inverse DCT circuit that performs inverse DCT on the inversely quantized DCT coefficient, and 14 is a decoding signal that is an output signal of the inverse DCT circuit 13 An adder for adding a prediction block to a generalized block to generate an output block, 15 an image memory for storing an output block for performing motion compensation prediction, and 16 a motion compensation search cut out from a past video stored in the image memory 15 An MC circuit that performs motion compensation prediction from the block and the current input block, 17 is a MIX circuit that synthesizes the motion vector and the mode signal determined by the discrimination circuit 6, and 18 is an output of the MIX circuit 17. A second encoding circuit 19 for encoding is a second switch circuit for switching the prediction block in accordance with the mode in the discrimination circuit 6. The error power calculation circuit 4, the original image power calculation circuit 5, the discrimination circuit 6, the inverse quantization circuit 12, the inverse DCT circuit 13, the adder 14, the image memory 15, the MC circuit 16, and the second switch circuit 19 are used for local decoding. A loop 20 is configured.
[0006]
Next, the operation will be described. The input digital video signal is m [pixel] × n [line] (m and n are positive) by the blocking circuit 2 regardless of an intra field where motion compensation prediction is not performed and a prediction field (inter field) where motion compensation prediction is performed. Are divided into input blocks having one unit as a unit. In order to obtain an error block, the difference between the input block and the prediction block is calculated in the subtracter 3. In this way, the input block and the error block are input to the first switch circuit 7 respectively. The error power of the error block is calculated by the error power calculation circuit 4.
[0007]
On the other hand, the AC power of the original image is calculated by the original image power calculation circuit 5 for the input block. The two calculated powers are compared by the discrimination circuit 6 and the first switch circuit 7 is controlled so that the block with the smaller power is selected as the encoding target. That is, the determination circuit 6 outputs a prediction mode signal if the error power is smaller than the original AC power, and conversely outputs an intra mode signal if the original AC power is smaller than the error power.
[0008]
The first switch circuit 7 outputs an input block or an error block as a coding block based on the mode signal determined by the discrimination circuit 6. However, when the processing screen is an intra field, the operation is performed so that all the encoded blocks to be output become input blocks. This switching state is shown in FIG. In the normal mode, as shown in FIG. 4, in the motion compensated prediction process with four fields completed, the first first field F1 among the four fields is always an intra field, and the subsequent three second, third, and fourth fields. This is a mode in which F2, F3, and F4 are prediction fields.
[0009]
The coding block selected by the first switch circuit 7 is converted into DCT coefficients by the DCT circuit 8, and further, weighting (weighting) processing and threshold (threshold) processing are performed by the quantization circuit 9, and each coefficient is converted into a coefficient. It is quantized to a predetermined number of bits. The quantized DCT coefficient is converted into a code suitable for the transmission path 11 by the first encoding circuit 10 and output to the transmission path 11.
[0010]
The quantized DCT coefficient enters the local decoding loop 20 and reconstructs an image for the next motion compensation prediction. The quantized DCT coefficient that has entered the local decoding loop 20 is subjected to inverse weighting processing and inverse quantization by the inverse quantization circuit 12, and is further converted from the DCT coefficient to a decoded block by the inverse DCT circuit 13. The decoded block is added to the prediction block by the adder 14 in units of pixels to restore the image. This prediction block is the same as that used in the subtracter 3. The output of the adder 14 is written at a predetermined position in the image memory 15 as an output block. The required amount of memory for the image memory 15 differs depending on the prediction method. Assume that a plurality of field memories are used, and the restored output block is written at a predetermined position.
[0011]
From the image memory 15 to the MC circuit 16, a block that is a motion detection search range cut out from the screen reconstructed by the past output blocks is output. The size of the search range block for motion detection is i [pixel] × j [line] (i ≧ m, j ≧ n: i, j are positive integers). The MC circuit 16 receives the search range data from the image memory 15 and the input block from the blocking circuit 2 as data, and extracts motion vectors. There are various methods for extracting a motion vector, such as an all-search block matching method and a tree search block matching method, which are well-known and will not be described here.
[0012]
The motion vector extracted by the MC circuit 16 is input to the MIX circuit 17 and synthesized with the mode signal determined by the discrimination circuit 6. The synthesized signal is converted into a code suitable for the transmission path 11 by the second encoding circuit 18 and output to the transmission path 11 together with the corresponding encoded block. In addition, the MC circuit 16 outputs a signal that is made into a block having a size (m [pixel] × n [line]) equal to the input block from the search range as a prediction block. The prediction block output from the MC circuit 16 is generated from past image information.
[0013]
This prediction block is input to the second switch circuit 19, and is output from each output according to the field of the screen currently being processed and the mode signal of the decoding block. A prediction block is output from one output of the second switch circuit 19 to the subtracter 3 according to the processing field. From the other output, a prediction block is output according to the mode signal and processing field of the decoded block at that time.
[0014]
As a prediction method performed in such a circuit block, for example, the one shown in FIG. 4 can be considered. In this method, an intra field is inserted every four fields, and three fields in between are used as prediction fields. In FIG. 4, the first field F1 is an intra field, and the second, third, and fourth fields F2, F3, and F4 are prediction fields. In the prediction by this method, the first field F1 to the second field F2 of the intra field are predicted, and similarly, the first field F1 to the third field F3 are predicted. Then, the reconstructed second field F2 to the fourth field F4 are predicted.
[0015]
First, the first field F1 is blocked in the field and subjected to DCT. Further, weighting processing and threshold processing are performed and quantized, and then encoded. The local decoding loop 20 decodes / reconstructs the quantized first field F1 signal. This reconstructed image is used for motion compensation prediction of the next second field F2 and third field F3. Next, motion compensation prediction is performed on the second field F2 using the first field F1, and the obtained error block is subjected to DCT, and then encoded in the same manner as the first field F1.
[0016]
At this time, if the AC power of the input block is smaller than the power of the error block, the input block instead of the error block is DCTed and encoded in the same manner as in the first field F1. The second field F2 is decoded / reconstructed in accordance with the mode signal of each block by the local decoding loop 20, and is used for motion compensation prediction of the fourth field F4.
[0017]
On the other hand, the third field F3 is encoded with motion compensation prediction using the first field F1 in the same manner as the second field F2. The fourth field F4 is subjected to motion compensation prediction using the second field F2 reconstructed by the image memory 15, and is encoded in the same manner as the third field F3. Also in the third field F3 and the fourth field F4, if the AC power of the input block is smaller than the power of the error block, the input block instead of the error block is DCTed and encoded in the same manner as in the first field F1.
[0018]
For example, a consumer digital VTR as shown in FIG. 1 is expected to have high image quality and high sound quality. For this purpose, data compression, that is, improvement in performance of a high-efficiency encoding device is essential. Therefore, the conventional prediction method as described above has the following problems. In such a prediction method, since motion compensation prediction is performed using video data one field before or one frame before, the amount of field memory or frame memory increases and the hardware becomes large. There is.
[0019]
In the conventional prediction method, if a scene change occurs on a frame basis, compression by motion compensation prediction from the reference image before the scene change becomes difficult when encoding the video after the scene change, and the total code amount increases. There is a second problem. When inter-field motion compensation prediction is performed in order in the time direction, it is possible to minimize the increase in the amount of code even if a scene change occurs, but it is possible to encode interlaced video with little movement without scene change etc. In this case, the code amount tends to increase as a whole. Further, in the prediction method in which the third field F3 and the fourth field F4 are adaptively switched from the first field F1, the second field F2, and the third field F3 as shown in FIG. There is a disadvantage that wear becomes large.
[0020]
For example, FIG. 6 shows the code amount and S / N ratio of the luminance signal when video A with a scene change is processed by the prediction method as shown in FIG. 4 and when it is processed by the prediction method as shown in FIG. In video A, a scene change occurs in units of frames. Also, the code amount of the luminance signal and the S / N ratio when the video B having no scene change is processed by the prediction method of FIG. 4 and the prediction method of FIG. 5 are shown together. In this case, the prediction method of FIG. 5 is more advantageous for video A with a scene change, and the prediction method of FIG. 4 is more advantageous for video B without a scene change.
[0021]
Further, when encoding is performed by performing prediction as in the conventional example, there is a third problem that the quality of the video immediately after the scene change deteriorates when a scene change occurs in the motion compensation prediction process. . This is because a scene change has occurred, so that motion compensation prediction that makes good use of temporal correlation cannot be performed well, and the amount of information generated increases. The amount of information generated at this time is comparable to that of a normal intrafield. And since the field which has this information amount is made into the prediction field with respect to this generated information amount, it will be compressed even to the information amount equivalent to a prediction field.
[0022]
Therefore, the image quality of the field after the scene change is considerably deteriorated. FIG. 7 shows the transition of the information amount of video for 5 seconds when encoding is performed by the conventional prediction method. This is such that the average for 5 seconds falls within 20 [Mbps], but there is a scene change in the portion A, and the amount of information increases. The transition of the S / N ratio at that time is shown in FIG. At this time, there is no significant deterioration in the scene change portion, but the S / N ratio deteriorates if the amount of information is reduced.
[0023]
Further, if the field is used for the next motion compensation prediction, the motion compensation prediction of an image whose image correlation is deteriorated and temporal correlation is reduced must be performed, and the amount of information generated again increases. This vicious cycle continues until the next refresh field is processed. Thus, even if the video quality is deteriorated even immediately after the scene change, the digital video recording / reproducing apparatus that is required to have high image quality cannot make full use of the performance. For example, a home digital VTR, which is one of digital video recording / reproducing apparatuses, requires functions such as special playback and editing, and in that case, a significant deterioration in image quality becomes conspicuous.
[0024]
By the way, conventional VTRs for household scan recording include VHS, β, and 8 millidevio. Here, 8 mm video will be described as a conventional example. FIG. 9 is a diagram showing a tape format in the 8 mm video standard, and FIG. 10 is a diagram showing a format of one track.
[0025]
FIG. 11 is a view showing a winding state of a rotary head / drum used in 8 mm video and a magnetic tape, and FIG. 12 is a view showing frequency allocation of each signal in the 8 mm video standard. NTSC and PAL video signals of 8 mm video are recorded by a low-frequency conversion color signal recording method, which is a basic recording method for home VTRs. The luminance signal is FM-modulated with a carrier of 4.2 to 5.4 MHz, the color subcarrier is converted to a low frequency of about 743 KHz, and both are frequency-multiplexed and recorded. The recording format on the tape is as shown in FIG. The minimum required VTR signals such as video signals (luminance signals, color signals), audio signals, and tracking signals are all frequency-multiplexed with a rotating video head. The frequency band is shown in FIG.
[0026]
In FIG. 9, magnetic tracks 401 and 402 of the video signal track section 410 are video signal tracks, each corresponding to one field. The magnetic tracks 403 and 404 shown with diagonal lines in the audio signal track section 411 are magnetic tracks for audio signals. At both ends of the tape are a fixed head cue track 405 and an audio track 406. In 8 mm video, the control track at the end of the tape is not used, so this track can be used as a cue track for cueing and addressing recorded contents. The width (track pitch) of one track is 20.5 μm, which is slightly wider than the long-time mode pitch of the β method and VHS method (β-III is 19.5 μm, and the VHS 6-hour mode is 19.2 μm). There is no guard band between tracks to prevent crosstalk. Instead, azimuth recording with two heads is employed to suppress crosstalk.
[0027]
Next, a specific circuit operation of the conventional example will be described with reference to FIGS. FIGS. 13 and 14 are block circuit diagrams of the prior art. The video signal applied to the video signal input terminal 201 is applied to the video signal processing circuit 203 and the synchronizing signal separation circuit 204. FIG. The output signal of the video signal processing circuit 203 is applied to the adders 213 and 214 through the gate circuits 205 and 206.
[0028]
On the other hand, the vertical synchronizing signal which is the output of the synchronizing signal separation circuit 204 is supplied to the delay circuits 207 and 208. The Q output of the delay circuit 207 constituting the head switch pulse generating means with the synchronizing signal separation circuit 204 is supplied as a gate pulse to the first gate circuit 205 and a fourth gate circuit 212 described later, and the Q bar output is the second output. A gate pulse is supplied to the gate circuit 206 and a third gate circuit 211 described later. The output signal of the delay circuit 208 is supplied to the time axis compression circuit 209 and the erase current generator 240.
[0029]
The audio signal applied to the audio signal input terminal 202 is supplied to the third gate circuit 211 and the fourth gate circuit 212 through the time axis compression circuit 209, the modulation circuit 210, and the recording / erasing switching switch 241. Is done. The output of the erase current generator 240 is supplied to the third gate line 211 and the fourth gate line 212 through the changeover switch 241. Output signals from the third gate line 211 and the fourth gate line 212 are supplied to adders 213 and 214. The output signal of the adder 213 is given to the rotary transformer 217 via a changeover switch 215 for switching between recording and reproduction. The output signal of the rotary transformer 217 is given to the rotary magnetic head 221 through the rotary shaft 219 and the rotary head bar 220, and a recording current or an erasing current flows through the magnetic tape 223.
[0030]
On the other hand, the output signal of the adder 214 is also supplied to the rotary transformer 218 via a recording / reproducing switching switch 216 linked with the switching switch 215. The output signal of the rotary transformer 218 is given to another rotary magnetic head 222 via the rotary shaft 219 and the rotary head bar 220, and a recording current or an erasing current flows through the magnetic tape 223. The magnetic tape 223 is guided by guide posts 224 and 225 located on both sides of a table guide drum 226 containing the rotating magnetic heads 221 and 222, and is a known magnetic tape traveling device (not shown) comprising a capstan and a pinch roller. ) At a constant speed in the direction of arrow 227. Since a well-known table guide drum 226 can be used, a detailed description of the structure is omitted here.
[0031]
During reproduction, the signal reproduced by the rotary magnetic head 221 is supplied to the separation circuit 228 via the rotary head bar 220, the rotary shaft 219, the rotary transformer 217, and the changeover switch 215. On the other hand, the signal reproduced by the rotary magnetic head 222 is supplied to the separation circuit 229 via the rotary head bar 220, the rotary shaft 219, the rotary transformer 218, and the changeover switch 216. One output of the separation circuit 228 and one output of the separation circuit 229 are supplied to the adder 230. The other output of the separation circuit 228 and the other output of the separation circuit 229 are supplied to the adder 231. The output signal of the adder 230 is supplied to the video signal output terminal 233 via the video signal processing circuit 232. On the other hand, the output signal of the adder 231 is supplied to the audio signal output terminal 237 via the time axis correction circuit 234, the demodulation circuit 235 and the time axis extension circuit 236.
[0032]
Next, the operation will be described. The video signal given to the video input terminal 201 is converted into an FM signal by the video signal processing circuit 203. When the carrier color signal is included, the carrier color signal is converted to a low frequency of about 1.2 MHz or less. Further, as means for removing the adjacent color signal, there is no problem even if the phase of the carrier color signal is rotated by 90 ° or inverted every 1H (horizontal scanning period), for example. This is a technique for removing crosstalk between tracks using the line correlation of the carrier color signal. The video signal processed as described above is supplied to the first gate circuit 205 and the second gate circuit 206.
[0033]
On the other hand, when a video signal is also applied to the synchronization signal separation circuit 204, a vertical synchronization signal is obtained at the output end. This vertical synchronizing signal is supplied to delay circuits 207 and 208. The delay circuit 207 has a divide-by-2 function and a delay function. From the Q output terminal and the Q bar output terminal, a pulse signal Q for head switching as shown in FIGS. The Q bar is supplied to the first gate circuit 205 and the second gate circuit 206, respectively. In order to clarify the phase relationship between these pulse signals Q and Q bar and the input video signal, the waveform of the input video signal is shown in FIG.
[0034]
As shown in FIGS. 16A and 16B, processed video signals are output to the output terminals of the first gate circuit 205 and the second gate circuit 206 while the pulse signals Q and Q bar are at the H level. Is done. These signals are added with a modulated compressed audio signal or an erasure signal, which will be described later, at adders 213 and 214 and supplied to change-over switches 215 and 216.
[0035]
The compressed audio signal is subjected to modulation (especially pulse code modulation (PCM), FM, PM, AM, etc. or possibly unmodulated AC bias recording) suitable for the tape head system by the modulation circuit 210. In particular, PCM is advantageous in that a high S / N ratio can be expected and a well-known code error correction means can be used for dropout and the like. Such a modulated compressed audio signal is supplied to the third gate circuit 211 and the fourth gate circuit 212 to which the pulse signals Q and Q are supplied via the changeover switch 241. These gate circuits 211 and 212 output the compressed audio signal to the adders 213 and 214 while the pulse signals Q and Q are at the H level.
[0036]
The erasing current generating circuit 240 generates an erasing current of a certain frequency (for example, 100 KHz) whose transmission start time is controlled by the trigger signal T obtained by delaying the vertical synchronizing signal by the delay circuit 208. 241, the third gate circuit 211 and the fourth gate circuit 212 to which the pulse signals Q and Q are supplied are supplied with an erasing current during the H level period of the pulse signals Q and Q as in the recording of the compressed audio signal. Output to the adders 213 and 214. FIGS. 17A and 17B are waveform diagrams of the output signals of the adders 213 and 214, that is, the time-division multiplexed signals of the processed video signal A and the processed audio signal B or erasure signal. By supplying these signals to the rotary magnetic heads 221 and 222 through the above-described path, a tape magnetic pattern as shown in FIG. 9 is obtained.
[0037]
At the time of reproduction, the movable contact pieces of the changeover switches 215 and 216 are switched to the fixed contact P side. In this way, the two-channel reproduction signals reproduced by the rotary magnetic heads 221 and 222 are transmitted via the rotary head bar 220, the rotary shaft 219, the rotary transformer 217 or 218, and the changeover switch 215 or 216, respectively, and separated. In the circuits 228 and 229, the input signal is separated into a video signal and an audio signal on the time axis. The separated video signal is converted into a one-channel video signal continuous in time by an adder 230 and supplied to the video signal processing circuit 232. In the video signal processing circuit 232, the input signal is restored to the original video signal and output to the video signal output terminal 233.
[0038]
On the other hand, the separated audio signal is also converted into a channel signal by the adder 231 and supplied to the time axis correction circuit 234. The time axis correction circuit 234 is composed of a semiconductor memory such as a CCD (Charge Coupled Device) or BBD (Bucket Brigate Device), for example, and the time axis fluctuation (so-called jitter and skew distortion) of the tape head system. Is removed. The output signal of the time axis correction circuit 234 is demodulated into the original compressed audio signal by the demodulation circuit 235, and further converted to the original audio signal by the time axis extension circuit 236 constituted by a semiconductor memory such as a CCD or BBD. It is output to the terminal 237.
[0039]
As described above, in the 8 mm video, the video signal and audio signal of one field are recorded and reproduced as one track on the tape.
[0040]
FIG. 18 is a block diagram showing a configuration of another conventional video information recording / reproducing apparatus, and shows a digital recording D1 method and D2 method VTR used for business use or broadcasting. 101 is an A / D converter that converts an analog video signal into a digital video signal, 102 is an error correction encoder that adds an error correction code, 103 is a modulator that converts a digital signal into a signal suitable for recording on a magnetic tape, and 104 Is a rotating head drum, 105 is a magnetic tape, 106 is a magnetic head for recording and reproduction, 107 is a demodulator that demodulates the reproduction signal, 108 is an error correction decoder that detects and corrects transmission errors, and 109 is an analog digital video signal. It is a D / A converter that converts video signals.
[0041]
FIG. 19 shows both types of tape formats. In both systems, video signals and 4-channel audio signals are recorded at different locations on the same track. However, in the D1 system, the audio signal is recorded at the center of the track, and in the D2 system, the audio signal is recorded at the end of the track. When video and audio signals are recorded on the same track, the magnetic head, amplifier circuit, etc. required for recording and playback can be shared by the video and audio signals. Further, as will be described later, a parity code necessary for error correction, a circuit for generating the parity code, and the like can be shared.
[0042]
FIG. 20 shows the overall specifications of the D1 and D2 systems, FIG. 21 shows the tape format specifications, and FIG. 22 shows the travel system specifications. From this, the area recording density including the guard band is 21.5 μm for the D1 method.²  / Bit, D2 method is 16.6μm²  / Bit. In the D1 method, a guard band is provided between recording tracks, but the D2 method does not have this. As a result, the track density of the D2 system is about 15% higher than that of the D1 system, which is also linked to the long-time recording of the D2 system.
[0043]
On the other hand, if there is no guard band, it is easy to reproduce the signal of the adjacent track in addition to the signal of the original track. In order to cope with the crosstalk between tracks during reproduction, the azimuth recording method is adopted in the D2 method. Usually, the head gap of the recording magnetic head and the head gap of the reproducing magnetic head are attached to the magnetic track at the same angle. If an angle is given between both head gaps, the reproduction signal level exhibits an attenuation characteristic.
[0044]
The azimuth angle θ in the D2 method is about ± 15 degrees as shown in FIG. As a result, even if a signal from an adjacent track is mixed during reproduction, the unnecessary component is attenuated. Thereby, even if there is no guard band, the influence of crosstalk is small. However, since the loss due to the azimuth angle cannot be expected with direct current, it is necessary that the signal to be recorded has no direct current component. For this reason, in the D2 system, a modulation system having no DC component is adopted.
[0045]
In digital recording, it is not necessary to record the video signal all the time. Since the blanking period is a constant waveform regardless of the content of the video and can be synthesized after reproduction, only the valid video period is recorded in both the D1 and D2 systems. A color burst signal included in the blanking period of the NTSC signal can also be synthesized after reproduction. This is because the sampling phase of the D2 system is defined as the I and Q axes, and the phase of the color burst (180 + 33 degrees behind the Q axis) can be determined using the reproduced sampling clock.
[0046]
FIG. 23 shows a pixel range actually recorded in the D1 and D2 systems. These effective pixels are divided into several segments. In the D1 method, the pixels for 50 scanning lines constitute a segment, and in the D2 method, the pixels for 85 scanning lines constitute a segment. That is, the pixels for one field are composed of 5 segments in the D1 system and 3 segments in the D2 system.
[0047]
The video signal in the segment is recorded by being divided into 4 channels in the D1 system and 2 channels in the D2 system. As a result, the number of pixels per channel of one segment is {(720 + 360 × 2) / 4} × 50 = 360 × 50 = 18000 in the D1 system, and {768/2} × 85 = 384 × in the D2 system. 85 = 32640. In distribution, care is taken so that each channel is evenly distributed within the screen. As a result, even if the characteristics of any particular channel deteriorate, the code errors caused thereby are not concentrated in one place in the screen and are not noticeable. Therefore, the correction effect is great even for errors that could not be corrected.
[0048]
Both the D1 and D2 systems use two types of error correction codes called outer code and inner code. In the process of generating the inner code and outer code, the operation of actually changing the order of the codes is performed. This is called shuffling. Shuffling disperses the influence of code errors, improves the correction capability, and reduces screen deterioration due to uncorrected errors. This consists of shuffling for one scanning line before generating the outer code and shuffling within one sector after adding the outer code and before generating the inner code. As described above, in the D1 and D2 system VTR, one field of video signal and audio signal are recorded over a plurality of tracks on the tape.
[0049]
In home VTR, in order to record the information of the current NTSC and PAL standard television signals, the carrier frequency of FM luminance signal is increased, the band and deviation are expanded, and the resolution and C / N are improved. However, it has not yet caught up with commercial VTRs in terms of S / N ratio, waveform reproducibility, and the like.
[0050]
However, there is a high expectation for miniaturization of equipment, and there is a demand for realization of light weight and miniaturization at the same time as further enhancement of performance, and it is difficult to improve only the current technology. On the other hand, in the field of commercial / broadcasting VTRs, rapid digitization has progressed, and multifunctional and high-performance devices have been realized. In the broadcasting field, most of them have been replaced with digital VTRs. However, the tape consumption of the digital VTR is very large, which hinders the lengthening and downsizing.
[0051]
In recent years, attention has been paid to the redundancy of information contained in video, and research on compressing recorded information has become active, and use of this for VTR is also being studied. With the high image quality and high density recording that digital has, and the reduction of tape consumption due to information compression, the realization of a compact, lightweight, high image quality, and long-term VTR can be expected.
[0052]
FIG. 24 shows a communication device of a high-efficiency code video information compression method (according to CCITT H.261) used in the field of communication such as a video phone and a video conference. 101 is an A / D converter that converts an analog video signal into a digital video signal, 110 is a high-efficiency encoder that compresses and encodes the video signal, and 112 is a buffer used to send out the generated compressed code at a constant speed. Memory, 102 is an error correction encoder for adding an error correction code, 103 is a modulator that converts a digital signal into a transmission signal for communication, 114 is a communication path, 107 is a demodulator that digitally demodulates a received signal, and 108 is a transmission An error correction decoder for detecting and correcting errors, 113 is a buffer memory used to supply a compressed code received at a constant speed in accordance with the requirements of the next stage, and 111 is a high efficiency unit that decompresses a compressed video signal to the original signal. A decoder 109 is a D / A converter for converting a digital video signal into an analog video signal.
[0053]
The redundancy of the input video signal always changes, and therefore the code amount compressed and encoded using this redundancy also varies. However, the amount of transmission information on the communication path 114 is limited, and in order to achieve the maximum performance, the buffer memory 113 is used to absorb the fluctuation of the code amount, and the memory overflow and underflow are not caused. Control the amount of information. FIG. 25 shows the buffer operation on the receiving side. Data received at a constant rate is stored in the buffer memory, and decoding of the code is started when the amount of data reaches BO. The d1 data is consumed for the display of the first screen, and the accumulated data amount is B1 when the decoding of the second screen is started. Thereafter, data accumulation and consumption are repeated in the same manner. Although the data consumption varies depending on the display screen, the average data consumption is equal to the reception rate. Here, the reception side has been described, but on the transmission side, the operation completely opposite to that on the reception side is performed.
[0054]
Since the communication apparatus is controlled as described above, the relationship between the input video field and the code to be communicated is not clear. However, unlike applications in the communications field, VTRs require functions specific to VTR, such as special playback, assemble editing, and insert editing, which are different from normal playback, such as still playback, slow playback, and high-speed playback. It is preferable that the relationship is established. For a practical VTR, it is essential to select a recording format that can solve these problems.
[0055]
For compression of moving images such as television signals, an intra field (or intra frame) in which encoding is completed in a single field (or frame) regardless of other fields (or frames) and other fields or frames There is a compression method that uses a prediction field (or prediction frame) that performs predictive encoding using information, and the amount of information in an intra field (or intra frame) that does not use inter-field (or inter-frame) prediction is generally inter-plane It becomes twice or more the code amount of the prediction field (or prediction frame) encoded using prediction.
[0056]
For this reason, if a recording area (number of tracks) of the same size is assigned to an intra field (or intra frame) and a prediction field (or prediction frame), a sufficient recording area cannot be obtained in the intra field (or intra frame). There is a fourth problem that the recording field is wasted in the prediction field (or prediction frame).
[0057]
The main object of the present invention is to solve the above-mentioned fourth problem by recording signals of a plurality of fields (or frames) as a single recording unit on a predetermined number of tracks, and requesting the VTR or the like. Another object of the present invention is to provide a video information recording device and a video information playback device that can handle special playback and editing.
[0058]
[Means for Solving the Problems]
The present inventionAn intra field or an intra frame in which a video signal of n fields or n frames (n is an integer of 2 or more) is used as a processing unit, and at least one field or one frame of the processing unit is encoded in an intra mode; A video information recording medium on which a video signal of another field or frame is recorded with a prediction field or a prediction frame encoded in a prediction encoding mode using motion compensation prediction using the intra field or intra frame as a reference image The video information recording medium is composed of a plurality of recording segments obtained by dividing the video information recording medium into a predetermined information length, and the amount of information recorded as the processing unit is variable. , Recording segments of integer multiples according to the amount of information recorded as the processing unit A video information recording medium in which the processing unit is recorded, and in the remaining area when the processing unit is recorded in the integral multiple recording segment, useless data to be discarded at the time of decoding is embedded. It is.
[0059]
Also enterThe input n field (or n frame) signals are combined into one recording unit block and recorded on a predetermined number of tracks calculated from the amount of information to be recorded and the recording capacity of one track. The blocks encoded in the recording unit are compressed and encoded so as to include at least one intra field (or intra frame). The input n-field (or n-frame) television signal is compressed and encoded as one recording unit block by a high-efficiency encoder. An n-field (or n-frame) television signal that has been compression-encoded is divided and recorded in a recording area of m tracks. The reproduced m-track signal is restored to an n-field (or n-frame) television signal by a high-efficiency decoder.
In a video information recording apparatus for recording video information, signals of a plurality of fields or a plurality of frames are collectively recorded as one recording unit and recorded on a predetermined number of tracks. Here, the information amount of one field or one frame when gathering as a recording unit is configured not to be an integral multiple of the information amount that can be recorded on one track. A signal of a plurality of fields or a plurality of frames to be recorded is configured such that an intra field or an intra frame that does not use inter prediction and a prediction field or a prediction frame that uses inter prediction are mixed.
[0060]
Further, in a video information recording apparatus for recording video information, a plurality of fields or a plurality of frames of signals are combined into one recording unit and recorded on a track selected according to the amount of information to be recorded from a predetermined number of tracks. The information amount of one field or one frame when grouping as a recording unit is not necessarily an integral multiple of the information amount that can be recorded on one track. A signal of a plurality of fields or a plurality of frames to be recorded is configured such that an intra field or an intra frame that does not use inter prediction and a prediction field or a prediction frame that uses inter prediction are mixed.
[0061]
Further, in a video information recording apparatus for recording an encoded video signal using a certain length area on a recording medium as a recording unit, the video signal of n fields or n frames (n is an integer of 2 or more) is used as a processing unit. A first encoding means for encoding a video signal of at least one field or frame in a unit in an intra mode, and a video signal of another field or frame is encoded in a predictive encoding mode using motion compensation prediction. A decision to determine the number of the areas in which the video signal is to be recorded, based on the amount of information of the video signal of the processing unit encoded by the second encoding means and the first and second encoding means; And recording means for recording the encoded video signal in the number of areas determined by the determining means.
[0062]
In a video information reproducing apparatus for reproducing a recording medium on which a video signal is recorded based on the video information recording apparatus, means for reading an encoded video signal corresponding to the processing unit from the recording medium, and the read encoded video signal A first decoding means for extracting and decoding a video signal of a field or a frame encoded in the intra mode, and a predictive coding based on the video signal decoded by the first decoding means Second decoding means for decoding the video signal of the field or frame encoded in the mode.
[0063]
DETAILED DESCRIPTION OF THE INVENTION
First embodiment.
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 26 is a block diagram in the first embodiment of the present invention. In FIG. 26, 1 is a digital video input terminal, 2 is a block circuit for blocking a digital video signal input from the digital video input terminal 1, and 30 is a block output from the block circuit 2 and an intrafield. A motion compensation prediction circuit that performs motion compensation prediction and outputs an error signal between the input block and the prediction block, and 31 is an absolute value of the input signal output from the blocking circuit 2 and the prediction error signal from the motion compensation prediction circuit 30 A determinator for selecting the smaller sum, 32 is a first switch for selectively outputting a coding block output from the blocking circuit 2 and the determinator 31 based on the determined mode, and 33 is an output from the first switch 32 An orthogonal transform circuit that performs orthogonal transform on the encoded block, and 34 is a quantization that quantizes the output of the orthogonal transform circuit 33 Road, 11 is a transmission path.
[0064]
35 is a second switch that selects and outputs the quantization result output from the quantization circuit 34 only in the case of an intrafield, 36 is an inverse quantization circuit that inversely quantizes the output of the second switch 35, and 37 is inverse quantization. An inverse orthogonal transform circuit 38 performs inverse orthogonal transform on the output of the circuit 36, 38 stores one field of intra-field reproduced images output from the inverse orthogonal transform circuit 37, and a motion compensated prediction circuit 30 serves as a reference image in the search range for the prediction field. Is an image memory to be output to
[0065]
As a prediction method performed in such a circuit block, for example, the one shown in FIG. 27 can be considered. In this method, an intra field is inserted every four fields, and three fields in between are used as prediction fields. In FIG. 27, the first field F1 is an intra field, and the second, third, and fourth fields F2, F3, and F4 are prediction fields. In this method, the second, third, and fourth fields F2, F3, and F4 are predicted from the first field F1. First, the first field F1, which is an intra field, is blocked in the field, subjected to orthogonal transformation, quantized, and then encoded.
[0066]
In the local decoding loop, the quantized first field F1 signal is decoded / reconstructed. This reconstructed image is used for motion compensation prediction of the next second field F2, third field F3, and fourth field F4. Next, motion compensation prediction is performed on the second field F2 using the first field F1, and the obtained error block is orthogonally transformed and then encoded in the same manner as the first field F1. At this time, if the absolute value sum of the input block is smaller than the absolute value sum of the error block, the input block, not the error block, is orthogonally transformed and encoded in the same manner as in the first field F1.
[0067]
On the other hand, the third field F3 and the fourth field F4 are also encoded with motion compensation prediction using the first field F1 in the same manner as the second field F2. In the third field F3 and the fourth field F4, if the AC power of the input block is smaller than the power of the error block, the input block is orthogonally transformed instead of the error block, as in the first field F1. Encode.
[0068]
Next, the operation will be described. The video signal input from the digital video input terminal 1 is blocked by, for example, 8 pixels × 8 lines as a unit by the blocking circuit 2 regardless of the intra field and the prediction field. The motion compensation prediction circuit 30 performs motion compensation prediction on the input block output from the block circuit 2 in the case of the prediction field, using the intra-field reproduced image data stored in the image memory 38 as a reference image.
[0069]
The motion compensation prediction circuit 30 performs a motion detection search range block with a size of, for example, 16 pixels × 16 lines to obtain a motion vector. Further, an error signal between the reference image and the input image is obtained according to the motion vector obtained by the motion detection, and is output to the determiner 31 together with the motion vector. The determiner 31 obtains the sum of absolute values of each component of each block of the input block output from the blocking circuit 2 and the error block output from the motion compensation prediction circuit 30. The input block is I (i, j) (i, j = 1 to 8), the absolute value sum is Is, the error block is P (i, j) (i, j = 1 to 8), and the absolute value sum is Assuming Ps, Is and Ps are expressed by the following equations.
[0070]
[Expression 1]

[0071]
Here, when Ps <Is, it is determined that the error block has less information than the input signal block, and the error block is output to the first switch 32 together with the motion vector. On the other hand, if Ps ≧ Is, it is determined that the input signal block has less information than the error signal block, and the input block and the forced intra signal indicating that the block is a forced intra block are used instead of the motion vector. 1 output to switch 32.
[0072]
In the first switch 32, the output of the blocking circuit 2 is selected in the intra mode, and the output of the determiner 31 is selected and output to the orthogonal transform circuit 33 in the prediction mode. The orthogonal transform circuit 33 performs, for example, two-dimensional DCT on each 8 × 8 block input. In the quantization circuit 34, the orthogonal transform coefficient output from the orthogonal transform circuit 33 is variable-length encoded and quantized. In the prediction mode, the quantization circuit 34 quantizes the motion vector or the forced intra signal in addition to the orthogonal transform coefficient, and outputs the quantized signal to the transmission path 11 in addition to the orthogonal transform coefficient.
[0073]
On the other hand, the second switch 35 outputs the orthogonal transform coefficient quantized by the quantization circuit 34 to the inverse quantization circuit 36 only in the case of an intra field in order to use as reference data for motion compensation prediction. The inverse quantization circuit 36 inversely quantizes the data variable-length encoded by the quantization circuit 34, performs variable-length decoding, and outputs it to the inverse orthogonal transform circuit 37. In the inverse orthogonal transform circuit 37, for example, two-dimensional inverse DCT is performed to restore the intra-field block. Each block of the intra field restored by the inverse orthogonal transform circuit 37 is stored in the image memory 38. The image memory 38 stores one field of the restored image of the intra field as reference data in the case of motion compensation prediction, and further outputs a reference image of the motion vector detection range to the motion compensation prediction circuit 30.
[0074]
In the above embodiment, the orthogonal transform block size is set to 8 pixels × 8 lines. However, the block size is not necessarily 8 pixels × 8 lines, and may be a block size of n pixels × m lines. . Similarly, the motion vector detection range need not be 16 pixels × 16 lines, and may be k pixels × s lines (k ≧ n, s ≧ m). Moreover, although prediction encoding is completed for every 4 fields, it is not necessarily 4 fields, and prediction encoding may be completed for every arbitrary field.
[0075]
Moreover, although prediction encoding is completed for every arbitrary field, it does not necessarily need to be for every field, and prediction encoding may be completed for every arbitrary frame. In the above embodiment, the determination unit 31 outputs the smaller absolute value sum of the output of the blocking circuit 2 and the output of the motion compensation prediction circuit 30 to the first switch 32. However, the motion compensation determination is performed. Instead, only the output of the motion compensation prediction circuit 30 may be output to the first switch 32.
[0076]
Second embodiment.
In the first embodiment, the decision unit 31 outputs the smaller absolute value sum of the output of the blocking circuit 2 and the output of the motion compensation prediction circuit 30 to the first switch circuit 32. In a field in which the determination result of the forced intra mode is larger than that in the prediction mode, it may be determined that a scene change has occurred, and the entire field may be encoded as the intra mode. An example configured in this way is the second embodiment.
[0077]
FIG. 28 is a block diagram showing the configuration of the second embodiment. In the figure, reference numeral 40 indicates the one with the smaller absolute value sum of the input block output from the blocking circuit 2 and the prediction error block from the motion compensated prediction circuit 30, and the input block from the blocking circuit 2 is selected. A field having more fields is a determination unit that determines that the field is an intra field, 41 is a first field memory that stores the input block output from the blocking circuit 2 as intra field data, and 42 is output from the determination unit 40. A second field memory 43 for storing a block of prediction fields to be selected, and the orthogonal mode conversion circuit 43 selects the output of the first field memory 41 when the intra mode and determination unit 40 determines that the forced intra mode is greater than the prediction mode. Otherwise, the output of the second field memory 42 is selected. Which is the first switch to.
[0078]
Next, the operation will be described. Since the operation from the digital video input terminal 1 to the motion compensation prediction circuit 30 is the same as that in the first embodiment, a description thereof will be omitted. As in the first embodiment, the determiner 40 has the smaller sum of the absolute values of the components of each block of the input block output from the blocking circuit 2 and the error block output from the motion compensation prediction circuit 30. Select to output. Here, when the output of the motion compensation prediction circuit 30 is selected, the determiner 40 outputs a block of error signals together with the motion vector.
[0079]
When the output of the blocking circuit 2 is selected, it is output together with a signal indicating that it is a forced intra block. Further, when the number of compulsory intra blocks exceeds a certain value n within one field, the determiner 40 determines that a scene change has occurred, and outputs a control signal for encoding all the current fields in the intra mode.
[0080]
The output of the determiner 40 is stored in the second field memory 42 as prediction mode data, and after one field of data is stored, it is output to the first switch 43. On the other hand, the output of the blocking circuit 2 is stored as intra-mode data in the first field memory 41, and data for one field is stored and then output to the first switch 43. The first switch 43 selects the output of the first field memory 41 when the intra mode and the decision unit 40 determine that the mode is forcibly set to the intra mode. Otherwise, the output of the second field memory 42 is selected. And output to the orthogonal transformation circuit 33. Since the operation from the orthogonal transform circuit 33 to the image memory 38 is the same as that in the first embodiment, a description thereof will be omitted. However, if it is determined by the determiner 40 that a scene change has occurred, the contents of the image memory 38 must also be updated. Therefore, the output of the quantization circuit 34 is reversed in the second switch 35 as in the case of the intra mode. The result is output to the quantization circuit 36.
[0081]
Here, an example in which a certain sample image is encoded and decoded using the three types of predictive encoding shown in FIGS. 27, 4 and 29 will be described. The predictive coding method shown in FIG. 29 is a method in which inter-field prediction is performed in each frame, and the third field F3 is predicted from the first field F1. Here, FIG. 30 shows the result of a simulation performed on a sample image of 5 seconds in which a scene change is made with the encoding method shown in FIG. 27 as the method 1, FIG. 4 as the method 2, and FIG. 29 as the method 3.
[0082]
Similarly, FIG. 31 shows the result of simulation for an image of 5 seconds in which no scene change exists. A 4: 2: 2 component signal (Y: 720 × 240, Cb, Cr: 360 × 240, 60Field / sec) is used as a sample image. From the results shown in FIGS. 30 and 31, in the case of an image including a scene change, the method 3 is effective in view of the S / N ratio.
[0083]
However, in the case of a video that does not include a scene change, it can be seen that there is not much difference between methods 1 to 3. As a result, when a scene change occurs, a high-efficiency encoding device having a smaller hardware size than that of the conventional predictive encoding device can be realized by forcibly setting the intra-field.
[0084]
In the second embodiment, an intra mode is created for every n fields, and subsequent n-1 fields are predictively encoded from the intra field. When a scene change occurs, an intra field is forcibly created, and the remaining fields However, it is not always necessary to have an intra field for every n fields, and if a forced intra field occurs, it is possible to predictively encode the following n-1 fields starting from the forced intra field. Good. In the above embodiment, prediction encoding is performed in units of fields, but it is not always necessary to perform prediction encoding in units of fields, and prediction encoding may be performed in units of frames.
[0085]
As described above in detail, in the high-efficiency encoding apparatuses according to the first and second embodiments, an intra field is created for every n fields, and motion compensation prediction is performed for the other fields using this intra field as a reference image. Therefore, the hardware size of an arithmetic circuit or the like for obtaining a motion vector can be reduced.
[0086]
Third embodiment.
FIG. 32 is a block diagram showing the configuration of the high efficiency encoding device of the third embodiment. 32, reference numerals 1 to 14 and 16 to 20 are the same as those of the conventional apparatus in FIG. 50 is a mode counter for counting the number of intra-mode blocks, 51 is a direction switching circuit for comparing a predetermined number of blocks with the number of intra-mode blocks from the mode counter, and determining a reference image for the next field, 52 Is an image memory that stores output blocks for motion compensation prediction and outputs a reference image of the next field as a search range.
[0087]
Next, the operation will be described. The input digital video input signal is divided into input blocks having m [pixel] × n [line] as one unit by the blocking circuit 2 regardless of the intra field or the prediction field. In order to obtain an error block, the difference between the input block and the prediction block is calculated in the subtracter 3. In this way, the input block and the error block are input to the first switch circuit 7 respectively. The error block is input to the error power calculation circuit 4 to calculate its power, and the error power is calculated.
[0088]
The input block is also input to the original image power calculation circuit 5 to calculate the AC power, and the original image power is calculated. Outputs of the error power calculation circuit 4 and the original image power calculation circuit 5 are input to the determination circuit 6, and the smaller one of the two powers is selected and input to the first switch circuit 7 as a mode signal. At this time, if the error power is smaller than the original picture AC power, the prediction mode signal is output so that the error mode is output as the encoded block by the first switch circuit 7 as the prediction mode. If the original image power is smaller than the error power, the intra mode signal is output so that the first switch circuit 7 outputs the input block as an encoded block as the intra mode.
[0089]
A mode signal from the discrimination circuit 6 is input to the mode counter 50. Since the input mode signal is generated for each block of the prediction field, the mode counter 50 counts the number of blocks for which the intra mode or the prediction mode is selected from the number of blocks for one field. The number of blocks for which the intra mode or the prediction mode is selected is output to the direction switching circuit 51. The direction switching circuit 51 compares the number of predetermined blocks (less than the number of blocks for one field) with the number of blocks selected from the mode counter 50, and outputs a reference image switching signal to the image memory 52. To do.
[0090]
If the number of predetermined blocks in the direction switching circuit 51 is greater (or smaller) than the number of blocks for which the intra mode (or prediction mode) has been selected, a reference image switching signal is output to the image memory 52 so as not to switch the reference image. The Further, if the number of predetermined blocks in the direction switching circuit 51 is smaller (if larger) than the number of blocks for which the intra mode (or prediction mode) is selected, a reference image switching signal is output to the image memory 52 so as to switch the reference image. Is done.
[0091]
The first switch circuit 7 outputs an input block or an error block as a coding block based on the mode signal determined by the discrimination circuit 6. At this time, if the input block is an intra field, the first switch circuit 7 always outputs the input block as an encoded block. The encoded block is input to the DCT circuit 8 and converted into DCT coefficients. The DCT coefficient is subjected to weighting processing and threshold processing by the quantization circuit 9 and is quantized to a predetermined number of bits in accordance with each. Each DCT coefficient quantized to a predetermined number of bits is converted into a code suitable for the transmission path 11 by the first encoding circuit 10 and output to the transmission path 11.
[0092]
The DCT coefficients weighted, thresholded, and quantized by the quantization circuit 9 enter the local decoding loop 20, and are inverse weighted and inverse quantized by the inverse quantization circuit 12. The inverse weighting process and inverse quantized DCT coefficients in the local decoding loop 20 are converted into decoded blocks by the inverse DCT circuit 13. Next, the decoded block is added by the adder 14 to the prediction block in units of pixels. This prediction block is used in the subtracter 3.
[0093]
The result added by the adder 14 is written in a predetermined position of the image memory 52 as an output block. The image memory 52 switches the reference image according to the reference image switching signal from the direction switching circuit 51 and outputs the motion detection search range to the MC circuit 16. The search range block for motion detection is, for example, i [pixel] × j [line] (i ≧ m, j ≧ n). The MC circuit 16 receives the motion detection search range block output from the image memory 52 and the input block output from the blocking circuit 2. The MC circuit 16 detects a motion from each input block and extracts a motion vector of the input block.
[0094]
The motion vector extracted by motion detection by the MC circuit 16 is input to the MIX circuit 17. The MIX circuit 17 combines the motion vector input from the MC circuit 16 and the mode signal determined by the determination circuit 6. The motion vector and the mode signal synthesized by the MIX circuit 17 in this manner are converted into codes suitable for the transmission path 11 by the second encoding circuit 18 and output to the transmission path 11 together with the corresponding encoded blocks. The
[0095]
Also, the prediction block output from the MC circuit 16 is output as a block having the same size m [pixel] × n [line] as the input block from the motion detection search range by the MC circuit 16. This prediction block is input to the second switch circuit 19 and is output from each output according to the field of the input block currently processed and the mode signal of the decoding block. A prediction block is output from one output of the second switch circuit 19 to the subtracter 3 according to the processing field. From the other output, a prediction block is output according to the mode signal and processing field of the decoded block at that time.
[0096]
In the present invention, when a scene change occurs on a frame basis when a prediction method as shown in FIG. 4 is used in the case of a normal video, the number of blocks for selecting an intra mode increases when encoding video immediately after the scene change. The reference images can be switched as shown in FIG.
[0097]
The operation of the third embodiment will be summarized using the flowcharts of FIGS. 33, 34, and 35. FIG. FIG. 33 is a flowchart showing the overall operation of the third embodiment, and FIGS. 34 and 35 are flowcharts showing the contents of the intra-field processing in step S103 and the prediction field processing in S104 in FIG.
[0098]
First, the field number fn indicating the field in the motion compensation processing unit is set to 0 (step S101). This field number fn will be described with reference to FIG. 4. The first intra field F1 in the motion compensation processing unit is set to field number fn = 0, the prediction field F2 is set to field number fn = 1, and the next prediction field F3 is set to field number fn = 2. The last prediction field F4 in the motion compensation processing unit is set to the field number fn = 3, and immediately after the current motion compensation processing is started, the first processing field is always the first in the motion compensation processing unit. Since the field is an intra field, field number fn = 0 is set in step S101. The reference image switching flag Rfn, which is a flag for determining the presence / absence of a scene change, is set during the subsequent prediction field processing. Here, Rfn = 0 is set for initialization.
[0099]
Next, it is determined whether or not the field number fn = 0, that is, whether or not the first field in the motion compensation prediction processing unit is an intra field (step S102). At this time, if fn = 0, this field is processed as an intra field (step S103). On the other hand, if fn ≠ 0, the field is processed as a prediction field. Each of these processes will be described in detail later. After each field is processed, the field number fn is incremented to point to the next field (step S105). Such field numbers can be controlled by signals from a microcomputer or the like in actual hardware.
[0100]
Subsequently, it is determined whether or not the field number fn indicating the next field is a numerical value indicating the field in the motion compensation processing unit (step S106), and a number not indicating the field in the motion compensation processing unit, for example, In the example of FIG. 4, the motion compensation processing unit is completed in 4 fields, and the field number fn of the intra field is set to 0. Therefore, if a number such as fn = 4, a series of motion compensation prediction units is completed. If fn <4, it is determined that the next field is still within the motion compensation processing unit, and the process is repeated.
[0101]
When a series of motion compensation prediction processing units is completed, it is determined whether or not processing of all desired fields has been completed (step S107). This is determined, for example, based on whether or not the end switch of the high-efficiency encoding device is activated. If the next field is to be processed, the variables are initialized and the process is repeated for encoding in the next motion compensation prediction processing unit. If the operation of the high-efficiency encoding device is finished, the encoding is finished.
[0102]
Next, intra-field processing will be described with reference to the flowchart of FIG. The field determined to be processed as an intra field in step S102 of FIG. 33 is first blocked into a predetermined size m [pixel] × n [line] in the processing field (step S201). Next, orthogonal transformation such as DCT is performed with the block size (step S202). The orthogonally transformed data is quantized to a predetermined number of bits set in each sequence (step S203).
[0103]
In the case of orthogonal transform such as DCT, quantization is performed so that a large number of bits are assigned to a low-order sequence in ordinary direct current and alternating current, and a small number of bits are assigned to a high-order sequence in alternating current. The quantized data is converted into a code suitable for transmission (step S204), and the encoded data is transmitted (step S205). Further, it is determined whether or not the processing of one field has been completed by counting the number of processing blocks (step S206). If the processing in one field is not completed, the next block is processed again. If all the blocks in one field have been processed, the intra-field processing ends.
[0104]
Next, the prediction field process will be described with reference to the flowchart of FIG. The field determined to be processed as the prediction field in step S102 of FIG. 33 is whether the reference image switching flag Rfn−1 = 0 at the time of the field processing before that field, that is, the field before the field to be processed at present. It is determined whether a scene change is detected during field processing (step S301). If Rfn-1 = 0, motion compensation prediction is performed from a reference image at the same position as before (step S302). If Rfn-1 = 1, a scene change is performed when the field number fn-1 is processed. In the motion compensation prediction of the field number fn detected, the reference image is switched, and the motion compensation prediction is performed using the image of the field at a different position instead of the current position as the reference image (step S303).
[0105]
Next, for example, a variable COUNT for counting the number of blocks for which the intra mode is selected in one field to be processed is set to 0 (step S304). This variable COUNT will be described in detail later. Then, the input image is blocked into a predetermined size m [pixel] × n [line] within the processing field (step S305). Motion compensation prediction processing is performed on the block divided into m × n size (step S306). At this time, using the reference image set in either step S302 or S303, the difference in pixel units between the predetermined area of the past image and the block that has been divided is input to the error power calculation circuit 4 as an error block, and the error Electric power P1 is calculated (step S307). That is, the amount of information generated by motion compensation prediction is reduced by using the set reference image. Further, the block thus divided is input to the original image power calculation circuit 5, and the original image AC power P2 is calculated (step S308).
[0106]
The calculated powers P1 and P2 are compared in magnitude (step S309). If the error power P1 is smaller than the original image AC power P2, an error block (difference value of motion compensated block) is selected (step S310). On the other hand, if the error power P1 is larger than the original picture AC power P2, the input block (the original picture that has been blocked) is selected (step S311), and the number of times the input block is selected as the coding block, that is, the intra mode is processed. The number of blocks to be processed is counted in one field (step S312). The variable that becomes the counter at this time is COUNT set to 0 in step S304. It is always set to 0 when processing in units of fields starts, and the number of blocks for which the intra mode has been selected during processing of one field is counted.
[0107]
Each selected block is subjected to orthogonal transformation (step S313) and quantized to a predetermined number of bits set in each sequence (step S314). For example, in the case of orthogonal transform such as DCT, quantization is performed so that a large number of bits are allocated to a low-order sequence in normal DC and AC, and a small number of bits are allocated to a high-order sequence in AC. . The quantized data is converted into a code suitable for transmission (step S315), and the encoded data is transmitted (step S316). It is determined whether or not the processing for one field has been completed by counting the number of processing blocks (step S317). If the processing in one field is not completed, the next block is processed again.
[0108]
If all the processes in the block in one field are completed, the number of input blocks processed as coding blocks in the process in one field, that is, the number of blocks in which the intra mode is selected, and a preset threshold TH Are compared (step S318). This TH is a predetermined number equal to or less than the number of blocks in one field. For example, the total number of blocks in one field is 2700, and TH is set to 2700 or less and TH = 1000. If the number of times the input block is selected as the encoding block COUNT is smaller than the set threshold value TH, the field (the field number fn) that has just been processed and the reference image used for motion compensation prediction of that field There is no scene change, and the reference image switching flag Rfn = 0 is set so that the reference image for motion compensation in the next field (field number fn + 1) uses the reference image at the normal position (step S319). .
[0109]
If the number COUNT of times when the input block is selected as the encoding block is larger than the set threshold value TH, the field between the current processing (field number fn) and the reference image used for motion compensation prediction of that field Is a scene change and the reference image for motion compensation in the next field (field number fn + 1) is not a reference image at a normal position, but a field at a position different from the previous one, for example, a reference until now Switching is made such that a field that has not been in a position to become an image and that has just been processed is used as a reference image. Therefore, the reference image switching flag Rfn = 1 is set (step S320). In this way, the reference image switching flag Rfn is set, and the prediction field process ends.
[0110]
FIG. 36 shows the transition of the information amount for 5 seconds when predictive encoding is performed according to the third embodiment, and FIG. 37 shows the transition of the S / N for 5 seconds. Although there is a scene change at point B, the increase in the amount of information is suppressed compared to the case of point A in FIG. There is also no noticeable deterioration of the S / N ratio.
[0111]
Fourth and fifth embodiments.
In the third embodiment, as a method for selecting an encoding block from an error block and an input block, respective powers are calculated, compared, and the number of blocks for selecting an intra mode is counted.
[0112]
In the fourth embodiment, entropy in each block is calculated as a method for selecting a coding block from an error block and an input block, and the entropy and input of the error block are input by the discriminating circuit 6 as in the third embodiment. The block entropy is compared to determine whether to select an error block or an input block as an encoding block.
[0113]
In the fifth embodiment, the absolute value of the pixel is added in each block as a method for selecting the coding block from the error block and the input block, and the sum of the absolute values of the input block and the error block is calculated to the power of r. As in the third embodiment, the discriminating circuit 6 compares the absolute value sum of the error block with the r-th power and the absolute value sum of the input block with the r-th power and selects whether the error block is selected as the coding block. It is to decide whether to select a block.
[0114]
Sixth embodiment.
In the third embodiment, the discrimination circuit 6 compares the power of the input block and the error block. In the sixth embodiment, the power of the input block is compared with the power of the input block and the error block. Alternatively, an offset is given to at least one of the error block powers, and then both are compared. For example, a positive offset is given to the power of the input block, and the error block power is compared. In this way, when there is no great difference between the power of the input block and the power of the error block, it is possible to increase the number of blocks for selecting the differential power and prevent the occurrence of an excessive intra mode.
[0115]
FIG. 38 is a flowchart showing prediction field processing in the sixth embodiment. 38, the same reference numerals as those in FIG. 35 denote the same parts. First, Steps S301 to S308 are the same as in the third embodiment. The error power P1 calculated from the error block is compared with the original image AC power P2 calculated from the input block (original image block) plus a predetermined offset of α (step S330). By doing so, it is more difficult to establish P1 <P2 + α than in the third embodiment, and the number of blocks for selecting the intra mode is reduced. And generation | occurrence | production of an excess intra mode is suppressed and the amount of generated information can also be kept stable. The subsequent operations from step S310 to step S320 are the same as in the third embodiment.
[0116]
Seventh and eighth embodiments.
In the seventh embodiment, when comparing the entropy of the input block and the entropy of the error block as in the fourth embodiment, an offset is given to at least one of the entropy of the input block or the entropy of the error block. To compare. For example, a positive offset is given to the entropy of the input block and compared with the entropy of the error block. In this way, when there is no large difference between the entropy of the input block and the entropy of the error block, it is possible to increase the number of blocks for selecting the error block and prevent the occurrence of an excessive intra mode.
[0117]
In the eighth embodiment, when comparing the absolute value sum of the input block and the absolute value sum of the error block as in the fifth embodiment, the absolute value sum of the absolute value of the input block or the absolute value of the error block is compared. An offset is given to at least one of the sums of r and the two are compared. For example, a positive offset is given to the r-th power of the sum of absolute values of the input block and compared with the r-th power of the sum of absolute values of the error block. In this case, if there is no difference greater than the offset given to the r-th power of the absolute value sum of the input block and the r-th power of the absolute value sum of the error block, the number of blocks for selecting the error block increases and excessive intra mode occurs. It is possible to prevent.
[0118]
Ninth embodiment.
In the third embodiment, the mode counter 50 counts the number of blocks for which the intra mode is selected out of the number of blocks for one field. In the ninth embodiment, the number of blocks for one field is not counted. Rather, when the mode signal of a predetermined number of blocks in one field period is determined, the total number of blocks or the ratio of the number of blocks that have selected the intra mode to the number of blocks for which the mode signal has been determined is output to the direction switching circuit 51. The direction switching circuit 51 outputs a reference image switching signal based on the ratio. In this way, it is possible to determine the reference image of the next field even if all the blocks for one field are not encoded.
[0119]
FIG. 39 is a flowchart showing the prediction field process according to the ninth embodiment. 39, the same reference numerals as those in FIG. 35 denote the same parts. First, Steps S301 to S303 are the same as in the third embodiment. After setting a reference image for motion compensation prediction processing of the next field (steps S302 and S303), for example, when processing one field, the number of intra modes generated in the field, that is, an input block as an encoding block A variable COUNT for counting the number of selected blocks and a variable B for counting the number of blocks processed so far in the processing in one field are set to 0 (step S340).
[0120]
Thereafter, Steps S305 to S316 are the same as in the third embodiment. After encoding, the number of processing blocks up to the present is counted by incrementing the variable B one by one (step S341). B varies from 0 to the maximum number of blocks in one field. A reference image switching determination process for determining whether or not to switch the reference image for the motion compensation prediction process for the next field is performed (step S342). The next step S317 is the same as that in the third embodiment.
[0121]
FIG. 40 is a flowchart showing the contents of the reference image switching determination process in step S342 in FIG. 39. The process will be described with reference to FIG. It is determined whether or not the reference image switching flag Rfn is 0 (step S351). If the flag Rfn is not 0, the process ends. If the flag Rfn is 0, the number COUNT of selecting the input block as the encoding block and the ratio of the variable B that counts the number of processing blocks up to the present in one field are compared with the threshold value TH (step S352). If the ratio is smaller than the threshold value TH, the process ends. If the ratio is larger than the threshold value TH, the flag Rfn is set to 1 (step S353), and the process ends.
[0122]
Tenth embodiment.
Next, a tenth embodiment will be described with reference to FIG. In FIG. 42, 1, 3-6, 8-16, 18, 20 are the same as those of the conventional apparatus shown in FIG. 60 is an image memory for storing the input video, 61 is an SC detection circuit for detecting a scene change of the video, and outputs a signal to that effect, and 62 is an input block cut out from the original image and a prediction block by motion compensation prediction A first switch circuit for switching between generated error blocks, 63 is a MIX circuit for combining the motion vector, the block mode signal from the discrimination circuit 6 and the SC detection signal from the SC detection circuit 51, and 64 is for switching the prediction block. A second switch circuit.
[0123]
Next, the operation will be described. The motion compensation prediction is performed in the form as shown in FIG. 4, for example, and is completed in four fields. The digital video signal input from the input terminal 1 is stored in the image memory 60. The image memory 60 is composed of memory for at least two fields, and stores video data for scene change from one side while blocking the video data for scene change or processing from the other side and outputs it.
[0124]
That is, a digital video signal is first sent from the image memory 60 to the SC detection circuit 61, and is determined from, for example, parameters in which video features are set to detect the presence or absence of a scene change. Thereafter, the digital video signal is blocked and output from the other output of the image memory 60 in a size of, for example, n [pixel] × m [line] (m and n are positive integers). The size of m [pixel] × n [line] is a block size for performing two-dimensional orthogonal transformation, and is a block size of a prediction block by motion compensation prediction.
[0125]
An input block that only blocks the original image output from the image memory 60 and an error block that is a difference between the prediction block predicted by motion compensation by the subtractor 3 are input to the first switch circuit 62. The input block and the error block are input to the original image power calculation circuit 5 and the error power calculation circuit 4 in order to obtain the power of each block. The original image power calculation circuit 5 calculates the AC power of the input block, and the error power calculation circuit 4 calculates the power of the error block. The AC power of the calculated input block and the power of the error block are respectively input to the discrimination circuit 6. In the discriminating circuit 6, when the power of the error block is smaller than the power of the input block, a prediction mode signal is generated, and when the power of the input block is smaller than the power of the error block, an intra mode signal is generated. The signal is output to the first switch circuit 62, the MIX circuit 63, and the second switch circuit 64 as signals.
[0126]
The first switch circuit 62 to which the input block and the error block are input outputs one of the blocks as a coding block. Therefore, the first switch circuit 62 determines the switch mode in response to the scene change detection signal from the SC detection circuit 61 and the mode signal from the discrimination circuit 6, and uses either the input block or the error block as an encoding block. Output. The switching state at this time is shown in FIG. Since the process of motion compensated prediction is now completed for 4 fields as shown in FIG. 4, in the normal mode, the intra field is the first field, and the prediction field continues for 3 fields from the 2nd field to the 4th field. This is a mode in which the intra field continues as the first field.
[0127]
The presence / absence of SC detection in FIG. 42 is signaled when the scene change detection signal from the SC detection circuit 61 detects a scene change, and is absent when no scene change is detected. The discrimination mode is the mode signal described above with the output from the discrimination circuit 6. Note that X in the figure means that regardless of whether or not SC is detected, regardless of the discrimination mode. As shown in FIG. 42, the first switch circuit 62 determines a selected block and outputs the selected block as an encoded block.
[0128]
The coding block selected and output by the first switch circuit 62 is two-dimensionally orthogonally transformed by the DCT circuit 8. The orthogonally transformed data is subjected to weighting processing (weighting processing), threshold processing (threshold processing), and the like in the quantization circuit 9, and is quantized to a predetermined number of bits in each sequence. The data quantized by the quantization circuit 9 is converted into a code suitable for the transmission path 11 by the first encoding circuit 10 and output to the transmission path 11. The data quantized by the quantization circuit 9 is also input to the local decoding loop 20 for motion compensation prediction. The data input to the local composite loop 20 is first inversely quantized by the inverse quantization circuit 12, subjected to inverse weighting processing and the like, and then subjected to inverse orthogonal transformation by the inverse DCT circuit 13. The decoded block, which is the output of the inverse DCT circuit 13, is added to the prediction block by the adder 14 in units of pixels to form a reproduced image. The prediction block used at this time is the same as that used in the subtracter 3. The block that has been reproduced by the adder 14 is written at a predetermined position in the image memory 15.
[0129]
The required amount of memory for the image memory 15 differs depending on the prediction method. Assume that the field memory is composed of a plurality of field memories. The output block restored by the local decoding loop 20 is stored in a predetermined position. The image accumulated at this time is used as the search range data for motion compensation prediction. From the image memory 15 to the MC circuit 16, a block which is reconstructed from past output blocks and is a motion detection search range cut out from the reconstructed screen is output. The size of the search range block for motion detection is i [pixel] × j [line] (i ≧ m, j ≧ n: i, j is a positive integer). The MC circuit 16 receives the motion compensation prediction search range data from the image memory 15 and the input block from the image memory 60 as reference data, and extracts a motion vector.
[0130]
The motion vector extracted by the MC circuit 16 is input to the MIX circuit 63 and synthesized with the mode signal determined by the discrimination circuit 6 and the SC detection signal from the SC detection circuit. The synthesized signal is converted into a code suitable for the transmission path 11 by the second encoding circuit 18 and output to the transmission path 11 together with the corresponding encoded block. In addition, the MC circuit 16 outputs a signal that is made into a block having a size (m [pixel] × n [line]) equal to the input block from the search range as a prediction block. The prediction block output from the MC circuit 16 is generated from past image information. This prediction block is input to the second switch circuit 64 and output in accordance with the field currently being processed, the mode signal of the decoding block, and the SC detection signal from the SC detection circuit 51. From one output of the second switch circuit 54, a prediction block is output to the subtracter 3 according to the processing field and the SC detection signal. From the other output, a prediction block is output according to the mode signal, SC detection signal, and processing field of the decoding block at that time.
[0131]
This motion compensation prediction process is shown in FIG. In FIG. 43, it is assumed that there is a scene change between the second field F2 and the third field F3. Since there is no scene change in the first field F1 to the second field F2, the second field F2 is predicted from the first field F1. A scene change between the second and third fields F2 and F3 is detected, and the third field F3 becomes an intra field like the first field F1. The fourth field F4 is predicted from the third field F3.
[0132]
Note that no prediction is made from the past video from the scene change. When the motion compensation prediction process for the fourth field F4 is completed, the motion compensation prediction process is performed with the next field as an intra field. Therefore, after the motion compensation prediction process is started, an intra field always appears every four fields. When a scene change occurs, an intra field also exists during the motion compensation process.
[0133]
The operation of the tenth embodiment will be summarized using the flowcharts of FIGS. FIG. 44 is a flowchart showing the overall operation of the tenth embodiment, and FIG. 45 is a flowchart showing the contents of the prediction field processing in step S406 in FIG.
[0134]
First, the field number indicating the field in the motion compensation processing unit is set to 0 (step S401). Since the setting of this field number is the same as that in the third embodiment and immediately after the motion compensation process is started, the first process field is always the first field in the motion compensation processing unit and is an intra field. In step S401, the field number fn = 0 is set. The scene change detection flag Cfn, which is a flag for determining the presence or absence of a scene change, is set to 0 for initialization in step S401.
[0135]
Next, the characteristics of the input image and the past image are compared with a certain parameter, for example, and the presence / absence of a scene change is detected (step S402). For example, the scene change is detected by comparing the dispersion of the pixel values of some predetermined areas of the past image with the dispersion of the pixel values of the predetermined area of the current processed image. If a scene change is detected, the scene change detection flag Cfn = 1 is set. If no scene change is detected, the scene change detection flag Cfn = 0 is set.
[0136]
Next, it is determined whether or not the field number fn = 0, that is, whether or not the first field in the motion compensation prediction processing unit is an intra field (step S403). At this time, if fn = 0, this field is processed as an intra field (step S405). If fn ≠ 0, the process proceeds to the next step S404. It is determined whether or not the scene change detection flag Cfn = 0, that is, whether or not a scene change exists between the processing field and a reference image necessary for encoding the field by motion compensation prediction (step S404).
[0137]
If Cfn = 0, there is no scene change, and the field currently used for processing is processed as a prediction field (step S406). If Cfn = 1, there is a scene change, so a new current process is being attempted. The field is processed as an intra field (step S405). Accordingly, a scene change is detected even if it is within the motion compensation prediction processing unit and fn = 0, and if Cfn = 1, the processing of that field is processed as an intra field.
[0138]
After each field is processed, the field number is incremented so that the field number fn points to the next field (step S407). Such field numbers can be controlled by signals from a microcomputer or the like in actual hardware.
[0139]
Subsequently, it is determined whether or not the field number indicating the next field is a numerical value indicating the field in the motion compensation processing unit (step S408). A number that does not indicate a field in the motion compensation processing unit, for example, in the example of FIG. 4, the processing unit for motion compensation prediction is completed in 4 fields, and the field number fn of the intra field is set to 0. If a number such as = 4, a series of motion compensation prediction units has been completed, and if fn <4, it is determined that the next field is still within the motion compensation processing unit, and for the next field processing. It is performed again from the detection of the scene change.
[0140]
When a series of motion compensation prediction processing units is completed, it is determined whether or not processing of all desired fields has been completed (step S409). This is determined, for example, based on whether or not the end switch of the high-efficiency encoding device is activated. If the next field is to be processed, the variable is initialized for the encoding of the next motion compensation prediction processing unit, and the process is performed again from the scene change detection. If the operation of the high-efficiency encoding device is finished, the encoding is finished.
[0141]
Next, prediction field processing (step S406 in FIG. 44) in the tenth embodiment will be described with reference to the flowchart in FIG. The field determined to be processed as the prediction field in step S404 in FIG. 44 is blocked into a predetermined size m [pixel] × n [line] within the processing field in the field (step S451). . The block divided into the size of m × n is motion-compensated and predicted (step S452), and the error power P1 is calculated from the error block that is the difference in pixel units between the predetermined area of the past image and the block that has been divided. (Step S453). In addition, the original image AC power P2 in the block state that has been blocked is calculated (step S454).
[0142]
The calculated powers P1 and P2 are compared in magnitude (step S455). If the error power P1 is smaller than the original AC power P2, an error block (difference value of motion compensated block) is selected (step S456). On the other hand, if the error power P1 is larger than the original AC power P2, the input block is selected. (Original image that is still blocked) is selected (step S457). Each selected block is subjected to orthogonal transformation (step S458) and then quantized to a predetermined number of bits set in each sequence (step S459).
[0143]
For example, in the case of orthogonal transform such as DCT, quantization is performed so that a large number of bits are allocated to a low-order sequence in normal DC and AC, and a small number of bits are allocated to a high-order sequence in AC. . The quantized data is converted into a code suitable for transmission (step S460), and the encoded data is transmitted (step S461). Further, it is determined whether or not the processing of one field has been completed by counting the number of processing blocks (step S462). If the processing in one field is not completed, the block processing is performed again. If all the processes in the block in one field are finished, the process in the prediction field is finished.
[0144]
In the tenth embodiment, as shown in FIG. 43, when a scene change occurs in the motion compensation prediction process, the field immediately after the scene change is set as an intra field, thereby improving the subjective evaluation of the image immediately after the scene change. be able to.
[0145]
Eleventh embodiment.
In the tenth embodiment, as shown in FIG. 43, a scene change occurs in the motion compensation prediction process, and the temporal constraint length of the motion compensation process is fixed at 4 fields even if the immediately following field is an intra field. . That is, after the motion compensation prediction process is started, an intra field always appears every four fields. When a scene change occurs, an intra field also exists during the motion compensation process. This is a configuration in which the prediction field is replaced with an intra field.
[0146]
In the eleventh embodiment, as shown in FIG. 46, when a scene change occurs and a field immediately after that is an intra field, the intra field is the first field in a new motion compensation process. That is, the temporal constraint length of the motion compensation process is variable. Normally, for example, as shown in FIG. 46, the time constraint length of the motion compensation process is set to 4 fields, and when a scene change occurs in the motion compensation process, the field immediately after the scene change is set as a new intra field. Motion compensation prediction processing is performed in units of 4 fields starting from the field. If a scene change occurs in the motion compensation process, similarly, the field immediately after the scene change is set as an intra field, and the motion compensation prediction process is performed in units of four fields starting from that field.
[0147]
FIG. 47 shows an overall flowchart of the eleventh embodiment. 47, the same reference numerals as those in FIG. 44 denote the same parts. First, Steps S401 to S406 are the same as those in the tenth embodiment. Intra field processing and prediction field processing in steps S405 and S406 are the same as those in the tenth embodiment. For the field processed as the intra field in step S405, the field number fn = 0 is set in order to switch to the motion compensation prediction processing unit having the processed field as the first field (step S490).
[0148]
For example, as shown in FIG. 46, according to the tenth embodiment, the field number fn changes in order from 0 → 1 → 2 → 3 → 0 →. In the case of the eleventh embodiment, when the field is processed as an intra field even though it is not the first field in the motion compensation processing unit, the field number fn = 0 of the field is forcibly set, and the field is newly moved. The first field in the compensation processing unit. As a result, the temporal constraint length of the motion compensation processing unit becomes variable, and if a scene change appears at a frequency shorter than the temporal constraint length of the motion compensation processing unit set at that time, the motion compensation processing is performed. The time constraint length of the unit is short but continuous. The following steps S407 to S409 are the same as in the tenth embodiment.
[0149]
By performing as in the eleventh embodiment, the subjective evaluation can be improved with the image immediately after the scene change as an intra field. If the frequency of scene changes is longer than the temporal constraint length of the motion compensation processing unit and the absolute number thereof is small, the number of fields in the intra field is smaller than in the third embodiment, and the amount of information can be reduced. .
[0150]
Twelfth embodiment.
In the tenth embodiment and the eleventh embodiment, the field (or frame) in which the scene change is detected is processed as an intra field (or intra frame), but the process is not performed as an intra field (or intra frame). The reference image of the field (or frame) may be an intra field (or intra frame) belonging to the next motion compensation prediction processing unit.
[0151]
A twelfth embodiment will be described with reference to FIG. FIG. 48A shows a state where the motion compensation prediction process in the normal case is performed by the method shown in FIG. In this case, the intra fields are field F10 and field F14. Motion compensation prediction is performed using the field F10 and the field F14 as the first field of the motion compensation prediction processing unit. As shown in FIG. 49B, when a scene change occurs between the field F11 and the field F12 and a scene change is detected in the field F12, a motion compensation prediction processing unit including the field F12 from the field F12 is detected. Are combined with the next motion compensation prediction processing unit, and the fields F12 and F13 perform motion compensation prediction using the intra field belonging to the next motion compensation prediction processing unit as a reference image. . In the next motion compensation prediction processing unit combined at this time, the normal motion compensation prediction processing and the motion compensation prediction processing of the field added above are performed.
[0152]
Thirteenth embodiment.
In the twelfth embodiment, the motion compensation prediction processing unit may be longer than in the normal case. In the thirteenth embodiment, motion compensation prediction processing is performed for a P field (or P frame) that is the length of a normal motion compensation prediction processing unit from a field (or frame) in which a scene change is detected.
[0153]
A thirteenth embodiment will be described with reference to FIG. FIG. 49A shows a state where the motion compensation prediction process in the normal case is performed by the method shown in FIG. In this case, the intra fields are field F10 and field F14. Motion compensation prediction is performed using the field F10 and the field F14 as the first field of the motion compensation prediction processing unit. As shown in FIG. 49B, when a scene change occurs between the field F11 and the field F12 and a scene change is detected in the field F12, four fields (motion compensation prediction) are detected from the field F12 in which the scene change is detected. Since the processing unit is 4 fields), the processing unit for motion compensation prediction is used. Normally, the field F14 that was an intra field in the first field of the next motion compensation prediction processing unit is an intra field in the motion compensation processing unit at that time. The motion compensation prediction process is performed. When the motion compensation prediction process for four fields from the field F12, that is, the field F15 is completed, the original normal motion compensation prediction process is performed from the field F16.
[0154]
Fourteenth embodiment.
In the third to thirteenth embodiments, scene change switching has been described. However, since the reference image is switched according to the number of forced intra mode occurrences of the block, the forced intra mode is changed. A similar method in the case where an image that appears many times, that is, an object that did not exist until one field before or an object that existed until one field suddenly appears in the field or disappears suddenly from the field The reference image can be switched with.
[0155]
Fifteenth embodiment.
From the third embodiment to the thirteenth embodiment, for example, the motion compensation prediction process as shown in FIG. 4 is switched to the motion compensation prediction process as shown in FIG. 29. For example, the change is made as shown in FIG. Any motion compensation prediction process may be performed before, and after detecting a scene change or the like, for example, switching to a motion compensation prediction process in which the amount of generated information is reduced as compared to before the switching as shown in FIG.
[0156]
Sixteenth embodiment.
In the third to fifteenth embodiments, the motion compensation prediction process in units of 4 fields has been described. However, the motion compensation prediction process need not be in units of 4 fields, and can be performed with any number of fields that can perform the motion compensation prediction process. It is.
[0157]
In the third to sixteenth embodiments, even if a scene change occurs within the processing unit of motion compensation prediction as shown in FIG. 50, for example, as shown in FIG. The reference image is switched from the reference image set to, so as not to be affected as much as possible by the scene change, and the video immediately after the scene change is used as the reference image for motion compensation prediction. This field is not used as a reference image for motion compensation prediction, so that it is possible to transmit without minimizing the increase in the code amount due to a scene change and without degrading the video quality.
[0158]
When motion compensation prediction is performed across a normal scene change, the amount of information in the predicted image increases. Therefore, if the field is processed as an intra image with an information amount equivalent to the information amount, the subjective evaluation of the image is improved. By detecting a scene change and performing intra-field coding and intra-frame coding using the image immediately after the scene change as an intra image, the subjective evaluation of the image immediately after the scene change can be improved. In addition, when a scene change occurs, the image immediately after that is treated as an intra image, and the number of generated intra images can be reduced by performing motion compensation prediction using the intra image as the head image, and the amount of generated information can be reduced. Can be reduced.
[0159]
Seventeenth embodiment.
FIG. 51 is a block diagram showing the configuration of the video information recording apparatus and video information reproducing apparatus according to the present invention. 51, reference numerals 101 to 111 are the same as those of the conventional apparatus shown in FIG.
[0160]
The recording operation will be described. The video signal input to the A / D converter 101 is converted into a digital video signal and output to the high efficiency encoder 110. The high-efficiency encoder 110 1 performs redundancy reduction by utilizing autocorrelation of video information, human visual characteristics, deviation of data generation frequency, etc., and compresses information (details will be described later). The output of the high-efficiency encoder 110 is input to the error correction encoder 102, and an error correction code for correcting a transmission path error in recording and reproduction is added.
[0161]
In order to perform high-density recording, and even a small amount of error affects the compressed information, a code having a high error correction capability and a small amount of information to be added is selected. The data to which the error correction code is added is modulated into a recording signal suitable for the magnetic head 106 and the magnetic tape 105 by the modulator 103. The modulator 103 also performs suppression of DC components and low-frequency components for azimuth recording, and addition of a tracking signal that assists tracing of the magnetic head 106. The recording signal modulated by the modulator 103 is recorded on the magnetic tape 105 through the magnetic head 106. The magnetic head 106 is mounted on a rotating head drum 104. When the drum 104 rotates, the magnetic head 106 also rotates, and recording is performed on the magnetic tape 105 by so-called helical scanning.
[0162]
Next, the reproduction operation will be described. A signal recorded on the magnetic tape 105 by the helical scan is picked up by the magnetic head 106 mounted on the rotary head drum 104 and demodulated by the demodulator 107. The demodulated signal is subjected to error detection and error correction by the error correction decoder 108. The error-corrected data is decompressed by the high-efficiency decoder 111 and converted from the compressed code to the original digital video signal. The restored digital video signal is converted into an analog video signal by the D / A converter 109 and output.
[0163]
52 and 53 show an example of a tape format in the seventeenth embodiment. 4-field video information ({720 + 360 × 2} × 480 × 4/2 = 11.06M bits) is compression-encoded to approximately 1.3M bits, and is recorded on 10 tracks along with audio signals and error correction codes. Divided and recorded. In this case, azimuth guard bandless recording, area recording density is about 2.5μm²  / Bit.
[0164]
FIG. 54 is a block diagram showing the internal configuration of the high-efficiency encoder 110 in FIG. 54, 301 is a subtractor that outputs the difference between the input original signal and the prediction signal, 302 is a first switch that selects the input original signal and the output of the subtractor 301, and 303 is a DCT circuit that performs DCT orthogonal transformation. , 304 is a quantizer that quantizes the data to be encoded, and 305 is a variable-length encoder that assigns a short code to frequently-used data and eliminates statistical data redundancy.
[0165]
Reference numerals 306 to 311 constitute a local decoder for obtaining a prediction signal, 306 is an inverse quantizer for returning the quantized data, 307 is an inverse DCT circuit for performing inverse DCT, and 308 is a prediction signal and a difference signal. Are added to each other to restore the original signal, 309 is an image memory for storing locally decoded video data, 310 is a motion compensated prediction circuit that detects the motion of the input original signal and outputs the next prediction data, 311 Is a second switch for switching data input to the adder 308.
[0166]
Next, the operation of the high efficiency encoder 110 will be described. The first field of the recording unit block is encoded as an intra field that does not use inter prediction. The upper side of the first switch 302 is selected, and the input digital video signal is orthogonally transformed by the DCT circuit 303. The converted data is quantized by a quantizer 304, encoded by a variable length encoder 305 into a variable length code such as a Huffman code, and output. At the same time, the quantized data is inversely quantized by the inverse quantizer 306 and input to the inverse DCT circuit 307. In the inverse DCT circuit 307, the orthogonally transformed data is inversely transformed into the original image data and output to the adder 308. In the intra field, the upper side of the second switch 311 is also selected, so that one input of the adder 308 becomes zero, so that the output of the inverse DCT circuit 307 is directly stored in the image memory 309 and stored.
[0167]
Inter-frame prediction is used for encoding the next field. In the inter-surface prediction, the lower side of the first and second switches 302 and 311 is selected. The input digital video signal enters the subtracter 301 and the motion compensation prediction circuit 310. The motion compensated prediction circuit 310 compares the stored image with the input image and outputs a motion vector of the input image and a predicted image used for predictive coding. The subtractor 301 calculates the difference between the input image and the predicted image and outputs it as a prediction error signal to the DCT circuit 303. The amount of information decreases as the prediction error signal has a higher prediction accuracy than the raw image signal. For example, if it is a completely still image, its error signal is zero.
[0168]
The data input to the DCT circuit 303 is orthogonally transformed and quantized by the DCT circuit 303 and the quantizer 304 as in the first field, and further converted into a variable length code by the variable length encoder 305. Is output. On the other hand, the quantized data is sent to an inverse DCT circuit 307 through an inverse quantizer 306, and after undergoing inverse quantization and inverse orthogonal transformation, enters an adder 308. The other input of the adder 308 is supplied with the prediction image used when the prediction error is obtained, and the output of the adder 308 is the same as the input image. The output of the adder 308 is stored in the image memory 309. Similarly, up to n fields are encoded.
[0169]
FIG. 55 shows an example of a change in the data generation amount for each frame. In this example, it can be seen that the amount of information is increased by inserting an intra frame that does not use inter-plane prediction every 8 frames. FIG. 56 shows an example of the relationship between the recording information of each field and the writing to the track. In this example, 4 fields of data are recorded on 10 tracks. The data amount of one field need not be an integral multiple of the recording capacity of the track.
[0170]
Eighteenth embodiment.
In the seventeenth embodiment, 4 fields of data are recorded on 10 tracks, but it is not necessary to record on 10 tracks each time, and 8 or 6 tracks are recorded depending on the amount of information to be recorded. It may be recorded.
[0171]
As described above, in the seventeenth and eighteenth embodiments, since signals of a plurality of fields or frames are collectively recorded on a predetermined number of tracks as one recording unit, if a predetermined number of tracks are reproduced, Since all recorded fields can be reproduced, special playback and editing required for the VTR can be supported. In addition, since the number of tracks to be recorded is selected according to the amount of information to be recorded, useless tracks are not generated and recording and reproduction can be performed for a long time. Further, since there is no need to match the information to be recorded with the recording capacity of each track, there is no waste generated for each track, and efficient recording can be performed. Furthermore, since each recording unit includes an intra image that does not necessarily use inter-plane prediction, a restored image can be easily obtained during special reproduction such as speed search. In addition, the amount of information to be recorded can be reduced from a predicted image using inter-plane prediction.
[0172]
【The invention's effect】
As described above in detail, the video information recording apparatus and the video information reproducing apparatus according to the present invention collectively record signals of a plurality of fields (or frames) on a predetermined number of tracks as one recording unit. There is an effect that can cope with special reproduction and editing required for a VTR or the like.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a digital VTR.
FIG. 2 is a block diagram showing a conventional motion compensation prediction processing apparatus.
FIG. 3 is a diagram illustrating an operation of block selection in a conventional motion compensation prediction processing apparatus.
FIG. 4 is a diagram illustrating a field relationship in motion compensation prediction processing.
FIG. 5 is a diagram illustrating a field relationship in motion compensation prediction processing.
FIG. 6 is a diagram illustrating a code amount and S / N in the case of conventional motion compensation prediction.
FIG. 7 is a diagram illustrating a change in the amount of information for 5 seconds when the reference image is not switched.
FIG. 8 is a diagram showing a change in S / N for 5 seconds when the reference image is not switched.
FIG. 9 is a diagram showing a tape format in the 8 mm video standard.
FIG. 10 is a diagram showing a format of one track in the 8 mm video standard.
FIG. 11 is a diagram showing a winding state of a rotary head drum and a magnetic tape used in 8 mm video.
FIG. 12 is a diagram showing frequency allocation of each signal in the 8 mm video standard.
FIG. 13 is a block diagram showing a configuration of a conventional video information recording / reproducing apparatus.
FIG. 14 is a block diagram showing a configuration of a conventional video information recording / reproducing apparatus.
15 is a timing chart showing a phase relationship between a head switching pulse signal and an input video signal in the video information recording / reproducing apparatus shown in FIGS. 13 and 14. FIG.
16 is a waveform diagram showing a video signal processed by a gate circuit in the video information recording / reproducing apparatus shown in FIGS. 13 and 14. FIG.
17 is a waveform diagram showing a time-axis multiplexed signal in the video information recording / reproducing apparatus shown in FIGS. 13 and 14. FIG.
FIG. 18 is a block diagram showing a configuration of another conventional video information recording / reproducing apparatus.
FIG. 19 is a diagram showing a tape format of a D1 system and a D2 system VTR.
FIG. 20 is a diagram showing overall specifications of a D1 system and a D2 system VTR.
FIG. 21 is a diagram showing tape format specifications of the D1 system and D2 system VTR.
FIG. 22 is a diagram showing travel system specifications of a D1 system and a D2 system VTR.
FIG. 23 is a diagram illustrating a pixel range in which a D1 method and a D2 method VTR are recorded.
FIG. 24 is a block diagram illustrating a configuration of a communication device using a high-efficiency code video information compression method.
FIG. 25 is a diagram for explaining a buffer operation of the high efficiency code communication device;
FIG. 26 is a block diagram illustrating a configuration of a high-efficiency encoding device according to the present invention.
FIG. 27 is a diagram illustrating a field relationship in motion compensation prediction processing.
FIG. 28 is a block diagram showing a configuration of another high-efficiency encoding device of the present invention.
FIG. 29 is a diagram illustrating a field relationship in motion compensation prediction processing.
FIG. 30 is a diagram illustrating a simulation result when there is a scene change.
FIG. 31 is a diagram illustrating a simulation result when there is no scene change.
FIG. 32 is a block diagram showing a configuration of still another high efficiency coding apparatus according to the present invention.
33 is a flowchart of the operation of the high efficiency encoding device shown in FIG. 32. FIG.
34 is a flowchart of intra-field processing in FIG. 33. FIG.
35 is a flowchart of prediction field processing in FIG. 33. FIG.
FIG. 36 is a diagram illustrating a change in the amount of information for 5 seconds when the reference image is switched.
FIG. 37 is a diagram showing a change in S / N for 5 seconds when the reference image is switched.
38 is a flowchart of another prediction field process in FIG. 33. FIG.
39 is a flowchart of yet another prediction field process in FIG. 33. FIG.
40 is a flowchart of reference image switching determination processing in FIG. 39. FIG.
FIG. 41 is a block diagram showing a configuration of still another high efficiency coding apparatus according to the present invention.
FIG. 42 is a diagram showing a block selection operation in the high efficiency encoding device shown in FIG. 41.
43 is a diagram illustrating switching between a reference image and an intra field in the high efficiency coding device illustrated in FIG. 41. FIG.
44 is a flowchart of the operation of the high efficiency encoding device shown in FIG. 41. FIG.
45 is a flowchart of prediction field processing in FIG. 44. FIG.
46 is a diagram showing another switching between the reference image and the intra field in the high efficiency encoding device shown in FIG. 41. FIG.
47 is a flowchart of another operation of the high efficiency encoding device shown in FIG. 41. FIG.
FIG. 48 is a diagram illustrating a field relationship in motion compensation prediction processing.
FIG. 49 is a diagram illustrating field relationships in motion compensation prediction processing.
FIG. 50 is a diagram illustrating switching of reference images.
FIG. 51 is a block diagram showing a configuration of a video information recording apparatus and a video information reproducing apparatus according to the present invention.
FIG. 52 is a diagram showing an example of a tape format according to the present invention.
FIG. 53 is a diagram showing an example of a tape format according to the present invention.
54 is a block diagram showing an internal configuration of the high efficiency encoder in FIG. 51. FIG.
FIG. 55 is a diagram illustrating an example of a change in the amount of data generated for each frame.
FIG. 56 is a diagram for explaining the relationship between record information in each field and writing to a track according to the present invention.
[Explanation of symbols]
2 Blocking circuit, 4 Error power calculation circuit, 5 Original image power calculation circuit, 6 Discrimination circuit, 7 First switch circuit, 16 MC circuit, 19 Second switch circuit, 30 Motion compensation prediction circuit, 31 Judgment device, 32 1st Switch, 33 orthogonal transformation circuit, 34 quantization circuit, 35 second switch, 36 inverse quantization circuit, 37 inverse orthogonal transformation circuit, 40 decision unit, 50 mode counter, 51 direction switching circuit, 52 image memory, 60 image memory, 61 SC detection circuit, 62 first switch circuit, 64 second switch circuit, 103 modulator, 107 demodulator, 110 high efficiency encoder, 111 high efficiency decoder.

Claims (5)

An intra field or an intra frame in which a video signal of n fields or n frames (n is an integer of 2 or more) is used as a processing unit, and at least one field or one frame of the processing unit is encoded in an intra mode;
A video information recording medium in which a video signal of another field or frame is recorded with a prediction field or a prediction frame encoded in a prediction encoding mode using motion compensation prediction using the intra field or the intra frame as a reference image Because
The video information recording medium is composed of a plurality of recording segments obtained by dividing the video information recording medium into a certain information length,
The amount of information recorded as the processing unit is variable, and the processing unit is recorded in an integer multiple recording segment corresponding to the amount of information recorded as the processing unit, and the processing unit is recorded in the integer multiple recording segment. A video information recording medium in which useless data to be discarded at the time of decoding is embedded in the remaining area in the case of being performed. A video signal of n fields or n frames (n is an integer of 2 or more) is used as a processing unit, and a video signal of at least one field or frame in the processing unit is encoded in an intra mode and stored as a reference image Encoding means;
Second encoding means for encoding video signals of other fields or frames in a predictive encoding mode using motion compensated prediction for the reference image;
The amount of information to be recorded as the processing unit is variable, the processing unit is recorded in an integer multiple recording segment corresponding to the information amount, and the remaining processing unit when the processing unit is recorded in the integer multiple recording segment In this area, a means for embedding useless data discarded at the time of decoding is provided,
The video information recording apparatus according to claim 1, wherein the recording segment is obtained by dividing a video information recording medium into a plurality of pieces with a constant information length. a process in which a video signal of n fields or n frames (n is an integer of 2 or more) is used as a processing unit, a video signal of at least one field or frame in the processing unit is encoded in an intra mode, and is stored as a reference image;
Encoding video signals of other fields or frames in a predictive coding mode using motion compensated prediction for the reference image;
The amount of information to be recorded as the processing unit is variable, the processing unit is recorded in an integer multiple recording segment corresponding to the information amount, and the remaining processing unit when the processing unit is recorded in the integer multiple recording segment In this area, a process of embedding useless data discarded at the time of decoding is provided,
The video information recording method according to claim 1, wherein the recording segment is obtained by dividing a video information recording medium into a plurality of pieces with a constant information length. A video information reproducing apparatus for reproducing video information recorded on the video information recording medium according to claim 1,
Means for reading an encoded video signal corresponding to the processing unit from the recording medium by accessing a recording segment head which is the head of the processing unit;
First decoding means for extracting and decoding a video signal of a field or a frame encoded in the intra mode from the read encoded video signal;
Second decoding means for decoding the video signal of the field or frame encoded in the predictive encoding mode based on the video signal decoded by the first decoding means;
A video information reproducing apparatus comprising: means for discarding the embedded useless data. A video information playback method for playing back video information recorded on the video information recording medium according to claim 1,
Reading an encoded video signal corresponding to the processing unit from the recording medium by accessing a recording segment head which is the head of the processing unit;
A first decoding step of extracting and decoding a field or frame video signal encoded in the intra mode from the read encoded video signal;
A second decoding step of decoding the video signal of the field or frame encoded in the predictive encoding mode based on the video signal decoded by the first decoding step;
And a step of discarding the embedded useless data.

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