JP3623481B2 - Vehicle control apparatus for controlling rewriting of nonvolatile memory - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a rewriting system for rewriting a nonvolatile memory of a vehicle control device with data transferred from an external rewriting device.
[0002]
[Prior art]
Currently, vehicles are variously controlled by a plurality of vehicle control devices (hereinafter referred to as “ECUs”). The ECU controls the vehicle based on driving states detected by various sensors mounted on the vehicle. These controls include controls related to the engine such as air-fuel ratio, fuel injection amount, and emissions, and controls related to the vehicle body such as power windows, airbags, and ABS.
[0003]
The ECU receives a central processing unit (CPU), a ROM (read-only memory) that stores control programs and data, a RAM (random access memory) that provides a work area for the CPU, receives signals from various sensors, and various parts of the engine I / O interface for sending control signals to The ROM is typically a rewritable (that is, erasable and writable) nonvolatile memory such as a flash memory or an EEPROM.
[0004]
A system for rewriting data stored in a nonvolatile memory of an ECU is known. This system includes a rewriting device, an ECU having a nonvolatile memory, and a serial communication path connecting them.
[0005]
Japanese Patent Laid-Open No. 9-128229 discloses a rewriting operation comprising the following steps.
[0006]
1) The rewriting device transmits an erase command to the ECU.
[0007]
2) In response to the erase command, the ECU executes an erase operation on the entire area of the nonvolatile memory.
[0008]
3) The rewriting device transmits a data block including an address and data to the ECU.
[0009]
4) The ECU writes the received data in the memory area indicated by the received address.
[0010]
5) Repeat steps 3) and 4) until all data blocks have been written.
[0011]
6) When writing of all data blocks is completed, the ECU writes end data represented by a predetermined code in a predetermined area of the memory.
[0012]
7) The ECU transmits a rewrite completion signal to the rewriting device.
[0013]
In a nonvolatile memory such as a flash memory and an EEPROM, a rewrite operation can be performed on a part of the memory area. FIG. 9 shows a schematic flow of a conventional rewriting process for such a nonvolatile memory. First, the rewriting device requests the ECU to erase the memory area (rewriting area) in which data is to be written. This request is usually made by an erase command including an address field 201 and a size field 202. The address field 201 includes the start address of the rewrite area. The size field 202 includes the size of the rewrite area. The ECU calculates the erase area from the start address and size specified by the erase command. An erase operation is executed on the calculated erase area. In this example, the start address is 3F00 and the size is 128 bytes. Therefore, the area from memory addresses 3F00 to 3F7F is erased.
[0014]
In order to write data to the erased area, the rewriting device sequentially transmits a series of data blocks to the ECU. A data block typically includes an address field 203 and a data field 204. The ECU receives the data block and extracts an address from the address field 203. The ECU writes the data included in the data field 204 in the memory location designated by the extracted address. Referring to the data block 1, the data block 1 is written to the memory address 3F00.
[0015]
FIG. 10 shows an example of a flowchart of a process executed by the rewriting device in the rewriting process shown in FIG. In step S251, the above-described erasure command is transmitted to the ECU, whereby the rewriting process is started. If an erasure completion signal is received from the ECU (S252), the data block is transmitted to the ECU (S253). If a write completion signal is received from the ECU (S254), it is determined in step S255 whether there is a data block waiting for transmission. If there is a data block waiting for transmission, the next data block is transmitted to the ECU. Thus, as shown in FIG. 9, data blocks 1 to n are sequentially transmitted to the ECU. If there is no data block waiting for transmission in step S255, the rewriting device ends the rewriting process.
[0016]
FIG. 11 shows an example of a flowchart of a process executed by the ECU in the rewriting process shown in FIG. This routine is entered when an erase command is received from the rewrite device in step S271 or when a data block is received from the rewrite device in step S274. If an erase command is received from the rewriting device in step S271, as described above, an erase operation is executed on the erase area indicated by the erase command (S272). When the erasing operation is completed, an erasing completion signal is transmitted to the rewriting device (S273), and this routine is exited.
[0017]
As described above with reference to FIG. 9, after the erasure completion signal is transmitted to the rewriting device, transfer of the data block from the rewriting device to the ECU is started. When a data block is received from the rewriting device, the determination in step S271 is No, the determination in step S274 is Yes, and this routine is entered again. In step S275, an address is extracted from the address field of the received data block. Data is extracted from the data field (S276). The extracted data is written in the memory location indicated by the extracted address (S277). When the writing operation is finished, a writing completion signal is transmitted to the rewriting device (S278).
[0018]
[Problems to be solved by the invention]
The rewriting device has a control program for performing a memory rewriting process through communication with the ECU. The start and end addresses of the rewrite area are specified in this control program. Instead of the end address, the size of the rewrite area may be specified. The control program creates an erase command according to the specified start and end addresses.
[0019]
Various programs and data are stored in the nonvolatile memory of the ECU. It often happens that the size of the program / data is changed by modifying the program / data. When the program / data size changes, the end address of the rewrite area for the program / data specified in the control program must be changed. Changing the control program each time the program / data is corrected complicates the management of the program / data specification change.
[0020]
Further, in order to prevent an erasing operation from being performed on an unintended memory area, the rewrite area specified in the control program must be accurate. However, since the control program is changed every time the program / data is corrected, it is impossible to completely prevent the erroneous designation of the rewrite area.
[0021]
Therefore, there is a need for a rewrite system that does not require managing the end address of the rewrite area in memory rewrite processing.
[0022]
[Means for Solving the Problems]
According to one aspect of the present invention, the vehicle control device has a rewritable nonvolatile memory and rewrites the memory with data transferred from an external rewriting device. Each data block has a data field containing data to be written to the memory and an address field containing a memory address to which the data is to be written. The vehicle control device receives the data block transferred from the rewriting device. The address is extracted from the address field of the received data block. It is determined whether the memory area indicated by the extracted address is an erased area. If it is determined that the memory area is an erased area, the vehicle control device extracts data from the data field of the received data block and writes the data in the memory area indicated by the address.
[0023]
According to the present invention, it is determined whether the memory area into which data is to be written is an erased area using the address included in the address field of the data block. If it is determined that the area has been erased, a write operation is performed. Since the rewriting process can be executed using the address included in the data block, it is not necessary to specify the end address of the rewriting area in the control program of the rewriting device. The number of management items in the specification change of the program / data is reduced, so that the complexity of management can be reduced.
[0024]
According to another aspect of the present invention, if it is determined that the memory area is not an erased area, the data written in the area is erased to be an erased area. Data extracted from the data field is written into the erased area.
[0025]
According to the present invention, the erase operation for the area where data is to be written is reliably performed using the address included in the address field of the data block. Since the rewriting process can be executed using the address included in the data block, the management items in the program / data specification change can be reduced, thereby reducing the complexity of the management. In addition, since the erase command is unnecessary, the efficiency of the rewrite process is improved.
[0026]
According to another aspect of the present invention, by comparing the address extracted from the data block with the address of the erased area of the memory, it is determined whether the memory area indicated by the extracted address is an erased area. The By comparing the addresses, it is possible to easily determine whether the area is an erased area. Therefore, it is possible to realize a rewriting process that reduces the management load in the specification change without increasing the load on the vehicle control device.
[0027]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows an overall functional block diagram of a rewriting system according to the present invention. The rewriting system includes an ECU 10 and a rewriting device 20 provided outside thereof.
[0028]
The rewriting device 20 is a regular rewriting device approved by the manufacturer of the vehicle on which the ECU 10 is mounted. The rewriting device 20 is connected to the ECU 10 via a serial communication bus.
[0029]
The rewriting device 20 includes a transmission / reception unit 21 and a data block assembly unit 22. The data block assembling unit 22 assembles a series of data blocks from programs and / or data transmitted to the ECU 10. The program and / or data is transmitted from the transmission / reception unit 21 to the ECU 10 as a series of data blocks.
[0030]
The ECU 10 is typically composed of a microcomputer and circuit elements associated therewith. The ECU 10 includes a central processing unit (hereinafter referred to as “CPU”), a ROM 16 that stores programs to be executed and data, and a RAM (random access memory) that provides a work area during execution and stores calculation results and the like. The ECU 10 further includes an input / output interface that receives detection signals from various sensors provided in the vehicle and sends control signals to each part of the vehicle. The detection signal from the sensor includes signals such as engine speed, engine water temperature, intake air temperature, battery voltage, and ignition switch. The CPU performs an operation using the control program and data stored in the ROM 16 based on the detection signal input from the input / output interface. The CPU outputs the calculation result to each part of the vehicle via the input / output interface, and controls various functions of the vehicle. For simplicity, only ROM 16 is shown in FIG.
[0031]
The ROM 16 is a nonvolatile memory that can erase data stored in a predetermined area and write new data in the area. The ROM 16 can be realized by a nonvolatile memory such as a flash memory and an EEPROM.
[0032]
The address extraction unit 12, the area determination unit 13, the data extraction unit 14, and the writing unit 15 are typically realized as software programs. These programs are stored in, for example, a non-rewritable ROM (not shown). A non-rewritable ROM is a non-volatile memory that cannot change stored data.
[0033]
A non-rewritable ROM can be realized by a mask ROM in which data is determined at the time of manufacture and cannot be erased and written thereafter, or a PROM in which data can be written only once.
[0034]
Alternatively, it may be realized by setting a predetermined memory area of the rewritable (that is, erasable and writable) ROM 16 such as a flash memory or an EEPROM as an unchangeable area.
[0035]
An address and data are extracted from the data block received from the rewriting device 20 by the address extraction unit 12 and the data extraction unit 14, respectively. The area determination unit 13 determines whether the memory area of the ROM 16 indicated by the extracted address is an erased area. If the erased area is determined, the writing unit 15 writes the extracted data into the erased area. If it is determined that it is not an erased area, the area determination unit 13 erases the data stored in the area. Thereafter, the writing unit 15 writes the extracted data in the area where the data has been erased.
[0036]
Hereinafter, an embodiment of an operation for rewriting a program stored in the ROM 16 will be described. However, the following embodiments are similarly applied when rewriting arbitrary data stored in the ROM 16.
[0037]
FIG. 2 shows an example of a program transferred from the rewriting device 20 to the ECU 10. The size of the program 30 is 560 bytes. The program 30 is subdivided into program codes each having a predetermined length (8 bytes in this example). The data block has a data field 32 containing a program code and an address field 33 containing a memory address where the program code is to be written. From the program 30, 70 data blocks are created. Note that the program size, program code length, and number of data blocks shown in FIG. 2 are merely examples.
[0038]
FIG. 3 shows an example of a memory area of the non-volatile memory 40 that implements the ROM 16 according to the first embodiment of the present invention. The nonvolatile memory 40 is divided into a plurality of memory blocks each having a predetermined size. According to the specification of the nonvolatile memory 40, the erasing operation is defined to be executed in units of memory blocks. Write operations can be performed bit by bit.
[0039]
FIG. 3 shows two memory blocks 41 and 42 as an example. The size of the memory block depends on the specifications of the memory 40. In this example, it is assumed that the size of each of the memory blocks 41 and 42 is 512 bytes. Data blocks transferred from the rewriting device are stored in areas 44, 45,. . . 49 are written in order.
[0040]
The ECU 10 has a start address and an end address of each memory block. Further, the ECU 10 has an erased flag for each memory block. When an erase operation is performed on a memory block, the erased flag for the memory block is set.
[0041]
FIG. 4 shows a schematic flow of the rewrite processing according to the first embodiment of the present invention. It is assumed that the data block is written from the start address of the memory block.
[0042]
In step S <b> 51, the rewriting device 20 transmits the data block 1 to the ECU 10. The ECU 10 receives the data block 1. The ECU 10 extracts the address 3F00 from the address field of the data block 1.
[0043]
The ECU 10 compares the address 3F00 with the start and end addresses of each memory block. As a result, it is determined that the address 3F00 is included in the memory block 41 (FIG. 3). The ECU 10 checks the erased flag in the memory block 41.
[0044]
If the erased flag of the memory block 41 is set, the ECU 10 determines that the memory block 41 is an erased area. On the other hand, if the erased flag of the memory block 41 is not set, the ECU 10 determines that the memory block 41 is not an erased area. When determining that the area is not the erased area, the ECU 10 executes an erasing operation on the memory block 41 (step S51). After the erase operation is finished, the erased flag is set for the memory block 41.
[0045]
The ECU 10 extracts the program code from the data field of the data block 1 and writes it in the write area 44 (FIG. 3) starting from the address 3F00 of the memory block 1 (step S51). When the writing of the program code of the data block 1 is completed, the ECU 10 transmits a writing completion signal to the rewriting device 20 (step S52). Here, the process shown in steps S51 and S52 represents one cycle of the rewrite process.
[0046]
In steps S53 and S54, the next rewrite processing cycle is executed. In step S53, the rewriting device 20 transmits the data block 2 to the ECU 10. The ECU 10 extracts the address 3F08 from the address field of the data block 2. The ECU 10 confirms that the address 3F08 is included in the memory block 1. Since the erased flag of the memory block 41 is set, the ECU 10 determines that the memory block 41 is an erased area.
[0047]
The ECU 10 extracts the program code from the data field of the data block 2 and writes it in the write area 45 (FIG. 3) starting from the address 3F08 of the memory block 41 (step S53). When the writing of the program code of the data block 2 is completed, the ECU 10 transmits a writing completion signal to the rewriting device 20 (step S53).
[0048]
The rewriting device 20 sequentially transmits the data blocks 3 to 64 to the ECU 10, and the ECU 10 writes the program code included in these data blocks into the memory block 41.
[0049]
In the rewrite processing cycle of steps S57 and S58, the rewrite device 20 transmits the data block 65 to the ECU 10. The ECU 10 receives the data block 65. The ECU 10 extracts the address 4100 from the address field of the data block 65.
[0050]
Since the address 4100 is not included in the memory block 1, the ECU 10 compares it with the start and end addresses of other memory blocks. As a result, it is determined that the address 4100 is included in the memory block 42 (FIG. 3). The ECU 10 checks the erased flag in the memory block 42.
[0051]
If the erased flag of the memory block 42 is set, the ECU 10 determines that the memory block 42 is an erased area. If the erased flag of the memory block 42 is not set, the ECU 10 determines that the memory block 42 is not an erased area. When determining that the area is not the erased area, the ECU 10 executes an erasing operation on the memory block 42 (step S57). After the erase operation is finished, the erased flag is set for the memory block 42.
[0052]
The ECU 10 extracts the program code from the data field of the data block 65 and writes it in the area 48 (FIG. 3) starting from the address 4100 of the memory block 42 (step S57). When the writing of the program code of the data block 65 is completed, the ECU 10 transmits a writing completion signal to the rewriting device 20 (step S58).
[0053]
In steps S59 and S60, the last rewrite processing cycle is executed. In step S59, the rewriting device 20 transmits the data block 70 to the ECU 10. The ECU 10 extracts the address 4128 from the address field of the data block 70. The ECU 10 determines that the address 4128 is included in the memory block 42. An erased flag is set in the memory block 42. Therefore, the ECU 10 determines that the memory block 42 is an erased area.
[0054]
The ECU 10 extracts the program code from the data field of the data block 70 and writes it in the area 49 (FIG. 3) starting from the address 4128 of the memory block 42 (step S59). When the writing of the program code of the data block 70 is completed, the ECU 10 transmits a writing completion signal to the rewriting device 20 (step S60).
[0055]
In this way, all the program codes of the program 30 are transmitted to the ECU 10. When the rewriting device 20 receives a write completion signal of the data block 70 from the ECU 10, the rewriting device 20 transmits a signal for ending the rewriting process to the ECU 10. In response to this, the ECU 10 resets the erased flag for the memory blocks 41 and 42. The reset timing of the erased flag of the memory block 41 may be when writing to the write area 47 of the memory block is completed.
[0056]
Alternatively, the data block transferred from the rewriting device to the ECU may be of variable length. For example, in order to improve transfer efficiency, a data block can be created so that the program code included in the data field does not include the “FF” byte indicating the free space in the memory. An arbitrary address can be designated as the write start address included in the address field of the data block. In other words, writing may be started from an arbitrary address in the memory block.
[0057]
Thus, the ECU 10 determines whether to perform an erasing operation on the memory block using the write start address included in the address field of the data block. In the rewrite processing according to the present invention, the end address of the rewrite area (address 412F in the example of FIG. 3) is not used. There is no need to designate the end address in the rewriting device 20. Therefore, it is possible to reduce the management load by reducing the management items in the specification change of the program and / or data included in the nonvolatile memory.
[0058]
FIG. 5 shows an example of a memory area of the non-volatile memory 70 that implements the ROM 16 according to the second embodiment of the present invention. The nonvolatile memory 70 is a memory configured to be able to execute erase and write operations in bit units. In other words, erase and write operations can be performed on any area of the non-volatile memory 80.
[0059]
Each of the data blocks transferred from the rewriting device 20 has write areas 71, 72,. . . 76 is written. The ECU 10 has a start address for each writing area. Further, the ECU 10 has an erased flag for each writing area. When an erase operation is performed on a certain write area, an erased flag for the write area is set.
[0060]
FIG. 6 shows a schematic flow of a rewrite process according to the second embodiment. In step S81, the rewriting device 20 transmits the data block 1 to the ECU 10. The ECU 10 receives the data block 1. The ECU 10 extracts the address 3F00 from the address field of the data block 1.
[0061]
The ECU 10 checks the erased flag in the write area 71 (FIG. 5) whose start address is address 3F00. If the erased flag is set, it indicates that the write area is an erased area. The ECU 10 extracts the program code from the data field of the data block 1 and writes it in the area 71 starting from the address 3F00 of the memory block 1.
[0062]
If the erased flag is not set, it indicates that the write area 71 has not been erased. The ECU 10 performs an erasing operation on the writing area 71 (step S81). After the erase operation is finished, the erased flag for the write area 71 is set. The ECU 10 extracts the program code from the data field of the data block 1, and writes the program code in the writing area 71 where the erasing operation has been executed (step S81).
[0063]
When the writing of the program code of the data block 1 is completed, the ECU 10 transmits a writing completion signal to the rewriting device 20 (step S82). The ECU 10 resets the erased flag for the writing area 71.
[0064]
The process shown in steps S81 and S82 represents one cycle of the rewrite process. Each time the ECU 10 receives a data block, it executes a rewrite processing cycle similar to that shown in steps S81 and S82.
[0065]
Alternatively, the data transferred from the rewriting device 20 to the ECU 10 may be variable length data that is equal to or smaller than the size of each writing area (FIG. 5).
[0066]
Thus, the ECU 10 uses the address included in the address field of the data block to determine whether to perform an erasing operation on the area where the data of the data block is written. Also in the rewrite processing according to the second embodiment, the end address of the rewrite area (address 412F in the example of FIG. 5) is not used. Therefore, it is possible to reduce the management load by reducing the management items in the specification change of the program and / or data included in the nonvolatile memory.
[0067]
In the nonvolatile memory as shown in FIG. 3, when the size of the memory block and the size of the data included in each data block are the same, the rewrite processing can be performed according to the second embodiment. .
[0068]
The size of the area to be erased is larger than the amount of data written to the memory by one transfer. As long as this condition is satisfied, the size of the area to be erased can be arbitrarily determined in both the first and second embodiments and regardless of the specification of the nonvolatile memory.
[0069]
FIG. 7 shows a flowchart of a process executed by the rewriting device according to an embodiment of the present invention. This process can be applied to both the first embodiment of FIG. 4 and the second embodiment of FIG. In this case, steps S101 to S103 are performed in each rewrite processing cycle shown in FIG. 4 (for example, steps S51 and S52) or in each rewrite processing cycle shown in FIG. 6 (for example, steps S81 and S82). Is done.
[0070]
In step S101, the rewriting device starts the rewriting process by transmitting the data block to the ECU. The rewriting device waits until a rewriting completion signal is received from the ECU (S102). If a rewrite completion signal is received, it is determined whether there is a data block waiting for transmission (S103). If there is a data block waiting for transmission, the process returns to step S101, and the next data block is transmitted to the ECU. If there is no data block waiting for transmission, the rewriting process is terminated.
[0071]
FIG. 8 shows a flowchart of a process executed by the ECU according to one embodiment of the present invention. This process can be applied to both the first embodiment of FIG. 4 and the second embodiment of FIG. In this case, steps S111 to S117 are performed in each rewrite processing cycle (for example, steps S51 and S52) shown in FIG. 4 and each rewrite processing cycle (for example, steps S81 and S82) shown in FIG. The
[0072]
This routine is entered when a data block is received in step S111. In step S112, an address is extracted from the address field of the received data block (S112). In step S113, it is determined whether the area indicated by the extracted address is an erased area. According to the first embodiment described above, the area indicated by the extracted address is a memory block including the address. According to the second embodiment described above, the area indicated by the extracted address is a writing area in which data included in one data block is written starting from the address.
[0073]
If it is determined that the area has been erased, the process proceeds to step S115. If it is determined that the area is not erased, the process proceeds to step S114. In step S114, the data stored in the area indicated by the extracted address is erased to make the area an erased area.
[0074]
In step S115, data is extracted from the data field of the received data block. The extracted data is written into the erased area indicated by the extracted address (S116). When the writing is completed, a writing completion signal is transmitted to the rewriting device (S117).
[0075]
【The invention's effect】
According to the present invention, it is possible to reduce the load of address management in changing the program / data specifications in the nonvolatile memory.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an entire rewriting system in an embodiment of the present invention.
FIG. 2 is a diagram showing the form of transferred programs and data blocks in one embodiment of the present invention.
FIG. 3 is a diagram showing an area of a nonvolatile memory in the first embodiment of the present invention.
FIG. 4 is a diagram showing a schematic flow of rewrite processing in the first embodiment of the present invention.
FIG. 5 is a diagram showing an area of a nonvolatile memory in a second embodiment of the present invention.
FIG. 6 is a diagram showing a schematic flow of rewrite processing in the second embodiment of the present invention.
FIG. 7 is a flowchart of a rewriting process executed by the rewriting device in one embodiment of the present invention.
FIG. 8 is a flowchart of a rewrite process executed by the ECU in one embodiment of the present invention.
FIG. 9 is a diagram showing a schematic flow of rewrite processing in the prior art.
FIG. 10 is a flowchart of rewriting processing executed by a rewriting device in the prior art.
FIG. 11 is a flowchart of a rewrite process executed by an ECU according to a conventional technique.
[Explanation of symbols]
10 ECU
16 ROM
20 Rewriting device

Claims (2)

A vehicle control device having a rewritable nonvolatile memory and rewriting the memory with a series of data blocks transferred from an external rewriting device,
The memory is divided into memory areas specified by a predetermined address range, and each memory area has at least one write area, and the write area is set to a predetermined fixed length. And
Each of the series of data blocks includes a data field including fixed-length or variable-length data set to a size equal to or smaller than the predetermined fixed length of the write area, and a head of the write area where the data is to be written. An address field including an address, and the head address included in the address field is set to be different between the series of data blocks,
The vehicle control device
Receiving means for receiving a data block transferred from the rewriting device;
Address extracting means for extracting the head address from an address field of the received data block;
The start address which is the extraction, as compared to the respective address ranges of said memory areas, identifying means for identifying a memory area having an address range including the head address issued extract,
Area determination means for determining whether the identified memory area is an erased area;
If it is determined that the identified memory area is an erased area, the data in the data field of the received data block is transferred to the write area starting from the extracted start address of the identified memory area. A first writing means for writing;
If it is determined that the identified memory area is not an erased area, the data written in the memory area is erased to an erased area, and the data in the data field of the received data block is A second writing means for writing to a writing area starting from the extracted start address of the erased area;
A vehicle control device comprising: Each of the memory areas is associated with a flag indicating whether the memory area has been erased,
The area determination means is configured to determine whether the memory area is an erased area by examining the flag of the identified memory area;
When the transfer of the series of data blocks ends, the flag setting means for setting the flag for a memory area in which the series of data blocks are written to a value indicating that the series of data blocks has not been erased.
The vehicle control device according to claim 1.

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