JP3621817B2 - Optical pulse radar device and optical pulse light receiving device - Google Patents

Description

ただし、Ｖｂはブレークダウン電圧である。
このように、パルスの個数が７ 以下であれば、バイアス電圧はＡＰＤのブレークダウン電圧に設定され、パルスの個数の増加につれて段階的にブレークダウン電圧から低下せしめられる。
【００３３】
ラッチ回路２３と２４に保持したカウンタ２１と２２のＭＳＢとＬＳＢとを直ちに出力端子３０と３１に出力せずに、ラッチ回路２５と２６と分周回路とを利用して送信周期の何回かに一回だけ出力端子３０と３１とに出力するようにしたのは、送信周期の各回ごとに出力するとした場合のバイアス電圧の頻繁な昇降を回避するためである。なお、ラッチ回路２３と２４に保持したカウンタ２１と２２のＭＳＢとＬＳＢとは、出力端子３２と３３とを経て図１の距離計測回路５に供給される。距離計測回路５は、出力端子３２と３３から供給されたカウンタ２１と２２のＭＳＢとＬＳＢとからバイアス電圧制御回路６で計測されたパルスの個数に基づき雑音から分離した信号パルスの信頼度を検出する。
【００３４】
バイアス電圧のフィードバック制御に基づき、図５の波形図に例示するように雑音除去回路４による雑音除去前の２値化信号中のパルスの個数が減少する共に理想的には雑音除去後の２値化信号中に信号のみが含まれるような状態が実現される。
【００３５】
以上、電圧比較器３並びに、距離計測回路５及びバイアス電圧制御回路６の間に雑音除去回路４を設置する構成を例示した。しかしながら、この雑音除去回路４を設置することなく、電圧比較器３の出力端子を距離計測回路５とバイアス電圧制御回路６の入力端子に直結する構成を採用することもできる。
【００３６】
また、検出可能な最遠点を２００ メートルと想定し、これに対応した雑音除去回路の遅延時間として１．４５μｓｅｃ の値を設定した。しかしながら、検出可能な最遠点としては数メートルの範囲まで設定可能であると共に、この最遠点に応じた遅延時間を設定できる。
【００３７】
また、最遠点の短縮に伴い放射レーザビームの出力を低下できるため、エネルギー密度に関するＪＩＳの安全基準から定められている繰り返し周期を遅延時間の程度にまで短縮することにより両者を一致させることもできる。
【００３８】
さらに、パルスの計数を信号の出現が期待される期間にわたって行う構成を例示した。しかしながら、このパルスの計数は雑音に基づき発生するパルスの計数であるから、その計数期間は信号の出現が期待されない期間であってもよいし、両者を含む期間であってもよい。また、このパルスの計数期間は任意の適宜な長さに設定できる。
【００３９】
【発明の効果】
以上詳細に説明したように、本発明の光パルスレーダ装置と光パルス受光装置は、２値化信号、あるいは自己相関操作によって雑音が除去された２値化信号の個数を計数し、この個数が増加するほど減少するようにＡＰＤのバイアス電圧を変更する構成であるから、ＡＰＤの後段においてアンド操作によるＳ／Ｎの改良を行う受光回路や、あるいは、そのような改良を行わない一般的な受光回路に対してもＳ／Ｎの最大化の観点からバイアス電圧の最適化を図ることができるという効果が奏される。
【図面の簡単な説明】
【図１】本発明の一実施例のパルスレーザ・レーダ装置の構成を示すブロック図である。
【図２】図１のバイアス電圧制御回路の構成の一例を示す回路図である。
【図３】上記実施例のパルスレーザ・レーダ装置の動作を説明するための波形図である。
【図４】図１の雑音除去回路４の機能を説明するための波形図である。
【図５】図１の雑音除去回路４の機能を説明するための波形図である。
【図６】ＡＰＤの降伏電圧近傍における印加電圧と増倍率との関係の典型的な一例を示す特性図である。
【符号の説明】
１ 送光回路
１ａ レーザダイオード
１ｂ レーザダイオード駆動回路
１ｃ，１ｄ シュミットトリガ回路
１ｇ 送信タイミング信号発生回路
２ 受光回路
２ａ ＡＰＤ
３ ２値化回路
３ａ 電圧比較器
４ 雑音除去回路
４ａ 遅延回路
４ｂ ２入力アンドゲート
５ 距離計測回路
６ バイアス電圧制御回路
７ バイアス電圧供給回路[0001]
[Industrial application fields]
The present invention relates to an optical pulse radar device or the like used for a berthing speedometer, and more particularly to an optical pulse radar device or the like having an optimum control function of an avalanche photodiode (APD) bias voltage. .
[0002]
[Prior art]
Conventionally, by emitting a pulsed light beam (light pulse) from a light emitting element such as a laser diode and receiving the reflected light pulse generated by the reflection of the object, the distance to the object that generated the reflected light pulse, etc. An optical pulse radar device that obtains information on the object has been developed. This type of optical pulse radar equipment is very different from optical communication equipment that uses high-quality optical fiber as a transmission line, and a considerable amount of natural light such as sunlight or artificial light such as illumination light is used as background light. Used outdoors to emerge. For this reason, in order to remove noise or unnecessary signals due to such background light, the light transmission operation and the light reception operation of the reflected light are repeated many times at a constant period, and the time average is obtained for the light reception result. Appropriate statistical processing such as conversion is performed.
[0003]
In such an optical pulse radar apparatus, an avalanche photodiode (APD) having a photocurrent multiplication function has been used to receive a weak reflected light pulse coming from a distance with high sensitivity. In general, the relationship between the bias voltage Va and the multiplication factor in the vicinity of the APD breakdown voltage (breakdown voltage Vb) is such that the multiplication factor sharply changes as the bias voltage increases or decreases as shown in FIG. . When the bias voltage of the APD exceeds the breakdown voltage, the dark current amplification factor Md continues to increase sharply, but the photocurrent multiplication factor Mp decreases on the contrary, and the S / N rapidly deteriorates. For this reason, from the viewpoint of optimizing the S / N of the light receiving circuit, normally, the bias voltage of the APD is set to a value lower than the breakdown voltage by a predetermined ratio.
[0004]
In addition, since the breakdown voltage of the APD shows a temperature characteristic of about 0.6 vol / ° C in the range of 100 volt to 150 volt, the bias voltage is set to a value lower than the breakdown voltage by a predetermined ratio over a wide temperature range. Therefore, a diode for temperature compensation is used in the bias circuit. There is also an automatic gain control loop system that controls the bias voltage so as to keep the output of the APD constant. In such an automatic gain control loop, an upper limit value or a lower limit value may be set for the bias voltage for the purpose of protecting the APD from destruction, as described in JP-A-9-270526. is there.
[0005]
According to a patent application (Japanese Patent Application No. 8-358671) entitled “Radar device and signal receiving device” related to the prior application of the present applicant, the laser light pulse is changed according to the farthest point of the detection limit of the radar device. By radiating two of them separated by a set predetermined time and creating a logical product of the subsequent received light pulse received by the APD and the preceding received light pulse delayed by the predetermined time, And a technique for improving only S / N by canceling out only noise components that appear randomly in subsequent received light pulses. The noise removal technique of the prior application is greatly characterized in that it is performed not by software processing at the back end such as a data processor at the subsequent stage but by hardware processing at the front end.
[0006]
[Problems to be solved by the invention]
The signal receiving apparatus of the prior application improves the S / N of the received light pulse by creating a logical product of the subsequent received light pulse received by the APD and the preceding received light pulse delayed by a predetermined time. Yes. As a result, the optimum bias voltage that has been conventionally set to maximize the S / N, that is, the break, for the light receiving circuit that does not improve the S / N by creating such a logical product in the subsequent stage of the APD. Fixing to a value lower than the down voltage by a predetermined ratio is not always the best.
[0007]
Accordingly, one object of the present invention is to provide an S / N for a light receiving circuit that improves S / N by creating a logical product in the subsequent stage of APD, or a general light receiving circuit that does not make such improvement. From the viewpoint of maximizing N, the optimization is to dynamically change the bias voltage according to the actual situation.
[0008]
[Means for Solving the Problems]
The optical pulse radar apparatus according to the first aspect of the invention operates by receiving a light transmission circuit that emits preceding and succeeding light pulses at a predetermined time interval and a variable bias voltage, and the emitted preceding and succeeding light pulses are operated. A light receiving circuit including an avalanche photodiode that receives a reflected pulse of an optical pulse and outputs a preceding and succeeding received light pulse signal, and compares the preceding and succeeding received light pulse signals with a predetermined reference voltage, and compares the preceding and succeeding received light signals. Noise is generated by creating a logical product of a binarization circuit that outputs a binarized signal, and a signal obtained by delaying the preceding binarized signal by the predetermined time interval and the subsequent binarized signal. The noise removal circuit to be removed and the number of pulses in the output of the noise removal circuit or the binarization circuit are counted, and the bias voltage of the avalanche photodiode is changed according to the counted number. And a bias voltage control circuit for.
[0009]
The optical pulse radar device according to the second aspect of the present invention is obtained by removing the noise removal circuit from the optical pulse radar device according to the first aspect of the present invention. The third and fourth inventions are optical pulse light receiving circuits configured by removing a light transmission circuit from the optical pulse radar apparatus according to the first and second inventions.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
According to a preferred embodiment of the first invention, the bias voltage of the avalanche photodiode is substantially equal to the breakdown voltage when the counted number of binarized signals is not more than a predetermined value. It is configured to be set to a value and to be lowered below a value substantially equal to its breakdown voltage as the number of counted binarized signals increases.
[0011]
According to another preferred embodiment of the first aspect of the invention, the predetermined time interval for the emission of the optical pulse in the light transmission circuit is equal to the binary signal in the noise removal circuit. By setting using a delay circuit for delaying by this time, deterioration of accuracy based on a delay time delay is avoided, and the manufacturing cost is reduced and the apparatus is downsized. According to still another preferred embodiment of the optical pulse radar apparatus of the present invention, the emission of the preceding and subsequent optical pulses is repeated at a predetermined time interval.
[0012]
【Example】
FIG. 1 is a block diagram showing the configuration of an optical pulse radar apparatus according to an embodiment of the present invention. Reference numeral 1 denotes a light transmission circuit including a laser diode 1a and a drive circuit 1b, and 2 includes an APD 2a, a resistor and a capacitor. Light receiving circuit, 3 is a binarizing circuit comprising a voltage comparator and a reference voltage supply source, 4 is a noise removing circuit comprising a delay circuit 4a and a 2-input AND gate 4b, 5 is a distance measuring circuit, 6 is a bias voltage control circuit, Reference numeral 7 denotes a bias voltage supply circuit.
[0013]
In the delay circuit 4a in the noise removal circuit 4, the pulsed laser light emitted from the light transmission unit 1 is set to the farthest point of 200 meters, which is set in advance as the detection limit of the optical pulse radar apparatus of this embodiment. There is a delay time equal to the time required to travel between them (propagating a total distance of 400 meters). The delay time is theoretically 1.33 μsec, but in practice, a certain margin in consideration of the temperature change of the delay time is added to the theoretical value to obtain 1.45 μsec (at an ambient temperature of 20 ° C.). The delay time is set. This delay circuit 4a is realized, for example, by serially connecting about 120 74AC04 having a structure in which six inverters each having a delay time of 2 nsec are connected in series.
[0014]
The temperature characteristic of the delay circuit 4a is 2 nsec / ° C., and the assumed ambient temperature of this type of radar device premised on outdoor use is in a wide range of −40 ° C. to + 80 ° C. Two delay circuits are required for delaying the transmission timing signal and for delaying the binarized signal to be denoised. However, each delay circuit is used to remove only the noise without erasing the signal. The delay times set in the circuit must match exactly. However, considering the temperature change rate and the wide temperature range, it is extremely difficult to accurately match the delay times of the two delay circuits over the entire temperature range. Therefore, by adopting a configuration in which such a delay circuit is shared for delaying the transmission timing signal and for delaying the binarized signal to be denoised, the delay time is matched over a wide temperature range. Further, since such a delay circuit becomes large and expensive, the common use of the delay circuit makes it possible to reduce the size and cost of the optical pulse radar apparatus as a whole.
[0015]
In addition to the laser diode 1a and its drive circuit 1b, the light transmission circuit 1 includes Schmitt trigger circuits 1c and 1d, low-pass filters 1e and 1f, and a transmission timing signal generation circuit 1g. A transmission timing signal a having a period of 3.33 msec as shown in the waveform diagram of FIG. 3 generated by the transmission timing signal generation circuit 1g passes through an OR gate 4c in the noise removal circuit 4 and is divided into two, one of which is a delay circuit 4a. The other is input to the Schmitt trigger circuit 1c through the low-pass filter 1e. The Schmitt trigger circuit 1c generates a sharp pulse in synchronization with the rising edge of the transmission timing signal, and this is supplied to the laser diode drive circuit 1b. The laser diode driving circuit 1b operates in synchronization with the sharp pulse, and a sharp pulsed laser beam having a half width of several seconds is emitted from the laser diode 1a .
[0016]
On the other hand, the transmission timing signal supplied to the delay circuit 4a through the OR gate 4c in the noise removal circuit 4 is divided into two after receiving a delay of 1.45 μsec in this delay circuit, one of which is one of the two-input AND gate 4b . The other is supplied to the input terminal, and the other is supplied to the Schmitt trigger circuit 1d through the low-pass filter 1f. The Schmitt trigger circuit 1 d generates a sharp pulse in synchronization with the rising edge of the transmission timing signal that has received a delay of 1.45 μsec, and supplies this to the laser diode drive circuit 1 b. The laser diode driving circuit 1b operates in synchronization with the sharp pulse, and a sharp pulsed laser beam having a half width of several nsec is emitted from the laser diode 1a .
[0017]
In this way, a pair of optical pulses composed of the preceding and succeeding ones is emitted from the light transmitting unit 1 at an interval of 1.45 μsec determined from the detection limit of the farthest point and the temperature characteristics of the delay circuit. The emission of the pair of light pulses by the light transmitting unit 1 is repeated at a period of 3.33 msec. This 3.33 msec light transmission period is based on the JIS safety standard regarding the energy density that is set so that a failure does not occur even if the user of this radar apparatus receives a laser pulse by mistake, and in the laser drive circuit 1b. Is set in consideration of the time required for charging of the high-voltage charging / discharging circuit performed in the above.
[0018]
The light pulse radiated from the light transmitting unit 1 is reflected by an object to be detected or the like, and enters the APD 2a of the light receiving circuit 3 as a reflected light pulse. This reflected light pulse appears as a preceding and subsequent reflected light pulse having an interval of 1.45 μsec corresponding to the preceding and succeeding light pulses emitted from the light transmitting section 1 at an interval of 1.45 μsec. The APD 2a operates under a bias voltage Va in the vicinity of the breakdown voltage Vb supplied from the bias voltage supply circuit 7, and enters a low-impedance breakdown state whenever a reflected light pulse is incident. The voltage Vs at one input terminal of the comparator 3 is increased. Along with this breakdown, the voltage between the terminals of the APD 2a drops below the breakdown voltage, and as a result, the APD 2a returns to the state immediately before the breakdown in a very short time.
[0019]
Along with this, the voltage Vs output from the light receiving circuit 2 changes in a pulse shape such that the voltage Vs rises steeply and then falls sharply each time the preceding and subsequent reflected light pulses are incident. The voltage comparator 3 converts the input analog voltage Vs into a digital signal by raising its output in a pulse form from low (0 volt) to high (5 volt) for a very short time when the voltage Vs exceeds the reference voltage Vref. Output.
[0020]
The digital signal output from the voltage comparator 3 passes through an OR gate 4c in the noise removal circuit 4 in the subsequent stage and is divided into two, one of which is directly supplied to one input terminal of the 2-input AND gate 4b, and the other is After being delayed by 1.45 μsec in the delay circuit 4a, it is supplied to the other input terminal of the 2-input AND gate 4b. The preceding one of the pair of reflected pulses is delayed by 1.45 μsec by the delay circuit 4a and then supplied to one input terminal of the 2-input AND gate 4b. At the same time, it is emitted from the light transmitting section 1 with a delay of 1.45μsec. If the subsequent signal reflected by the object is directly supplied to the other input terminal of the 2-input AND gate 4b without passing through the delay circuit 4a, the received signal from which the noise is removed from the 2-input AND gate 4b is obtained. Is output. The reason why the noise of the received signal is removed by the circuit combining the delay circuit 4a and the 2-input AND gate 4b is as follows.
[0021]
That is, as illustrated in the waveform diagram of FIG. 4, the analog voltage Vs output from the light receiving circuit 2 includes, for example, shot noise illustrated by a thin vertical line in addition to a signal component by reflected light illustrated by a thick vertical line. A noise component is included, and its binarized output becomes Ds. The analog voltage Vs and the binarized output Ds at two time points separated by 1.45 μsec are as illustrated with subscripts 1 and 2, respectively, and the logical product of the binarized outputs Ds1 and Ds2 is noise. This is the removal signal C. Signals appearing in each of the binarized outputs Ds1 and Ds2 have a correlation, but noise that appears at random has no correlation, and most of them are removed by taking a logical product. However, a random noise component that happens to occur at the same time after one transmission cycle or an unnecessary component that lacks complete randomness due to background light or the like may remain in the noise removal signal C.
[0022]
The distance measurement circuit 5 performs statistical processing on the received light signal C including some noise supplied from the noise removal circuit 4 to extract the signal component from the noise component, and receives the reflected pulse light at the reception time point. Is detected. The distance measuring circuit 5 is necessary for the laser beam to reciprocate between the object and the object based on the difference between the received time of the reflected pulsed light and the light transmission time indicated by the transmission timing signal delayed by 1.45 μsec. The distance to the object causing the reflection is calculated and displayed by detecting the propagation time and dividing the half by the speed of light.
[0023]
The extraction of the received light signal performed in the distance measuring circuit 5 appears at the same time every time unless the speed of the object that has generated the reflected light is extremely high. It is done using the property of not. This light reception signal extraction processing is realized by hardware processing using a logic circuit or software processing using a digital processor. In order to simplify the distance measuring circuit 5 and improve the processing speed, it is necessary to reduce the processing load. For this purpose, it is necessary to remove noise components as much as possible in the previous stage.
[0024]
As one method for achieving this object, it is conceivable to connect the above-described noise removal circuit 4 in series over a number of stages. However, since the delay circuit 4a is realized by connecting a large number of gate circuits in series as described above, it becomes large and expensive. Therefore, the configuration in which the delay circuit 4a is connected in multiple stages has a large radar device as a whole.・ There is a problem of making it expensive.
[0025]
Therefore, in this embodiment, the number of pulses indicating the amount of noise that could not be removed included in the noise-removed signal C output from the noise removal circuit 4 is counted by the bias voltage control circuit 6 , and the total number is calculated. As the numerical value increases, control signals i and j for controlling the bias voltage supplied to the light receiving circuit 2 to be lowered from the breakdown voltage are supplied to the bias voltage supply circuit 7. This is because as the number of pulses included in the noise-removed signal increases, the APD bias voltage is closer to the breakdown voltage, and it can be considered that a lot of shot noise is reflected.
[0026]
The bias voltage supply circuit 7 includes a transistor Q, a shunt regulator SR, temperature compensation diodes d1, d2, and d3. The reference terminal voltage Vr of the shunt regulator SR changes according to the combination of low (0V) / high (5V) of the control signals (i, j) supplied from the bias voltage control circuit 6 to the input terminals I ₁ and I _2. As the count value of the number of pulses increases, the bias voltage value supplied to the light receiving circuit 2 is lowered from the breakdown voltage. When a breakdown voltage of 150 volt is selected as the APD 2a, the breakdown voltage increases with temperature at a rate of 0.6 volt / ° C. The resistance values of the resistors r1 to r6 are 1 MΩ, 10 KΩ, 68 KΩ, 10 KΩ, 1 MΩ, and 510 KΩ in the same order. In order to compensate for the temperature characteristics of the APD, the reference terminals of the shunt regulator SR and the grounding point Three temperature compensating silicon diodes d1, d2, and d3 having a temperature characteristic of the forward voltage Vd of −2 mV / ° C. are connected in series.
[0027]
That is, since the reference terminal voltage Vr of the shunt regulator changes with a temperature coefficient of about 6 mV / ° C., the bias voltage Va is
Va = (Vr−Vd + 6 mv / ° C · ΔT ° C) (1 + r1 / r2)
Thus, the temperature of the bias voltage Va changes with a slope of 600 mv / ° C.
[0028]
FIG. 2 is a circuit diagram showing an example of the configuration of the bias voltage control circuit 6 in FIG. 1. Reference numerals 11 to 17 denote various gate circuits, 20, 21 and 22 denote counters, 23 to 26 denote latch circuits, and 27 to 29 denote circuits. Input terminals 30 to 33 are signal output terminals. Also, various signal lines with the same alphabets b to j shown in FIG. 3 appear on various signal lines with the lower case alphabets b to j shown in FIG. The operation of the bias voltage control circuit of FIG. 2 will be described below with reference to the waveform diagram of FIG.
[0029]
Two 4-bit counters 21 and 22 connected in cascade are for counting the number of pulses remaining in the signal from which noise has been removed, and each is supplied to the input terminal 28 prior to the start of the counting. The transmission timing signal having a period of 3.33 msec is cleared by a timing signal k delayed by 1.45 μsec. The delayed transmission timing signal k is also supplied to a noise count gate signal generation circuit composed of AND gates 13 and 14, and rises with a delay of 1.45 μsec from the rise of the transmission timing signal, and further for 1.45 μsec. A noise count gate signal b that maintains the high state is generated.
[0030]
With this noise count gate signal b, the NAND gate 11 is opened over a period of 1.45 μsec after 1.45 μsec from the rise of the transmission timing signal, and is output from the noise removal circuit 4 to the counters 21 and 22 via the input terminal 27 and the NAND gate 11. The number of pulses remaining in the supplied noise-removed signal c is counted. The MSB (d) of the counter 21 and the LSB (e) of the counter 22 are latch circuits in synchronism with latch pulses supplied from the inverter 15 to the latch circuits 23 and 24, respectively, when the noise count gate signal b falls. 23 and 24, respectively, to generate binary signals f and g.
[0031]
The MSB of the counter 21 and the LSB of the counter 22 held in each of the latch circuits 23 and 24 are supplied to a latch circuit 25 and 26 from a frequency dividing circuit composed of a 4-bit counter 20 and a bit selection switch 18. The binary signals i and j are generated in the latch circuits 25 and 26 in synchronization with the latch pulse h. These binary signals i and j are supplied to the input terminals I ₁ and I ₂ of the bias voltage supply circuit 7 of FIG. As a result, the bias voltage is changed over four ranges in accordance with the range of four types of count values specified by the combination of the high or low of the MSB (d) of the counter 21 and the LSB (e) of the counter 22.
[0032]
The relationship between the number of pulses, counter bits, and bias voltage is as follows.

However, Vb is a breakdown voltage.
Thus, if the number of pulses is 7 or less, the bias voltage is set to the breakdown voltage of the APD, and is gradually decreased from the breakdown voltage as the number of pulses increases.
[0033]
The MSB and LSB of the counters 21 and 22 held in the latch circuits 23 and 24 are not immediately output to the output terminals 30 and 31, but are transmitted several times using the latch circuits 25 and 26 and the frequency dividing circuit. The reason for outputting to the output terminals 30 and 31 only once is to avoid frequent increase / decrease of the bias voltage when output is performed at each transmission cycle. The MSB and LSB of the counters 21 and 22 held in the latch circuits 23 and 24 are supplied to the distance measuring circuit 5 of FIG. The distance measuring circuit 5 detects the reliability of the signal pulse separated from the noise based on the number of pulses measured by the bias voltage control circuit 6 from the MSB and LSB of the counters 21 and 22 supplied from the output terminals 32 and 33. To do.
[0034]
Based on the feedback control of the bias voltage, the number of pulses in the binarized signal before noise removal by the noise removal circuit 4 is reduced and ideally the binary value after noise removal, as illustrated in the waveform diagram of FIG. A state in which only the signal is included in the digitized signal is realized.
[0035]
The configuration in which the noise removal circuit 4 is installed between the voltage comparator 3 and the distance measurement circuit 5 and the bias voltage control circuit 6 has been illustrated above. However, a configuration in which the output terminal of the voltage comparator 3 is directly connected to the input terminals of the distance measuring circuit 5 and the bias voltage control circuit 6 can be adopted without installing the noise removing circuit 4.
[0036]
Further, assuming that the detectable farthest point is 200 meters, a value of 1.45 μsec is set as the delay time of the noise removal circuit corresponding to this. However, the farthest point that can be detected can be set up to a range of several meters, and a delay time corresponding to the farthest point can be set.
[0037]
In addition, since the output of the emitted laser beam can be reduced with the shortening of the farthest point, it is possible to match the two by shortening the repetition period determined from the JIS safety standards for energy density to the extent of the delay time. it can.
[0038]
Further, the configuration in which the pulse count is performed over a period in which the appearance of the signal is expected is illustrated. However, since the pulse count is a count of pulses generated based on noise, the count period may be a period during which no signal appears, or a period including both. The pulse counting period can be set to any appropriate length.
[0039]
【The invention's effect】
As described in detail above, the optical pulse radar device and the optical pulse light receiving device of the present invention count the number of binarized signals or binarized signals from which noise has been removed by autocorrelation operation. Since the APD bias voltage is changed so as to decrease as it increases, a light receiving circuit for improving the S / N by an AND operation in the subsequent stage of the APD, or general light receiving without such improvement The circuit is also advantageous in that the bias voltage can be optimized from the viewpoint of maximizing S / N.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a pulse laser radar apparatus according to an embodiment of the present invention.
2 is a circuit diagram showing an example of a configuration of a bias voltage control circuit in FIG. 1; FIG.
FIG. 3 is a waveform diagram for explaining the operation of the pulse laser radar apparatus according to the embodiment.
4 is a waveform diagram for explaining the function of the noise removal circuit 4 of FIG. 1; FIG.
FIG. 5 is a waveform diagram for explaining the function of the noise removal circuit 4 of FIG. 1;
FIG. 6 is a characteristic diagram showing a typical example of a relationship between an applied voltage and a multiplication factor in the vicinity of the breakdown voltage of APD.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Light transmission circuit 1a Laser diode 1b Laser diode drive circuit 1c, 1d Schmitt trigger circuit 1g Transmission timing signal generation circuit 2 Light reception circuit 2a APD
3 Binarization circuit 3a Voltage comparator 4 Noise removal circuit 4a Delay circuit 4b 2-input AND gate 5 Distance measurement circuit 6 Bias voltage control circuit 7 Bias voltage supply circuit

Claims (8)

A light transmitting circuit that emits preceding and following light pulses at predetermined time intervals;
A light receiving circuit including an avalanche photodiode that operates by receiving a changeable bias voltage, receives reflected light pulses of the emitted preceding and succeeding light pulses, and outputs preceding and succeeding received light pulse signals;
A binarization circuit that compares the preceding and succeeding received light pulse signals with a predetermined reference voltage and outputs preceding and succeeding binarization signals;
A noise removal circuit for removing noise by creating a logical product of the preceding binarized signal delayed by the predetermined time interval and the subsequent binarized signal;
A bias voltage control circuit that counts the number of pulses included in the output of the noise removal circuit or the binarization circuit and changes the bias voltage of the avalanche photodiode according to the counted number. A characteristic optical pulse radar device. In claim 1,
The bias voltage of the avalanche photodiode is set to a value approximately equal to the breakdown voltage when the counted number of binarized signals is equal to or less than a predetermined value, and the counted binarized signal The optical pulse radar apparatus is characterized in that the optical pulse radar apparatus is reduced to a value that is substantially equal to the breakdown voltage as the number of the laser diodes increases. In claim 1 or 2,
The predetermined time interval for emission of the optical pulse in the light transmission circuit is set using a delay circuit for delaying the binarized signal in the noise removal circuit by the predetermined time. A characteristic optical pulse radar device. In claims 1 to 3,
The pulsed optical radar device according to claim 1, wherein the emission of the preceding and succeeding optical pulses is repeated at a predetermined time interval. A light-transmitting circuit that emits a light pulse; a light-receiving circuit that operates by receiving a changeable bias voltage, receives a reflected pulse of the emitted light pulse, and outputs a light-receiving pulse signal; and A binarization circuit that compares a light reception pulse signal with a predetermined reference voltage and outputs a binarization signal, and counts the number of binarization signals output from the binarization circuit, and reduces the number And a bias voltage control circuit for changing a bias voltage of the avalanche photodiode ,
The bias voltage of the avalanche photodiode is set to a value substantially equal to the breakdown voltage when the number of the counted binarized signals is a predetermined value or less, and the bias voltage of the counted binarized signals is An optical pulse radar device characterized by being lowered to a value substantially equal to the breakdown voltage as the number increases . An optical pulse receiving device that receives preceding and following optical pulses that appear at a predetermined time interval,
A light receiving circuit including an avalanche photodiode that operates by receiving a changeable bias voltage, receives the preceding and succeeding light pulses, and outputs preceding and succeeding light receiving pulse signals;
A binarization circuit that compares the preceding and succeeding received light pulse signals with a predetermined reference voltage and outputs preceding and succeeding binarization signals;
A noise removal circuit that outputs a binary signal from which noise has been removed by creating a logical product of the preceding binary signal delayed by the predetermined time interval and the subsequent binary signal When,
An optical pulse light receiving device comprising: a bias voltage control circuit that counts the number of binarized signals from which noise is removed and changes the bias voltage of the avalanche photodiode according to the number. In claim 6 ,
The bias voltage of the avalanche photodiode is set to a value approximately equal to the breakdown voltage when the counted number of binarized signals is equal to or less than a predetermined value, and the counted binarized signal The optical pulse light receiving device is characterized by being lowered to a value substantially equal to the breakdown voltage as the number of the light sources increases. An optical pulse receiving circuit that receives an optical pulse,
Comparing a light receiving circuit including an avalanche photodiode operates by receiving a changeable bias voltage and outputs a light receiving pulse signal by receiving the reflected pulses of light emitted pulses, and the photodetection pulse signal with a predetermined reference voltage The binarization circuit that outputs the binarization signal and the number of binarization signals output from the binarization circuit are counted, and the bias voltage of the avalanche photodiode is changed so as to reduce the number. and further comprising a bias voltage control circuit for,
The bias voltage of the avalanche photodiode is set to a value approximately equal to the breakdown voltage when the counted number of binarized signals is equal to or less than a predetermined value, and the counted binarized signal An optical pulse light receiving device characterized in that the optical pulse light receiving device is reduced to a value that is substantially equal to the breakdown voltage as the number of light sources increases .

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