JP3594808B2 - Inkjet head - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an ink jet head, and more particularly, to a print head of an ink jet recording apparatus, which is suitable for use in recording of a printer, a facsimile, a copying machine, and the like.
[0002]
[Prior art]
16A and 16B are cross-sectional views illustrating an example of an ink jet head disclosed in Japanese Patent Application Laid-Open No. 7-125196. FIG. 16A is a cross-sectional view of a main part, and FIG. In the figure, 1 is a first substrate, 2 is a second substrate, 3 is a third substrate, and these substrates are joined as shown in FIG. A chamber 6, an orifice 7, an ink cavity 8, and the like are formed. A diaphragm 5 is integrally formed on the first substrate 1, and an individual electrode 9 is formed on the second substrate 2 via a gap G with respect to the diaphragm 5. A drive circuit 11 is connected between the individual electrode 9 and the common electrode of the diaphragm 5, and when a voltage is applied between the individual electrode 9 and the common electrode (diaphragm 5) by the drive circuit 11, An electrostatic attractive force acts between the individual electrode 9 and the diaphragm 5 via a gap G, and when the applied voltage is released, the diaphragm 5 rebounds, pressurizes the ink in the ink chamber 6, and pressurizes the ink from the nozzle hole 4. The droplet is ejected and printed on the recording paper 12. Thus, in this ink jet head, the individual electrode and the diaphragm electrode are drawn out on the same planes 1 and 2 respectively, and a voltage is applied there.
[0003]
FIG. 17 is a cross-sectional view of an essential part for describing an example of an ink jet head disclosed in Japanese Patent Application Laid-Open No. 5-169660. The ink jet head is provided along a support 21 and the support 21. An energy substrate 23 provided with energy generating means for generating energy used for discharging ink from the discharge port 22 in accordance with a recording signal; and an energy substrate 23 disposed along the support 21 and via a connection terminal 24 A wiring board 25 for transmitting the recording signal from the recording apparatus main body to the energy substrate 23; and a connection terminal 24 on a side of the support 21 opposite to the side on which the energy substrate 23 is disposed. Is arranged.
[0004]
FIG. 18 is a sectional view of an essential part for explaining an example of an ink jet head (JP-A-7-1251956) previously proposed by the present applicant. This ink jet head has a through hole for embedding a conductor in a glass substrate 31. 32, a conductor is buried therein, the counter electrode 34 of the diaphragm 33 is drawn out to the back surface of the glass substrate 31 through a conductor (not shown) embedded in the through hole 32, and mounted via the bump-shaped conductor 35. So that voltage can be applied. Reference numeral 37 denotes an ink inlet, 38 denotes an ink chamber, and 39 denotes a nozzle. Similar to the ink jet head shown in FIG. 16, a voltage is applied between the opposing electrode (individual electrode) 34 and the diaphragm 33 to vibrate. The plate 33 is bent, and the ink in the ink chamber 38 is ejected from the nozzle 39 by the reaction force.
[0005]
[Problems to be solved by the invention]
In the ink jet head structure disclosed in JP-A-7-125195, since the mounting surface height I on the individual electrode side and the mounting surface height II on the diaphragm side are different, it is necessary to perform a mounting step for each. In addition, it is necessary to draw out the electrodes from the individual electrodes and the area to be mounted from the diaphragm to the mounting area, and the area for mounting the individual electrodes needs to protrude outside the area to be mounted on the electrode on the diaphragm side, Inevitably, the size of the substrate increases.
[0006]
In the ink-jet head structure disclosed in JP-A-5-169660, an energy substrate portion and a drive circuit portion are connected using a flexible substrate, wire bonding, solder, or the like in order to transmit energy to ink.
1) The bending range of the flexible substrate, which is a wiring substrate for transmitting energy, is limited, and the thickness of the support is required.
2) In order to lead the electrode to the back side of the support, a process using wire bonding, a wiring board, and solder connection is performed, which requires time for mounting and increases costs.
[0007]
The structure of the ink jet head disclosed in Japanese Patent Application Laid-Open No. 7-125195 requires a difficult process of making a through hole in a glass substrate and embedding a conductor.
[0008]
The present invention has been made in view of the above-described circumstances, and aims at reducing the size of the substrate, simplifying and reducing the cost of the mounting process, increasing the density of the counter electrode of the diaphragm, simplifying the process, and the like. This is done for the purpose of doing so.
[0009]
[Means for Solving the Problems]
The invention according to claim 1 includes a nozzle, an ink flow path communicating with the nozzle, a vibration plate provided in a part of the flow path, and an individual electrode provided to face the vibration plate. A driving voltage is applied between a common electrode attached to the diaphragm and the individual electrodes, the diaphragm is deformed by electrostatic force, and the inkjet head ejects ink droplets from the nozzles. An electrode take-out pad for applying a potential from the outside to the individual electrode is provided on a surface of the single-crystal silicon substrate opposite to the diaphragm side; The individual electrode and the individual electrode extraction pad are electrically connected by a second conductivity type polycrystalline silicon embedded in the single crystal silicon substrate.
[0010]
According to a second aspect of the present invention, in the first aspect, the first conductivity type single crystal silicon substrate is a single crystal silicon having a surface oriented in a (110) direction, and is embedded in the single crystal silicon substrate. The interface with the second conductivity type polycrystalline silicon is a (111) plane.
[0011]
The invention according to claim 3 has a nozzle, an ink flow path communicating with the nozzle, a vibration plate provided in a part of the flow path, and an individual electrode provided to face the vibration plate. A driving voltage is applied between a common electrode attached to the diaphragm and the individual electrode, the diaphragm is deformed by electrostatic force, and the inkjet head ejects ink droplets from the nozzles. An electrode extraction pad is formed on the surface of the crystalline silicon substrate, and an electrode extraction pad for applying an external potential to the individual electrode is provided on a surface of the single crystal silicon substrate opposite to the diaphragm side, and the individual electrode and the The individual electrode extraction pads are electrically connected by polycrystalline silicon embedded in the single crystal silicon substrate via an insulating film.
[0012]
According to a fourth aspect of the present invention, in the third aspect, the single-crystal silicon substrate is single-crystal silicon whose surface is oriented in the (110) direction, and is embedded in the single-crystal silicon substrate via the insulating film. The interface with the polycrystalline silicon is a (111) plane.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
(Example 1)
FIG. 1 is a view showing the configuration of an ink jet head according to claims 1 and 2 of the present invention. The electrode substrate 210 which forms the diaphragm substrate 110 and the counter electrode 220 of the diaphragm 120 in a wafer size is individually checked after assembly. Shows the state cut out. 1A is a plan view of a main part of the head when viewed from the nozzle side, FIG. 1B is a cross-sectional view taken along the line BB of FIG. 1A, and FIG. 1B is a cross-sectional view taken along a line CC in FIG. 1B, and FIG. 1D is a cross-sectional view taken along a line DD in FIG. The diaphragm substrate 110 is made of, for example, a Si wafer having a (100) plane or a (110) plane on the substrate surface, and the Si wafer is grooved according to the shape of the pressurized liquid chamber, and a diaphragm having a thickness of 5 μm 120.
[0014]
In this embodiment, the electrode substrate 210 on which the counter electrode 220 of the diaphragm 120 is formed is a silicon substrate having a (110) plane on the substrate surface, and the electrode substrate 210 is opposed to the diaphragm 120. A counter electrode 220 is disposed at a position, and a minute interval (gap) 150 is secured between the diaphragm 120 and the counter electrode 220. A polycrystalline silicon 240 having a conductivity type different from the conductivity type of the electrode substrate 210 is formed in the electrode substrate 210 so as to match the position of the counter electrode 220, and the polycrystalline silicon 240 is located on the front side of the electrode substrate 210 via the polycrystalline silicon 240. The potential of the counter electrode 220 facing the diaphragm 120 is drawn to the back side of the electrode substrate 210. Further, a surface of the electrode substrate 210 opposite to the surface on which the counter electrode is formed (hereinafter, this surface is referred to as the back surface (first surface) of the electrode substrate. The surface on which the counter electrode is formed is referred to as the electrode substrate. An external connection pad metal 250 is formed on the surface (referred to as a second surface) so as to be connected to polycrystalline silicon 240.
[0015]
In this embodiment, the impurities in the polycrystalline silicon also diffuse into the single crystal silicon substrate due to the thermal history during the process, and a PN junction is formed in the single crystal silicon. Therefore, the reverse leakage of the PN junction is inferior to that of a normal one made only of single crystal silicon. The diaphragm substrate 110 and the electrode substrate 210 having these configurations are bonded by direct bonding or the like, and the nozzle substrate 310 having the ink supply port 320 and the nozzle hole 330 serving as an ink discharge port is placed on the diaphragm substrate 110. It is stuck to.
[0016]
When a voltage is applied between the diaphragm 120 and the counter electrode 220 in such an ink jet head, an electrostatic attraction acts between the diaphragm 120 and the electrode 220, and the diaphragm 120 bends in the direction of the counter electrode 220. At this time, the liquid chamber 130 is under pressure, and the ink is supplied from the common liquid chamber 140 to the individual liquid chamber 130 via the flow path 160 for supplying ink. When the voltage is turned off, the diaphragm 120 returns to its original position due to the rigidity of Si. At this time, the ink in the individual liquid chamber 130 is pressurized, and the ink is ejected onto the recording paper via the nozzle hole 330.
[0017]
FIG. 2 schematically shows the layout of the pad take-out portion of the ink jet head of the present invention (a diagram viewed from the back surface side of the electrode substrate 210). As described above, the second conductivity type polycrystalline silicon 240 is formed in the electrode substrate 210 made of the first conductivity type semiconductor so as to be in contact with the counter electrode 220, and a contact hole is formed on the back surface side of the electrode substrate 210. Pad metal 250 is formed so as to be in contact with second conductivity type polycrystalline silicon 240 through the same. Further, a pad extraction hole 271 is opened in a part of the passivation film 270 formed on the pad metal.
[0018]
At this time, the pad extraction hole 271 may be opened immediately above or near the second conductivity type polycrystalline silicon 240 as shown in FIG. 2A, or the second hole as shown in FIG. 2B. The metal 280 can be extended from the contact region between the conductive impurity diffusion region 240 and the pad metal 250, and the pad extraction hole 272 can be opened at another location. In some cases, a multilayer metal structure may be used. It is also possible to integrate a switch, a drive circuit, and the like by forming a transistor or the like on the surface of the electrode substrate.
[0019]
3 to 5 are schematic cross-sectional views of a main part for describing a manufacturing process for forming the ink jet head having the configuration shown in FIG. 1, and the manufacturing processes are shown in (A) to (H) in the order of the processes. Although two cross-sectional views are shown in each step, the upper figure corresponds to a cross-sectional view taken along line BB of FIG. 1A, and the lower figure corresponds to a cross-sectional view taken along line CC of FIG. FIG.
[0020]
Step (A) (FIG. 3A): A P-type (110) silicon wafer having a thickness of about 400 μm is used as a wafer for the electrode substrate 210, and a thermal oxide film 260 of about 500 nm is grown on the surface thereof. Subsequently, a resist mask is formed on the back surface of the electrode substrate 210 by using photolithography technology so that a predetermined place is opened, and the oxide film 260 previously grown is etched using the resist mask. The mask is removed to form a wet etching mask made of an oxide film. Using the mask, anisotropic etching of silicon is performed with TMAH (tetramethylammonium hydroxide), and a through hole 211 is opened in the electrode substrate (at this point, the oxide film used as the etching mask remains, but the Removed in the process). When the (110) wafer is anisotropically etched using TMAH, the (111) plane appears as an etch stop plane because the etching rate of the (111) plane is much lower than that of the (110) plane. As a result, by setting the opening direction of the etching mask to a specific direction, both a surface to be etched vertically and a surface to be etched with a taper appear as shown in the figure. At this time, by making the wall surface between the adjacent bits a vertical etching surface, even when the bit interval becomes high, the through holes for the adjacent bits can be separated and opened.
[0021]
Although a p-type substrate is used as the substrate 210 in the above embodiment, an n-type substrate may be used. Further, the thickness of the substrate 210 is not limited to the value described above. Further, in the present embodiment, a through hole is formed in the substrate, but the silicon layer may be left instead of completely penetrating the substrate.
[0022]
Step (B) (FIG. 3B): After removing the oxide film used as the mask on the silicon substrate 210 having the through hole 211 formed in the step (A), the polycrystalline silicon 240 is grown by the CVD method. . The through-hole is filled with the polycrystalline silicon 240 by growing a film thickness of approximately １ ／ of the width in the short direction of the through-hole opened in the step (A). At this time, for example, by mixing PH3 into the reaction gas, n-type polycrystalline silicon can be grown. Another method of introducing an n-type impurity is to grow non-doped polycrystalline silicon to such an extent that the through-hole is not filled, then introduce the impurity by phosphorus deposition, and then re-polycrystalline to fill the through-hole. It is also possible by growing silicon. Subsequent thermal diffusion introduces impurities almost uniformly into the buried polycrystalline silicon. In this embodiment, the p-type substrate 210 is used, so the n-type polycrystalline silicon 240 is buried in the through hole 211. However, when the n-type substrate is used, the p-type polycrystalline silicon is penetrated. Fill in the holes.
[0023]
Step (C) (FIG. 3C): The polycrystalline silicon 240 grown on the surface of the silicon substrate is removed by polishing. In this embodiment, the polycrystalline silicon on the substrate surface is removed by polishing, but may be removed by etching. If the silicon layer is left in step (A) instead of completely opening the through hole, the silicon layer remaining at this point (or in a later step) is also continued to the polycrystalline silicon layer. By removing it, the same structure as when the through hole is formed can be obtained.
[0024]
Step (D) (FIG. 4D): A thermal oxide film 261 of about 500 nm is grown on the substrate surface from which the polycrystalline silicon grown on the surface in the step (C) has been removed.
Step (E) (FIG. 4E): Then, by using a photolithographic etching technique, a part of the counter electrode 220 is brought into contact with the n-type polycrystalline silicon 240 buried in the silicon substrate 210 previously formed. The oxide film 261 at the portion where the counter electrode 220 is to be formed is opened in accordance with the above conditions, and then an impurity such as phosphorus for forming an n-type conductivity type region is implanted by ion implantation. The phosphorus implanted here is activated by a subsequent thermal process to form an n-type conductivity type region, and this n-type conductivity type region becomes the counter electrode 220 of the diaphragm 120. In addition, the thermal oxide film 261 grown earlier forms a gap 150 between the diaphragm 120 and the counter electrode 220 of the diaphragm 120.
[0025]
In the present embodiment, phosphorus is used as an impurity for forming the n-type conductivity type region, but other elements such as arsenic and antimony may be used as long as they are impurities for forming the n-type conductivity type region. Further, when an n-type substrate is used as the electrode substrate, an impurity which forms a p-type conductivity type region, for example, boron or aluminum may be implanted into the electrode portion. In this embodiment, the ion implantation method is used, but the impurity may be introduced by using a vapor phase diffusion method or a solid phase diffusion method. Further, in the present embodiment, the impurity is introduced in the same pattern as the gap formation pattern. However, the impurity may be introduced using a mask different from the gap formation mask. When the impurity is introduced by an ion implantation method, the impurity can be implanted through a thin oxide film, for example, an oxide film of about 250 nm. Although omitted in the present embodiment, an insulating film may be formed on the surface of the counter electrode 220 or the surface of the insulating film may be processed into an uneven shape for insulation between the counter electrode 220 and the diaphragm 120. , Film formation and photolithography / etching techniques. Further, in this embodiment, the gap is formed on the electrode substrate side, but may be formed on the liquid chamber / vibration plate substrate side.
[0026]
Step (F) (FIG. 4F): The electrode substrate 210 on which the gap 150 and the counter electrode 220 are formed in the step (E) and the liquid chamber / diaphragm substrate 110 are bonded by a direct bonding method, and then the electrodes are formed. A contact hole is opened on the back surface of the substrate 210 so as to match the second conductivity type polycrystalline silicon 240, a pad metal 250 for external connection is formed, a passivation film 270 is formed, and a pad opening is performed. Steps subsequent to the formation of the contact holes are performed by film formation and photolithography / etching steps usually used in a semiconductor process. Further, in this embodiment, these steps are performed at this time, but it is also possible to perform all or a part of these steps after forming a liquid chamber to be described later or after attaching the nozzle.
[0027]
Step (G) (FIG. 5G): The silicon / anisotropic etching of the diaphragm / liquid chamber substrate 110 is performed by TMAH (tetramethylammonium hydroxide) to form a common liquid chamber 140 and an individual liquid chamber 130. A portion serving as a flow path 160 for supplying ink from the common liquid chamber 140 to the individual liquid chamber 130 is recessed in advance by etching. The mask for anisotropic etching can be formed before the electrode substrate 210 and the diaphragm / liquid chamber substrate 110 are bonded, after the bonding, or after the electrode substrate metallization process. It is. Further, a substrate in which a vibration plate and a liquid chamber are formed in advance may be joined to an electrode substrate.
[0028]
Step (H) (FIG. 5H): The nozzle substrate 310 having the nozzle holes 330 and the ink supply ports 320 is aligned with the diaphragm substrate 110 and bonded using an epoxy-based adhesive, and the ink jet head is completed. I do.
Although the description is omitted in the present embodiment, it goes without saying that an electrode for fixing the potential of the electrode substrate 210 is also formed.
[0029]
(Example 2)
FIG. 6 is a view for explaining a second embodiment of the ink jet head according to claim 1 or 2. FIG. 6 (A) is a cross-sectional view taken along a line corresponding to line CC in FIG. 1 (A). It is. In the first embodiment described above, the through holes of the electrode substrate 210 are filled only with the polycrystalline silicon 240, but in the second embodiment described below, in addition to the polycrystalline silicon 240, the through holes are filled with the oxide film 241. ing. In operation, the counter electrode 220, the second conductivity type polycrystalline silicon 240, and the metal 250 are conducting as in the first embodiment, and the potential of the counter electrode 220 is reduced by externally connecting to the metal 250 with a pad. Can be
[0030]
7A to 7C are cross-sectional views for explaining a manufacturing process of an electrode substrate for forming the ink jet head having the configuration of FIG. 6, and the manufacturing processes are shown in (A) to (C) in the order of the processes.
[0031]
Step (A) (FIG. 7A): A p-type (110) silicon wafer having a thickness of about 400 μm is used as a wafer for the electrode substrate 210, and a thermal oxide film of about 200 nm is formed on the first surface (back surface) of the substrate 210. After an etching mask consisting of 260 is formed, silicon is anisotropically etched with TMAH (tetramethylammonium hydroxide) to make a hole 211 in the electrode substrate 210. In this embodiment, a p-type substrate is used as the substrate 210, but an n-type substrate may be used. The etching mask is formed by growing a thermal oxide film and then performing photolithographic etching, as in the first embodiment.
[0032]
Step (B) (FIG. 7B): After removing the oxide film 260 used as a mask on the silicon substrate 210 having the hole 211 formed in the step (A), a phosphorus-doped polycrystalline silicon 240 is grown by a CVD method. Then, SOG (Spin on GlAss) 241 is spin-coated, followed by curing. When an n-type substrate is used, boron-doped polycrystalline silicon is grown instead of phosphorus-doped polycrystalline silicon.
[0033]
Step (C) (FIG. 7C): On the first surface (back surface), the SOG 241 and the polycrystalline silicon 240 are removed by polishing. On the second surface (surface), the polycrystalline silicon layer 240 is removed by polishing, and the silicon substrate 210 is subsequently polished until the embedded polycrystalline silicon 240 appears on the surface.
Thereafter, similarly to the first embodiment, the inkjet shown in FIG. 6 is performed through processes such as formation of a gap and a counter electrode, bonding with a liquid chamber / diaphragm substrate, metallization of the back surface of the electrode substrate, formation of a liquid chamber, and nozzle bonding. The head is completed. According to such a configuration and a manufacturing method, it is possible to reduce the growth thickness of polycrystalline silicon as compared with the first embodiment.
[0034]
(Example 3)
FIG. 8 shows a third embodiment of the ink jet head according to claim 1 or 2, and FIG. 8 is a cross-sectional view taken along a line corresponding to line CC in FIG. 1 (A). The difference from the second embodiment is that in order to increase the contact area between the polycrystalline silicon 240 and the metal 250, the polycrystalline silicon 240 is provided not only on the substrate through-hole portion but also on the back surface of the substrate. .
[0035]
FIG. 9 is a cross-sectional view for explaining a manufacturing process of the electrode substrate for forming the ink jet head having the configuration shown in FIG. 8, and the manufacturing processes are shown in (A) to (D) in the order of the processes.
[0036]
Step (A) (FIG. 9A): A p-type (110) silicon wafer having a thickness of about 400 μm was used as a wafer for the electrode substrate 210, and an etching mask 260 made of a thermal oxide film of about 500 nm was formed on the surface thereof. Thereafter, silicon is anisotropically etched with TMAH (tetramethylammonium hydroxide), and a hole 211 is formed in the electrode substrate 210. In this embodiment, a p-type substrate is used as the substrate 210, but an n-type substrate may be used. The etching mask is formed by photolithographic etching after growing a thermal oxide film.
[0037]
Step (B) (FIG. 9B): After removing the oxide film 260 used as a mask on the silicon substrate 210 having the hole 211 formed in the step (A), grow phosphorus-doped polycrystalline silicon 240 by CVD. Then, SOG (Spin on GlAss) 241 is spin-coated, followed by curing. When the n-type substrate 210 is used, boron-doped polycrystalline silicon is grown instead of phosphorus-doped polycrystalline silicon.
[0038]
Step (C) (FIG. 9C): On the surface (surface), the SOG 241 is removed by polishing, and the polycrystalline silicon 240 is not completely removed but is partially left. The first surface (back surface) is polished until the polycrystalline silicon layer 240 and the polycrystalline silicon 240 embedded in the silicon substrate 210 appear on the front surface.
[0039]
Step (D) (FIG. 9D): The polycrystalline silicon 240 is removed by photolithography etching while leaving the polycrystalline silicon layer 240 in a predetermined region around the through hole on the first surface (back surface). Then, the gap 150 and the counter electrode 220 are formed in the same manner as in the first embodiment, and the first substrate is bonded to the liquid chamber / diaphragm substrate 110 such that the first surface is the rear surface of the electrode substrate of the substrate 210. The ink jet head shown in FIG. 8 is completed through processes such as formation of metallization 250 on the back surface of 210, formation of liquid chambers 130 and 140, and attachment of nozzle substrate 310.
[0040]
Note that the contact polycrystalline silicon 240 provided on the back surface of the electrode substrate described in the present embodiment can be provided, for example, in another place as shown in FIG. 10 in addition to the place shown in FIG. is there.
[0041]
(Example 4)
FIGS. 11 and 12 are views for explaining a fourth embodiment of the ink jet head according to the first or second embodiment, in which the electrode substrate 210 forming the counter electrode 220 of the diaphragm substrate 110 and the diaphragm 120 in wafer size is used. This shows a state in which individual chips have been cut out after processing and assembly. 11A is a plan view, FIG. 12A is a sectional view taken along line AA of FIG. 11, FIG. 12B is a sectional view taken along line BB of FIG. 11, and FIG. It is CC sectional view taken on the line of 11.
[0042]
The basic configuration and operation are the same as in the first embodiment. The difference from the first embodiment will be described. In the first embodiment, the second conductivity type polycrystalline silicon 240 is formed only for electrically connecting the counter electrode 220 and the pad metal 250 for external connection. In the fourth embodiment, the second conductive type polycrystalline silicon 240 is formed by forming the opposing electrode 220 in the fourth embodiment. This is formed over the entire region to be formed, and is also used as the counter electrode 220.
[0043]
FIG. 13 is a diagram for explaining a manufacturing process for forming the ink-jet head of the fourth embodiment, which will be described in the order of steps (A) to (E). Note that the left side of each figure is a cross-sectional view corresponding to line BB in FIG. 1A, and the right side view is a cross-sectional view corresponding to line CC in FIG. 1A.
[0044]
Step (A) (FIG. 13A): A p-type (110) silicon wafer having a thickness of about 400 μm was used as a wafer for the electrode substrate 210, and an etching mask formed of a thermal oxide film 260 of about 500 nm was formed on the surface thereof. Thereafter, silicon is anisotropically etched with TMAH (tetramethylammonium hydroxide) to form through holes 211 in the electrode substrate (at this point, the oxide film of the etching mask remains but is removed in a later step). .
[0045]
When the (110) wafer is anisotropically etched using TMAH, the etching speed of the (111) plane is slow, so that the surface to be etched vertically as shown in the right figure and the plane to be etched as shown in the left figure. Both tapered and etched surfaces appear. By making the wall between adjacent bits vertical as shown in the right-hand drawing, the through holes for adjacent bits can be separated and opened. Further, in this embodiment, a mask is prepared in advance so that the opening having a shorter length becomes the counter electrode 220 later because the opening of the through hole on the substrate surface is tapered. I do. The conductivity type and thickness of the substrate are not limited to these.
[0046]
Step (B) (FIG. 3B): After removing the oxide film 260 used as a mask on the silicon substrate 210 having the through hole 211 formed in the step (A), phosphorus-doped polycrystalline silicon 240 is formed by a CVD method. Grow. The through-hole 211 is filled with the polycrystalline silicon 240 by growing a film thickness of approximately １ ／ of the width of the through-hole 211 opened in the step (A) in the lateral direction. The phosphorus doping method is the same as in the first embodiment.
[0047]
Step (C) (FIG. 13C): The polycrystalline silicon 240 grown on the surface of the silicon substrate is removed by polishing.
Step (D) (FIG. 13D): After growing a thermal oxide film 261 of about 500 nm on the surface of the substrate from which the polycrystalline silicon grown in the step (C) has been removed, using a photolithographic etching technique The oxide film on the counter electrode 220 is opened to form a gap 150. In this embodiment, the gap 150 is formed on the electrode substrate 210 side, but may be formed on the liquid chamber / diaphragm substrate side.
[0048]
Step (E) (FIG. 13E): After bonding the electrode substrate 210 having the gap 150 formed therein and the liquid chamber / diaphragm substrate 110 in the step (D) using a direct bonding method, the back surface of the electrode substrate 210 Next, a contact hole is opened in alignment with the second conductivity type polycrystalline silicon 240, a pad metal 250 for external connection is formed, a passivation film 270 is formed, and a pad opening is performed.
[0049]
Steps subsequent to the formation of the contact holes are performed by a photolithography / etching step as generally used in a semiconductor process. It is also possible to carry out all or a part of these steps after the formation of the liquid chamber described later or after the nozzle attachment. Thereafter, a liquid chamber is formed and nozzles are attached in the same manner as in the first embodiment, and the ink jet head of this embodiment is completed. Although the description is omitted in the present embodiment, it goes without saying that an electrode for fixing the potential of the electrode substrate 210 is also formed.
[0050]
(Example 5)
FIG. 14 is a view for explaining the configuration of the ink jet head according to claim 3 or 4. The electrode board 210 which forms the diaphragm electrode 110 and the counter electrode 220 of the diaphragm 120 in wafer size, and individual chips are assembled after assembly. Shows the state cut out. 14A is a plan view of a main part of the head when viewed from the nozzle side, FIG. 14B is a cross-sectional view taken along the line BB of FIG. 14A, and FIG. 14) is a sectional view taken along line CC, and FIG. 14D is a sectional view taken along line DD in FIG.
[0051]
The diaphragm substrate 110 is made of, for example, a Si wafer having a (100) plane or a (110) plane on the substrate surface. The Si wafer is grooved according to the shape of the pressurized liquid chamber, and a diaphragm having a thickness of 5 μm is formed. 120. In the present embodiment, the electrode substrate 210 on which the counter electrode 220 of the vibration plate 120 is formed is made of a silicon substrate having a (110) plane on the surface of the substrate. The counter electrode 220 is disposed at a position where the diaphragm 120 is located, and a minute interval 150 is secured between the diaphragm 120 and the counter electrode 220. Polycrystalline silicon 240 is formed in electrode substrate 210 via an insulating film (oxide film) 264, and polycrystalline silicon 240 is arranged in alignment with the position of counter electrode 220. The potential of the counter electrode 220 on the surface of the electrode substrate 210 is drawn out to the back surface of the electrode substrate 210 via the polycrystalline silicon 240. Further, an external connection pad metal 250 is formed on the back surface of electrode substrate 210 so as to be connected to polycrystalline silicon 240.
[0052]
According to the structure of the present embodiment, since the polycrystalline silicon 240 and the electrode substrate 220 are insulated by the insulating film (oxide film) 264, the withstand voltage is high, the leak current is small, and the separation with high reliability is possible. Has become. The vibrating plate substrate 110 and the electrode substrate 210 having these configurations are adhered by direct bonding or the like, and the nozzle substrate 310 having the ink supply port 320 and the nozzle hole 330 serving as an ink ejection port is placed on the vibrating plate substrate 110. It is stuck to.
[0053]
FIG. 15 is a view for explaining a manufacturing process for forming the ink jet head having the configuration of FIG. 14. Each drawing is a cross-sectional view taken along the line CC of FIG. To (E).
[0054]
Step (A) (FIG. 15A): A p-type (110) silicon wafer having a thickness of about 400 μm is used as a wafer for forming the electrode substrate 210, and an etching mask made of a thermal oxide film 260 of about 500 nm is formed on the surface thereof. After that, anisotropic etching of silicon is performed by TMAH (tetramethylammonium hydroxide), and a through hole 211 is opened in the electrode substrate (at this point, an oxide film of an etching mask remains but is removed in a later step). ). Although a p-type substrate is used in the present invention, an n-type substrate can be used. Further, the thickness of the substrate is not limited to the value described above. Further, in the present embodiment, a through hole is formed in the substrate, but the silicon layer may be left instead of completely penetrating the substrate.
[0055]
Step (B) (FIG. 15B): After removing the oxide film used as the etching mask on the silicon substrate 210 having the through hole 211 formed in the step (A), a silicon oxide film of about 500 nm is formed by thermal oxidation. After that, polycrystalline silicon 240 is grown by CVD. The through-hole is filled with polycrystalline silicon by growing the film thickness to be approximately の of the width in the lateral direction of the through-hole 211 opened in the step (A).
[0056]
Step (C) (FIG. 15C): The polycrystalline silicon layer 240 and the insulating film 264 grown on the surface of the silicon substrate 210 are removed by polishing. In the present embodiment, the polycrystalline silicon layer and the insulating film layer on the substrate surface are removed by polishing, but may be removed by etching. In the case where the silicon layer is left instead of completely forming the through hole in the step (A), the silicon layer remaining at this time (or in a later step) is also removed, thereby forming the through hole. The same structure as when opened can be obtained.
[0057]
Step (D) (FIG. 15D): After growing a thermal oxide film 261 of about 900 nm on the substrate surface from which the polycrystalline silicon grown in the step (C) has been removed, a photolithography etching technique is used. The oxide film at the portion where the counter electrode is to be formed is opened, and a gap 150 is formed. In this embodiment, the gap is formed on the electrode substrate side, but may be formed on the liquid chamber / diaphragm substrate side.
[0058]
Step (E) (FIG. 15E): A thermal oxide film (insulating film) 265 having a thickness of 300 nm is grown on the electrode substrate 210 on which the gap has been formed in the step (D). A contact hole opening is made in alignment with the crystalline silicon 240, and a counter electrode 220 made of WSi / poly-Si is formed so as to connect to the polycrystalline silicon 240 at the contact hole. The contact hole is formed by a photolithographic etching technique, and the counter electrode made of WSi / poly-Si is formed by growing poly-Si by a CVD method and then forming a WSi film by sputtering or a CVD method. It is formed by performing etching. At this time, it is also possible to provide a cap such as an oxide film on the counter electrode.
Thereafter, in the same process as in Example 1, the liquid substrate is joined to the liquid chamber / diaphragm substrate, the metallization on the back surface of the electrode substrate is performed, the liquid chamber is formed by etching, and the nozzle substrate is attached. 5 inkjet heads are completed.
[0059]
【The invention's effect】
According to the inkjet head of claim 1, the electrodes required for voltage application can be mounted on the back side of the electrode substrate by extracting the electrodes of the electrode substrate to the back side of the electrode substrate through the polycrystalline silicon embedded in the electrode substrate. The surface area of the chip is small, and the cost can be reduced. In addition, since there is nothing laminated on the upper surface of the mounting surface, mounting can be easily performed. As for the manufacturing process, it can be manufactured using the steps commonly performed in semiconductor processes, such as etching of single crystal silicon, growth of polycrystalline silicon, and polishing or etching back of a substrate. Yield and reliability are high. Further, since the shape of the back surface of the electrode substrate is flat and the heat resistant temperature of the material is high, there is no restriction in the subsequent steps.
[0060]
In the inkjet head according to the second aspect, since the (110) silicon wafer is used as the electrode substrate, when the anisotropic wet etching technique is used, the etching rate is lower than that of the (110) plane and functions as a stop surface ( Since the (111) plane is perpendicular to the substrate surface, the inkjet head according to claim 1 can be formed with higher density and higher accuracy.
[0061]
In the ink-jet head according to the third aspect, since the electrode substrate and the polycrystalline silicon region embedded in the electrode substrate are separated by the insulator, high withstand voltage, low leakage, and highly reliable separation can be achieved. . In addition, the potential of the counter electrode can be bipolar, and the vibration controllability is further expanded.
[0062]
In the inkjet head according to the fourth aspect, since the (110) silicon wafer is used as the electrode substrate, when the anisotropic wet etching technique is used, the etching rate is lower than that of the (110) plane and functions as a stop surface (111). Since the surface is perpendicular to the substrate surface, the inkjet head according to claim 3 can be formed with higher density and higher accuracy.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of an inkjet head according to claims 1 and 2 of the present invention.
FIG. 2 is a diagram schematically illustrating a layout of a pad take-out portion of the inkjet head of the present invention.
FIG. 3 is a schematic cross-sectional view of a main part for describing a manufacturing process for forming the inkjet head having the configuration of FIG.
FIG. 4 is a schematic cross-sectional view of a main part for describing a manufacturing process for forming the inkjet head having the configuration of FIG.
FIG. 5 is a schematic cross-sectional view of a main part for describing a manufacturing process for forming the ink jet head having the configuration of FIG.
FIG. 6 is a view for explaining a second embodiment of the ink jet head according to claim 1 or 2;
7 is a cross-sectional view for explaining a manufacturing process of an electrode substrate for forming the ink jet head having the configuration of FIG.
FIG. 8 is a view for explaining a third embodiment of the ink jet head according to claim 1 or 2;
9 is a cross-sectional view for explaining a manufacturing process of an electrode substrate for forming the ink jet head having the configuration shown in FIG.
FIG. 10 is a sectional view of a main part showing a modification of the ink jet head shown in FIG.
FIG. 11 is a view for explaining a fourth embodiment of the ink jet head according to claim 1 or 2;
FIG. 12 is a view for explaining a fourth embodiment of the ink jet head according to claim 1 or 2;
FIG. 13 is a diagram for explaining a manufacturing process for forming the ink jet head of the fourth embodiment.
FIG. 14 is a view for explaining a configuration of an ink jet head according to claim 3 or 4;
15 is a diagram for explaining a manufacturing process for forming the inkjet head having the configuration of FIG.
FIG. 16 is a sectional view of an essential part for explaining an example of an ink jet head disclosed in JP-A-7-125196.
FIG. 17 is a sectional view of an essential part for explaining an example of an ink jet head disclosed in Japanese Patent Application Laid-Open No. 5-169660.
FIG. 18 is a sectional view of an essential part for explaining an example of JP-A-7-1251956.
[Explanation of symbols]
110: diaphragm substrate, 120: diaphragm, 130: individual liquid chamber, 140: common liquid chamber, 150: gap, 160: channel, 210: electrode substrate, 220: counter electrode, 240: polycrystalline silicon, 250 ... Pad metal, 261, insulating film, 270, passivation film, 310, nozzle substrate, 320, ink supply port, 330, nozzle hole.

Claims (4)

A nozzle, an ink flow path communicating with the nozzle, a vibration plate provided in a part of the flow path, and an individual electrode provided facing the vibration plate, and attached to the vibration plate. A driving voltage is applied between the common electrode and the individual electrodes, the diaphragm is deformed by electrostatic force, and the ink droplets are ejected from the nozzles. An electrode extraction pad formed on the surface of the substrate and for applying an electric potential to the individual electrode from the outside is provided on a surface of the single crystal silicon substrate opposite to the diaphragm side, and the individual electrode and the individual electrode An ink jet head, wherein the take-out pads are electrically connected by a second conductivity type polycrystalline silicon embedded in the single crystal silicon substrate. 2. The polycrystalline silicon substrate according to claim 1, wherein the first conductivity type single crystal silicon substrate is a single crystal silicon having a surface oriented in a (110) direction, and the second conductivity type polycrystal embedded in the single crystal silicon substrate. An ink jet head, wherein an interface with silicon is a (111) plane. A nozzle, an ink flow path communicating with the nozzle, a vibration plate provided in a part of the flow path, and an individual electrode provided facing the vibration plate, and attached to the vibration plate. A drive voltage is applied between the common electrode and the individual electrode, the diaphragm is deformed by electrostatic force, and the inkjet head ejects ink droplets from the nozzle, wherein the individual electrode is formed on the surface of a single crystal silicon substrate. An electrode extraction pad for applying an electric potential to the individual electrode from the outside is provided on a surface of the single crystal silicon substrate opposite to the diaphragm side, and between the individual electrode and the individual electrode extraction pad, An ink-jet head, wherein the ink-jet head is electrically connected to polycrystalline silicon embedded in the single-crystal silicon substrate via an insulating film. 4. The single crystal silicon substrate according to claim 3, wherein the single crystal silicon substrate is a single crystal silicon having a surface oriented in a (110) direction, and the single crystal silicon substrate is embedded in the single crystal silicon substrate via the insulating film. An ink jet head, wherein the interface is a (111) plane.

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