JP3568001B2 - LED head - Google Patents

Description

[0001]
Field of application of the invention
The present invention relates to an LED head, and more particularly to gradation printing, illuminants, and correction of variation in block units.
[0002]
[Prior art]
In the field of LED heads, gradation printing is also required. The simplest configuration for performing gradation printing is to change the light emission time of each light emitter according to gradation printing data. Such a configuration is proposed in Japanese Patent Publication No. Hei 6-30891 for a thermal head. A counter is provided for each dot, gradation print data is preset in the counter, and the counter is decremented by one bit with an enable clock. Is printed until the value of is zero. However, in this method, it is necessary to provide a counter for each dot, and the number of gates of the control circuit increases.
[0003]
As another configuration, there is a configuration in which an output current is changed in accordance with gradation printing data. Japanese Patent Laid-Open Publication No. Hei 3-61555 proposes preparing a plurality of current sources and superimposing these output currents for printing. are doing. However, this method requires a plurality of current sources that can be driven independently and simultaneously, and also requires a transistor for overlapping output currents without interference. These complicate the power supply circuit.
[0004]
[Problems of the Invention]
An object of the present invention is to provide a novel configuration for gradation control and variation correction of an LED head, and in particular, to perform gradation control and variation correction using an inexpensive circuit.
[0005]
Configuration of the Invention
According to the present invention, an addition value of gradation print data for each light emitting body of an LED head and variation correction data for each block including a plurality of light emitting bodies is calculated.BCD code with a weight that changes twice by 1: 2: 4 ...A memory for digitizing and storing the data, reading means for bit-slicing and reading the data from the memory, and a current source for supplying a light-emitting current to each light-emitting element. A current source whose value changes for each bit corresponding to the weight of each bit of the BCD code; and a scanning unit for scanning the current source in synchronization with a bit slice in the reading unit. The LED head is characterized in that:
[0006]
According to the present invention, in the LED head according to claim 1, each of the light sources emits light according to a reference current generating circuit, a plurality of reference resistors for switching an output current of the reference current generating circuit, and an output current of the reference current generating circuit. And a mirror constant current circuit for supplying a light emitting current to the body.
[0007]
The invention also providesLED headA memory for storing gradation print data for each light-emitting body and variation correction data for each light-emitting body; and a bit slice of the gradation print data and the variation correction data from the memory in series, one bit at a time. And a current source for supplying a light-emitting current to each light-emitting element, the current value can be scanned, and the current value is1 : BCD code with a weight that changes by 2 times of 2: 4 ...An LED, comprising: a current source that changes bit by bit in accordance with the weight of each bit; and a scanning unit that scans the current source a plurality of times in synchronization with a bit slice in a reading unit. In the head.
[0008]
According to a third aspect of the present invention, in the LED head of the third aspect, a block variation correction memory for storing the variation correction data for each block in a BCD code and storing the data, and the data of the block variation correction memory are bit-sliced and read one bit at a time. And a scanning means for scanning the current source a plurality of times in accordance with the gradation print data, the variation correction data, and the block variation correction data. It is characterized by the following.
[0009]
According to the present invention, an addition value of gradation print data for each light emitting body of an LED head and variation correction data for each block including a plurality of light emitting bodies is calculated.BCD code with a weight that changes twice by 1: 2: 4 ...A memory for generating a plurality of output pulses whose width changes in accordance with the weight of each bit in the BCD code; and a memory for generating each output pulse of the pulse generating means. Reading means for synchronizing and bit-slicing the data from the memory, and supplying a light-emitting current to each light emitter according to the bit-sliced data for a time corresponding to the pulse width of each of the output pulses. The power supply for the LED head is provided in the LED head.
[0010]
The present inventionLED headA memory for storing gradation printing data for each light emitter and variation correction data for each light emitter, and a width of the memory.BCD code with a weight that changes twice by 1: 2: 4 ...A plurality of output pulses that change in accordance with the weight of each bit in, according to the gradation print data and the variation correction data, a pulse generating means for generating the plurality of output pulses a plurality of times, Reading means for serially bit-slicing and reading out the gradation print data and the variation correction data from the memory one bit at a time in synchronization with each output pulse of the pulse generating means; A power supply for supplying a light-emitting current to each light-emitting body in accordance with the bit-sliced data for a time corresponding to the pulse width of the LED head.
[0011]
According to the present invention, in the LED head according to claim 6, the variation correction data for each block isBCDA memory further coded and stored is provided, and the pulse generating means is configured to generate the plurality of output pulses a plurality of times in accordance with gradation printing data, variation correction data, and block variation correction data. It is characterized.
[0012]
Effect of the Invention
According to the present invention, the sum of the gradation print data for each light emitter and the variation correction data for each block is calculated.BCDCoded and stored, that is, stored with a weight that changes by a factor of two, such as 1: 2: 4, and scans the current source or pulse generating means accordingly to change the current value from the current source, Alternatively, the pulse width is changed. Changes in current value and pulse widthBCDIt is preferable to change the value twice, for example, 1: 2: 4, etc., corresponding to the code. For these,BCDThe emission current or emission time can be controlled at a resolution determined by the code length of the code.BCDThe coded data is bit-sliced and read one bit at a time, and in synchronization with this, the current source or the pulse generating means is scanned.
[0013]
To supplement the operation, in the first aspect of the present invention, the current source is scanned, and the emission currents from the plurality of current sources are not superimposed. Therefore, the current source only needs to be able to change the current value by scanning, and it may be substantially a single current source, and a transistor for superimposing output currents from a plurality of current sources is unnecessary. In the invention of claim 1,BCDThe current value is changed according to the code weight, and the luminous output of each illuminant at a certain current value corresponds to the current valueBCDIt is the product of the data (0 or 1) in the code. Scanning is performed while changing the current value to a plurality of values, and the total emission energy is the sum of the above products. According to the present invention, the light emission energy is changed by bit-slicing the data from the memory, reading the data, and scanning while changing the current value in synchronization with the data. In particular, when a reference current is scanned by scanning a reference resistor by using a reference current generating circuit and a mirror constant current circuit as in claim 2, one current source may be used literally.
[0014]
In the invention of claim 5,BCDScanning while changing the pulse width according to the code, the output of each illuminant is the pulse width and the correspondingBCDIt is the product of the data in the code. There are a plurality of pulses, and the total light emission time is the sum of the above products. According to the present invention, the data from the memory is bit-sliced and read, and the pulse width is changed so as to synchronize with the data, thereby changing the light emission time. Therefore, it is not necessary to provide a counter for each light emitter, and the number of gates of the control circuit is reduced.
[0015]
When performing both the gradation control and the variation correction, these data may be combined and processed by addition, but the data required for the variation correction is the same each time, and the gradation printing data and the variation correction data are Preferably, the treatment is performed separately. This means that gradation control and variation correction can be performed independently and independently, and data processing becomes extremely simple. In particular, when performing three types of processing, that is, gradation control, illuminant-based variation correction, and block-based variation correction, the correction data for block variation is in units of blocks, and the other data is in units of illuminants. Differently, they are preferably housed in separate memories and processed separately.
[0016]
【Example】
1 to 20 show each embodiment and its modifications. FIGS. 1 to 6 show a first embodiment. In each of the embodiments and modified examples of FIGS. 1 to 20, the same reference numerals denote the same components, and the description of the first embodiment will be omitted unless otherwise specified. The above-described embodiment and other modifications are also applicable as they are. In FIG. 1, reference numeral 2 denotes an individual light emitter. The light emitter 2 constitutes an LED array 4 in units of, for example, 64 to 128, and each LED array 4 is called one block, and for example, 40 blocks are used. In the LED head, the output variation of each block is remarkable, and correction of the block variation is necessary for gradation control. The plurality of LED arrays 4 may be either statically driven or dynamically driven. However, in the embodiment, it is assumed that the LED arrays 4 are dynamically driven. Reference numeral 6 denotes a cathode drive transistor which sequentially drives the LED arrays 4 block by block. Reference numeral 8 denotes a cathode drive IC which sequentially turns on a plurality of cathode drive transistors 6 one by one. A counter 10 counts the clock CLK1 from, for example, the printer main body, detects a change in a block from the count value of the clock, and controls the cathode drive IC 8.
[0017]
Reference numeral 12 denotes a shift register, which stores gradation print data of each light emitting body 2.BCDIt is stored by changing the code to 5 bits and 32 gradations. 14 is a latch circuit, 16 is an OR gate, A1 to A5 are AND gates, 20 is a mirror constant current circuit, 22 and 24 are 5-bit shift registers, S1 to S5 are switches, R1 to R5 are reference resistors, and 26 is a reference. It is a current generating circuit. Then, the mirror constant current circuit 20 applies an output current having a value equal to the output current of the reference current generation circuit 26 to each light emitter 2.
[0018]
Reference numeral 30 denotes a print data generation circuit, which may be provided in a printer body, a FAX body, a copier body, or the like (not shown), or may be built in an LED head. The print data generation circuit 30 includes a gradation data generation unit 32 for each light emitting body 2, a variation correction data generation unit 34 for each light emitting body 2 and each block of the LED array 4, and a synthesis for synthesizing these data. It has a processing unit 36 and a timing control unit 38. The gradation data generator 32 calculates the light emission current for each light emitting body 2BCDThe variance correction data generator 34 generates the correction data necessary to correct the output variance in block units and the correction data required to correct the output variance with respect to the average value of the block 4 of each light emitter 2. Data andBCDThese are coded and generated, and these are added by the synthesis processing unit 36. The result is the emission current of the light emission for correcting gradation for each light emitter 2 and performing gradation printing.BCDCode value.
[0019]
These data are transferred to the shift register 12, and the timing controller 38 controls the clock CLK 1 for transferring the gradation print data to the shift register 12, the latch signal for latching the gradation print data to the latch circuit 14, and the shift signal. A shift clock for shifting data in the register 24 and shift data for setting a bit at the first bit (LSB data 1) of the shift register 24 are generated.
[0020]
When the counter 10 counts the clock CLK1 and counts the clock for one block, it changes the data of the cathode drive IC 8 to drive the adjacent block one block at a time. The data of the shift register 12 is transferred to the latch circuit 14 by a latch signal, and is bit-sliced bit by bit using AND gates A1 to A5 in synchronization with the shift of the data bits of the shift register 22 by the shift clock. read out. The AND gates A1 to A5 and the shift register 22 constitute read means for bit-slicing and reading data.
[0021]
The read data is added to the mirror constant current circuit 20 via the OR gate 16, and the switches S1 to S5 are sequentially switched using the data bits of the shift register 24, and the reference resistors R1 to R5 of the reference current generating circuit 26 are accordingly switched. Are sequentially scanned. As a result, the reference current applied to the mirror constant current circuit 20 changes to five types, for example, 1 mA, 2 mA, 4 mA, 8 mA, and 16 mA. Therefore, for each luminous body 2,BCDThe luminous body 2 is driven with a current value corresponding to the coded gradation print data, so that it is possible to correct the variation for each block and the variation for each dot and perform printing in accordance with the gradation data. Therefore, in the embodiment of FIG. 1, for example, printing of 32 gradations can be performed.
[0022]
The LED head shown in FIG. 1 can be changed as shown in FIG. 2, and reference numeral 40 denotes a parallel-in / serial-out shift register. read out. In this manner, the data is sliced and read out bit by bit in synchronization with switching of the reference resistors R1 to R5 by the shift register 24 using the shift register 40 without using the AND gates A1 to A5 and the like. Can be. Then, the light emitter 2 is driven according to the read data, and the drive current is equal to the reference current value from the reference current generation circuit 26.
[0023]
In the embodiment of FIG. 1, three types of gradation print data for each light emitter 2, block variation correction data for each LED array 4, and variation correction data for each light emitter 2 with respect to the average light emission output of the block are added. Then, the final emission current is determined. And the final emission currentBCDThe data is coded and bit sliced, and light emission data is read out from the latch circuit 14 for each bit and driven.
[0024]
Such control is possible because the relationship between the light emission amount and the light emission current in the LED array 4 is as shown in FIG. 3, and the horizontal axis indicates the light emission current and the vertical axis indicates the light emission amount. In the LED head, the output variation Δi1 for each array is large, and the variation Δi2 for each individual light emitter 2 in the array is large. Due to these variations, the amount of emitted light changes as shown by the four solid lines in FIG. 3, and the correction amount Δi1 of the light emission current for the variation for each array and the correction amount Δi2 for the variation of each light emitting element 2 in the array. Is added, and the current igray necessary for gradation control is further added thereto, to obtain the final required light emission current. As a result, it is possible to correct variations in the unit of the array 4 and the unit of the light emitter 2 and to control the light emission amount to, for example, 32 gradations.
[0025]
FIG. 4 shows operation waveforms of the embodiment of FIG.BCDThe shift clock is composed of five clocks having weights of 1, 2, 4, 8, and 16 in accordance with the printing of the code 5 bits and 32 gradations, and the reference resistors R1 to R5 scan in this order in accordance with the shift clock. Then, the output current of the reference current generating circuit 26 changes to five types, for example, 1 mA to 16 mA. Since each light emitter 2 is driven by the mirror constant current circuit 20, the reference current is equal to the drive current,BCDAccording to the gradation print data bit-sliced into 5 bits by the code,BCDA drive current equal to the weight in the code is applied to the light emitter 2.
[0026]
In the embodiment of FIG. 1, the variation correction data generator 34 generates variation correction data in which the variation for each block and the variation for each light emitting body 2 are added. May be separately processed. FIG. 5 shows an example in which variation correction for each block is performed in eight gradations. Driving for one block is divided into eight cycles, and a block having the smallest light emission output is caused to emit light for the entire circumference of eight cycles, and the light emission output is the highest. The block emits light only for one cycle. In this way, by changing the number of light emission cycles, the light emission time can be changed in a range of eight times for each block. For this purpose, the variation correction data generating unit 34 generates only the variation correction data for each light emitter 2, and the timing control unit 38 changes the number of shift clocks without changing the number of clocks CLK 1 per block. Just do it.
[0027]
Similarly, even if the frequency of the shift clock is changed for each block 4, it is possible to correct the variation for each block. The operation waveform in this case is shown in FIG. 6, and the correction is performed by changing the drive time of the block within the maximum drive time allocated to one block by the dynamic drive. For this purpose, the variation correction data generator 34 generates only the variation correction data for each light emitter 2, and the timing controller 38 changes the shift clock frequency so as to compensate for the variation in the average emission output for each block. good.
[0028]
Embodiment 2
7 to 9 show a second embodiment and its modifications. In FIG. 7, reference numeral 42 denotes a shift register that stores variation correction data for each light emitter 2, and reference numeral 44 denotes a latch circuit that stores data of the shift register 12 and data of the shift register 42 in parallel-in / serial-out. For example, a shift register may be used. Reference numeral 46 denotes a shift register for scanning the reference resistors R1 to R5 in accordance with the variation correction data for each of the light emitters 2. Reference numeral 48 denotes five OR gates. Reference numeral 52 denotes a reference current generation circuit. It comprises a circuit 26 and reference resistors R1 to R5.
[0029]
FIG. 8 shows a modification in which the LED head shown in FIG. 7 is improved so that variation correction for each block is also processed. In FIG. 8, reference numeral 60 denotes variation correction data for each block, for example.BCDA shift register stores 5 bits and 32 gradations in code, 62 is an AND gate, and 64 is an OR gate. 66 is an AND gate, and 68 is a shift register. The variation correction data for each block of the shift register 60 may be stored once at the start of driving the LED head, and does not need to be changed during the operation. Reference numeral 45 denotes a shift register which can be preset. The number of bits is one bit larger than the total number of the shift registers 12 and 42, and when correction printing is performed using the data of the shift register 60, printing is performed using data 1 preset as the last bit.
[0030]
FIG. 9 shows operation waveforms of the modification of FIG. The shift clock SCLK1 is a clock for controlling 5 bits and 32 gradations from LSB to MSB in accordance with the gradation print data of each light emitting body 2. A shift clock SCLK3 for correcting to 32 bits of gray scale is a shift clock for correcting variations of 4 blocks to 5 levels of 32 gray levels. The print data generating circuit 30 generates the shift clocks SCLK1, S2, and S3 in this order, for example, and the left side of the figure corresponds to, for example, the LSB, and the right side corresponds to the MSB. The order in which the gradation print data, the variation correction data for each light-emitting element, and the variation correction data for each block are read has no significance, and it does not matter whether the data is read from the LSB side or the MSB side. Absent.
[0031]
In response to the shift clock SCLK1, the shift register 24 sequentially shifts the data bits from the LSB to the MSB, scans the switches S1 to S5 accordingly, and changes the drive current in the range of 1 mA to 16 mA. Similarly, the data bits of the shift register 46 are shifted by the shift clock SCLK2, and the drive current changes from 1 mA to 16 mA. The data of the shift register 60 is obtained from the data of the cathode drive IC 8, the data corresponding to the currently driven block is taken out by the AND gate 62, and the data is outputted by the OR gate 64.BCDData sliced for each coded bit is extracted. These data are processed by the AND gate 66 in accordance with the data bit position of the shift register 68, and the data is sequentially sent one bit at a time from the LSB side to the MSB side to the switches S1 to S5. Scan for minutes.
[0032]
In total, the reference current generating circuit 52 is scanned for three rounds, and as shown in FIG. 9, scanning by the shift clock SCLK1 is performed first, then scanning by the shift register S2, and finally scanning by the shift register S5. Be done. As a result, each light emitting body 2 is scanned three times in accordance with the gradation printing data, the individual variation correction data, and the block-based variation correction data, and after correcting the block variation and the individual variation, the light emitting body 2 is scanned. Output with the amount of emitted light according to the signed image.
[0033]
Embodiment 3
10 to 12 show an embodiment using pulse width control. Also in this embodiment, the gradation print data isBCDThe common point is that it is coded and bit sliced and extracted. In this embodiment, instead of changing the light emission current for each bit sliced bit, the light emission time is changed for each bit. In FIG. 10, 25 is a DFF type shift register, the width of the output pulse is doubled for each bit, 70 is a counter, 72 is an inverter, and 74 is an AND gate. The counter 70 has five types of output pulses, the pulse width of which changes to 1: 2: 4: 8: 16, and printing of 32 gradations can be performed by combining the output pulses. The difference from a normal counter is that there is only one type of output pulse at a time, for example, a 5-bitBCDIn the case of (1,1,1,1,1) in the code data, the output is generated only from the lowest AND gate 74. 76 is an OR gate, and 78 is an AND gate. Print data from the print data generation circuit 30 in FIG. 1 is added to the shift register 12, and data obtained by mixing the gradation print data, the variation correction data for each light-emitting element 2, and the variation correction data for each block 4 are mixed. , Are stored in the shift register 12 for each light emitter 2.
[0034]
The counter 70 operates in units of 32 shift clocks, and its output waveform is as shown in FIG. 11. The five AND gates 74 generate five types of pulses having a pulse width of 1: 2: 4: 8: 16. . On the other hand, the shift register 12 stores five types of data having weights of 1: 2: 4: 8: 16, which are transferred in parallel to the latch circuit 14 and each time the output pulse of the counter 70 is switched by the OR gate 76. The data at the lowest position is sent to the AND gate 78, and the luminous body 2 is driven in accordance with the AND pulse and the output data of the OR gate 76. Therefore, in the embodiment of FIG.BCDThe coded print data is stored, a pulse having a width proportional to the weight of each bit is generated by the counter 70, the data of the corresponding bit is taken out from the latch circuit 14, and AND is performed for a time proportional to each pulse width. The light emitting body 2 emits light using the gate 78.
[0035]
FIG. 12 shows an example in which the embodiment of FIG. 10 is modified. Instead of shifting the data of the latch circuit 14 to the left by one bit, the AND gates A1 to A5 and the OR gate 16 are used to change the data of the latch circuit 14 to 1 bit. The data is sliced and read out bit by bit.
[0036]
Embodiment 4
13 and 14 show a fourth embodiment. The embodiment of FIG. 13 is an improvement of the modification of FIG. 12, and processes the gradation print data and the variation correction data for each light emitter 2. 47 is a DFF shift register, A6 to A10 are new AND gates, and 80 is a new OR gate. In this embodiment, the gradation print data is stored in the shift register 12, the variation correction data for each light emitter 2 is stored in the shift register 42, and the latch circuit 44 is stored as 10-bit serial data. Using A1 to A5, the gradation print data is bit-sliced and read one bit at a time, and the variation correction data is bit-sliced and extracted one bit at a time using the shift register 47 and AND gates A6 to A10. These output pulses are added by the OR gate 80, and the light emitter 2 is driven for a time proportional to the total output pulse.
[0037]
FIG. 14 shows the operation of the embodiment of FIG. 13. For example, 32 clocks of the shift clock SCLK1 corresponding to the gradation print data are added, and 32 clocks of the shift clock SCLK2 corresponding to the variation correction data are similarly added. The gradation print data of the latch circuit 44 is read out one bit at a time, and the light-emitting body 2 is driven by using the fact that the shift registers 25 and 47 are of the DFF type and the pulse width changes twice for each bit.
[0038]
Embodiment 5
15 and 16 show a fifth embodiment. In this embodiment, a block variation correction circuit 82 is added to the embodiment of FIG. 12 to process gradation print data and block variation correction data. The block variation correction circuit 82 itself is the same as that shown in FIG. 9. Reference numeral 84 denotes five oscillation circuits, each of which oscillates an output of 32 pulses, and has a pulse width from the oscillation circuit on the left to the oscillation circuit on the right in the figure. To 1: 2: 4: 8: 16. 86 is a new OR gate. The output pulse of the OR gate 86 is applied as a shift clock SCLK to the shift register 25 of FIG. 12, and five oscillation circuits 84 are provided. Therefore, the shift register 25 is driven five times for one block 4. . As a result, the operation of the LED head is as shown in FIG. 16. The oscillation circuit 84 oscillates the output of 32 pulses one by one from left to right, and the pulse width changes to 1: 2: 4: 8: 16. , The total output time of the OR gate 86 changes to 32 gradations for each block 4.
[0039]
[Reference example]
17 and 18 show reference examples. This example shows an example in which only block variation correction is performed. The OR gate 64 takes out block-wise variation correction data obtained by bit-slicing each block 4 into 5 bits, and shifts the data in the DFF type shift register 69. The data is sequentially shifted one bit at a time by the clock SCLK, and is ANDed by the AND gate 66, and is used as a strobe signal via the OR gate 96. Other points are the same as those of a simple LED head that does not perform gradation printing. In this embodiment, when the operation of the LED head is started, the correction data is input to the shift register 60 together with the clock signal from the control circuit 90. When the setting of the correction data is completed, the data, the clock and the latch signal are transferred from the control circuit 90. Thus, 1-bit data is stored in the shift register 92 for each light emitter 2. The stored data is transferred to the latch circuit 94 by a latch signal, and is driven via the mirror constant current circuit 20 by a strobe signal. In the embodiment of FIG. 17, the outputs of the shift register 69 are five types of 1) to 5) of FIG. 18, and the data of the shift register 60 is sequentially called from the LSB to the MSB so as to synchronize with them, and these are added. The strobe signal STB is used to drive the light emitting body 2.
[0040]
Embodiment 6
19 and 20 show a sixth embodiment. In the embodiment of FIG. 19, the shift register 12 stores gradation print data for each light-emitting body 2, the shift register 42 stores variation correction data for each light-emitting body 2, and the shift register 60 stores each block. The variation correction data for each is stored. All of these dataBCDIt is coded to make 1 to 16 5-bit 32 gradations. Then, using the data of the shift register 25 and the AND gates A1 to A5, the data of the shift register 12 is bit-sliced and read out one bit at a time from the LSB side, and is read out using the shift register 47 and the AND gates A6 to A10. Is sequentially bit-sliced one bit at a time and called. Similarly, the data in the shift register 60 is sequentially bit-sliced and read one bit at a time using the shift register 69 and the AND gate 66, and the light emitter 2 is driven in synchronization with the data.
[0041]
As a result, the entire operation waveform is as shown in FIG. 20, the light emitter 2 is driven by the data of the shift register 12 using the shift clock SCLK1, and the data of the shift register 42 is extracted by using the shift clock SCLK2. The data of the shift register 60 is extracted using the data of the clock SCLK3.
[0042]
【The invention's effect】
According to the first to fourth aspects of the present invention, gradation control and variation correction can be performed by substantially one current source.
According to the second aspect of the present invention, gradation control and variation correction can be performed by scanning the reference resistance, and a single current source may be used literally.
According to the third aspect of the present invention, the gradation control and the variation correction can be performed separately, and the process of synthesizing the gradation print data and the variation correction data becomes unnecessary.
According to the fourth aspect of the present invention, the gradation printing, the variation correction for each light-emitting body, and the variation correction for each block can be separately performed, and the processing for synthesizing these data becomes unnecessary.
According to the fifth to seventh aspects of the present invention, it is not necessary to provide a counter for each light emitter, and the number of gates of the control circuit is reduced.
According to the sixth aspect of the present invention, the gradation control and the variation correction can be performed separately, so that there is no need to combine the gradation print data and the variation correction data.
According to the seventh aspect of the invention, the gradation printing, the variation correction for each light-emitting body, and the variation correction for each block can be separately performed, and the processing for synthesizing these data becomes unnecessary.
[Brief description of the drawings]
FIG. 1 is a main part circuit diagram of an LED head according to an embodiment.
FIG. 2 is a main part circuit diagram of a modified LED head.
FIG. 3 is a characteristic diagram showing the principle of correcting gradation printing, dot variation, and block variation in an embodiment.
FIG. 4 is an operation waveform diagram of the embodiment.
FIG. 5 is an operation waveform diagram when the embodiment is deformed and driven.
FIG. 6 is an operation waveform diagram when the embodiment is deformed and driven.
FIG. 7 is a main part circuit diagram of an LED head according to a second embodiment.
FIG. 8 is a main part circuit diagram of an LED head modified from the second embodiment.
FIG. 9 is an operation waveform diagram of the LED head of FIG. 8;
FIG. 10 is a main part circuit diagram of an LED head according to a third embodiment.
11 is an operation waveform diagram of the LED head of FIG.
FIG. 12 is a main part circuit diagram of an LED head obtained by modifying the third embodiment.
FIG. 13 is a main part circuit diagram of an LED head according to a fourth embodiment.
14 is an operation waveform diagram of the LED head of FIG.
FIG. 15 is a main part circuit diagram of an LED head according to a fifth embodiment.
16 is an operation waveform diagram of the LED head of FIG.
FIG. 17 is a main part circuit diagram of an LED head of a reference example.
18 is an operation waveform diagram of the LED head of FIG.
FIG. 19 is a main part circuit diagram of an LED head according to a sixth embodiment.
20 is an operation waveform diagram of the LED head of FIG.
[Explanation of symbols]
2 luminous body
4 LED array
6 Cathode drive
Transistor
8 Cathode drive IC
10 counter
12 shift register
14,44 Latch circuit
A1 to A5 AND gate
16 OR gate
20 Miller constant current circuit
22, 24 shift register
S1-S5 switch
26,52 Reference current generation circuit
30 Print data generation circuit
32 gradation data generator
34 Variation
Correction data generator
36 synthesis processing unit
38 Timing control unit
40, 42 shift register
45, 46 shift register
48,50 or gate
60 shift register
62,66 AND gate
64 or gate
68 shift register
70 counter
72 Inverter
74 AND GATE
76 OR gate
78 AND GATE
80 OR gate
A6 to A10 AND gate
82 block variation
Correction circuit
84 Oscillation circuit
86 Orgate
90 Control circuit
92 shift register
94 Latch circuit
96 Orgate

Claims (7)

The addition value of the gradation print data for each light emitting body of the LED head and the variation correction data for each block composed of a plurality of light emitting bodies is converted into a BCD code having a weight that changes twice by 1: 2: 4. And memory for storing
Reading means for bit-slicing and reading the data from the memory;
A current source for supplying a light emitting current to each light emitter, the current value of which can be scanned, and the current value changes for each bit in accordance with the weight of each bit of the BCD code ;
LED head is characterized in that a scanning hand stage for scanning said current source in synchronism with the bit slice in the reading means. The current source is a reference current generation circuit, a plurality of reference resistors for switching an output current of the reference current generation circuit, and a mirror constant current circuit for supplying a light emission current to each light emitter according to the output current of the reference current generation circuit. LED head according to claim 1, characterized in that it consists of a. A memory for storing gradation print data for each light emitter of the LED head and variation correction data for each light emitter,
Reading means for serially bit-slicing and reading the gradation print data and the variation correction data from the memory bit by bit;
A current source for supplying a light emitting current to each light emitter, the current value of which can be scanned, and the current value corresponds to the weight of each bit of the BCD code having a weight that changes twice by 1: 2: 4. And a current source that changes for each bit,
An LED head provided with scanning means for scanning the current source a plurality of times in synchronization with a bit slice in the reading means. A block variation correction memory for storing the variation correction data for each block in the form of a BCD code , and
A block variation correction data reading means for bit-slicing and reading data of the block variation correction memory bit by bit;
4. The LED head according to claim 3, wherein the scanning unit scans the current source a plurality of times in accordance with the gradation print data, the variation correction data, and the block variation correction data. . The addition value of the gradation print data for each light emitting body of the LED head and the variation correction data for each block composed of a plurality of light emitting bodies is converted into a BCD code having a weight that changes twice by 1: 2: 4. And memory for storing
Pulse generating means for generating a plurality of output pulses the width of which varies according to the weight of each bit in the BCD code;
Reading means for bit-slicing and reading the data from the memory in synchronization with each output pulse of the pulse generating means;
LED head is characterized in that the period of time corresponding to the pulse width of each output pulse, in accordance with the data bit slice, provided with a power supply for supplying a light emission current to the light emitting element. A memory for storing gradation print data for each light emitter of the LED head and variation correction data for each light emitter,
A plurality of output pulses whose width changes in accordance with the weight of each bit in the BCD code having a weight that changes twice by 1: 2: 4... In accordance with the gradation printing data and the variation correction data Pulse generating means for generating the plurality of output pulses a plurality of times,
In synchronization with the output pulse of said pulse generating means, before the Kikai signed image data and the variation correction data, reading means for reading out the bit-sliced bit by bit in series from the memory,
An LED head, comprising: a power supply for supplying a light-emitting current to each light emitter in accordance with the bit-sliced data for a time corresponding to the pulse width of each output pulse. A memory in which the variation correction data for each block is converted into a BCD code and stored;
7. The LED head according to claim 6, wherein said pulse generating means generates said plurality of output pulses a plurality of times in accordance with gradation printing data, variation correction data, and block variation correction data. .

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