JP3555795B2 - Digital image forming device - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a digital image forming apparatus, and more particularly, to a digital image forming apparatus that temporarily stores image data read by a scanner like a digital copying machine in a memory and outputs the image data to a printer via the memory. In particular, the present invention relates to a digital image forming apparatus having a function of combining and outputting a plurality of originals on one sheet.
[0002]
[Prior art]
(1) As a conventional digital image forming apparatus, as disclosed in JP-A-60-114080, JP-A-63-272265, and JP-A-64-74870, a reading unit for reading a document and the reading unit Storage means for storing the data read by the image processing apparatus, and when a combined output instruction is issued, the image data that has just been read by the reading means and the previously read image data that has been stored in the storage means. There is known an apparatus that synthesizes and outputs the same.
[0003]
(2) Also, as disclosed in Japanese Patent Application Laid-Open No. 62-172864, two originals having a width of 1/2 of the maximum reading width of the reading means are arranged and read simultaneously, and the two original image data are read. A device for synthesizing and outputting is known.
[0004]
(3) Further, as disclosed in JP-A-63-288563, a plurality of document image data are stored in different locations of a storage means, and a plurality of document image data are simultaneously read out from the storage means. A device for synthesizing and outputting is known.
[0005]
[Problems to be solved by the invention]
However, in the prior art shown in the above (1), in order to combine and output the image data stored in the storage unit and the image data read by the reading unit, the reading of the original is output in order to obtain a combined output of a plurality of sheets. Since the reading operation must be performed a plurality of times for the number of sheets, it takes time and effort in the case of a document conveying type reading unit, and the document is burdened with a burden. Furthermore, three or more originals could not be combined.
[0006]
Further, in the prior art shown in the above (2), since two originals are read side by side, it is possible to combine and output only the original having a width of １ ／ of the maximum reading width of the reading means.
[0007]
Further, in the prior art shown in the above (3), in order to combine a plurality of (N) originals, all of the N original data are stored. Therefore, the maximum storage capacity of the storage means is limited by the data amount of the original. , Which requires an enormous storage capacity, and also requires N times the means for reading from the memory, thus complicating the device.
[0008]
The present invention has been made in view of the above situation.,Obtaining a composite image without increasing the capacity of the memory more than necessary and without complicating the hardware configurationTo provide a digital image forming apparatus capable ofIt was made for the purpose of.
It is another object of the present invention to provide a digital image forming apparatus capable of preventing an operator's unintended copying.
[0019]
[Means for Solving the Problems]
According to a first aspect of the present invention, there is provided a reading unit for digitally reading an image on a document, a storage unit for storing image data read by the reading unit, and an image based on the image data read from the storage unit. A digital image forming apparatus comprising:A data amount detection unit for detecting an image data amount of the document stored in the storage unit, and a remaining amount for detecting a remaining amount storable in the storage unit when the data amount detection unit detects the image data amount of the document. Quantity detection means,First combining means for storing image data of a plurality of documents in different areas of the storage means and combining them when reading out the image data;the firstMeans for storing image data of the originalAnd stores the image data of the second and subsequent originals with respect to the image data stored in the storage means.After synthesisOverwrite the same areaA second combining unit for storing, and a switching unit for switching between the first combining unit and the second combining unit;The switching unit compares the image data amount of the first read original detected by the data amount detecting unit with the remaining amount detected by the remaining amount detecting unit when the first original is stored in the storage unit. When the remaining amount is larger than the image data amount, the first combining unit is used, and when the image data amount is larger than the remaining amount, the second combining unit is switched to be used.Switch to imageDoneFirst combining means for forming an image based on the obtained image data, storing a plurality of originals in respective areas of the memory, and synthesizing the originals when reading out from the memory; Having a second synthesizing means for synthesizing in the same area, storing and outputting again, and switching and using the first and second synthesizing means, without increasing the memory capacity more than necessary, Further, it is possible to obtain a composite image without complicating the hardware configuration.
[0022]
Claim2The invention according to claim 1, further comprising a plurality of processing means for processing the image data read from the storage means, and processing information setting means for setting processing information for the processing means, When synthesizing an image using the synthesizing means, based on the processing information set for each original by the processing information setting means, the image data of each original read from the storage means is individually read into the plurality of images. Processing meansEngineeringWhen forming and outputting an image using the second synthesizing means,the firstAt the end of reading the originalTheInvalidates the processing information set by the processing information setting means for the original.RukoThis makes it possible to prevent erroneous copying that is not intended by the operator.
[0026]
Claim3According to the invention, reading means for digitally reading an image on a document, storage means for storing image data read by the reading means, and image formation based on the image data read from the storage means A digital image forming apparatus comprising: an image forming unit; a first synthesizing unit that stores image data of a plurality of original documents in different areas of the storage unit and synthesizes the image data when reading out the image data;the firstMeans for storing image data of the originalAnd stores the image data of the second and subsequent originals with respect to the image data stored in the storage means.After synthesisOverwrite the same areaA second combining unit for storing, a switching unit for switching between the first combining unit and the second combining unit, and a size designating unit for designating a size of a document to be combinedData amount detecting means for detecting an image data amount for a size of a document designated by the size designating meansWherein the switching means comprises:When the size of the original is designated by the size designating means, the image data amount detected by operating the data amount detecting means is compared with the storage capacity of the storage means, and the image data amount is stored in the storage means. When the capacity is less than 1/2 of the capacity, the first combining means is used, and when the image data amount is more than 1/2 of the storable capacity, the second combining means is used.A first combining unit that stores a plurality of originals in different areas of the memory and combines the originals when reading the originals from the memory; and combining the plurality of originals in the same area of the memory. It has a second synthesizing means for storing and outputting again and switching between the first and second synthesizing means according to the size of the document and the storage capacity of the memory, so that the capacity of the memory is not increased more than necessary. Also, it is possible to obtain a composite image without complicating the hardware configuration.
[0029]
Claim4The invention of claim3A plurality of processing means for processing image data read from the storage means;,Processing information setting means for setting processing information for the processing means, wherein the image data amount detected by the data amount detection means is stored in the storage meansPossibleA plurality of processing means for processing the image data read from the storage means so that the processing information cannot be individually set by the processing information setting means for each original when the capacity is more than １ ／; Processing information setting means for setting the processing information to the processing means;
Original data volume> MemoryPossibleAt capacity / 2,
By making it impossible to individually set the processing information by the processing information setting means for each document, it is possible to prevent an erroneous copy that is not intended by the operator.
[0030]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a diagram schematically showing the overall configuration of a digital copying machine according to the present invention. The digital copying machine is roughly divided into a scanner 100 for reading image data from a document, and a scanner 100 for recording the read image data on recording paper. Printer 200, an image memory 300 for storing image data read by the scanner 100, an operation unit 450 for setting various copy modes, displaying to an operator, etc., controlling the entire copying machine and reading image data of a document. And a system controller 500 that supports writing.
[0031]
As shown in the schematic diagram of FIG. 2, the scanner 100 transports a document on a contact glass 108 with a center as a reference, irradiates the surface of the document with a light source 110, and reflects light reflected by a lens 111 with a CCD (charge transfer device) 101. The image is focused on the image and read by the CCD 101. The analog signal output from the CCD 101 is amplified by the amplifier circuit 102 shown in FIG. 1 and input to the A / D converter 103. The A / D converter 103 converts the analog signal into a digital signal (hereinafter, this digital signal is referred to as image data). After the conversion, the shading correction circuit 104 corrects the sensitivity unevenness of the CCD 101, the unevenness of the light amount of the light source 110, and the light amount distribution of the lens 111 and the like. After performing various processes such as MTF correction, scaling process, and binarization, the image data is transferred to the image memory 300. The clock generator 106 in the scanner 100 generates a control signal used when reading an image.
[0032]
FIG. 3 is a diagram showing the relationship between each control signal and the original. The control signal includes a signal LSYNC for synchronizing in the main scanning direction, a signal LGATE indicating the maximum reading effective area in the main scanning direction, and a signal LGATE. A signal * LGATEST indicating the start, a signal WFGATE indicating an effective area in the sub-scanning direction of the document, which will be described in detail later, and a clock signal CLK which is not shown in FIG.
[0033]
Image data sent from the scanner 100 via the coaxial cable 700 is input to the image memory 300. The image memory 300 includes a memory control unit 301 and a memory 302, which will be described later. The memory capacity is 256 Mbits because 16 DRAMs of 16 Mbits are mounted, and the image capacity is 400 DPI (dots / inch). ) When read in binary, it corresponds to about one A0 size sheet.
[0034]
The printer 200 basically has the same process (around the drum, transport, separation, and fixing) as the analog copying machine, but the writing unit is unique to the digital machine, and in this embodiment, the laser diode and the LED array are used on the photosensitive drum. An electrostatic latent image is formed on the recording paper, and the image is transferred to a recording paper and fixed to form a copied image.
[0035]
Next, the configuration of the operation unit 450 will be described with reference to FIG.
The operation unit 450 includes an operation panel 451, an LCD panel 452, and an operation control unit 453. The operation panel 451 has keys for designating various basic functions, such as a numeric keypad, a start key, a mode clear key, a stop key, a density adjustment key, an image quality adjustment key, a scaling key, a paper feed stage designation key, and a document size. A display is provided to display a designation key, the number of sheets to be set / the number of copies, the paper size set for each paper feed stage, scaling, and the like. Further, complicated functions such as image processing and optional functions can be set on the LCD panel 452, and the specification of the document size and the like are also performed here.
[0036]
That is, as shown in FIG. 5, when the user touches the image processing functions of the LCD panel 452 in FIG. 5A, the image processing functions are displayed as shown in FIG. 5B. Then, by selecting and touching the synthesizing function from among them, as shown in FIG. 5C, the sizes of the originals from A1 to A4 are displayed, so that the size of the original to be synthesized is selected and touched. To determine the document size. The determined document size is notified from the operation control unit 453 to the memory control 301 via the system control unit 500.
[0037]
Next, the details of the image memory 300 will be described. For the sake of space, the image memory 300 is shown divided into two leaves in FIGS. 6 and 7. By superimposing the AA line of No. 7, it can be seen as a single leaf drawing. As described above, the image memory 300 includes a memory unit 302 that actually stores image data, and a memory control unit that controls the memory unit 302 to control a write address, a read address, and image data. The memory control unit 301 further includes an address control unit 303 that controls where the image data is written to or from which position in the memory unit 302, and an address for writing and reading. It is divided into a memory control 305 for controlling the memory unit 302 such as calculation and management, and an image data processing unit 306 for processing image data.
[0038]
Further, the address control unit 303 includes a document width detection unit 310 that detects the width of the document, that is, an effective area in the main scanning direction of the image data, and a document length, that is, a portion related to writing to the memory unit 302. A document length detecting section 320 for detecting an effective area in the sub-scanning direction of image data, a write address generating section 330 for generating a write address in the memory section 302, and a write address for setting an initial address value in the write address generating section 330. A setting unit 340 and a write line counting unit 350 that counts a reading line of a document, that is, a writing line to the memory unit 302, while the image data valid area signal in the sub-scanning direction detected by the document length detecting unit 320 is valid. And divided into
[0039]
As a portion related to reading, a read valid signal generating section 360 that generates a read valid signal in response to an image data request signal from the printer 200, and a memory while the read valid signal generated by the read valid signal generating section 360 is valid. A read line counting unit 370 for counting read lines from the unit 302; read address generators A390 and B400 for generating two systems (A system and B system) of read addresses in the memory unit 302; B400 is divided into read address setting units A380 and B385 each of which performs initial address setting. Then, there is an address switching unit 345 that switches between the write address and the read address and supplies the address to the memory unit 302.
[0040]
An image data processing unit 306 switches between inputting the image data input from the scanner 100 as it is to the memory unit 302 as it is, or inputting the image data after combining it with the data once stored in the memory unit 302. Unit 600, an S / P converter 610 that converts image data into serial / parallel data and inputs the image data to the memory unit 302, and image data input from the scanner 100 to the memory unit 302 or image data read from the memory unit 302. Switching unit 620 for switching whether or not to send the data to the printer 200; data latch units A630 and B640 for latching image data read from the memory unit 302 at different timings to separate them into two systems; and latching at the data latch units A630 and B640. Parallel / serial conversion of the image data of each system P / S converters A650 and B660 and image data processing for editing such as inversion, mirroring, and shift are performed on each image data of each system that has been subjected to parallel / serial conversion by P / S converters A650 and B660. Switching between outputting and combining the image data processed by the image processing units A670 and B680 and the image data processed by the image processing units A670 and B680, or outputting only the image data processed by the image processing unit A670. And a two-image combining unit 690.
[0041]
Hereinafter, each part of the image memory 300 will be described in more detail.
First, the image data processing unit 306 will be described. The image data D1 read by the scanner 100 is input to the first image synthesizing unit 600 of the image memory 300 via the coaxial cable 700. The first image synthesizing unit 600 performs synthesis when a read-modify-write (RMW) synthesis described later is designated.
As shown in FIG. 8, the first image synthesizing unit 600 includes an AND (AND) gate 601, an OR (OR) gate 602, an exclusive OR (EX-OR) gate 603, and a selector 604. The image data D1 and the image data DB6 (image data of the original before read from the memory unit 302) from the P / S conversion unit B660 described later are input to the AND gate 601, the OR gate 602, and the EX-OR gate 603, respectively. The image data combined in the AND format, the OR format, and the EX-OR format are obtained, and the combined image data and the uncombined image data D1 are both input to the selector 604. The selector 604 selects and outputs one of the image data synthesized in each mode and the through image data not synthesized according to the synthesis mode signal 1 set by the memory control 305. The case of RMW combining will be described later, and the case of output with normal through will be described below.
[0042]
The S / P conversion unit 610 includes a shift register 611 and a flip-flop (F / F) 612 as shown in FIG. The operation will be described with reference to the time chart of FIG. 10. In the shift register 611, the image data D2 is input to the data input terminal A of the shift register 611, and the signal LGATE representing the maximum effective reading area in the main scanning direction is input to the data input terminal B. Since the image data D2 is input, an unnecessary portion of the image data D2 is masked, and the image data D2 is delayed and output in synchronization with the clock signal CLK input to the clock input terminal CLK. The F / F 612 inputs and latches the latch signal CLK16 which becomes H level once in every 16 cycles of the clock signal CLK to the clock terminal CLK, latches the cycle, reduces the cycle to 1/16, and converts the image data into 16 lines parallel. D3 is output. Then, writing / reading is performed on the 16 memory elements of the memory section 302 in units of 16 bits.
[0043]
By reducing the cycle of the image data to 1/16, it is possible to control the memory section 302 so that the write and read operations are performed simultaneously. That is, as shown in FIG. 11, using the 16 cycles of the clock signal CLK as a unit of memory cycle, the first 4 CLK cycle is a read A cycle, the next 4 CLK cycle is a refresh cycle, and the next 4 CLK cycle is a read B cycle. The last 4 CLK cycle is a write cycle, and writing and reading are performed simultaneously in 16 CLK cycle units. Here, reading of image data from the memory is performed in two cycles, that is, A cycle and B cycle of reading, which means that image data of two documents can be read at the same time. These two systems are referred to as A system and B system, respectively, and A and B at the end of each part of the address control unit 303 and the image data processing unit 306 indicate that they correspond to each system.
[0044]
Signals indicating that each cycle is valid are denoted by * RDAEN, * RFEN, * RDBEN, * WREN, respectively, and the cycle is valid during the L level. Since * WRCYC is input to the output enable terminal OE of the F / F 612, the F / F 612 actually outputs the image data D3 only during the period in which the write cycle is valid, and the output is in the high impedance state in other periods. Become.
[0045]
Next, the data switching unit 620 will be described with reference to FIG. As shown in FIG. 12, the data switching unit 620 includes a bidirectional transceiver 621. The data input / output A terminal has an S / P conversion unit 610 and 16-bit data lines of data latch units A630 and B640 described later. Are connected, and a 16-bit data line of the memory unit 302 is connected to the data input B terminal. The operation will be described with reference to the time chart of FIG. Since * WREN is connected to the direction switching terminal DIR, while * WREN is at the L level (while the write operation is valid), the direction of the image data changes from the A terminal to the B terminal, and the S / P converter 610 Image data flows to the memory unit 302. Conversely, while * WREN is at the H level, the direction of the image data changes from the B terminal to the A terminal, and the image data flows from the memory unit 302 to the data latch units A630 and B640 described later. However, since * RFEN is input to the output enable terminal OE, both the data input / output terminals A and B are in a high impedance state during the refresh period.
[0046]
Next, the data latch units A630 and B640 will be described with reference to FIG. As shown in FIG. 14, the data latch units A630 and B640 are configured by F / Fs 631 and 641, respectively. The operation will be described with reference to the time chart of FIG. The image data is switched between write data to the memory unit 302 and read data from the memory unit 302 by the data switching unit 620, and the image data is read from the memory unit 302 in the read A cycle and the read B cycle in a time division manner. . Then, of the read image data D3, the image data read in the read A cycle is latched by the clock signal RDSTBA input to the clock terminal CLK of the F / F 631, and the A-system image data DA5 is output. Then, the image data of the read B cycle is latched by RDSTBB in the F / F 641, and the B-system image data DB5 is output.
[0047]
Next, the P / S converters A650 and B660 will be described with reference to FIG. The P / S converters A650 and B660 are configured by shift registers 651 and 661, respectively, as shown in FIG. The operation will be described with reference to the time chart of FIG. The parallel image data DA5 and DB5 latched at predetermined timing by the data latch units A630 and B640 are input to the parallel inputs PI0 to PI15 of the shift registers 651 and 661, and are shifted / loaded to the shift / load terminals SH / * LD. When the signal * DTLD is input, DA5 and DB5 input to the parallel input are loaded at the rising edge of the clock signal CLK input to the clock terminal CLK when * DTLD is at the L level, and at the same time, DA500 and DB500 are input to the serial output terminal SO. Is output. Hereinafter, while * DTLD is at the H level, the image data is shifted in synchronization with CLK, and DA501, 502,..., 515 are applied to the serial output SO of the shift register 651, and the serial output SO of the shift register 661 is applied to the serial output SO. , 515 are output to obtain serial image data DA6 and DB6.
[0048]
Next, the image processing units A670 and B680 will be described with reference to FIG. As shown in FIGS. 17A and 17B, the image processing units A670 (A series) and B680 (B series) have EX-OR gates 671 and 681, toggle line buffers 672 and 682, and line buffer write. It comprises address counters 673 and 683 and read address counters 674 and 684. The operation will be described below. EX-OR gates 671 and 681 are for performing image inversion, and line buffers 672 and 682, write address counters 673 and 683, and read address counters 674 and 684 are for performing image shift, mirroring, and double copy. It is. As described above, since the A system and the B system individually have image processing functions, the images of the A system and the B system are separately edited, and then the images are synthesized by a second image synthesis unit described later. It is possible to do.
[0049]
Since the EX-OR gate 671 receives the image data DA6 and the inversion / non-inversion switching signal REVA from the system control 305, the image data DA6 is output through when the inversion process is not performed when REVA is at the L level. , REVA are at the H level, the image data DA6 is output after the image data DA6 is subjected to the inversion processing. In the line buffer 672, the image is shifted in the main scanning direction by shifting the write / read address specified by the write address counter 673 and the read address counter 674, or mirroring is performed by writing in ascending order and reading out in descending order. Double reading is realized by reading once within 1 LSYNC and reading again once. The line buffer address control is performed based on the editing information set by the system control 305. The same applies to the operation of the B system. After image editing in this manner, image data DA7 and DB7 are obtained.
[0050]
Next, the second image combining unit 690 will be described with reference to FIG. In the second image synthesizing unit 690, when a later-described two-screen synthesis is designated, the synthesis is performed here.
As shown in FIG. 18, the second image synthesizing unit 690 includes an AND gate 691, an OR gate 692, an EX-OR gate 693, and a selector 694. The image data DA7 and the image data DB7 from the image processing units A670 and B680 are input to an AND gate 691, an OR gate 692, and an EX-OR gate 693, respectively, and are synthesized in an AND format, an OR format, and an EX-OR format, respectively. The data is input to the selector 694 together with the synthesized image data and the image data DA7 not synthesized. The selector 694 selects and switches between image data synthesized in each mode and through image data not synthesized according to the synthesis mode signal 2 set by the memory control 305, and outputs image data D8. The image is formed by the printer 200 on the basis of.
[0051]
Next, the address control unit 303 will be described. First, a part related to writing of the address control unit 303 will be described. First, the document width detecting unit 310 and the document length detecting unit 320 will be described.
FIG. 19 is a top view of the document transport unit of the scanner 100. The document width detection sensors 311 to 318 (document width detection unit 310), the document insertion sensor 321 and the document length detection sensor 322 ( The document length detection unit 320) is disposed. Each sensor is a reflection type sensor and is turned on or off depending on whether or not a document is present thereon. The operation of each sensor will be described based on the actual document reading operation with reference to FIG. When an operator inserts a document into the entrance roller 107, the document width detection sensors 311 to 318 turn on according to the size of the inserted document. For example, according to the width of the document, only the sensors 314 and 315 are turned on when an A4 size document is inserted, and the sensors 312 to 317 are turned on when an A2 size document is inserted. Since the combination of sensors that are turned on is changed, the width of the document can be detected. Then, the combination signal DATAWIDTH is input to the memory control 305 to make a determination, and a signal corresponding to the determination result is applied to the write address generator 330.
[0052]
After the detection of the document width, the pinch solenoid (not shown) is turned on, the pressure of the driven roller of the entrance roller 107 is released, and the document can be inserted further into the back. At this time, the fluorescent lamp 110 is turned on at the same time, and preparation for reading the document is started. Further, when the original is inserted into the back, the leading end of the original is abutted against a gate claw (not shown), and the original insertion sensor 321 is turned on, a conveyance motor (not shown) is driven and a gate solenoid (not shown) is driven. When turned on, the gate claws open, and the transport roller 112 transports the document. When the original is conveyed and the leading edge of the original crosses the original length sensor 322, the original length sensor 322 turns on. When the original is conveyed and the rear end of the original passes over the original length sensor 322, the original length sensor 322 is turned off, and the original reading effective area is maintained while the original passes over the original length sensor 322. And the read effective area signal WFGATE is input to the memory control 305 and the write line count unit 350 shown in FIGS. FIG. 20 shows a case of detecting the width and length of an A4 portrait document.
[0053]
Next, the write line counting section 350 will be described with reference to FIG.
The write line counting section 350 includes a counter 351 and an AND gate 352, as shown in FIG. The operation will be described with reference to the time chart of FIG. The clear terminal CLR and the clock terminal CLK of the counter 351 receive a read effective area signal WFGATE signal in the sub-scanning direction and a signal LSYNC for synchronizing in the main scanning direction, respectively._A~ Q_CAre input to the AND gate 352.
[0054]
The operation will be described below. When a document passes over the document length sensor 322 and WFGATE is turned on (H level), the output Q_A~ Q_CHas been cleared (count value = "0"), and the one-line original is scanned to count up each time the rising edge of LSYNC is input to the clock terminal. When the count value is “7” (Q_A~ Q_C= H), the output WINT8 of the AND gate 352 becomes H level.
Hereinafter, the count value is again “0” (Q_A~ Q_C= L), so that the WINT8 goes to the H level for one LSYNC cycle every time an eight-line original is scanned (8LSYNC cycles) after WFGATE is turned on. This WINT8 is input to the memory control 305 as shown in FIGS. 6 and 7, and is used for the WINT8 interrupt processing shown in FIG.
[0055]
Next, the write address generator 330 will be described with reference to FIGS. As shown in FIG. 24, the write address generator 330 includes down counters 331 and 332, an AND gate 333, an F / F 334, and a counter 335. As shown in FIG. 26, the preset inputs of the down counters 331 and 332 respectively include signals SHIFT0 to SHIFT13 indicating the left end position of the original from the signal LGATE indicating the maximum effective reading area in the main scanning direction, and Signals DOT0 to DOT13 indicating the actual width are set.
That is, the left end positions SHIFT0 to SHIFT13 of the document and the widths DOT0 to DOT13 of the document differ depending on the size of the document. 13 (normally, DATAWIDTH = DOT0 to 13) and set in the down counters 331 and 332 (described later with reference to FIG. 35).
[0056]
In the down counter 331, a signal * LGATEST indicating the start of the signal LGATE is input to the load terminal LD as a load signal of a preset value, and the clock signal CLK to the clock terminal CLK. 331 are loaded with the preset values SHIFT0 to SHIFT13, and then count down in synchronization with CLK.
When the countdown is performed by SHIFT, a borrow occurs and its output * SHIFTEND becomes L level. * SHIFTEND is input to the clock terminal CLK of the F / F 334 via the AND gate 333, and the F / F 334 Since the D input (= * Q output) is at the L level since the signal is preset by the inverted signal * LSYNC of the signal LSYNC, * ADRSENB of the Q output goes to the L level at the rising edge of * SHIFTTEND.
[0057]
Also, since * SHIFTEND is input to the load terminal LD as a load signal of the down counter 332 and the clock signal CLK to the clock terminal CLK, at this time, the preset values DOT0 to DOT13 of the down counter 332 are loaded. , And count down in synchronization with the clock signal CLK.
When DOT counts down, a borrow occurs and * DOTEND goes to L level. However, since this output * DOTEND is input to CLK of F / F334 via AND gate 333, the Q output of F / F334 is * Goes to H level at the rising edge of DOTEND.
[0058]
Next, the operation of the counter 335 will be described. Initial values WADINIT0 to WADINIT23 of the write address are preset in the preset input of the counter 335 from the memory control unit 305 via the write address setting unit 340. These initial values WADINIT0 to WADINIT23 are loaded by a load signal * WINT8ST which becomes L level only for one clock from the start position of the output WINT8 of the write line count unit 350, and the write addresses WADRS0 to WADRS23 to the memory unit 302 are changed to the initial values WADINIT0 to WADINIT23. Is set to
[0059]
Since the Q output * ADRSENB of the F / F 334 is input to the count enable terminal EP of the counter 335, the Q output * ADRSENB does not count up when the CLK is at the H level, and the write addresses WADRS0 to WADRS23 remain unchanged. , Q output * ADRSENB goes low, the write addresses WADRS0 to WADRS23 are updated, and therefore, image data for one line original width DOT is written to the memory unit 302. The Q output * ADRSENB is also input to the read address generators 390 and 400, which will be described with reference to FIGS. 32 and 33.
[0060]
As shown in FIG. 27, the write address setting unit 340 is configured by a parallel I / O 341, and the memory control 305 writes “DATAWIDTH” detected by the document width detection unit 310 in response to the input IN of the parallel I / O 341. Based on WINT8 detected by the write line counting unit 350, the initial values WADSET0 to WADSET23 of the write address are calculated and output. Then, the parallel I / O 341 holds the input values WADSET0 to WADINIT23 as the initial values WADINIT0 to WAD23 until the initial values WADET0 to WADET23 of the next write address are input from the memory control 305.
The portion of the address control unit 303 that controls the read address for the memory unit 302 has two control units, A and B, so that image data for two screens can be read at the same time. Hereinafter, each unit will be described.
[0061]
Next, the read valid signal generator 360 will be described with reference to FIG.
FIG. 28 shows an example of the configuration of read valid signal generation section 360, and FIG. 29 shows the operation timing. The read valid signal generation unit 360 is configured by the F / F 361, and keeps the RFGENB input to the clear terminal of the F / F 361 at the L level until the memory control 305 determines that the image data can be read from the memory unit 302. And a read valid signal (hereinafter, RFGATE) from the Q output is set to L level. When the memory unit 302 determines that image data can be read, the memory control 305 sets RFGENB to the H level so that RFGATE can be output, and the printer 200 outputs an image data read request signal (hereinafter, DREQ). Is input, RFGATE is output (H level) because the D input is set to H level by the rising edge. When the reading of the image data is completed, the memory control 305 sets RFGENB to L level, thereby stopping the output of RFGATE (L level). Then, this RFGATE is input to the read line count unit 370 and the memory control 305, and is used for the subsequent processing.
[0062]
Next, the read line count unit 370 will be described with reference to FIG.
FIG. 30 shows an example of the configuration of the read line counting section 370, and FIG. 31 shows the operation timing. The read line count unit 370 is composed of a counter 371 and an AND gate 372. The clear terminal of the counter 371 receives the RFGATE signal generated by the read valid signal generation unit 360, and the clock terminal has synchronization in the main scanning direction. The signal LSYNC for taking the value is input. Then, the output Q of the counter 371_A~ Q_CAre input to the AND gate 372. The operation will be described below. After the memory control 305 determines that image data can be read from the memory unit 302 and sets RFGENB to H level, a DREQ is input from the printer 200 and RFGATE is turned on (H level). Then, the output Q_A~ Q_CIs cleared (count value = “0”), and LSYNC is input to the clock terminal every time one-line image data is read from the memory unit 302, and counts up at the rising edge. When the count value is “7” (Q_A~ Q_C= H), the output RINT8 of the AND gate 372 goes high. Hereinafter, the count value is again “0” (Q_A~ Q_C= L), so that the RINT 8 goes high for 1 LSYNC cycle every time 8 lines of image data are read from the memory unit 302 (8 LSYNC cycles) after RFGATE is turned on. Then, the RINT 8 is input to the memory control 305 and used for the subsequent processing.
[0063]
Next, the read address generators A390 and B400 will be described with reference to FIG. FIG. 32 shows an example of the configuration of read address generating section 390, and FIG. 33 shows the operation timing. The read address generators 390A and B400 are composed of counters 391 and 401. The operation of the counter 391 will be described below. In the counter 391, initial values RADINITA0 to RADINITA23 of a read address to be generated from the read address setting unit A380 to the memory unit 302 are set as preset values, which are represented by * RINT8ST (start position of RINT8). And the read address RADRSA0-23 becomes RADINITA0-23. When * ADRSENB generated by the write address generation unit 330 is at the H level, * ADRSENB is input to the count enable terminal of the counter 391, so that counting is not performed even if CLK is input. The read addresses RADRSA0 to 23 output are not changed from RADINITA0 to RADINITA23. However, while * ADRSENB is at the L level, the count-up is performed in synchronization with CLK. Image data is read from the memory unit 302 by the amount of the DOT stored in the memory unit 302 per line, that is, by the width of the document. The same applies to the B system.
[0064]
Next, the read address setting units A380 and B385 will be described with reference to FIG. FIG. 34 illustrates an example of the configuration of the read address setting units A380 and B385. The read address setting units A380 and B385 are configured by parallel I / Os 381 and 386. The memory control 305 calculates from DATAWIDH detected by the document width detecting unit 310 and RINT8 detected by the read line counting unit 370, and outputs the calculated data to the parallel I / O 381 as RDSETA0-23. Then, the parallel I / O 381 keeps the input value as the read address initial values RADINTA0 to RADINT23 to be set in the read address generator A390 until the next read address initial value is output from the memory control 305. The same applies to the B system.
[0065]
Next, the memory control 305 will be described with reference to FIG. The memory control 305 includes a so-called CPU and peripheral devices such as a ROM, a RAM, and an interrupt controller, and operates according to a program stored in the ROM. Hereinafter, the basic operation will be described.
[0066]
FIG. 35 shows a main operation flow performed by the memory control 305. After the power is turned on, in step S1, initialization of each unit such as an interrupt controller, parallel I / O, and variables used in a program is performed. Wait for insertion to start copying. Then, when a document is inserted in step S3 and DATAWIDTH is detected by document width detecting section 310, the values of DOT and SHIFT are calculated in step S4. In step S5, the values of DOT and SHIFT calculated in step S4 are set in the write address generation section 330, and in step S6, the initial value OFFSET (WADSET0 to WADSET23) of the write address of the memory section 302 is set in the write address setting section 340. Set to. Then, after these settings are completed, in step S7, RFGENB is set to the H level for the read valid signal generating unit 360, so that the input of DREQ from the printer 200 is valid, and an infinite loop is entered and an interrupt occurs. Wait for
[0067]
First, the WINT8 interrupt will be described. When a document is inserted, the document width is detected, scanning of the document is started, and WFGATE is detected by the document length detection unit 320 to be at the H level. After scanning the original, the write line count unit 350 changes the level of the signal WINT8 to the H level, which is input to the memory control 305. Then, an interrupt process when WINT8 is input is performed using the WINT8 as an interrupt signal. In the interrupt processing of WINT8, the calculation of the head value of the write address of the memory unit 302 for storing the image data of the next eight lines and the setting to the write address setting unit 340 are performed. In the RMW combining mode, when reading the second document, a write address for the second document is generated, and a read address for reading the first document is set in the memory.
[0068]
Hereinafter, the operation will be described with reference to the operation flow of FIG. In step S11, the counter Yin indicating the number of times the WINT8 interrupt process has been performed is incremented (Yin = 1 since the initialization has been performed in step S1 of the main flow). Then, in step S12, a write address of the memory unit 302 for storing the next eight lines of data is calculated by the following equation.
WADSET0-23 = 8 * DATAWIDTH * Yin + OFFSET
[0069]
The meaning of the above equation is that an interrupt is generated every eight lines, so multiply the data amount DATAWIDTH for one line by 8, multiply it by the number Yin of WINT8 interrupts, and add the value to the first set write address OFFSET. I have. In step S13, the write address calculated in step S12 is set in the write address setting unit 340, the interrupt processing is terminated, and the process returns to the infinite loop of the main flow and waits for an interrupt input. Thereafter, every time a WINT8 interrupt occurs, the head value of the write address for the next eight lines is sequentially calculated and set in the write address setting unit 340 to update while managing the write address. To store the image data.
[0070]
Next, the DREQ interrupt will be described. When the original is read to some extent and the image data is stored in the memory unit 302, the feeding of the recording paper in the printer 200 proceeds, and when the recording paper approaches the development start position, a DREQ is generated from the printer 200 at a predetermined timing. Then, this signal is input to the memory control 305. Then, DREQ interrupt processing is performed using this signal as an interrupt signal. The DREQ interrupt sets an initial value of a read address, initializes a read program counter, saves a write counter value, and the like.
[0071]
Hereinafter, the DREQ interrupt will be described with reference to the operation flow of FIG. In step S21, the number Yin of the WINT8 interrupts at that time is substituted for COUNT and temporarily stored. In step S22, the counter Yout used in the program at the time of reading is initialized (Yout = 0), and in step S23, the head of the read address is read from the memory unit 302 as RADSATA0 to 23 = OFFSET (= the head of the write address). The address is set in the address setting unit A380 to end the interrupt processing, return to the infinite loop of the main flow, and wait for an interrupt input.
[0072]
Next, the RINT8 interrupt will be described.
When DREQ is generated from the printer and RFGATE is generated in the read valid signal generating section 360, RINT8 is generated in the read line count section 370 every time 8 lines of image data are read from the memory section 302, and this signal is output as an interrupt signal. RINT8 interrupt occurs. In the RINT8 interrupt, the head value of the read address of the memory unit 302 for reading the next eight lines of image data is calculated and set in the read address setting unit A380.
[0073]
Hereinafter, the RINT8 interrupt will be described with reference to the operation flow of FIG. In step S31, the counter Yout indicating the number of times the RINT8 interrupt process has been performed is incremented (Yout = 1 since the initialization has been performed in step S22 of the DREQ interrupt flow). Then, in step S32, a read address of the memory unit 302 for reading data of the next eight lines is calculated by the following equation.
RADSETA0-23 = 8 * DATAWIDTH * Yout + OFFSET
[0074]
The meaning of the above equation is that an interrupt is generated every eight lines, so that the data amount DATAWIDTH for one line is multiplied by 8, and the number of RINT8 interrupts performed, Yout, is multiplied by OFFSET of the first set read address. In addition. In step S33, the read address calculated in step S32 is set in the read address setting unit A380. Then, in step S34, the magnitude relationship between the value of Yout and the value of COUNT is compared.
[0075]
Initially, since Yout is a value smaller than COUNT, it is determined that all the image data stored in the memory unit 302 has not been read out yet, and the process is continuously executed. However, reading of the original is completed, and after a while, Yout = When COUNT is reached, all of the image data stored in the memory unit 302 has been read out. Therefore, in step S35, RFGENB = L level is set in the read valid signal generation unit 360, and RFGATE is set to L level to execute the interrupt processing. And returns to the infinite loop of the main flow and waits for an interrupt input. When the processing is continued, each time the RINT8 interrupt occurs, the head value of the read address for the next eight lines is sequentially calculated and set in the read address setting unit A 380, thereby managing the read address and controlling the memory. Image data is read from the unit 302.
[0076]
Next, the WFGATE interrupt will be described with reference to FIG. When the reading of the document is completed and the WFGATE signal from the document length detection unit 320 becomes L level, a WFGATE interrupt process is performed using the inverted signal as an interrupt signal. In the WFGATE interrupt, the value of the counter used for writing is stored, initialized, and the initial value of the write address in the memory unit 302 is prepared in preparation for reading the next original.
[0077]
Hereinafter, the WFGATE interrupt will be described with reference to the operation flow of FIG. In step S41, the value of the counter Yin indicating the number of times the WINT8 interrupt has been performed is substituted for COUNT, and this value is determined as the termination condition for the RINT8 interrupt. Then, in step S42, the value of Yin is initialized (Yin = 0) in preparation for reading of the next document, and in step S43, the initial value OFFSET2 (WADSET0) of the write address for storing the next document in the memory unit 302. To 23) are set in the write address setting section 340 to terminate the interrupt processing, return to the infinite loop of the main flow, and wait for an interrupt input.
[0078]
Finally, the RFGATE interrupt will be described with reference to FIG. When reading of the image data from the memory unit 302 is completed, RFGENB is set to L level with respect to the read valid signal generation unit 360 by the RINT8 interrupt, and when RFGATE becomes L level, the inverted signal is used as an interrupt signal to generate an RFGATE interrupt. Perform processing. In the RFGATE interrupt, RFGENB is set to the H level again for the read valid signal generating section 360 in order to validate the DREQ signal from the printer 200 after the repeat copy operation or the next reading of the original.
[0079]
The RFGATE interrupt will be described with reference to the operation flow of FIG. In step S51, RFGENB is set to the H level for the read valid signal generation unit 360, and the DREQ signal from the printer 200 after the repeat copy operation or the next reading of the original is enabled, and the interrupt processing is terminated. Return to the infinite loop and wait for interrupt input.
[0080]
FIG. 40 shows the relationship between a series of copying operations and each interrupt timing. The control in the case of performing the synthesizing process will be described. The present apparatus has two synthesizing methods, one of which stores image data of two originals in the memory unit 302 and stores the image data of two screens in the A system. , And B simultaneously, and combining them in the second image combining unit 690 (two-screen combining). Another method is to store the image data of the first document in the memory unit 302 and store the image data of the second document. When the image data of the first document is read using the B-system, the first image combining unit 600 combines the read image data with the read second document image data, and then stores the image data in the memory 302 again. And a method of reading stored image data using the A system (read-modify-write (RMW) synthesis).
[0081]
First, two-screen composition will be described with reference to FIG. FIG. 41 shows a relationship between a series of copying operations and respective interrupt timings. In the case of performing two-screen synthesis, image data of two originals is stored in the memory unit 302 and simultaneously read and synthesized. After the initialization processing of (1), the reading of the first document is started (while WFGATE is at the H level), a WINT8 interrupt occurs, and the write address for writing to the memory unit 302 is controlled. First, the image data of the first document is stored. Then, in the first WFGATE interrupt, an OFFSET different from that when the image data of the first document is stored is set. At this time, the printer 200 controls so as not to feed the recording paper. Next, when the reading of the second document is started, the printer 200 starts feeding the recording paper, and based on OFFSET different from when the image data of the first document is stored by the WINT8 interrupt. The image data of the second document is stored in the memory unit 302 while controlling the write address so as to store the image data in a location different from the location where the image data of the first document is stored.
[0082]
When the second document is stored to some extent, a DREQ interrupt occurs at a predetermined timing to prepare for reading image data. Since RFGATE goes high due to the DREQ signal, a RINT8 interrupt occurs, and reading of image data from the memory unit 302 starts. At this time, by designating the addresses where the first and second originals are stored in the read address setting units A380 and B385 by an interrupt of RINT8, the first sheet is read at the timing of read A (A system). From the image data of the original, the image data of the second original is read at the timing of read B (B system). Then, a combined mode is designated by the system control 305 to the second image combining unit 690 to obtain a combined image. Then, when the reading is completed (fall of RFGATE), an RFGATE interrupt is generated to prepare for the next copying operation.
[0083]
Therefore, in the case of two-screen synthesis, a memory capacity twice as large as the data amount of one document is required to perform synthesis. Further, when combining three or more originals, another circuit for controlling the read address requires another read address control, which complicates the circuit. Conversely, since the image data reading paths are independent of each other, image processing can be performed differently for each document. Further, since all the image data is stored in the memory unit 302 as it is, it is also possible to change and read only the second original document one after another after completion of the first composite output, and perform the composite.
[0084]
Next, RMW combining will be described with reference to FIG. FIG. 42 shows a relationship between a series of copying operations and respective interrupt timings. In the case of performing RMW combining, after reading of the first document is completed, when the second document is taken, the first document is copied. The image data is read out, the read image data and the read image data are combined, stored in the memory unit 302, and read out again. When reading of a document is started (WFGATE is at H level), a WINT8 interrupt is generated, and image data of the first document is stored while controlling a write address for writing in the memory unit 302. In the first WFGATE interrupt, when reading the second document, the memory unit 302 reads the first document image data using the B system, so that the initial value of the write address set when reading the first document is used. Is set in the read address setting unit B 385, and the initial value of the write address of the first document is set in the write address setting unit 340 because the second document is overwritten after being combined in the same area.
At this time, the printer 200 controls so as not to feed the recording paper.
[0085]
Next, when the reading of the second document is started, the printer 200 starts feeding the recording paper, reads the address storing the image data of the first document by a WINT8 interrupt, and sends the read address to the address setting unit B385. After setting, the image data is read out by the B system, combined with the read image data of the second document, and stored in the same location where the image data of the first document is stored at the write timing of the same memory cycle. Is stored again in the memory unit 302 while controlling the write address to store the data in the memory 302 (FIG. 43).
[0086]
When the image data of the first and second originals are combined and stored to some extent, a DREQ interrupt occurs at a predetermined timing to prepare for reading the image data. Since RFGATE goes high due to the DREQ signal, a RINT8 interrupt occurs, and reading of image data from the memory unit 302 starts. At this time, the image data of the document synthesized by the A system is read by designating the address at which the image data obtained by synthesizing the first and second documents is specified in the read address setting unit A 380 by an interrupt of RINT8. (Also at this time, the image data of the first document is read in the B system.) When the reading is completed (rising edge of RFGATE), an RFGATE interrupt is generated, and the system prepares for the next copying operation.
[0087]
Therefore, in the case of the RMW combination, the amount of memory required for performing the combination may be the same as the data amount of the document. Similarly, when three or more originals are combined, the result of combining the first and second originals is stored in the memory unit 302. By reading out the image data obtained by synthesizing the first and second originals, further synthesizing the image data with the read image data of the third original, and storing the data, the circuit can be easily realized without complicating the circuit. Conversely, since the image data reading paths are not independent of each other, it is impossible to perform image processing differently for each document. Further, since the combined image data is stored in the memory unit 302, it is not possible to read and combine only the second original document one after another after completion of the first combined output.
[0088]
As described above, the two-screen synthesis and the RMW synthesis have advantages and disadvantages, respectively. However, in the present invention, by switching these two synthesis methods satisfactorily, the hardware scale does not become too large. It is intended to improve the usability and obtain image composition.
[0089]
FIG. 44 is a flowchart of the control for switching. In step S101, when the combination mode is set in the operation unit 450, the system control unit 500 notifies the memory control 305 that the combination mode has been set. In step S102, the processing information for the first document to be combined is set in the operation unit 450, and is notified to the memory control 305 via the system control 500. In step S103, the first document to be combined is read and stored in the memory unit 302. In step S104, the data amount of the document and the remaining amount of memory in the memory unit 302 are detected by the WFGATE interrupt at the end of reading the first document. This detection is detected by calculation by the memory control 305.
[0090]
The calculation of the detection of the image data amount and the remaining memory amount by the memory control 305 will be described below. First, regarding the remaining memory,
Remaining memory capacity = Memory capacity-Image data amount of the first document
Is calculated by Here, the image data amount of the first document is obtained from the difference between the write start address (OFFSET) and the final write address. That is, image data amount = final write address−OFFSET
Is used to calculate the image data amount. Usually, the write start address for the first document is set to 0 (WADRSA0 to 23 = 000000H), so that the final write address becomes the image data amount as it is.
[0091]
Since the memory capacity is determined by the hardware configuration and is 256 Mbits (FFFFFFH at the maximum address) in this embodiment, if the final write address of the first document exceeds FFFFFFH (the image data amount is larger than the memory capacity). Is large), the synthesizing operation becomes impossible.
[0092]
Then, in step S105, the magnitude relationship between the data amount of the document and the remaining amount of memory in the memory unit 302 is determined. If the memory remaining amount is equal to or larger than the document data amount, the second document can be stored. The combination mode signals 1 and 2 are set so as to combine in the screen combination mode. On the other hand, if it is determined in step S105 that the data amount of the document is larger than the remaining memory, the second document cannot be stored, and in step S107, the combining mode signal 1 and the combining mode signal 1 are combined so as to combine in the RMW combining mode. In the case of RMW combining mode in step S108, it is impossible to set the processing information for each document, so the processing information set in step S102 is cleared. In step S109, when combining in the two-screen combining mode, processing information for the second document is set. When combining in the RMW combining mode, the first and second documents are combined and then combined. Set the image processing information to be performed. Then, reading of the second document is started in step S110, and image processing and combination are performed and output based on the processing information and the combination mode set in step S111.
[0093]
By performing control as described above, when it is determined that the image data amount of the original is larger than half of the memory storage capacity at the time of reading the first original when performing the synthesizing process, the RMW synthesis is performed. If the size of the original is large, use the RMW synthesis mode to increase the hardware size more than necessary. In contrast, when the size of the document is small, the image processing was performed by preferentially using the two-screen combining mode and designating a different collection mode for each document. When the RMW composition mode is used, the processing information set for the first document is invalidated and cleared when the first document is read when the RMW composition mode is used. To Ri, makes it possible to avoid unintended output of the operator.
[0094]
FIGS. 45 and 46 are diagrams showing another example of the flowchart of the control for switching. When the combination mode is set in the operation unit 450 in step S121, the system control unit 500 sets the combination mode in the memory control 305. Let them know what was done. When the number of documents to be combined is further set in the operation unit 450 in step S122, the system control unit 500 notifies the memory control 305 of the number of documents. In step S123, the number of originals to be combined is determined by the memory control 305. If the number of originals is two, two images can be read out simultaneously using the A system and the B system. The combination mode signals 1 and 2 are set so as to combine in the screen combination mode.
[0095]
Further, in step S125, image processing information for the first document to be combined is set. In step S126, if it is determined in step S123 that there are three or more originals, it is impossible to read out three originals at the same time. Therefore, the combining mode signals 1 and 2 are set to combine in the RMW combining mode. In step S127, the first document to be combined is read and stored in the memory unit 302. In step S128, the memory controller 305 determines the number of originals to be combined again. If the number of originals is two, image processing information for the second original is set in step S129, and the second original is determined in step S130. Is read, and a composite image is output in the two-screen composite mode in step S131. If it is determined in step S128 that the number of originals is three or more, it is determined in step S132 whether the next original to be read is the last original. Is read from the last document to the previous document. If it is determined in step S132 that the document is the last document, image processing information for the composite image is set in step S134, the final document is read in step S135, and the RMW is read in step S131. Performs image synthesis output in the synthesis mode.
[0096]
By performing the control as described above, when the number of documents to be combined in performing the combining process is two, combining is performed using two-screen combining, and when the number of documents is three or more, combining is performed using RMW combining. Thus, in the case of combining three or more documents, the RMW combining mode is preferentially used to enable combined output without making the hardware scale unnecessarily large and complicated. In the case of two sheets, the two-screen combining mode is preferentially used, and it is possible to perform composite processing after designating a different collection mode for each document and performing image processing.
[0097]
FIG. 47 is a diagram showing still another example of the control flow chart for switching. When the combination mode is set in the operation unit 450 in step S141, the system control unit 500 sets the combination mode in the memory control 305. To inform. In step S142, the size of the document to be combined is set on the operation unit 450, and is notified to the memory control 305 via the system control 500.
[0098]
In step S143, the system control 500 detects the data amount of the document for the document size set in step S142, and notifies the memory control 305. In step S144, the data amount of the document detected in step S143 and the storage capacity of the memory unit 302 Compare with Then, the relationship between the document data amount and the storage capacity is
Memory capacity / 2 ≥ document data amount
In the case of, since the second document can also be stored, the combination mode signals 1 and 2 are set so as to combine in the two-screen combining mode in step S145, and the processing information for the first document to be combined is set in step S146. It is set in operation 450 and notified to the memory control 305 via the system control 500.
[0099]
Conversely, in step S144, the relationship between the document data amount and the storage capacity is
Memory capacity / 2 ≦ data amount of original
In the case of, since the second document cannot be stored, the combination mode signals 1 and 2 are set in step S147 so as to combine in the RMW combination mode.
[0100]
In step S148, the first document to be combined is read and stored in the memory unit 302. In step S149, it is determined whether the mode is the two-screen combining mode or the RMW combining mode. The processing information for the first document is set in the operation unit 450, and is notified to the memory control 305 via the system control 500. Conversely, RMW synthesis modeofIn this case, in step S151, the processing information for the composite image is set in the operation unit 450, and is notified to the memory control 305 via the system control 500. Then, in step S152, the second original to be synthesizedofReading is started, image processing and composition are performed based on the processing information and the composition mode set in step S153, and output.
[0101]
By performing control as described above, the image data of the original is detected according to the original size when performing the synthesizing process, and when it is determined that the image data amount of the original is larger than half the storage capacity of the memory. Are combined using the RMW combining mode, and when it is determined that the number is small, the combining is performed using the two-screen combining mode. It enables composite output without making the scale unnecessarily large and complicated. Conversely, if the document size is small, preferentially use the two-screen composite mode and specify different collection modes for each document. In the case of using the RMW combining mode, it is possible to set the processing information independently for each document, thereby enabling the combined output. It is possible to prevent unintended output.
[0102]
【The invention's effect】
According to the present invention as described above,A synthesized image can be obtained without increasing the memory capacity more than necessary and without complicating the hardware configuration.
In addition, it is possible to prevent erroneous copying that is not intended by the operator.
[Brief description of the drawings]
FIG. 1 is a diagram schematically illustrating an overall configuration of a digital copying machine according to the present invention.
FIG. 2 is a diagram illustrating a schematic configuration of a scanner.
FIG. 3 is a diagram showing a relationship between each control signal and a document.
FIG. 4 is a diagram illustrating a configuration of an operation unit.
FIG. 5 is a diagram for explaining the operation of the LCD panel.
FIG. 6 is a partial view for explaining details of an image memory.
FIG. 7 is another partial view for explaining the details of the image memory.
FIG. 8 is a diagram illustrating details of a first image combining unit.
FIG. 9 is a diagram illustrating details of an S / P conversion unit.
FIG. 10 is a time chart for explaining the operation of the S / P converter.
FIG. 11 is a time chart for explaining the operation of the S / P converter.
FIG. 12 is a diagram illustrating details of a data switching unit.
FIG. 13 is a diagram illustrating details of a data latch circuit.
FIG. 14 is a time chart for explaining the operation of the data latch circuit.
FIG. 15 is a diagram showing details of a P / S conversion unit.
FIG. 16 is a time chart for explaining the operation of the P / S converter.
FIG. 17 is a diagram illustrating details of an image processing circuit.
FIG. 18 is a diagram illustrating details of a second image synthesis unit.
FIG. 19 is a diagram of a document transport unit of the scanner as viewed from above.
FIG. 20 is a diagram for describing an operation of detecting a document width and length of A4.
FIG. 21 is a diagram for describing details of a write line count unit.
FIG. 22 is a time chart for explaining the operation of a write line counting unit.
FIG. 23 is a flowchart illustrating an operation of a WINT interrupt process.
FIG. 24 is a diagram for describing details of a write address generation unit;
FIG. 25 is a time chart for describing an operation of a write address generation unit.
FIG. 26 is a diagram illustrating a relationship between a control signal and a document.
FIG. 27 is a diagram for describing details of a write address setting unit;
FIG. 28 is a diagram for describing details of a read valid signal generator;
FIG. 29 is a time chart for explaining the operation of the read valid signal generator;
FIG. 30 is a diagram for describing details of a read line count unit;
FIG. 31 is a time chart for explaining the operation of a read line counting unit;
FIG. 32 is a diagram for describing details of a read address generation unit;
FIG. 33 is a time chart for explaining the operation of the read address generation unit;
FIG. 34 is a diagram for describing details of a read address setting unit;
FIG. 35 is a flowchart illustrating the operation of a memory control unit.
FIG. 36 is a flowchart illustrating an operation of a DREQ interrupt.
FIG. 37 is a flowchart for explaining the operation of an interrupt of RINT8.
FIG. 38 is a flowchart for explaining the operation of a WFGATE interrupt;
FIG. 39 is a flowchart for explaining the operation of the RFGATE interrupt;
FIG. 40 is a diagram showing the relationship between a series of copying operations and the timing of each interrupt.
FIG. 41 is a diagram showing a time chart for explaining two-screen synthesis.
FIG. 42 is a time chart for explaining RMW combination.
FIG. 43 is a time chart for explaining RMW combination.
FIG. 44 is a diagram showing a flowchart of control for switching.
FIG. 45 is a diagram showing a part of a flowchart for explaining another example of control for switching.
FIG. 46 is a view showing a flowchart following the flowchart of FIG. 45;
FIG. 47 is a flowchart illustrating still another example of control for switching.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 100 ... Scanner, 101 ... CCD (charge transfer element), 102 ... Amplification circuit, 103 ... A / D converter, 104 ... Shading correction circuit, 105 ... Image processing circuit, 106 ... Clock generation unit, 108 ... Reference numeral 110: light source, 111: lens, 200: printer, 300: image memory, 301: memory control unit, 302: memory unit, 303: address control unit, 305: memory control, 306: image data processing unit, 310: document detection Unit, 311-318: document width detection sensor, 320: document length detection unit, 321: document insertion sensor, 322: document length detection sensor, 330: write address generation unit, 331, 332: down counter, 335, 371, 391 , 401 counter, 340 write address setting unit, 341, 381 parallel I / O 350: write line count section, 360: read valid signal generation section, 370: read line count section, A380, B385: read address setting section, A390, B400: read address generation section, 450: operation section, 451: operation panel 452 LCD panel, 453 operation control unit, 500 system control unit, 600 first image synthesizing unit, 333, 352, 372, 601, 691 AND gate, 602, 692 OR gate , 603, 693, 694: Exclusive or (EX-OR) gate, 604, 694: Selector, 610: S / P converter, 611: Shift register, 334, 361, 612, 631, 641: flip-flop F / F), 620: Data switching unit, A630, B640: Data latch , A650, B660: P / S converter, 651, 661: Shift register, A670, B680: Image processing unit, 671, 681: EX-OR gate, 672, 682: Line buffer, 673, 683: Write address counter , 684, a read address counter; 690, a second image synthesizing unit; 700, a coaxial cable.

Claims (4)

Reading means for digitally reading an image on a document, storage means for storing image data read by the reading means, and image forming means for forming an image based on the image data read from the storage means A digital image forming apparatus comprising: a data amount detecting means for detecting an image data amount of the document stored in the storage means; and a storage means at the time when the image data amount of the document is detected by the data amount detecting means. Remaining amount detecting means for detecting a storable remaining amount , first combining means for storing image data of a plurality of documents in different areas of the storage means and combining them when reading out, and image data of a first document was stored in the storage means, and overwrites and stores the same area after synthesizing the image data of the second or later document against the image data stored in said storage means Comprising a second combining means, a switching means for switching between said first combining means and said second combining means, said switching means, when having stored the first document in the storage means, the data amount detecting Comparing the image data amount of the original document read first by the means and the remaining amount detected by the remaining amount detecting means, and when the remaining amount is larger than the image data amount, uses the first combining means; the time image data amount is larger than the remaining amount is switched so as to use the second combining means, switched digital image forming apparatus characterized by forming an image based on image data made image focus. A plurality of processing means for processing image data read from the storage means; and processing information setting means for setting processing information for the processing means, wherein the first synthesizing means is used to synthesize an image. is on the basis of the processing information set by processing information setting means, and the combined output after pressurization Engineering by each individually the plurality of processing means the image data of each document read from the memory means for each document the case of forming an image using the second combining means, claims, characterized in that the disabling processing information set by the working information setting means relative to the document when reading the end of the first document Item 2. A digital image forming apparatus according to Item 1. Reading means for digitally reading an image on a document, storage means for storing image data read by the reading means, and image forming means for forming an image based on the image data read from the storage means A digital image forming apparatus comprising: a first synthesizing unit for storing image data of a plurality of originals in different areas of the storage unit and synthesizing when reading out the image data; and storing the image data of a first original in the storage unit . A second synthesizing unit for storing the image data of the second and subsequent originals with the image data stored in the storage unit, and then overwriting and storing the same in the same area ; wherein a switching means for switching the second combining means, and size designation means for designating the size of the document to be synthesized, against the size of the document specified by the size specification device A data amount detecting means for detecting that the image data amount, the switching means, when the size of the document specified by the size specification device, the image data amount and the storage has been detected by operating the data amount detecting means Means for storing the image data, and when the image data amount is smaller than 1/2 of the storage capacity, the first synthesizing means is used, and the image data amount is reduced to 1/2 of the storage capacity. The digital image forming apparatus is switched to use the second synthesizing means when the number is larger . A plurality of processing means for processing the image data read out from said storage means comprises a working information setting means for setting the processing information to the processing means, the amount of image data detected by the data amount detecting means, said memory digital image forming according to claim 3, characterized in that to prevent further settings of the processing information by the processing information setting means individually for each of the document when more than half of the storage capacity of the unit apparatus.

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