JP3552045B2 - Recording method of image signal recording medium, image signal recording device, and image signal reproducing device - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention records a moving image signal on a recording medium such as a magneto-optical disk or a magnetic tape, and reproduces the moving image signal to display it on a display or the like. The image signal is transmitted from the transmitting side to the receiving side via a transmission path, and is used for receiving and displaying the image signal on the receiving side.Suitable image signalThe present invention relates to a recording method of a recording medium, an image signal recording device, and an image signal reproducing device.
[0002]
[Prior art]
For example, in a system for transmitting a moving image signal to a remote place, such as a video conference system and a video telephone system, in order to efficiently use a transmission path, a line correlation or an inter-frame correlation of a video signal is used. The image signal is compressed and encoded.
[0003]
When the line correlation is used, the image signal can be compressed by, for example, performing a DCT (Discrete Cosine Transform) process.
[0004]
In addition, if the inter-frame correlation is used, it is possible to further compress and encode the image signal. For example, as shown in FIG. 14, when frame images PC1, PC2, and PC3 are generated at times t1, t2, and t3, respectively, the difference between the image signals of frame images PC1 and PC2 is calculated to generate PC12. Further, a difference between the frame images PC2 and PC3 is calculated to generate a PC23. Normally, the images of temporally adjacent frames do not have such a large change, and when the difference between them is calculated, the difference signal has a small value. Therefore, if the difference signal is encoded, the code amount can be compressed.
[0005]
However, if only the difference signal is transmitted, the original image cannot be restored. Therefore, the image of each frame is one of three types of pictures, i-pictures, P-pictures, and B-pictures, and the image signal is compression-coded.
[0006]
That is, for example, as shown in FIG. 15, image signals of 17 frames from frame F1 to frame F17 are set as a group of pictures and are set as one unit of processing. Then, the image signal of the first frame F1 is encoded as an I picture, the second frame F2 is processed as a B picture, and the third frame F3 is processed as a P picture. Hereinafter, the fourth and subsequent frames F4 to F17 are alternately processed as B pictures or P pictures.
[0007]
As an I-picture image signal, the image signal for one frame is transmitted as it is. On the other hand, as an image signal of a P picture, basically, as shown in FIG. 15A, a difference from an image signal of an I picture or a P picture which precedes it is transmitted. Further, as an image signal of a B picture, basically, as shown in FIG. 15B, a difference from an average value of both temporally preceding and succeeding frames is obtained, and the difference is encoded. Become
[0008]
FIG. 16 shows the principle of the method for encoding a moving image signal in this manner. As shown in the figure, since the first frame F1 is processed as an I picture, it is directly transmitted as transmission data F1X to the transmission path (intra-picture encoding). On the other hand, since the second frame F2 is processed as a B picture, the difference between the temporally preceding frame F1 and the average value of the temporally succeeding frame F3 is calculated, and the difference is calculated. It is transmitted as transmission data F2X.
[0009]
However, there are four types of B picture processing in more detail. The first process is to transmit the data of the original frame F2 as it is as the transmission data F2X (SP1) (intra coding), and is the same process as in the case of the I picture. The second process is to calculate a difference from the temporally later frame F3 and transmit the difference (SP2) (backward prediction coding). The third process is to transmit the difference (SP3) from the temporally preceding frame F1 (forward prediction coding). Further, the fourth processing is to generate a difference (SP4) between the average value of the temporally preceding frame F1 and the average value of the following frame F3, and transmit this as transmission data F2X (bidirectional predictive coding). .
[0010]
Among these four methods, the method that minimizes transmission data is adopted.
[0011]
When transmitting the difference data, a motion vector x1 (a motion vector between frames F1 and F2) with an image (predicted image) of a frame whose difference is to be calculated (in the case of forward prediction) or x2 (Motion vector between frames F3 and F2) (for backward prediction) or both x1 and x2 (for bidirectional prediction) are transmitted along with the difference data.
[0012]
Further, a frame F3 of a P picture is calculated using a temporally preceding frame F1 as a predicted image, a difference signal (SP3) from the frame, and a motion vector x3, and the resultant is transmitted as transmission data F3X (forward prediction). Coding). Alternatively, the data of the original frame F3 is transmitted as it is as the transmission data F3X (SP1) (intra coding). Which method is used, as in the case of the B picture, is selected so that the transmission data is smaller.
[0013]
FIG. 17 shows a configuration example of an apparatus that encodes and transmits a moving image signal based on the above-described principle and decodes the encoded signal. The encoding device 1 encodes an input video signal and transmits the encoded video signal to a recording medium 3 as a transmission path. The decoding device 2 reproduces a signal recorded on the recording medium 3, and decodes and outputs the signal.
[0014]
In the encoding device 1, an input video signal is input to a preprocessing circuit 11, where a luminance signal and a chrominance signal (a color difference signal in this example) are separated, and are separated by A / D converters 12 and 13, respectively. A / D conversion is performed. The video signal converted into a digital signal by A / D conversion by the A / D converters 12 and 13 is supplied to the frame memory 14 and stored therein. The frame memory 14 stores the luminance signal in the luminance signal frame memory 15 and the chrominance signal in the chrominance signal frame memory 16, respectively.
[0015]
The format conversion circuit 17 converts the frame format signal stored in the frame memory 14 into a block format signal. That is, as shown in FIG. 18, the video signal stored in the frame memory 14 is data of a frame format in which V lines of H dots are collected per line. The format conversion circuit 17 divides the signal of one frame into M slices in units of 16 lines. Then, each slice is divided into M macroblocks. Each macro block is composed of a luminance signal corresponding to 16 × 16 pixels (dots), and this luminance signal is further divided into blocks Y [1] to Y [4] in units of 8 × 8 dots. You. The luminance signal of 16 × 16 dots corresponds to a Cb signal of 8 × 8 dots and a Cr signal of 8 × 8 dots.
[0016]
The data thus converted into the block format is supplied from the format conversion circuit 17 to the encoder 18, where the data is encoded. The details will be described later with reference to FIG.
[0017]
The signal encoded by the encoder 18 is output to a transmission path as a bit stream, and is recorded on, for example, the recording medium 3.
[0018]
The data reproduced from the recording medium 3 is supplied to the decoder 31 of the decoding device 2 and decoded. The details of the decoder 31 will be described later with reference to FIG.
[0019]
The data decoded by the decoder 31 is input to a format conversion circuit 32, and is converted from a block format to a frame format. Then, the luminance signal in the frame format is supplied to and stored in the luminance signal frame memory 34 of the frame memory 33, and the color difference signal is supplied to and stored in the color difference signal frame memory 35. The luminance signal and the chrominance signal read from the luminance signal frame memory 34 and the chrominance signal frame memory 35 are D / A converted by D / A converters 36 and 37, respectively, supplied to a post-processing circuit 38, and synthesized. . Then, the data is output and displayed on a display such as a CRT (not shown).
[0020]
Next, a configuration example of the encoder 18 will be described with reference to FIG.
[0021]
Image data to be encoded is input to the motion vector detection circuit 50 in macroblock units. The motion vector detection circuit 50 processes the image data of each frame as an I picture, a P picture, or a B picture according to a predetermined sequence set in advance. Whether the image of each frame that is sequentially input is processed as one of I, P, and B pictures is determined in advance (for example, as illustrated in FIG. 15, the image is configured by frames F1 to F17). The group of pictures are processed as I, B, P, B, P,... B, P).
[0022]
Image data of a frame (for example, frame F1) processed as an I picture is transferred from the motion vector detection circuit 50 to the front original image section 51a of the frame memory 51, stored, and processed as a B picture (for example, frame F2). Is transferred and stored in the original image unit 51b, and the image data of a frame (for example, frame F3) processed as a P picture is transferred and stored in the rear original image unit 51c.
[0023]
Further, at the next timing, when an image of a frame to be further processed as a B picture (frame F4) or a P picture (frame F5) is input, the first P picture stored in the rear original image section 51c until then is input. The image data of (frame F3) is transferred to the front original image section 51a, the image data of the next B picture (frame F4) is stored (overwritten) in the original image section 51b, and the next P picture (frame F5) Is stored (overwritten) in the rear original image section 51c. Such an operation is sequentially repeated.
[0024]
The signal of each picture stored in the frame memory 51 is read therefrom, and the prediction mode switching circuit 52 performs frame prediction mode processing or field prediction mode processing. Further, under the control of the prediction determination circuit 54, the calculation unit 53 performs calculation of intra prediction, forward prediction, backward prediction, or bidirectional prediction. Which of these processes is to be performed is determined in accordance with the prediction error signal (the difference between the reference image to be processed and the predicted image corresponding thereto). For this reason, the motion vector detection circuit 50 generates a sum of absolute values (or a sum of squares) of the prediction error signal used for this determination.
[0025]
Here, the frame prediction mode and the field prediction mode in the prediction mode switching circuit 52 will be described.
[0026]
When the frame prediction mode is set, the prediction mode switching circuit 52 sends the four luminance blocks Y [1] to Y [4] supplied from the motion vector detection circuit 50 to the subsequent operation unit 53 as they are. Output. That is, in this case, as shown in FIG. 20A, the data of the line of the odd field and the data of the line of the even field are mixed in each luminance block. In this frame prediction mode, prediction is performed in units of four luminance blocks (macroblocks), and one motion vector corresponds to four luminance blocks.
[0027]
On the other hand, in the field prediction mode, the prediction mode switching circuit 52 converts the signal input from the motion vector detection circuit 50 with the configuration shown in FIG. Among the luminance blocks, the luminance blocks Y [1] and Y [2] are constituted by, for example, only dots of the odd field lines, and the other two luminance blocks Y [3] and Y [4] The data is constituted by the data of the lines of the even-numbered fields and output to the calculation unit 53. In this case, one motion vector corresponds to two luminance blocks Y [1] and Y [2], and the other two luminance blocks Y [3] and Y [4]. Thus, another one motion vector is corresponded.
[0028]
The motion vector detection circuit 50 outputs the sum of absolute values of the prediction errors in the frame prediction mode and the sum of the absolute values of the prediction errors in the field prediction mode to the prediction mode switching circuit 52. The prediction mode switching circuit 52 compares the absolute values of the prediction errors in the frame prediction mode and the field prediction mode, performs a process corresponding to the prediction mode having a small value, and outputs the data to the calculation unit 53.
[0029]
However, such processing is actually performed by the motion vector detection circuit 50. That is, the motion vector detection circuit 50 outputs a signal having a configuration corresponding to the determined mode to the prediction mode switching circuit 52, and the prediction mode switching circuit 52 outputs the signal as it is to the subsequent operation unit 53.
[0030]
Note that, in the frame prediction mode, the color difference signal is supplied to the arithmetic unit 53 in a state where data of lines in odd fields and data of lines in even fields are mixed, as shown in FIG. In the case of the field prediction mode, as shown in FIG. 20B, the upper half (4 lines) of each of the chrominance blocks Cb and Cr corresponds to the odd field corresponding to the luminance block Y [1] and Y [2]. The lower half (4 lines) is a color difference signal of an even field corresponding to the luminance blocks Y [3] and Y [4].
[0031]
In addition, the motion vector detection circuit 50 determines the absolute value of the prediction error for determining whether to perform intra-picture prediction, forward prediction, backward prediction, or bidirectional prediction in the prediction determination circuit 54 as follows. Generate a sum of values.
[0032]
That is, as the sum of the absolute values of the prediction errors of the intra-picture prediction, the sum of the signals Aij of the macroblocks of the reference image 絶 対 the absolute value of the Aij | ｉAij | and the sum of the absolute values of the signals Aij of the macroblocks | Aij | ΣAij | Find the difference between Also, the sum of the absolute value of the prediction error of the forward prediction and the sum of the absolute value | Aij-Bij | of the difference Aij−Bij | between the signal Aij of the macroblock of the reference image and the signal Bij of the macroblock of the predicted image is represented as | Aij−. Bij |. In addition, the absolute value sum of the prediction error between the backward prediction and the bidirectional prediction is obtained in the same manner as in the forward prediction (by changing the predicted image to a different predicted image from that in the forward prediction).
[0033]
These absolute value sums are supplied to the prediction determination circuit 54. The prediction determination circuit 54 selects the smallest absolute value sum of the prediction errors of the forward prediction, the backward prediction, and the bidirectional prediction as the absolute value sum of the prediction errors of the inter prediction. Furthermore, the absolute value sum of the prediction error of the inter prediction and the absolute value sum of the prediction error of the intra prediction are compared, and the smaller one is selected, and the mode corresponding to the selected absolute value sum is set as the prediction mode. select. That is, if the sum of the absolute values of the prediction errors of the intra prediction is smaller, the intra prediction mode is set. If the sum of the absolute values of the prediction errors in the inter prediction is smaller, the mode having the smallest absolute value sum is set among the forward prediction, backward prediction, and bidirectional prediction modes.
[0034]
As described above, the motion vector detecting circuit 50 converts the signal of the macroblock of the reference image into the prediction mode switching circuit 52 in a configuration corresponding to the mode selected by the prediction mode switching circuit 52 among the frame or field prediction modes. And a motion vector between the predicted image and the reference image corresponding to the prediction mode selected by the prediction determination circuit 54 among the four prediction modes, and the variable-length encoding circuit 58 Is output to the motion compensation circuit 64. As described above, as the motion vector, the motion vector having the smallest absolute value sum of the corresponding prediction errors is selected.
[0035]
The prediction determination circuit 54 sets the intra-frame (image) prediction mode (mode in which motion compensation is not performed) as the prediction mode when the motion vector detection circuit 50 is reading the image data of the I picture from the front original image section 51a. Then, the switch 53d of the calculation unit 53 is switched to the contact a side. As a result, the image data of the I picture is input to the DCT mode switching circuit 55.
[0036]
The DCT mode switching circuit 55 converts the data of the four luminance blocks into a state where the lines of the odd field and the lines of the even field are mixed (frame DCT mode), as shown in FIG. Alternatively, the signal is output to the DCT circuit 56 in one of the separated states (field DCT mode).
[0037]
That is, the DCT mode switching circuit 55 compares the coding efficiency in the case where the DCT processing is performed in a mixed state with the data of the odd field and the even field with the coding efficiency in the case where the DCT processing is performed in the separated state. Choose a good mode.
[0038]
For example, as shown in FIG. 21A, the input signal has a configuration in which the lines of the odd field and the even field are mixed, and the difference between the signal of the line of the odd field and the signal of the line of the even field adjacent vertically. And calculate the sum (or sum of squares) of the absolute values. As shown in FIG. 21B, the input signal has a structure in which the lines of the odd field and the even field are separated from each other, and the signal difference between the lines of the odd field adjacent vertically and the line of the even field. The difference between the signals is calculated, and the sum (or sum of squares) of the respective absolute values is obtained. Further, the DCT mode corresponding to the smaller value is set by comparing the two (the sum of absolute values). That is, if the former is smaller, the frame DCT mode is set, and if the latter is smaller, the field DCT mode is set.
[0039]
Then, the data having the configuration corresponding to the selected DCT mode is output to the DCT circuit 56, and the DCT flag indicating the selected DCT mode is output to the variable length coding circuit 58 and the motion compensation circuit 64.
[0040]
As is apparent from a comparison between the prediction mode (FIG. 20) in the prediction mode switching circuit 52 and the DCT mode (FIG. 21) in the DCT mode switching circuit 55, the data structure of each mode of the luminance block is substantially the same. Are identical.
[0041]
When the prediction mode switching circuit 52 selects the frame prediction mode (mode in which odd lines and even lines are mixed), the DCT mode switching circuit 55 also performs frame DCT mode (mode in which odd lines and even lines are mixed). If the field prediction mode (mode in which the data of the odd field and the data of the even field are separated) is selected in the prediction mode switching circuit 52, the DCT mode switching circuit 55 selects the field DCT mode ( (The mode in which the data of the odd field and the data of the even field are separated) is likely to be selected.
[0042]
However, this is not always the case. In the prediction mode switching circuit 52, the mode is determined so that the sum of absolute values of the prediction errors is small, and in the DCT mode switching circuit 55, the coding efficiency is good. The mode is determined so that
[0043]
The I-picture image data output from the DCT mode switching circuit 55 is input to the DCT circuit 56, where it is subjected to DCT (Discrete Cosine Transform) processing and converted into DCT coefficients. The DCT coefficient is input to the quantization circuit 57, quantized in a quantization step corresponding to the data storage amount (buffer storage amount) of the transmission buffer 59, and then input to the variable length coding circuit 58.
[0044]
The variable-length encoding circuit 58 converts the image data (in this case, I-picture data) supplied from the quantization circuit 57 in accordance with the quantization step (scale) supplied from the quantization circuit 57, for example. The data is converted into a variable length code such as a Huffman code and output to the transmission buffer 59.
[0045]
The variable length encoding circuit 58 also determines whether a quantization step (scale) by the quantization circuit 57 or a prediction mode (intra-picture prediction, forward prediction, backward prediction, or bidirectional prediction) by the prediction determination circuit 54. Mode), a motion vector from the motion vector detection circuit 50, a prediction flag (a flag indicating whether the frame prediction mode or the field prediction mode is set) from the prediction mode switching circuit 52, and a DCT output from the DCT mode switching circuit 55. A flag (a flag indicating whether the frame DCT mode or the field DCT mode is set) is input, and these are also subjected to variable length coding.
[0046]
The transmission buffer 59 temporarily stores the input data, and outputs data corresponding to the storage amount to the quantization circuit 57.
[0047]
When the remaining data amount increases to the allowable upper limit, the transmission buffer 59 reduces the data amount of the quantized data by increasing the quantization scale of the quantization circuit 57 by the quantization control signal. Conversely, when the remaining data amount decreases to the allowable lower limit, the transmission buffer 59 reduces the data amount of the quantized data by reducing the quantization scale of the quantization circuit 57 by the quantization control signal. Increase. In this way, overflow or underflow of the transmission buffer 59 is prevented.
[0048]
The data stored in the transmission buffer 59 is read out at a predetermined timing, output to a transmission path, and recorded on the recording medium 3, for example.
[0049]
On the other hand, the I-picture data output from the quantization circuit 57 is input to the inverse quantization circuit 60 and is inversely quantized according to the quantization step supplied from the quantization circuit 57. The output of the inverse quantization circuit 60 is input to an IDCT (inverse DCT) circuit 61, subjected to inverse DCT processing, supplied to a forward prediction image section 63a of a frame memory 63 via an arithmetic unit 62, and stored.
[0050]
When the motion vector detection circuit 50 processes the sequentially input image data of each frame as, for example, pictures of I, B, P, B, P, B,. After processing the image data as an I picture, before processing the image of the next input frame as a B picture, the image data of the next input frame is further processed as a P picture. This is because a B picture involves backward prediction and cannot be decoded unless a P picture as a backward prediction image is prepared first.
[0051]
Then, after the processing of the I picture, the motion vector detection circuit 50 starts the processing of the image data of the P picture stored in the rear original image section 51c. Then, as in the case described above, the absolute value sum of the inter-frame difference (prediction error) in macroblock units is supplied from the motion vector detection circuit 50 to the prediction mode switching circuit 52 and the prediction determination circuit 54. The prediction mode switching circuit 52 and the prediction determination circuit 54 perform frame / field prediction mode, intra-picture prediction, forward prediction, backward prediction, or bidirectional prediction in accordance with the sum of absolute values of prediction errors of macroblocks of the P picture. Set the prediction mode for.
[0052]
When the intra-frame prediction mode is set, the arithmetic unit 53 switches the switch 53d to the contact a side as described above. Therefore, this data is transmitted to the transmission path via the DCT mode switching circuit 55, the DCT circuit 56, the quantization circuit 57, the variable length coding circuit 58, and the transmission buffer 59, similarly to the I picture data. The data is supplied to the backward prediction image section 63b of the frame memory 63 via the inverse quantization circuit 60, the IDCT circuit 61, and the calculator 62, and stored therein.
[0053]
In the forward prediction mode, the switch 53d is switched to the contact b, and the image data (in this case, the I picture) stored in the forward prediction image section 63a of the frame memory 63 is read out. Thus, motion compensation is performed in accordance with the motion vector output from the motion vector detection circuit 50. That is, when the setting of the forward prediction mode is instructed by the prediction determination circuit 54, the motion compensation circuit 64 sets the read address of the forward prediction image section 63a to the position of the macroblock that the motion vector detection circuit 50 is currently outputting. Data is read out from the corresponding position by a distance corresponding to the motion vector, and predicted image data is generated.
[0054]
The predicted image data output from the motion compensation circuit 64 is supplied to the calculator 53a. The arithmetic unit 53a subtracts the predicted image data corresponding to the macroblock supplied from the motion compensation circuit 64 from the macroblock data of the reference image supplied from the prediction mode switching circuit 52, and calculates the difference (prediction error). ) Is output. This difference data is transmitted to the transmission path via the DCT mode switching circuit 55, the DCT circuit 56, the quantization circuit 57, the variable length coding circuit 58, and the transmission buffer 59. The difference data is locally decoded by the inverse quantization circuit 60 and the IDCT circuit 61, and is input to the arithmetic unit 62.
[0055]
The same data as the predicted image data supplied to the calculator 53a is also supplied to the calculator 62a. The calculator 62 adds the prediction image data output from the motion compensation circuit 64 to the difference data output from the IDCT circuit 61. As a result, image data of the original (decoded) P picture is obtained. The P-picture image data is supplied to and stored in the backward prediction image section 63b of the frame memory 63.
[0056]
After the data of the I picture and the P picture are stored in the forward predicted image section 63a and the backward predicted image section 63b, respectively, the motion vector detection circuit 50 executes the processing of the B picture next. The prediction mode switching circuit 52 and the prediction determination circuit 54 set the frame / field mode according to the magnitude of the sum of the absolute values of the inter-frame differences in macroblock units. Set to one of the forward prediction mode, the backward prediction mode, and the bidirectional prediction mode.
[0057]
As described above, in the intra-frame prediction mode or the forward prediction mode, the switch 53d is switched to the contact point a or b. At this time, the same processing as in the case of the P picture is performed, and the data is transmitted.
[0058]
On the other hand, when the backward prediction mode or the bidirectional prediction mode is set, the switch 53d is switched to the contact point c or d.
[0059]
In the backward prediction mode in which the switch 53d is switched to the contact point c, the image data (in this case, the image of the P picture) stored in the backward prediction image section 63b is read out. Motion compensation is performed corresponding to the motion vector output from the vector detection circuit 50. That is, when the setting of the backward prediction mode is instructed by the prediction determination circuit 54, the motion compensation circuit 64 sets the read address of the backward prediction image unit 63b to the position of the macroblock that the motion vector detection circuit 50 is currently outputting. Data is read out from the corresponding position by a distance corresponding to the motion vector, and predicted image data is generated.
[0060]
The predicted image data output from the motion compensation circuit 64 is supplied to the calculator 53b. The arithmetic unit 53b subtracts the predicted image data supplied from the motion compensation circuit 64 from the macroblock data of the reference image supplied from the prediction mode switching circuit 52, and outputs the difference. This difference data is transmitted to the transmission path via the DCT mode switching circuit 55, the DCT circuit 56, the quantization circuit 57, the variable length coding circuit 58, and the transmission buffer 59.
[0061]
In the bidirectional prediction mode in which the switch 53d is switched to the contact d, the image data (in this case, the I-picture image) stored in the forward prediction image section 63a and the image data stored in the backward prediction image section 63b. Image data (in this case, an image of a P picture) is read out, and the motion compensation circuit 64 performs motion compensation corresponding to the motion vector output from the motion vector detection circuit 50. That is, when the setting of the bidirectional prediction mode is instructed by the prediction determination circuit 54, the motion vector detection circuit 50 outputs the read addresses of the forward predicted image section 63a and the backward predicted image section 63b. The data is read out from the position corresponding to the position of the macro block in which the data is shifted by an amount corresponding to the motion vector (in this case, two motion vectors for the forward predicted image and the backward predicted image), and predicted image data is generated. I do.
[0062]
The predicted image data output from the motion compensation circuit 64 is supplied to the calculator 53c. The arithmetic unit 53c subtracts the average value of the prediction image data supplied from the motion compensation circuit 64 from the macroblock data of the reference image supplied from the motion vector detection circuit 50, and outputs the difference. This difference data is transmitted to the transmission path via the DCT mode switching circuit 55, the DCT circuit 56, the quantization circuit 57, the variable length coding circuit 58, and the transmission buffer 59.
[0063]
The picture of the B picture is not stored in the frame memory 63 because it is not regarded as a predicted picture of another picture.
[0064]
In the frame memory 63, the forward prediction image section 63a and the backward prediction image section 63b are switched between banks as necessary, and the one stored in one or the other with respect to a predetermined reference image is replaced with the forward prediction image section 63a. It can be switched and output as a predicted image or a backward predicted image.
[0065]
In the above description, the luminance block has been mainly described. However, the chrominance block is similarly processed and transmitted in units of the macroblock shown in FIGS. 20 and 21. As a motion vector for processing a chrominance block, a motion vector obtained by halving the motion vector of the corresponding luminance block in the vertical and horizontal directions is used.
[0066]
Next, FIG. 22 is a block diagram showing a configuration of an example of the decoder 31 of FIG. The encoded image data transmitted via the transmission path (recording medium 3) is received by a receiving circuit (not shown) or reproduced by a reproducing device, temporarily stored in a receiving buffer 81, and then decoded by a decoding circuit 90. Is supplied to the variable length decoding circuit 82. The variable length decoding circuit 82 performs variable length decoding on the data supplied from the reception buffer 81, and outputs the motion vector, the prediction mode, the prediction flag and the DCT flag to the motion compensation circuit 87, and the quantization step to the inverse quantization circuit. 83, and outputs the decoded image data to the inverse quantization circuit 83.
[0067]
The inverse quantization circuit 83 inversely quantizes the image data supplied from the variable length decoding circuit 82 in accordance with the quantization step also supplied from the variable length decoding circuit 82, and outputs the image data to the IDCT circuit 84. The data (DCT coefficient) output from the inverse quantization circuit 83 is subjected to inverse DCT processing in the IDCT circuit 84 and supplied to the arithmetic unit 85.
[0068]
When the image data supplied from the IDCT circuit 84 is I-picture data, the data is output from the arithmetic unit 85 and a predicted image of image data (P or B-picture data) to be input to the arithmetic unit 85 later. For data generation, the data is supplied to and stored in the forward prediction image section 86a of the frame memory 86. This data is output to the format conversion circuit 32 (FIG. 17).
[0069]
When the image data supplied from the IDCT circuit 84 is P-picture data in which image data one frame before the P-picture is used as predicted image data and is data in the forward prediction mode, the forward predicted image portion 86a of the frame memory 86 Is read out, and the motion compensation circuit 87 performs motion compensation corresponding to the motion vector output from the variable length decoding circuit 82. The arithmetic unit 85 adds the image data (difference data) supplied from the IDCT circuit 84 and outputs the result. The added data, that is, the decoded P picture data is transmitted to the rear of the frame memory 86 in order to generate predicted image data of the image data (B picture or P picture data) input later to the arithmetic unit 85. It is supplied to and stored in the prediction image section 86b.
[0070]
Even in the case of P-picture data, the data in the intra-prediction mode is stored in the backward prediction image unit 86b without being processed by the arithmetic unit 85, as in the case of the I-picture data.
[0071]
Since this P picture is an image to be displayed next to the next B picture, it is not yet output to the format conversion circuit 32 at this time (as described above, the P picture input after the B picture is Processed and transmitted before the B picture).
[0072]
When the image data supplied from the IDCT circuit 84 is B picture data, it is stored in the forward prediction image section 86a of the frame memory 86 corresponding to the prediction mode supplied from the variable length decoding circuit 82. I-picture image data (in the case of forward prediction mode), P-picture image data stored in the backward prediction image section 86b (in the case of backward prediction mode), or both image data (in the case of bidirectional prediction mode) Are read out, and the motion compensation circuit 87 performs motion compensation corresponding to the motion vector output from the variable length decoding circuit 82 to generate a predicted image. However, when motion compensation is not required (in the case of the intra-picture prediction mode), a predicted picture is not generated.
[0073]
The data subjected to the motion compensation by the motion compensation circuit 87 in this way is added to the output of the IDCT circuit 84 in the arithmetic unit 85. This addition output is output to the format conversion circuit 32.
[0074]
However, this addition output is B-picture data, and is not stored in the frame memory 86 because it is not used for generating a predicted image of another image.
[0075]
After the image of the B picture is output, the image data of the P picture stored in the backward prediction image section 86b is read and supplied to the arithmetic unit 85 via the motion compensation circuit 87. However, at this time, no motion compensation is performed.
[0076]
Although the decoder 31 does not show circuits corresponding to the prediction mode switching circuit 52 and the DCT mode switching circuit 55 in the encoder 18 shown in FIG. 19, processing corresponding to these circuits, that is, odd field and even number The motion compensation circuit 87 executes a process of returning the configuration in which the signal of the line of the field is separated to the original mixed configuration as necessary.
[0077]
In the above, the processing of the luminance signal has been described, but the processing of the color difference signal is also performed in the same manner. However, in this case, the motion vector used for the luminance signal is halved in the vertical and horizontal directions.
[0078]
[Problems to be solved by the invention]
As described above, in the conventional image signal encoding and decoding methods, the resolution of the color difference signal is fixed to one type, and it is not possible to transmit the color difference signals of a plurality of types of resolutions.
[0079]
The present invention has been made in view of such a situation, and it is an object of the present invention to efficiently transmit color difference signals having a plurality of resolutions.
[0082]
[Means for Solving the Problems]
The recording method of the image signal recording medium of the present invention is a recording method of an image signal recording medium for recording an image signal encoded in a predetermined macroblock unit on the image signal recording medium. A luminance signal component of the macroblock is encoded to generate an encoded luminance signal, and a color signal component of the macroblock is encoded at a first resolution to generate a first encoded color signal. A first image encoding step of outputting a first slice data signal including a first encoded color signal, and a color signal component having a second resolution higher than the first resolution of the macroblock, A first encoded color signal encoded by the processing of the image encoding step is encoded using the decoded signal to generate a second encoded color signal, and a second encoded color signal including the second encoded color signal is generated. 2 slice data signal A second image encoding step of outputting the first image marks
When the encoded image signal is decoded, the first slice data signal output by the processing of the encoding step and the second slice data signal output by the processing of the second image encoding step are decoded. And recording the image signal recording media at positions close to each other so that one of them is sequentially read and one of them is selected.
In the recording method of the image signal recording medium according to the present invention, the luminance signal component of a predetermined macroblock in the image signal is encoded to generate an encoded luminance signal, and the color signal component of the macroblock is converted to a first color signal component. , A first encoded color signal is generated, and a first slice data signal including the encoded luminance signal and the first encoded color signal is output. Further, a color signal component having a second resolution higher than the first resolution of the macroblock is obtained by using a signal obtained by decoding the first encoded color signal encoded by the processing of the first image encoding step. Encoding is performed to generate a second encoded color signal, and a second slice data signal including the second encoded color signal is output. Then, the output first slice data signal and the output second slice data signal are sequentially read out when the encoded image signal is decoded, and one of them is selected. Are recorded on the image signal recording medium at positions close to each other.
[0083]
An image signal recording apparatus according to the present invention is an image signal recording apparatus that records an image signal encoded in a predetermined macroblock unit on an image signal recording medium, and includes a luminance signal component of a predetermined macroblock in the image signal. To generate an encoded luminance signal, encode the color signal components of the macroblock at a first resolution to generate a first encoded color signal, and generate an encoded luminance signal and a first encoded color signal. And a first image encoding circuit that outputs a first slice data signal including the first and second signals, and a first image encoding circuit encodes a color signal component having a second resolution higher than the first resolution of the macroblock. The encoded first encoded color signal is encoded using the decoded signal to generate a second encoded color signal, and a second slice data signal including the second encoded color signal is output. A second image encoding circuit; When the encoded image signal is decoded by combining the first slice data signal output from the first image encoding circuit and the second slice data signal output from the second image encoding circuit And a recording circuit for recording the image signals at positions close to each other on the image signal recording medium so that one of them is sequentially read and one of them is selected.
In the image signal recording device of the present invention, the luminance signal component of a predetermined macroblock in the image signal is encoded to generate an encoded luminance signal, and the color signal component of the macroblock is converted at the first resolution. Encoding is performed to generate a first encoded color signal, and a first slice data signal including the encoded luminance signal and the first encoded color signal is output. Further, a color signal component having a second resolution higher than the first resolution of the macroblock is obtained by using a signal obtained by decoding the first encoded color signal encoded by the processing of the first image encoding step. Encoding is performed to generate a second encoded color signal, and a second slice data signal including the second encoded color signal is output. Then, the output first slice data signal and the output second slice data signal are sequentially read out when the encoded image signal is decoded, and one of them is selected. Are recorded on the image signal recording medium at positions close to each other.
[0084]
An image signal reproducing apparatus of the present invention is an image signal reproducing apparatus for reproducing an image signal from an image signal recording medium on which an image signal encoded in a predetermined macroblock unit is recorded. A coded luminance signal obtained by coding a luminance signal component of a predetermined macroblock in a coded image signal, and a first coding in which a chrominance signal component of a macroblock is coded at a first resolution. A first slice data recording unit that records a first slice data signal including a color signal and a color signal component having a second resolution higher than the first resolution of the macroblock and a first encoded color signal A second slice data recording unit that records a second slice data signal including a second encoded color signal encoded using the decoded signal, wherein the first slice data Record When data having a structure in which the and the second slice data recording units are arranged at positions close to each other are recorded, the data is recorded from the image signal recording medium to the first slice data recording unit corresponding to the macroblock. Reproducing means for sequentially reproducing the first slice data signal and the second slice data signal recorded in the second slice data recording section; and the first slice data signal reproduced by the reproducing means and the second slice data signal. Separation means for separating the first slice data signal from the first slice data signal, and decoding the encoded luminance signal from the first slice data signal separated by the separation means to reproduce a luminance signal component, and converting the first encoded color signal into A first image decoding circuit that decodes and reproduces a first color signal component having a first resolution, and a first color signal component decoded by the first image decoding circuit are used to perform segmentation. A second image decoding circuit for decoding a second encoded color signal from the second slice data signal separated by the means to reproduce a second color signal component of a second resolution, and a first image Selection for selecting a color signal component used for macroblock decoding processing from the first color signal component reproduced by the decoding circuit and the second color signal component reproduced by the second image decoding circuit Means.
In the image signal reproducing apparatus according to the present invention, the encoded luminance signal obtained by encoding the luminance signal component of a predetermined macroblock in the encoded image signal, and the color signal component of the macroblock have a first resolution. A first slice data recording unit that records a first slice data signal including an encoded first encoded color signal, and a color signal component having a second resolution higher than the first resolution of the macroblock. And a second slice data recording unit that records a second slice data signal including a second encoded color signal encoded using a signal obtained by decoding the first encoded color signal. In this case, data having a structure in which the first slice data recording unit and the second slice data recording unit are arranged at positions close to each other is recorded, and the image signal is reproduced from the image signal recording medium. More specifically, a first slice data signal recorded in a first slice data recording unit corresponding to a macroblock and a second slice data signal recorded in a second slice data recording unit from an image signal recording medium. The signals are sequentially reproduced, and the reproduced first slice data signal and the reproduced second slice data signal are separated. From the separated first slice data signal, an encoded luminance signal is decoded to reproduce a luminance signal component, and a first encoded color signal is decoded to produce a first color signal component of a first resolution. Is played. On the other hand, the second encoded color signal is decoded from the separated second slice data signal using the decoded first color signal component, and the second color signal component of the second resolution is reproduced. Is done. Then, a color signal component used for macroblock decoding processing is selected from the reproduced first color signal component and second color signal component.
[0085]
As a result, not only can an image of a low color signal component be obtained with the same device as the conventional device, but also an image based on a high resolution color signal component can be obtained by adding an adapter as necessary. Is also possible.
[0086]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a block diagram showing the overall configuration of an image signal encoding apparatus and a decoding apparatus according to the present invention, and the same reference numerals are assigned to parts corresponding to those in the conventional case shown in FIG. In the present embodiment, the A / D conversion timing (sampling timing) of the color difference signal output by the pre-processing circuit 11 in the A / D converter 300 is different from that in the A / D converter 13 in FIG. I have. As a result, the chrominance signal frame memory 301, the format conversion circuit 302, and the encoder 303, which process the chrominance signal output from the A / D converter 300 in the subsequent stage, have a different configuration from the conventional case.
[0087]
Furthermore, in the decoding device 2, the decoder 401, the format conversion circuit 402, the chrominance signal frame memory 403, and the D / A converter 404 include the decoder 31, the format conversion circuit 32, and the chrominance signal frame memory shown in FIG. 35 and a D / A converter 37.
[0088]
Other configurations are the same as those in FIG.
[0089]
In the A / D converter 300 of the present invention, sampling is performed as shown in FIG. That is, assuming that the sampling points of the luminance signal in the A / D converter 12 are indicated by circles in the figure, the sampling points of the color difference signals performed by the A / D converter 300 are indicated by crosses in the figure. As shown in the figure, the sampling point of the luminance signal corresponds to 1: 1 (4: 4: 4 sampling).
[0090]
The color difference signal sampled by the A / D converter 300 is supplied to the color difference signal frame memory 301 and stored. The color difference signal read from the color difference signal frame memory 301 is input to the format conversion circuit 302 and down-sampled.
[0091]
That is, the format conversion circuit 302 incorporates, for example, a down-sampling circuit as shown in FIG. 3, and converts the color difference signal sampled by the A / D converter 300 at a ratio of 4: 4: 4 into a low-pass filter 131. Then, the data of each line is thinned every other line by the thinning circuit 132. As a result, 4: 2: 2 sampling is performed as shown in FIG. That is, in this case, in each line, one color difference signal corresponds to two luminance signals.
[0092]
The format conversion circuit 302 down-samples the color difference signal sampled at the ratio of 4: 2: 2 in this manner by the built-in down-sampling circuit in the same manner as shown in FIG. 2C. A color difference signal of a sampling ratio of 4: 2: 0 is generated. In this case, since all the color difference signals of 4: 2: 2 sampling are thinned out every other line, one color difference signal corresponds to four luminance signals.
[0093]
In the above description, the sampling ratio is changed by simply thinning out the data. However, it is also possible to perform sub-sampling by, for example, averaging the color difference signals at a plurality of predetermined positions. For example, by averaging the four color difference signals shown in FIG. 2A, it is possible to obtain the color difference signals indicated by crosses in parentheses in FIG. 2C.
[0094]
The format conversion circuit 302 blocks the color difference signals generated in this manner into the signals of the different resolution levels together with the corresponding luminance signal data. As a result, as shown in FIG. 4, a configuration of three types of macroblocks of 4: 4: 4, 4: 2: 2, or 4: 2: 0 becomes possible.
[0095]
As shown in FIG. 4A, the 4: 4: 4 macro block includes four luminance blocks Y1 to Y4, corresponding Cb color difference blocks Cb5, Cb7, Cb9, Cb11, and a Cr color difference block. It is composed of Cr6, Cr8, Cr10 and Cr12. On the other hand, as shown in FIG. 4B, in the 4: 2: 2 macro block, the luminance block is the same as that in the 4: 4: 4 macro block shown in FIG. 4A. However, the color difference block Cb is composed of Cb5 'and Cb7'. The color difference block Cr is composed of Cr6 'and Cr8'. Further, as shown in FIG. 4C, in the 4: 2: 0 macroblock, the luminance block is the same as in the 4: 4: 4 macroblock, but the color difference block Cb is Cb5 ″. , And the color difference block Cr is composed of Cr6 ″.
[0096]
It should be noted that the number attached to the code of each block indicates the order of transmission when the data is transmitted in each macroblock. Also, 'indicates that it is down-sampled data, and' indicates that down-sampling has been performed twice. Therefore, for example, Cb5 'directly down-samples Cb5. (This is generated by down-sampling Cb5 and Cb9 as described above).
[0097]
The reason why the transmission order of the chrominance data of the 4: 2: 2 macroblock in FIG. 4B is not such that Cb5 ′ is transmitted after Cb5 ′, as shown in FIG. This is to make it correspond to the transmission order in the 2: 0 macro block. That is, in the macroblock shown in FIG. 4C, Cr6 "is transmitted after Cb5". For this reason, even in the 4: 2: 2 macroblock shown in FIG. 4B, Cr6 'is transmitted next to Cb5'.
[0098]
Similarly, the transmission order in the 4: 4: 4 macroblock shown in FIG. 4A is determined so as to correspond to the transmission order of the 4: 2: 2 macroblock shown in FIG. 4B. . By doing so, it is possible to perform processing by a common circuit in the encoder, regardless of which ratio of macroblocks has been transmitted.
[0099]
However, in the present embodiment, these three types of macroblocks are not transmitted to the encoder 303, but four luminance blocks Y1 to Y4 and two chrominance blocks Cb5 ″, shown in FIG. Among the blocks forming the 4: 2: 0 macroblock composed of Cr6 ″ and the 4: 2: 2 macroblock shown in FIG. 4B, the chrominance blocks Cb5 ′, Cb7 ′, And the chrominance blocks Cr6 'and Cr8' and the chrominance blocks Cb5, Cb7, Cb9 and Cb11 excluding the luminance block, and the chrominance blocks Cr6, Cr8 and Cr10 of the 4: 4: 4 macroblock shown in FIG. 4A. , Cr12 are transmitted to the encoder 303.
[0100]
The encoder 303 is configured, for example, as shown in FIG. Note that the motion vector detection circuit 50, the frame memory 51, the prediction mode switching circuit 52, the prediction determination circuit 54, the DCT mode switching circuit 55, the transmission buffer 59, and the like in FIG. 19 are omitted from FIG. The connection is similarly made in the embodiment.
[0101]
In the embodiment of FIG. 5, the frame memory 63 is a luma (luminance signal) frame memory 63L and a chroma (color difference signal) frame memory 63C, and the motion compensation circuit 64 is a motion compensation circuit 64L and a motion compensation circuit. Although the image data is divided into 64C and is displayed in the example of FIG. 19, this is integrally shown in the example of FIG. 19, and also in the apparatus of FIG. 2) are prepared for the signal (signal) and for the chroma (color difference signal).
[0102]
Further, in the embodiment of FIG. 5, the luma frame memory 63L and the chroma frame memory 63C each have a forward prediction image portion and a backward prediction image portion inside similarly to the case shown in FIG. is there.
[0103]
That is, in the embodiment of FIG. 5, the circuit 100 including the motion vector detecting circuit 50 to the motion compensating circuit 64 has basically the same configuration as that in the case of FIG.
[0104]
This circuit 100 processes a color difference signal having the lowest resolution when focusing on the color difference signal. In this embodiment, as a circuit for processing a color difference signal having a higher resolution than the color difference signal in the circuit 100, an up-sampling circuit 111, a computing unit 112, a DCT circuit 113, a quantization circuit 114, a variable length A circuit 101 including an encoding circuit 115 is provided. The circuit 102 for processing a color difference signal having a higher resolution than the color difference signal in the circuit 101 includes an inverse quantization circuit 121, an IDCT circuit 122, an arithmetic unit 123, an upsampling circuit 124, an arithmetic unit 125, a DCT circuit 126, A circuit 127 and a variable length encoding circuit 128 are provided.
[0105]
The circuit 102 receives a color difference signal having the highest resolution, and the circuit 101 receives a color difference signal having a low resolution, which is obtained by down-sampling the color difference signal input to the circuit 102 by the down sampling circuit 103. The circuit 100 is configured to receive a color difference signal having the lowest resolution obtained by further down-sampling the color difference signal input to the circuit 101 by the down sampling circuit 104.
[0106]
The downsampling circuits 103 and 104 shown in FIG. 5 are built in the format conversion circuit 302 in FIG. Then, a chrominance block having the highest resolution, which is generated so as to form a 4: 4: 4 macroblock, is input to the circuit 102, and the macroblock is downsampled by the downsampling circuit 103 to 4: 2: 2. Are input to the circuit 101. The chrominance blocks forming the 4: 2: 2 macroblock are further down-sampled by the downsampling circuit 104, and the chrominance blocks forming the 4: 2: 0 macroblock are combined with the luminance blocks into 4: 2: The macroblock of 0 is input to the circuit 100 in units.
[0107]
Since the processing in the circuit 100 is the same as that described with reference to FIG. 19, the description thereof is omitted. However, if the description of the processing order of the luminance block and the chrominance block is added, the luminance blocks Y1 to Y4 are sequentially input first, so that these data are transferred to the frame memory 51 via the motion vector detection circuit 50. Is written to the frame memory for the luminance block. Similarly, the chrominance block data is written to the chrominance block frame memory of the frame memory 51 via the motion vector detection circuit 50 (FIG. 19).
[0108]
Then, the data of the luminance blocks Y1 to Y4 are read from the frame memory 51, and the prediction mode switching circuit 52, the arithmetic unit 53, the DCT circuit 56, the quantization circuit 57, the inverse quantization circuit 60, the IDCT circuit 61, and the arithmetic unit After being processed by the Luma frame memory 63L and the motion compensation circuit 64L, they are output via the variable length coding circuit 58 and the transmission buffer 59.
[0109]
The data of the chrominance block is basically processed in the same manner as the data of the luminance block, but the data of the chrominance block output from the calculator 62 is supplied to the chroma frame memory 63C and stored therein. . Then, in the motion compensation circuit 64C, motion compensation is performed using the motion vectors obtained by shortening the motion vectors in the luminance blocks Y1 to Y4 by に in the horizontal direction and the vertical direction, respectively.
[0110]
As a result, a signal of a group including the luminance blocks Y1, Y2, Y3, and Y4 and the color difference blocks Cb5 ″ and Cr6 ″ is supplied from the circuit 100 to the synthesis circuit 105.
[0111]
On the other hand, the data of the chrominance block converted into the 4: 2: 2 macroblock format by the downsampling circuit 103 is supplied to the arithmetic unit 112 of the circuit 101. The arithmetic unit 112 also includes data obtained by upsampling the data of the lower-resolution chrominance block, which is output from the arithmetic unit 62 of the circuit 100, by the upsampling circuit 111 twice (spatially) in the vertical direction. It is supplied as a prediction error signal.
[0112]
This up-sampling circuit 111 can be constituted by an interpolation circuit 141, for example, as shown in FIG. For example, as shown in FIG. 7, the interpolation circuit 141 adds (averages) the chrominance data of the line having no chrominance data after halving the values of the chrominance data located above and below the line, respectively. Can be generated. Since the band is limited when down-sampling is performed by the down-sampling circuit 104, the spatial frequency is not expanded by the up-sampling, but the resolution can be doubled.
[0113]
In this way, the data of the chrominance block generated by the upsampling circuit 111 is subtracted from the chrominance data output from the downsampling circuit 103 as a predicted image signal, and the difference is generated. This difference includes a vertical high-frequency component because the up-sampling circuit 111 performs up-sampling by two times in the vertical direction. This output of the arithmetic unit 112 is subjected to DCT processing by the DCT circuit 113, then quantized by the quantization circuit 114, and is subjected to variable-length encoding by the variable-length encoding circuit 115. Then, although not shown, it is supplied to the synthesizing circuit 105 via a transmission buffer. As a result, a signal of a group of color difference blocks Cb5 ', Cr6', Cb7 ', Cr8' having higher resolution than the color difference blocks Cb5 ", Cr6" output from the circuit 100 is generated.
[0114]
On the other hand, in the circuit 102, the data output by the quantization circuit 114 of the circuit 101 is inversely quantized by the inverse quantization circuit 121, which is further subjected to IDCT processing by the IDCT circuit 122 and output to the arithmetic unit 123. The prediction error signal output from the upsampling circuit 111 and used in the circuit 101 is supplied to the arithmetic unit 123. The arithmetic unit 123 locally decodes the color difference signal in the circuit 101 by adding the prediction error signal output from the upsampling circuit 111 and the signal output from the IDCT circuit 122.
[0115]
Then, the signal output from the arithmetic unit 123 is up-sampled twice in the horizontal direction by the up-sampling circuit 124 and output to the arithmetic unit 125. The arithmetic unit 125 subtracts the signal output from the up-sampling circuit 124 as a prediction error signal from the data of the chrominance block in the 4: 4: 4 macroblock format supplied from the format conversion circuit 302. Thus, the difference data includes a high frequency component in the horizontal direction.
[0116]
The output of the arithmetic unit 125 is subjected to DCT processing by the DCT circuit 126, quantized by the quantization circuit 127, and then variable-length coded by the variable-length coding circuit 128. Then, the signal is output to the synthesis circuit 105 via a transmission buffer (not shown). Thereby, data of the group of the color difference blocks Cb5, Cr6, Cb7, Cr8, Cb9, Cr10, Cb11, and Cr12 having the highest resolution is obtained.
[0117]
In this way, the synthesizing circuit 105 outputs the data of the group constituted by the luminance blocks Y1 to Y4 output from the circuit 100, the data Cb5 ″ and Cr6 ″ of the chrominance blocks having the lowest resolution, and the intermediate data output from the circuit 101. Group of data consisting of color difference block data Cb5 ', Cr6', Cb7 ', and Cr8', and the highest resolution color difference block data Cb5, Cr6, Cb7, Cr8, Cb9, Cr10, Cb11, Cr12. The data of the group constituted by is synthesized.
[0118]
At the time of this combination, as shown in FIG. 8, the combining circuit 105 places headers H at the beginning of the data of the three groups.₁Or header H₃Place. Thereby, the header H₁And a master slice composed of Y1, Y2, Y3, Y4, Cb5 ", and Cr6", and a header H₂, Cb5 ', Cr6', Cb7 ', Cr8' and the header H₃, Cb5, Cr6, Cb7, Cr8, Cb9, Cr10, Cb11, and Cr12, a bit stream is formed in units of slave slices 2. The bit stream is supplied to the transmission path and recorded on the recording medium 3.
[0119]
After the data of the master slice of one frame of data is transmitted, the data of the slave slice 1 for one frame is transmitted next, and then the data of the slave slice 2 for one frame is transmitted. Is also theoretically possible. However, this makes it difficult to obtain a high-resolution color image in real time. Therefore, as shown in FIG. 8, the master slice, the slave slice 1, and the slave slice are sequentially transmitted. preferable.
[0120]
According to the format shown in FIG. 8, the data recorded on the recording medium 3 is reproduced from the recording medium 3 and input to the decoder 401 of the decoding device 2 in FIG.
[0121]
The decoder 401 is configured, for example, as shown in FIG. In FIG. 9, the portions corresponding to the case shown in FIG. 22 are denoted by the same reference numerals. In this embodiment, the data supplied from the recording medium 3 (transmission path) is supplied to the reception buffer 81, and once stored, supplied to the separation circuit 150, where the luminance block and the chrominance block having the lowest resolution are grouped. , The data of the group of the color difference blocks of the intermediate resolution, and the data of the group of the color difference blocks of the highest resolution are supplied to the circuits 161, 162 or 163, respectively.
[0122]
The circuit 161 has substantially the same configuration as the decoding circuit 90 shown in FIG. In the circuit 161, a luma frame memory 86L and a chroma frame memory 86C are shown as the frame memory 86, and a motion compensation circuit 87L and a motion compensation circuit 87C are shown as the motion compensation circuit 87. Although not shown in FIG. 90, these circuits are built in. Further, the luma frame memory 86L and the chroma frame memory 86C of FIG. 9 do not show the forward prediction image section and the backward prediction image section shown in FIG. 22, but both have these built-in. is there.
[0123]
Therefore, the circuit 161 performs the same processing as the case described with reference to FIG. Only the relationship between the luma frame memory 86L and the chroma frame memory 86C will be described. The luma frame memory 86L stores the luminance block data output from the arithmetic unit 85. Then, the motion compensation for the luminance signal is performed by the motion compensation circuit 87L, and is output to the calculator 85. On the other hand, the chroma frame memory 86C stores data relating to the color difference blocks. Then, the motion compensation circuit 87C performs motion compensation on the data read from the chroma frame memory 86C using the motion vector obtained by halving the motion vector used in the motion compensation circuit 87L in the horizontal direction and the vertical direction, respectively. Output to
[0124]
In this way, the data of the 4: 2: 0 macroblock composed of the four luminance blocks Y1 to Y4 and the blocks Cb5 ″ and Cr6 ″ of the lowest resolution color difference signal from the circuit 161 is sent to the selection circuit 164. Is output.
[0125]
On the other hand, the data of the chrominance block having the intermediate resolution separated by the separation circuit 150 is subjected to variable-length decoding in the variable-length decoding circuit 152 and inversely quantized in the inverse quantization circuit 153. Then, after being subjected to IDCT processing in the IDCT circuit 154, it is input to the arithmetic unit 155.
[0126]
To the calculator 155, the data of the lower resolution chrominance block output from the calculator 85 of the circuit 161 is up-sampled in the vertical direction by the up-sampling circuit 151 and supplied. That is, this signal corresponds to the predicted image signal generated by the upsampling circuit 111 of the circuit 101 in FIG. Therefore, the data output from the IDCT circuit 154 and the prediction error signal output from the up-sampling circuit 151 are added by the arithmetic unit 155, so that the blocks Cb5 ', Cr6', Cb7 ', Cr8 'is obtained. This color difference signal is supplied to the selection circuit 164.
[0127]
Further, the data of the chrominance blocks Cb5, Cr6, Cb7, Cr8, Cb9, Cr10, Cb11, and Cr12 having the highest resolution separated by the separation circuit 150 are supplied to the variable-length decoding circuit 157 of the circuit 163, where the data is variable. It is long decoded. The signal output from the variable length decoding circuit 157 is inversely quantized by the inverse quantization circuit 158, subjected to IDCT processing by the IDCT circuit 159, and then input to the arithmetic unit 160.
[0128]
Further, the color difference signal of the intermediate resolution output from the calculator 155 of the circuit 162 is horizontally up-sampled by the up-sampling circuit 156 and supplied to the calculator 160 as a prediction error signal. The arithmetic unit 160 adds this prediction error signal to the output of the IDCT circuit 159, decodes the color difference signals Cb5, Cr6, Cb7, Cr8, Cb9, Cr10, Cb11, Cr12 having the highest resolution, and outputs the decoded signals to the selection circuit 164. I do.
[0129]
The selection circuit 164 is included in the format conversion circuit 402 in FIG. The selection circuit 164 selects a luminance signal and selects one of three color difference signals having different resolutions in response to a command from a user. The luminance signal is supplied to the luminance signal frame memory 34, and the chrominance signal is supplied to the chrominance signal frame memory 403. The luminance signal read from the luminance signal frame memory 34 is D / A-converted by the D / A converter 36 and then supplied to the post-processing circuit 38. The color difference signal read from the color difference signal frame memory 403 is D / A converted by a D / A converter 404 and then supplied to the post-processing circuit 38. The clock of the D / A converter 404 is changed according to the selected color difference signal.
[0130]
Therefore, the user can arbitrarily select any of the three levels of resolution as necessary and display it on a display or the like.
[0131]
FIG. 10 shows a second embodiment of the encoder 303. In this embodiment, the circuit 102 for processing a color difference signal of the highest resolution in the first embodiment (FIG. 5) is omitted, a circuit 101 for processing a color difference signal of an intermediate resolution, and a color difference signal of the lowest resolution. And a circuit 100 for processing the luminance signal. Among them, the circuit 100 has the same configuration as that in FIG.
[0132]
On the other hand, the circuit 101 includes, in addition to an arithmetic unit 112, a DCT circuit 113, a quantization circuit 114, and a variable length encoding circuit 115, an inverse quantization circuit 171, an IDCT circuit 172, an arithmetic unit 173, a chroma frame memory 174, a motion compensation A circuit 175 and a selection circuit 176 are provided.
[0133]
That is, in this embodiment, the operation of the circuit 100 is the same as that in FIG. 5, and the description thereof will be omitted.
[0134]
In the circuit 101, a method of generating a predicted image signal is different from the case in FIG. That is, in this embodiment, similarly to the case of the embodiment of FIG. 5, the locally decoded chrominance signal output from the arithmetic unit 62 of the circuit 100 is up-sampled by the up-sampling circuit 111 in the vertical direction. As a result, a first prediction error signal is generated.
[0135]
The signal output from the quantization circuit 114 is inversely quantized by the inverse quantization circuit 171, subjected to IDCT processing by the IDCT circuit 172, and then input to the arithmetic unit 173. The prediction image signal selected by the selection circuit 176 is input to the arithmetic unit 173.
[0136]
The arithmetic unit 173 adds the predicted image signal and the signal output by the IDCT circuit 172, and performs local decoding. The decoded chrominance signal is supplied to the chroma frame memory 174 and stored. The color difference signal stored in the chroma frame memory 174 is subjected to motion compensation in the motion compensation circuit 175 using a motion vector obtained by halving the motion vector in the motion compensation circuit 64L in the vertical direction. Is supplied as a predicted image signal.
[0137]
The selection circuit 176 compares the prediction error signal when the predicted image signal output from the upsampling circuit 111 is used with the prediction error signal when the predicted image signal output from the motion compensation circuit 175 is used, and determines a small prediction error. Select a predicted image corresponding to the error signal. Then, the selected predicted image signal is supplied to the arithmetic unit 173 to be used for local decoding as described above, and is also supplied to the arithmetic unit 112 to be supplied to the intermediate unit from the format conversion circuit 302. It is used as a prediction image signal for encoding a color difference signal of resolution.
[0138]
As described above, in this embodiment, the circuit 101 applies the up-sampling circuit 111 (spatial filter) including the interpolation circuit 141 (FIG. 6) to a decoded image of a color difference signal having a low resolution. , A predicted image having the same resolution as the high-resolution (intermediate resolution) color difference signal is generated, and the high-resolution (intermediate resolution) color difference signal is locally decoded to generate a predicted image. Then, of the two predicted images, the one with better prediction efficiency is adaptively selected. This makes it possible to compress data more efficiently.
[0139]
In this embodiment, a space indicating which one of the predicted image signal output from the upsampling circuit 111 and the predicted image signal output from the motion compensation circuit 175 is selected from the selection circuit 176 (the former is selected) A case / time (when the latter is selected) flag is output, and this is multiplexed and synthesized in the synthesizing circuit 105 together with the data output from the circuits 100 and 101 and transmitted.
[0140]
FIG. 11 shows an embodiment of a decoder 401 for decoding data encoded by the encoder 303 shown in FIG. 10 and decoding. In the embodiment of FIG. 11, parts corresponding to those of the embodiment shown in FIG. 9 are denoted by the same reference numerals. In this embodiment, the circuit 163 for processing the color difference signal of the highest resolution in FIG. 9 is omitted, the circuit 162 for processing the color difference signal of the intermediate resolution, and the circuit 161 for processing the color difference signal and the luminance signal of the low resolution. It consists of: The configuration of the circuit 161 is similar to that in FIG.
[0141]
The circuit 162 includes a chroma frame memory 181, a motion compensation circuit 182, and a selection circuit 183 in addition to the upsampling circuit 151, the variable length decoding circuit 152, the inverse quantization circuit 153, the IDCT circuit 154, and the arithmetic unit 155. Have been.
[0142]
The decoded intermediate-resolution color difference signal output from the arithmetic unit 155 is supplied to the chroma frame memory 181 and stored. Then, the motion compensation is performed by the motion compensation circuit 182 using the motion vector obtained by halving the motion vector in the motion compensation circuit 87C in the vertical direction, and is supplied to the selection circuit 183 as a predicted image signal in the time axis direction.
[0143]
The selection circuit 183 also performs up-sampling in the vertical direction on a lower-resolution color difference signal output from the arithmetic unit 85 of the circuit 161 by the up-sampling circuit 151, and expands the prediction to the resolution of the intermediate-resolution color difference signal. An image signal is supplied.
[0144]
The separation circuit 150 detects a space / time flag from the signal supplied from the reception buffer 81, and outputs this to the selection circuit 183. The selection circuit 183 selects a prediction error signal output from the upsampling circuit 151 when a space flag is detected, and selects a prediction error signal output from the motion compensation circuit 182 when a time flag is detected. Output to arithmetic unit 155. As a result, the color difference signal of the intermediate resolution is adaptively decoded.
[0145]
FIG. 12 shows a third embodiment of the encoder 303. In this embodiment, the configuration of the circuit 101 is a slightly improved configuration of the circuit 101 of the second embodiment shown in FIG. In this circuit 101, the prediction image signal output from the motion compensation circuit 175 is multiplied by a weighting coefficient W by a weighting circuit 191, and is then supplied to an arithmetic unit 193. The prediction image signal output from the up-sampling circuit 111 is multiplied by a coefficient (1-W) by a weighting circuit 192, and is then supplied to a computing unit 193. The calculator 193 adds the weighted predicted image signals supplied from the weighting circuits 191 and 192.
[0146]
For example, when 0, 1/4, 2/4, 3/4, and 1 are set by the weighting circuit 191 as the coefficient W, the weighting circuit 192 outputs the coefficients 1, 3/4, 2/4, and 1/4. , 0 are set. The weighting circuits 191 and 192 multiply the input predicted image signals by five types of coefficients, respectively, and output five types of predicted image signals to the calculator 193. The computing unit 193 generates five types of predicted image signals by adding the corresponding ones of the five types of weighted predicted image signals. Then, a prediction error signal in the case of adopting each of the five types is generated, the one with the smallest prediction error signal is selected as the final prediction error signal, and output to the calculators 112 and 173.
[0147]
This enables more efficient compression.
[0148]
In this embodiment, the computing unit 193 outputs the weighting coefficient W finally selected to the combining circuit 105. The combining circuit 105 multiplexes the weighting coefficient W with other color difference signals and outputs the result.
[0149]
FIG. 13 shows a configuration example of the decoder 401 when decoding a signal encoded by the encoder 303 shown in FIG. The embodiment shown in FIG. 13 has basically the same configuration as the embodiment shown in FIG. However, the configuration of the circuit 162 is slightly improved from the case of FIG.
[0150]
In the embodiment shown in FIG. 13, the predicted image signal output from the motion compensation circuit 182 is weighted by the coefficient W in the weighting circuit 201 and then supplied to the arithmetic unit 203. The prediction image signal output from the upsampling circuit 151 is weighted by the coefficient (1−W) by the weighting circuit 202 and then supplied to the arithmetic unit 203. The weighting coefficients W in the weighting circuits 201 and 202 correspond to the weighting coefficients of the weighting circuits 191 and 192 in FIG.
[0151]
Therefore, the arithmetic unit 203 calculates the correspondence between the five types of weighted predicted image signals output from the weighting circuit 201 and the five types of weighted predicted image signals output from the weighting circuit 202. to add. Then, the separation circuit 150 selects a signal corresponding to the weighting coefficient W separated from the signal supplied from the reception buffer 81 from the added predicted image signals. Then, the selected predicted image signal is input to the arithmetic unit 155, and is used as a predicted image signal of a color difference signal having an intermediate resolution.
[0152]
In the above-described embodiment, band division is performed by DCT to orthogonally transform data of a block of n × n (n = 8 in the above embodiment). However, for example, QMF is used. Subband division can also be performed. Further, the present invention can be applied to a case where octave division is performed by wave red transform, or a case where encoding is performed by performing predetermined conversion or division on input two-dimensional image data.
[0153]
Furthermore, the coded audio signal and the synchronization signal are multiplexed with the coded video signal bit stream, a code for error correction is added, and a predetermined modulation is applied. The laser light can be modulated and recorded as pits or marks on the disk. Further, a stamper is formed using this disk as a master disk, and a large number of duplicate disks (for example, optical disks) can be formed from the stamper. In this case, the decoder will reproduce data from this duplicate disc.
[0154]
【The invention's effect】
Recording method of image signal recording medium of the present inventionAccording to the image signal recording device and the image signal reproducing device, in a device for decoding an image corresponding to a low-resolution color signal, it is necessary to simply add a circuit for processing a high-resolution color signal component. Accordingly, it is possible to easily obtain a low-resolution color image and a high-resolution color image in real time.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a configuration of an embodiment of an image signal encoding device and a decoding device according to the present invention.
FIG. 2 is a diagram illustrating a sampling format of a color difference signal in a format conversion circuit 302 of FIG. 1;
FIG. 3 is a block diagram illustrating a configuration example of downsampling circuits 103 and 104 in FIG. 5;
FIG. 4 is a diagram illustrating a configuration of a macroblock.
FIG. 5 is a block diagram showing a configuration of a first embodiment of an encoder 303 in FIG. 1;
6 is a block diagram illustrating a configuration example of upsampling circuits 111 and 124 in FIG.
7 is a diagram illustrating an interpolation operation of the interpolation circuit 141 in FIG.
8 is a diagram illustrating a recording format of a recording medium 3 in FIG.
FIG. 9 is a block diagram showing a configuration of a first embodiment of the decoder 401 of FIG. 1;
FIG. 10 is a block diagram showing a configuration of a second embodiment of the encoder 303 of FIG. 1;
FIG. 11 is a block diagram showing a configuration of a second embodiment of the decoder 401 of FIG. 1;
FIG. 12 is a block diagram illustrating a configuration of a third embodiment of the encoder 303 of FIG. 1;
FIG. 13 is a block diagram showing a configuration of a third embodiment of the decoder 401 of FIG.
FIG. 14 is a diagram illustrating the principle of high-efficiency coding.
FIG. 15 is a view for explaining types of pictures when compressing image data.
FIG. 16 is a diagram illustrating the principle of encoding a moving image signal.
FIG. 17 is a block diagram illustrating a configuration example of a conventional image signal encoding device and a conventional decoding device.
FIG. 18 is a diagram illustrating the format conversion operation of the format conversion circuit 17 in FIG.
19 is a block diagram illustrating a configuration example of an encoder 18 in FIG.
20 is a diagram illustrating the operation of the prediction mode switching circuit 52 of FIG.
21 is a diagram illustrating the operation of the DCT mode switching circuit 55 in FIG.
22 is a block diagram illustrating a configuration example of a decoder 31 in FIG.
[Explanation of symbols]
Reference Signs List 1 encoding device, 2 decoding device, 3 recording medium, 12, 13 A / D converter, 14 frame memory, 15 luminance signal frame memory, 16 chrominance signal frame memory, 17 format conversion circuit, 18 encoder, 31 decoder, 32 format conversion circuit, 33 frame memory, 34 luminance signal frame memory, 35 color difference signal frame memory, 36, 37 D / A converter, 50 motion vector detection circuit, 51 frame memory, 52 prediction mode switching circuit, 53 arithmetic unit, 54 prediction decision circuit, 55 DCT mode switching circuit, 56 DCT circuit, 57 quantization circuit, 58 variable length coding circuit, 59 transmission buffer, 60 inverse quantization circuit, 61 IDCT circuit, 62 arithmetic unit, 63 frame , 64 motion compensation circuit, 81 reception buffer, 82 variable length decoding circuit, 83 inverse quantization circuit, 84 IDCT circuit, 85 operation unit, 86 frame memory, 87 motion compensation circuit, 100, 101, 102 circuits, 103, 104 down sampling circuit, 111, 124 up sampling circuit, 131 low pass filter, 132 thinning circuit, 141 interpolation circuit

Claims (5)

In a method of recording an image signal recording medium that records an image signal encoded in a predetermined macroblock unit on the image signal recording medium,
A luminance signal component of a predetermined macroblock in the image signal is encoded to generate an encoded luminance signal, and a color signal component of the macroblock is encoded at a first resolution to produce a first encoded color signal. Generating a first slice data signal including the encoded luminance signal and the first encoded chrominance signal, and
A color signal component having a second resolution higher than the first resolution of the macroblock is converted to a signal obtained by decoding the first encoded color signal encoded by the processing of the first image encoding step. A second image encoding step of encoding to generate a second encoded color signal and outputting a second slice data signal including the second encoded color signal;
The first slice data signal output by the processing of the first image encoding step and the second slice data signal output by the processing of the second image encoding step are encoded. Recording the image signals at positions close to each other on the image signal recording medium so that the image signals are sequentially read out and one of them is selected when the image signal is decoded. Media recording method. The recording step records the second slice data signal at a position subsequent to a position where the first slice data signal is recorded and at a position continuous with the first slice data signal. The method for recording an image signal recording medium according to claim 1 . In an image signal recording apparatus that records an image signal encoded in a predetermined macroblock unit on an image signal recording medium,
A luminance signal component of a predetermined macroblock in the image signal is encoded to generate an encoded luminance signal, and a color signal component of the macroblock is encoded at a first resolution to produce a first encoded color signal. A first image encoding circuit that generates a first slice data signal including the encoded luminance signal and the first encoded color signal;
A color signal component having a second resolution higher than the first resolution of the macroblock is obtained by using a signal obtained by decoding the first encoded color signal encoded by the first image encoding circuit. A second image encoding circuit that encodes to generate a second encoded color signal and outputs a second slice data signal including the second encoded color signal;
The first slice data signal output from the first image encoding circuit and the second slice data signal output from the second image encoding circuit are encoded into the encoded image signal. And a recording circuit for recording the image signals at positions close to each other on the image signal recording medium so that one of them is read out sequentially when decoding is performed. The recording circuit records the second slice data signal at a position subsequent to a position where the first slice data signal is recorded and continuous with the first slice data recording signal. The image signal recording device according to claim 3 , wherein An image signal reproducing apparatus for reproducing the image signal from an image signal recording medium on which an image signal encoded in a predetermined macroblock unit is recorded,
In the image signal recording medium,
An encoded luminance signal in which a luminance signal component of a predetermined macroblock is encoded in the encoded image signal, and a first code in which a color signal component of the macroblock is encoded at a first resolution A first slice data recording unit that records a first slice data signal including a color signal;
A color signal component having a second resolution higher than the first resolution of the macroblock is converted into a second encoded color signal encoded using a signal obtained by decoding the first encoded color signal. And a second slice data recording unit that records a second slice data signal including the second slice data signal.
When data having a structure in which the first slice data recording unit and the second slice data recording unit are arranged at positions close to each other is recorded,
From the image signal recording medium, the first slice data signal recorded in the first slice data recording unit corresponding to the macroblock and the second slice data signal recorded in the second slice data recording unit Reproducing means for sequentially reproducing the slice data signal;
Separating means for separating the first slice data signal and the second slice data signal reproduced by the reproducing means;
From the first slice data signal separated by the separation means, the encoded luminance signal is decoded to reproduce the luminance signal component, and the first encoded color signal is decoded to decode the first encoded color signal. A first image decoding circuit for reproducing a first color signal component having a resolution,
Using the first color signal component decoded by the first image decoding circuit, decoding the second encoded color signal from the second slice data signal separated by the separation unit, A second image decoding circuit for reproducing a second color signal component of the second resolution;
Of the first color signal component reproduced by the first image decoding circuit and the second color signal component reproduced by the second image decoding circuit, the macroblock decoding process is performed. An image signal reproducing device comprising: a selection unit that selects a color signal component to be used.

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