JP3533435B2 - Traffic shaping means, ATM switch and ATM-NIC - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an ATM (Asynchronous)
ous transfer mode) A traffic shaping means of a cell, that is, a speed conversion means, which is particularly effective for constructing an ATM switch accommodating a plurality of interfaces having various speeds and which has an arbitrary bandwidth. ATM-NIC (NIC = Network I) that sends cells
traffic shaping means capable of constructing an ATM-NIC compatible with an ABR service, an ATM switch and an ATM-NIC using this traffic shaping means.
Regarding

[0002]

2. Description of the Related Art FIG. 7 is a block diagram showing the structure of an ATM switch according to the prior art, FIG. 8 is a diagram for explaining the physical speed and effective speed of an ATM cell, and FIG. FIG. 4 is a diagram for explaining the above, and a conventional technique will be described below with reference to these diagrams. In FIG. 7, 1
01 is an ATM switch, 102 and 107 are line interface units, 1
Reference numeral 03 is an ATM switch unit, 104 is a multiplexing unit, 105 is a distribution unit, 106 is an output cell buffer, and 108 and 109.
Is a line.

A conventional ATM switch 1 shown in FIG.
01 is composed of an ATM switch unit 103 that performs switching for each cell, and line corresponding units 102 and 107 corresponding to various lines 108 and 109. Also, ATM
The switch unit 103 analyzes the header information of the arriving ATM cell and the multiplexing unit 104 that multiplexes ATM cells input from each line corresponding unit 102 that accommodates the line 109 on the input side, and divides the ATM cells by destination and route. A distribution unit 105 for distribution and an output cell buffer 106 for temporarily storing ATM cells to be sent to the line interface unit 107 in which the output line 108 is accommodated.

In the above description, the ATM switch section 103
Generally operates with a single clock, so each output cell buffer 1 in the ATM switch unit 103
The physical speed of the ATM cell output from 06 is constant, for example, 155.52 Mbps. Here, the definitions of the physical speed and the effective speed will be described with reference to FIG.

FIG. 8 shows what kind of ATM cell passed at each time for one point on the transmission line. Generally, ATM cells include valid cells that carry valid information and empty cells that do not carry information. The physical speed means all ATM cells 60 including valid cells and empty cells that pass a certain point on the transmission path per unit time.
1-a to 601-h means the total number of bits. In addition, the effective speed means the effective cells 601-a, 601-c, 601-d, which pass through a certain point on the transmission path per unit time.
It means the total number of bits of 601-h.

Next, the valid cell and the empty cell will be described with reference to FIG. As shown in FIG. 9, a valid cell 90
Reference numeral 2 is an ATM cell subset, which is composed of a header portion 905 including information such as destination information and a payload portion 906 including user information.
It is a cell. The empty cell 901 is also a subset of the ATM cell and has a special pattern for the empty cell, for example,
A composed of a header portion 903 having all "0" s and a payload portion 901 having meaningless information
It is a TM cell. In general, valid cells are written to the output cell buffer 106 and read as written, but empty cells are inserted when the output cell buffer 106 has no valid cells and is not written to the output cell buffer 106. Is.

Therefore, the ATM switch 101 shown in FIG.
Indicates that the physical speed of the downstream output side line 108 is less than the physical speed of the ATM cell output from each output buffer 106 in the ATM switch section 103, for example, 4
In the case of 4.736 Mbps, the effective speed on the input side of the downlink communication unit 107 may temporarily exceed the physical speed of the output line 108. Therefore, the ATM switch 101 shown in FIG. 7 has a problem that a large cell buffer is required for the line interface 107.

FIG. 10 is a diagram for explaining the problems of the above-mentioned ATM switch according to the prior art, and FIG. 11 is a block diagram showing the structure of the line interface on the output side.
The above-mentioned problems will be described in more detail with reference to FIG. In FIGS. 10 and 11, 508 is a cell buffer, 509 is an output side line, and 801 is a FIFO (First In Firs).
t Out Memory) memory, 803 is a valid cell detection unit, 80
7 is an empty cell pattern holding unit, 808 is a selector, 81
Reference numeral 0 is a “0” detection unit, 811 is a signal inversion unit, and other symbols are the same as in the case of FIG. 7.

In FIG. 10, a certain output side line 5 is now available.
Assume that the physical speed 511 of 09 is 44.736 Mbps. It is also assumed that the physical speed 510 of the input line 506 of the line interface 107 is 155.52 Mbps. At this time, generally, due to flow control or the like, the effective speed of the traffic input to the cell buffer 106 of the ATM switch unit 103 becomes equal to or lower than the effective speed of the output side line 509 corresponding to the cell buffer 106. Limited. Therefore, in the long term, the traffic 514 input to the downlink line interface 107 is equal to or lower than the physical speed 511 of the output line 509, but in the short term, ATM is used.
When a plurality of ATM cells are accumulated in the cell buffer 106 of the switch unit 103, the effective speed of the output from the cell buffer 106 exceeds the physical speed 511 of the corresponding output line 509, as indicated by reference numeral 512. Sometimes. In order to absorb the excess amount indicated by reference numeral 512, it is necessary to arrange the cell buffer 508 in the line interface 107.

The line interface 107 configured by arranging the cell buffer 508 has a FIFO memory 8 as shown in FIG.
01, a valid cell detection unit 803, an empty cell pattern holding unit 807, a selector 808, and a “0” detection unit 810.
And a signal inverting section 811. The cell buffer 508 described above is composed of the FIFO memory 801.

In FIG. 11, the ATM switch section 103
The input line 802 from is connected to the data input Din of the FIFO memory 801 and the valid cell detection unit 803. The valid cell detection unit 803 monitors the ATM cell arriving from the ATM switch unit 103, and if it is a valid cell, sends an enable signal to the write enable WEN of the FIFO memory 801. A clock signal 804 having the same frequency as the physical speed of the arriving ATM cell is input to the write clock input CK (W) of the FIFO memory 801.

By having the above-mentioned configuration, the line interface unit 107 can store only valid cells arriving from the ATM switch unit 103 in the FIFO memory 801, and empty cells arriving from the ATM switch unit 103 can be stored.
It is possible to operate so as not to store in the FIFO memory 801. In addition, the “0” detection unit 810 uses the FIFO memory 801.
The amount of data stored in the memory is monitored, and when the amount of data becomes “0”, that is, when there is no valid cell in the FIFO memory 801, the data on the “1” side is selected by the selector 808. The signal for instructing is sent.
On the contrary, the “0” detection unit 810 determines that the data amount is “0”.
In other cases, a signal instructing the selector 808 to select data on the “0” side is sent.

The input on the "0" side of the selector 808 is FI
The output signal 806 from the FO memory 801 is connected, and the empty cell pattern holding unit 80 is connected to the "1" side input.
7 is connected. At the same time, the output of the “0” detection unit 810 is inverted by the signal inversion unit 811, and the
It is connected to the read enable REN of the memory 801. This connection means that if a valid cell exists in the FIFO memory 801, the valid cell is read out. A clock signal 805 having the same frequency as the physical speed of the output line 809 is input to the read clock input CK (R) of the FIFO memory 801.

By having the above-described configuration, the line interface 107 outputs the effective cell to the output line 809 via the selector 808 when the effective cell exists in the FIFO memory 801, and conversely When there is no valid cell in the memory 801, the empty cell pattern holding unit 807
Empty cells from the output line 8 via the selector 808
09 can be output.

However, as described above, even when the cell buffer is arranged in the downlink line interface 107, the ATM switch according to the prior art has a long effective output period of the ATM switch 103 for a long period. If it continues, that is, if the state in which the effective speed of the output of the ATM switch unit 103 exceeds the physical speed of the output line continues for a long period of time, an overflow occurs in the cell buffer of the downlink communication unit 107, There is a problem that cell loss will occur.

As a conventional technique capable of solving the above-mentioned problems, for example, Japanese Patent Laid-Open No. 4-276943.
The technology described in Japanese Patent Publication is known and will be described below.

FIG. 12 is a block diagram showing another structure of the ATM switch according to the prior art. In FIG.
1002 and 1005 are selectors, 1003 is an empty cell pattern holding unit, 1004 is a counter, 1006 is a band control unit, 1007 is a remaining amount monitoring unit, 1008 is a “0” detection unit, and 1009 is a band control table, and other symbols. Is the same as in the case of FIG.

The example shown in FIG. 12 shows the configuration of the output section of the ATM switch section 103 in FIG. 7, and the band control section 1006 shown in the broken line section is added to the output side of the cell buffer 106 in FIG. It has been configured. The bandwidth control unit 1006 includes an empty cell pattern holding unit 1003,
A selector 1002 that selects a valid cell that is an output from the cell buffer 106 or a free cell that is an output from the empty cell pattern holding unit 1003, and a cyclic counter that counts up each time an ATM cell is output from the selector 1002 (“ A “cyclic counter” is a counter 1004 that is a counter that autonomously resets the counter value when the counter value reaches a certain value and performs a counting operation cyclically, and a bandwidth control table 1009.
The bandwidth control table 100 is output by the output of the counter 1004.
Selector 10 for sequentially selecting data from each address of 9
05, the output of the selector 1005 and the “0” detection unit 100
8 and the output of 8 to control the selector 1002.

In the above, the bandwidth control table 1009
In each address, data designating the operation of the selector 1002 is stored. For example, the bandwidth control table 1
009 through selector 1005 to selector 100
If the data sent to 2 is “0”, the selector 100
2 selects the data on the “0” side, and conversely passes through the selector 1005 from the bandwidth control table 1009 and the selector 10
If the data sent to 02 is "1", the selector 10
02 selects the data on the “1” side.

The output of the cell buffer 1001 is connected to the "0" side input of the selector 1002, and the output of the empty cell pattern holding section 1003 is connected to the "1" side input. Further, the amount of data stored in the cell buffer 106 is monitored by the remaining amount monitoring unit 1007, and when the “0” detection unit 1008 detects that the stored data in the cell buffer 1001 is exhausted, the selector 1002
Is controlled to forcibly select the data on the “1” side, that is, the empty cell pattern output from the empty cell pattern holding unit 1003.

The functions of the remaining amount monitoring unit 1007 and "0" detecting unit 1008 of the data stored in the cell buffer 106 are as follows.
Since it is a part of the function of a general ATM cell buffer, it is omitted in the cell buffers shown in the drawings other than FIG. Further, since the empty cell is discarded on the input side of the cell buffer 106, there is no empty cell in the cell buffer 106.

The ATM switch according to the prior art shown in FIG. 12 is provided with the above-mentioned configuration, and by setting appropriate data in the bandwidth control table 1009,
It is possible to set the effective speed of the data 1010 output to the line interface 107. That is, the ATM switch according to the conventional technique shown in FIG. 12 can make the effective speed of the output 1010 of the ATM switch unit 103 equal to or lower than the physical speed of the corresponding output line, and the downlink side line connection unit 107. It is possible to eliminate the need to arrange a cell buffer.

FIG. 13 is a block diagram showing a general structure of the ATM-NIC. Next, the conventional ATM-NIC will be described with reference to FIG. In FIG. 13, reference numeral 1401 is an ATM-NIC, 1402 is a physical layer processing unit, 1403 is an ATM layer processing unit, 1410 is an AAL (ATM Adaptation Layer) processing unit, 1413 is a cell buffer, and 1414 is a shaping means.

The ATM-NIC 1401 is connected to each terminal and AT.
The physical layer processing unit 140 has a function of connecting to the M switch.
2, ATM layer processing unit 1403, and AAL processing unit 1
And the ATM layer processing unit 1
403 is a cell buffer 1413 and shaping means 1
And 414.

In FIG. 13, the data generated from the terminal is input to the AAL processing unit 1410 via the transmission line 1411. The AAL processing unit 1410 generates a user cell having a fixed length of 53 bytes from the data transmitted from the terminal,
This user cell is transferred to the ATM layer processing unit 1403 via the transmission line 1408. ATM layer processing unit 140
Reference numeral 3 denotes a user cell at a predetermined effective speed, which is a transmission path 1
It is transferred to the physical layer processing unit 1402 via 406.
Further, the ATM layer processing unit 1403 is
RM (Resource Management) cells are generated periodically,
It is sent to the physical layer processing unit 1402 via the transmission path 1406. The physical layer processing section 1402 transmits the received ATM cell (user cell + RM cell) to the ATM switching apparatus via the transmission path 1404 under the physical condition that the physical layer processing section of the opposite ATM switching apparatus can receive.

On the contrary, the user cell transmitted from the ATM exchange to the ATM-NIC 1401 via the transmission line 1405 is received by the physical layer processing unit 1402 and transferred to the ATM layer processing unit 1403 via the transmission line 1407. Furthermore, it is transferred from the ATM layer processing unit 1403 to the AAL processing unit 1410 via the transmission line 1409.
At the same time as described above, the ATM layer processing unit 1403 extracts an RM cell to be received together with the user cell, and if this RM cell is the one sent by the own ATM-NIC 1401,
The information of the allowable effective speed written in the RM cell is notified to the shaping means 1414, and conversely, if it is sent by the ATM-NIC to which this RM cell is opposed, this RM cell is written in the cell buffer 1413 (on the exchange side). Turn back to). The shaping unit 1414 performs the shaping operation based on the notified information on the allowable effective speed.
Also, the AAL processing unit 1410 assembles data that can be received by the terminal from the user cell, and transmits the assembled data to the terminal via the transmission path 1412.

FIG. 14 is a diagram for explaining the structure of the RM cell, and FIG. 15 is a diagram for explaining the relationship between the ATM-NIC and the network. Next, FIG.
This will be described with reference to FIG.

The RM cell 1101 is a subset of ATM cells and is also a subset of valid cells, and as shown in FIG. 14, an RM cell specific pattern having a header pattern peculiar to RM cells in a header portion 1102, It is composed of a payload portion 1103 in which information 1104 of the allowable effective speed is written. ATM cell transfer services include CBR (Constant Bit Rate) service, VBR (Variable Bit Rate) service, and ABR.
Although there are (Available Bit Rate) services and the like, RM cells are mainly used for ABR services.

The relationship between the ATM-NIC and the network shown in FIG. 15 explains how to use the RM cell on the network in the ABR service. In FIG. 15, data is transmitted from the terminal 1201a to the terminal 1201b. Think about when you do.

Communication data from the terminal 1201a is transmitted to the ATM-NIC 1202a via the transmission path 1204a. The ATM-NIC 1202a generates an ATM cell from the received data and sends the ATM cell via the transmission path 1204b.
It is transmitted to the TM exchange 1203a. This ATM cell is
ATM switches 1203b to 1203c, transmission line 1204
c to 1204e and the ATM-NIC 1202b, and is transmitted to the receiving side terminal 1201b.

At the same time as the above, the ATM-NIC 12 on the transmitting side
02a generates an RM cell, and this RM cell is used by another ATM.
It is transmitted to the ATM-NIC 1202b on the receiving side through the same path as the cell. However, the transmitting side ATM-NIC 1202a
The field of the permissible effective speed of the RM cell transmitted by the RD has no meaning. Then, this RM cell is used for each ATM switch 1.
Each ATM exchange 1 when passing through 203a to 1203c
203a to 1203c overwrite the field of the allowable effective speed of the RM cell depending on the congestion status of the own ATM exchange.

The RM cell received by the ATM-NIC 1202b on the receiving side is returned to the transmission line 1205e as it is and transmitted to the ATM-NIC 1202a on the transmitting side. At this time, the ATM-NIC on the receiving side
The 1202b does not particularly process the field of the allowable effective speed in the RM cell. ATM-N on the sending side
When the IC 1202a receives the folded RM cell, the IC 1202a performs the shaping operation according to the value of the allowable effective speed field written in the RM cell.

By the above-mentioned operation using the RM cell, FIG.
When transmitting data on the network as shown in FIG. 5, when the ATM exchanges 1203a to 1203c are congested, the allowable effective speed from the ATM-NIC 1202a on the transmission side is controlled to a low value, and each ATM exchange 1203 is controlled.
When the a to 1203c are not congested, the ATM-on the sending side
The allowable effective speed from the NIC 1202a can be controlled to a high value.

As described above, it is general to have a shaping means inside the ATM-NIC in order to support the ABR service. The shaping means is described in the above-mentioned JP-A-4-276943. Generally, the method according to the method is used.

[0035]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
The TM switch has a problem that when accommodating a plurality of interfaces having various speeds, a huge cell buffer is required in the line interface in order to match the speeds of the ATM switch unit and the line interface. There is. The problem is
As described above, it is possible to solve the problem by applying the technique described in Japanese Patent Application Laid-Open No. 4-276943. However, in this case, the conventional ATM switch has problems as described below.

(1) A huge bandwidth control table is required at the output section of the ATM switch, and the setting of the table becomes very complicated and complicated. (2) When the ratio of the physical speed of the output part of the ATM switch and the physical speed of the output line is not a simple integer ratio, the band of the output line is full due to the quantization error determined by the depth of the band control table. Cannot be used.

Regarding the above-mentioned problem (2),
This will be described with reference to FIG.

In FIG. 12, assume that the physical speed of the output 1010 of the ATM switch unit is 155.52 Mbps and the physical speed of the output line from the line corresponding unit corresponding to this output 1010 is 44.736 Mbps. Now, assuming that the depth of the bandwidth control table 1009 is 100, the effective speed of the output 1010 of the ATM switch unit cannot be exactly 44.736 Mbps.

That is, in the configuration shown in FIG. 12, of the depth 100 of the bandwidth control table, 28 are set to "0" and the remaining 72 are set to "1", so that the ATM is set to "1".
The effective speed of the output 1010 of the switch unit is 43.5436 Mbps
(It is possible to set it to a value below 44.736Mbps and close to 44.736Mbps), but about 1Mbps of the difference between 44.736Mbps and 43.5436Mbps becomes a quantization error, and this amount becomes the free bandwidth of the output line. Therefore, the bandwidth of the output line cannot be fully used. This error can be made smaller as the depth of the bandwidth control table becomes deeper, but when the depth of the bandwidth control table is shallow, the above-mentioned error becomes large and the free bandwidth of the output line becomes large, which is particularly serious. It becomes a problem.

The above-mentioned conventional ATM-N
The IC uses the ATM-N to support the ABR service.
Shaping means must be mounted on the IC. Generally, when performing an ABR service, an ATM exchange limits the effective speed allowed to the ATM-NIC (notifies using an RM cell) depending on the congestion state of its own ATM exchange, but the ATM-NIC uses this The time from when an RM cell is received until the effective speed limit is actually met must be a short time, for example, several cell times. This is because the ATM switch generally monitors the effective speed of ATM cells sent from the ATM-NIC.
If the time from the reception of the RM cell by the TM-NIC until the actual effective speed limit is met is too long, then the ATM switch is in violation of the effective speed of the cells sent from the ATM-NIC. This is because there is a possibility that the cell will be discarded.

Then, the above-mentioned Japanese Unexamined Patent Publication No. 4-276943.
The method of using the bandwidth control table described in Japanese Patent Publication No.
This means that the shaping means mounted on the M-NIC is insufficient.

A first object of the present invention is to solve the above-mentioned problems of the prior art, and to use it in an ATM switch which can accommodate a plurality of interfaces having various speeds without using a band control table. A suitable shaping means is provided, and A
It is to provide a TM exchange. The second aspect of the present invention
The purpose of is to provide a shaping means capable of making a transition to an allowable effective speed in a sufficiently short time after receiving an RM cell, that is, in a time of several cells, and ATM-using this shaping means. It is to provide NIC.

[0043]

According to the present invention, the above object is to hold a value of n in a shaping means for an ATM cell which outputs valid cells and empty cells at a ratio of n to mn. Storage means, a second storage means for holding the value of m, and a third storage means for holding a variable, and the holding value of the third storage means is the holding value of the first storage means. When the added value obtained by adding is greater than or equal to the value held in the second storage means,
At the same time that a valid ATM cell is read from the cell buffer, a value obtained by subtracting the holding value of the second storage means from the addition value is newly stored in the third storage means, and the addition value is stored in the second storage means. When it is less than the held value, it is achieved by outputting an empty cell and, at the same time, performing the operation of newly storing the added value in the third storage means every cell time.

Further, the object is that the second storage means holds the physical speed of the transmission path, and the first storage means holds the value of the ER field inside the RM cell received. To be achieved.

Further, the above-mentioned object is that, in the shaping means of the ATM cell, which outputs the valid cells and the empty cells at the ratio of α to 1-α, the first storage means for holding the value of α and the variable are held. And a second storage means for performing the operation, and when the addition value obtained by adding the holding value of the first storage means to the holding value of the second storage means is 1 or more, the effective AT from the cell buffer is obtained.
At the same time as reading the M cell, a value obtained by subtracting 1 from the added value is newly stored in the second storage means. If the added value is less than 1, an empty cell is output and the added value is newly updated. This is achieved by performing the operation of storing in the second storage means every cell time.

Further, the above object can be achieved by providing the shaping means constituted by the above-mentioned means in the ATM switch and in the ATM-NIC.

[0047]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of an ATM switch and traffic shaping means according to the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of an ATM exchange according to an embodiment of the present invention, FIG. 2 is a block diagram showing a configuration of a traffic shaping means according to an embodiment of the present invention, and FIG. 3 is an operation procedure of the traffic shaping means. FIG. 4 is a diagram for explaining the state of the output from the ATM switch unit that has performed traffic shaping. 1 and 2, 206 is a traffic shaping unit, 702 and 710 are selectors, 704 is an empty cell pattern holding unit, 705 is an m value holding unit, 706 is a register, 707 is an n value holding unit, 708.
Is a comparator, 709 is a subtractor, 711 is an adder, and other symbols are the same as those in FIG.

As shown in FIG. 1, the ATM switch according to the embodiment of the present invention is constructed by providing traffic shaping means 206 corresponding to each of the cell buffers 106 at the output section of the ATM switch section 103. In this respect, the configuration is different from that of the conventional ATM switch described with reference to FIG. 7, and the rest is configured similarly to the case of FIG. Further, the traffic shaping means 206 provided corresponding to each of the cell buffers 106, as shown in FIG.
An m-value holding unit 705 and an n-value holding unit 707 that are storage units that store n, and a register 706 that is a storage unit for work.
, An adder 711 that adds the value held in the n-value holding unit 707 and the value in the register 706, and the output value of the adder 711 and m
A comparator 708 for comparing the value held in the value holding unit 705,
Controlled by the subtractor 709 that calculates the difference between the output value of the adder 711 and the held value of the m-value holding unit 705, and the output of the adder 711 or the subtractor 7 controlled by the comparison output of the comparator 708.
Selector 710 for selecting the output value of 09 and the comparator 70
The output of the cell buffer 106 or the output of the empty cell pattern holding unit 704 is controlled by the comparison output of FIG.

In the traffic shaping means 206 shown in FIG. 2, first, the m-value holding unit 705 holds the shaping constant m, and the n-value holding unit 707 holds the shaping constant n. The constants n and m are finally A
This is a constant for controlling the effective speed of the output 703 of the TM switch unit to the effective speed of the output of the ATM switch unit = (physical speed of the output of the ATM switch unit) × (n / m). The working register 706, which is a storage unit, updates the held value every time the output unit 207 outputs an ATM cell. Register 70
6 is a work variable cash in the flow described later with reference to FIG.
Equivalent to. The data update algorithm of this register 706 is as follows.

In the subtractor 709, the added value of the holding value of the register 706 and the holding value of the n-value holding unit 707 via the adder 711 and the holding value of the m-value holding unit 705, that is, the cash value Is added with the shaping constant m, and the subtractor 709 outputs the difference between the two. The output of the subtractor 709 is connected to the “0” side input of the selector 710. Further, the output value of the adder 711, that is, a value obtained by adding n to the cash value is input to the “1” side input of the selector 710. The value held by the m-value holding unit 705 and the output value of the adder 711, that is, a value obtained by adding n to the shaping constant m and the value of cash are input to the comparator 708. If the value of is greater than or equal to the latter value, "1" is output, and in the opposite case, that is, if the value of the former is less than the value of the latter, "0" is output.

The output of the comparator 708 is input to the selection instructing section of the selector 710, and when this signal is "0", the selector 710 selects the input on the "0" side, that is, the output of the subtractor 709, and the inverse. When this signal is "1", the selector 710 selects and outputs the input on the "1" side, that is, the output of the value obtained by adding n to the value of cash. The output of the selector 710 is sent to the register 706 and stored and held. The value held in the n-value holding unit 707, that is, the shaping constant n and the value in the register 706 are input to the adder 711, and the adder 711 outputs the sum of the two.

Further, the output signal of the comparator 708 is sent to the selector 710 and at the same time to the selection instructing section of the selector 702. The selector 702 is the selector 71
The empty pattern from the empty cell pattern holding unit 704 that operates in the same manner as 0 and is connected to the input on the “1” side, or
The output from the cell buffer 106 connected to the "0" side input is selected and output to the line interface.

The traffic shaping means 206 shown in FIG.
02 can select the output from the cell buffer 106 at a ratio of n / m, and select the output from the empty cell pattern holding unit 704 at a ratio of 1- (n / m).

Next, the processing operation in the traffic shaping means 206 will be described with reference to the flow shown in FIG. In FIG. 3, m and n are shaping constants and cash
Is a working variable, and the loop starting from step 402 is repeatedly executed every cell time.

(1) First, the shaping means initializes the value of the working variable cash to "0", adds the value of cash and n, and the value of the working variable cash + n is equal to or larger than the constant m. It is determined whether there is any (steps 401 to 403).

(2) When it is determined in step 403 that the value of the working variable cash + n is equal to or larger than the value of the constant m, the valid cell is read from the cell buffer, and the working variable cash = cash + n−m is read. The value is substituted and the process returns to step 402 (steps 406 and 407).

(3) If it is determined in step 403 that the value of the working variable cash + n is smaller than the value of the constant m, the reading from the cell buffer is stopped, the empty cell is output, and then the working variable cash. The value of cash + n is substituted into and the process returns to step 402 (steps 406 and 40).
7).

As shown in FIG. 4, the shaping means for performing the above-described operation can output n valid cells and mn empty cells in the time of m cells. Then, by mounting this shaping means at the position of the shaping means 206 shown in FIG.
The effective speed of the output unit 207 of the switch unit 103 is set to AT
N / of the physical speed of the output unit 207 of the M switch unit 103
It can be m. That is, the ATM switch unit 1
If the ratio of the physical speed of the output unit 207 of 03 to the required effective speed (physical speed of the output 108 of the line corresponding unit 107) is known, the ratio is set to a constant m and a constant n. By doing so, shaping becomes possible.

In other words, when the required effective speed is given to the output unit 207 of the ATM switch unit 103, n and m are such that (effective speed) = (physical speed) × (n / m). That is, it is possible to realize the required effective speed by setting to the shaping means.

Next, in the configuration and operation of the traffic shaping means 206 described above, the values of m and n are set to m =
This will be specifically described by taking the case of 5 and n = 2 as an example.

First cell time: The value of the register 706 (initial value is 0) and the value of the n-value holding unit 707, n = 2, are input to the adder 711. As a result, the adder 711
Outputs the value 2. The input of the comparator 708 is the adder 7
11 is output 2 and the output value of the m-value holding unit 705 is m = 5.
Therefore, the output of the comparator 708 becomes “1”. Therefore, since the selector 702 selects the input data on the “1” side, the cell transmitted to the line corresponding unit via the output unit 207 of the ATM switch unit 103 is an empty cell. At the same time, the selector 710 also selects the data on the “1” side.
The value 2 which is the output of the adder 711 is selected. Selector 7
The output value 2 of the adder 711 output from 10 is stored in the register 706.

Second cell time: value 2 of register 706 and n
Since n = 2 which is the value of the value holding unit 707 is input to the adder 711, the output of the adder 711 is the sum 4 of the value 2 of the register 706 and the value n = 2 of the n value holding unit 707. The comparator 708 includes the output value 4 of the adder 711 and the m-value holding unit 7.
The output value of 05, m = 5, is input. As a result,
The comparator 708 outputs "1". Therefore, since the selector 702 selects the input data on the “1” side, it sends an empty cell to the line corresponding unit via the output unit 207 of the ATM switch unit 103. At the same time, the selector 710 is also “1”.
In order to select the side data, the output value 4 of the adder 711 is selected. Adder 711 output from selector 710
The output value of 4 is stored in the register 706.

Third cell time: value 4 of register 706 and n
Since n = 2, which is the value of the value holding unit 707, is input to the adder 711, the output of the adder 711 is the sum 6 of the value 4 of the register 706 and the value n = 2 of the n value holding unit 707. The comparator 708 includes the output value 6 of the adder 711 and the m-value holding unit 7.
The output value of 05, m = 5, is input. As a result,
The comparator 708 outputs “0”. Therefore, since the selector 702 selects the input data on the “0” side, the valid cell from the cell buffer 106 is sent to the line corresponding unit via the output unit 207 of the ATM switch unit 103. At the same time, the selector 710 also selects the data on the “0” side, and therefore selects the output value of the subtractor 709. Since the output value 6 of the adder 711 and the output value m = 5 of the m-value holding unit 705 are input to the subtractor 709, the output of the subtractor 709, that is, the output of the selector 710 is stored in the register 706.
6 and the value m of the m-value holding unit 705 = 5, the difference is 1. The output value 1 of the subtractor 709 output from the selector 710 is stored in the register 706.

Fourth cell time: value 1 and n of register 706
Since n = 2, which is the value of the value holding unit 707, is input to the adder 711, the output of the adder 711 is the sum 3 of the value 1 of the register 706 and the value n = 2 of the n value holding unit 707. The comparator 708 includes an output value 3 of the adder 711 and an m-value holding unit 7.
The output value of 05, m = 5, is input. As a result,
The comparator 708 outputs "1". Therefore, since the selector 702 selects the input data on the “1” side, it sends an empty cell to the line corresponding unit via the output unit 207 of the ATM switch unit 103. At the same time, the selector 710 is also “1”.
In order to select the side data, the output value 3 of the adder 711 is selected. Adder 711 output from selector 710
The output value of 3 is stored in the register 706.

Fifth cell time: value 3 of register 706 and n
Since n = 2 which is the value of the value holding unit 707 is input to the adder 711, the output of the adder 711 is the sum 5 of the value 3 of the register 706 and the value n = 2 of the n value holding unit 707. The comparator 708 includes the output value 5 of the adder 711 and the m-value holding unit 7.
The output value of 05, m = 5, is input. As a result,
The comparator 708 outputs “0”. Therefore, since the selector 702 selects the input data on the “0” side, the valid cell from the cell buffer 106 is sent to the line corresponding unit via the output unit 207 of the ATM switch unit 103. At the same time, the selector 710 also selects the data on the “0” side, and therefore selects the output value of the subtractor 709. Since the output value 5 of the adder 711 and the output value m = 5 of the m-value holding unit 705 are input to the subtractor 709, the output of the subtractor 709, that is, the output of the selector 710 is stored in the register 706.
The difference between the value of 6 and the value of the m-value holding unit 705, m = 5, is 0. The output value 0 of the subtractor 709 output from the selector 710 is stored in the register 706.

From the subsequent 6th cell time, the above-mentioned operation from the 1st cell time is repeated. As a result, the traffic shaping means shown in FIG.
Through the output unit 207 of the M switch unit, a cell in which "empty cell, empty cell, valid cell, empty cell, valid cell" is repeated is sent to the line corresponding unit, and the output unit 207 of the ATM switch unit is sent. Can be 2/5 of the physical speed. That is, the traffic shaping means shown in FIG. 2 uses the effective speed of the output unit 207 of the ATM switch unit as n / m of the physical speed.
Can be shaped into

In the above description, the embodiment in which the shaping means is provided in the ATM switch section of the ATM switch and the configuration of the shaping means in that case have been described. Next, the present invention in the case where the shaping means is provided in the ATM-NIC Will be described.

FIG. 5 shows the ATM-NIC shaping means.
FIG. 3 is a block diagram showing a configuration of a shaping means that is effective when mounted on a vehicle. The example shown in FIG. 5 uses the shaping means according to the present invention as the configuration of the shaping means 1414 of the ATM-NIC according to the conventional technique described with reference to FIG. In FIG. 5, 1302 and 131
0 and 1317 are selectors, 1304 is an empty cell pattern holding unit, 1305 is an m-value holding unit, 1306 is a register,
Reference numeral 1307 is an n-value holding unit, 1308 is a comparator, 1309 is a subtractor, 1311 is an adder, 1315 is an RM cell discriminating unit, and 1318 is an ER extracting unit.
It is the same as the case of 3.

The shaping means 1414 shown in FIG.
2 is different from the shaping means described with reference to FIG. 2 in that an RM cell determination unit 1315, an ER extraction unit 1318, and a selector 1317 are added, and other configurations are the same as those in the case of FIG. It is basically the same as the case of FIG.

The physical speed of the output unit 1303 of the ATM-IC is preset in the m-value holding unit 1305. When an RM cell is input from the ATM switch via the input unit 1313 of the ATM-NIC, the RM cell determination unit 1
315 outputs “1”, causes the selector 1317 to select the “1” side, and holds the n-value of the allowable effective speed information which is the value of the ER field of the RM cell transmitted from the ER field extracting unit 1318. Written in section 1307.

Now, assuming that the physical speed of the output unit 1303 of the ATM-NIC is 5 Mbps, the m-value holding unit 130
“5” is written in 5. Next, when an RM cell whose ER field value is 2 Mbps arrives, “2” is written in the n-value holding unit 1307. Then, the subsequent shaping process is performed in exactly the same manner as the case described with reference to FIG.

As a result, the shaping means shown in FIG. 5 changes the physical speed of the output section 1303 of the ATM-NIC into
2 Mbps specified by the value of the ER field of the RM cell
Becomes Also, an RM whose ER field value is 1 Mbps
When the cell arrives, “1” is written in the n-value holding unit 1307, and the physical speed of the output unit 1303 of the ATM-NIC becomes 1 Mbps.

As described above, the shaping means shown in FIG. 5 automatically updates the value of the n-value holding unit 1307 every time an RM cell arrives, so that the effective speed limited by the network side is always maintained. It becomes possible to protect.

In the above description, when a predetermined constant is connected to the "0" side of the selector 1317 and no RM cell arrives, the value is written in the n-value holding unit 1307. It is possible to perform shaping determined by the value of m and the holding unit 1305. Also, in the above,
Although the values of n and m have been described as being extremely small and simple for simplification of description, the values of n and m can be values corresponding to larger actual data transmission.

The shaping means described with reference to FIGS. 2 and 5 has been described as having two storage means, that is, an n-value holding section and an m-value holding section.
It can also be configured as one storage means. Next, an example of the shaping means in this case will be described.

FIG. 6 is a block diagram showing the configuration of shaping means according to another embodiment of the present invention. In FIG. 6, 707 'is an α value holding unit, and other reference numerals are the same as those in FIG.

The shaping means according to the embodiment of the present invention shown in FIG. 6 has an α value holding portion 707 'as the n value holding portion 707 of the shaping means shown in FIG. 2, and the shaping constant n described above is used as the value of α. , M derived from n /
The value is set to a value corresponding to m. Then, "1" is input to the inputs of the comparator 708 and the subtractor 708 to which the outputs of the m-value holding unit 705 in FIG. 2 are connected.

In the shaping means according to the embodiment of the present invention shown in FIG. 6 configured as described above, the value held in the register 706 and the value α in the α value holding unit 707 'are added by the adder 711. It is applied to the comparator 708. When the added value is 1 or more, the comparator 708 outputs “0” and controls the selector 702 to read and output the ATM cell from the cell buffer 106 storing the valid cell. Further, the comparator 708 causes the control 710 to select the output of the subtracter 709 that outputs the value obtained by subtracting 1 from the above-mentioned added value, and stores this value in the register 706 anew.

When the added value added by the adder 711 is less than 1, the comparator 708 outputs "1" to output the selector 7
02 to select an empty cell from the empty cell pattern holding unit 704 instead of the ATM cell from the cell buffer. At the same time, the comparator 708 causes the selector 710 to select the output of the adder 711 and newly stores the added value in the register 706.

The shaping means according to the embodiment of the present invention shown in FIG. 6 outputs the valid cells and the empty cells at a ratio of α to (1−α) by repeating the above-mentioned operation every cell time. You can

The shaping means according to each of the embodiments of the present invention configured as described above is used as an ATM in an ATM exchange.
When applied to the switch unit, the ATM switch unit outputs valid cells at a rate of n / m, and [1- (n /
m)] is output as empty cells. Therefore, the effective speed of the output of the ATM switch unit, that is, the effective speed of the input of the line corresponding unit, constant m, n, m: n = (physical speed of the output of the ATM switch unit): (output line The physical speed of the
The speed can be matched between the outputs.
Therefore, it is possible to eliminate the cell buffer which has conventionally been required to be arranged in the line interface. Assuming that the values of m and n are set as 16-bit binary numbers, the minimum control width of shaping is 2 to ¹⁶ , that is, 1/65535.
Therefore, when the physical speed of the output of the ATM switch unit and the physical speed of the output line can be represented by 64 kbps × N (1 ≤ N ≤ 38880), no matter what speed they are, The shaping means according to the embodiment makes it possible to match the speeds, and it becomes possible to eliminate the huge cell buffer conventionally arranged in the line interface.

That is, when the shaping means according to the embodiment of the present invention is mounted on the output section of the ATM switch section, the basic configuration of the line interface section is the same as that shown in FIG. Since it is sufficient that the number of cells is several cells, it is possible to efficiently construct an ATM switch having a multirate interface.

By applying the shaping means according to the embodiment of the present invention to an ATM-NIC,
The effective speed of the TM-NIC output may be the value stored in the ER field of the RM cell. That is, in the prior art, after receiving the RM cell and extracting the ER field, it is necessary to obtain the ratio of the value and the physical speed of the ATM-NIC and set the band control table.
Although it took a lot of time from the reception of the M cell to the resetting of the shaper, according to the embodiment of the present invention, such a complicated procedure is not required, and the value of the ER field is set without the time for setting the table. Can be reflected in the effective output speed of the ATM-NIC.

On the network side, ATM-NI
It is common for C to monitor whether it adheres to the effective speed stored in the ER field in the RM cell,
In the case of the conventional technique, since the shaping operation is performed according to the value of the ER field of the RM cell received last time during the table setting, the effective speed of the data transmitted by the ATM-NIC is on the network side. There was a possibility of exceeding the limit. In such a case, the network side may discard the ATM cell sent from the ATM-NIC. However, according to the shaping means according to the above-described embodiment of the present invention, setting of the band control table is unnecessary, so that the time required from the reception of the RM cell to the appearance of the shaping effect can be sufficiently shortened. Yes, the network side A as described above
It is possible to prevent the discard of the TM cell.

[0086]

As described above, according to the shaping means of the present invention, the effective speed of a cell to be transmitted can be shaped to a physical speed of n / m. A means in the ATM switch
By applying it to the TM switch unit, it becomes possible to match the speeds when the physical speed of the output of the ATM switch unit and the physical speed of the output line are different, and it has been conventionally arranged in the line corresponding unit. A huge cell buffer can be dispensed with.

Further, by applying the shaping means according to the present invention to the ATM-NIC, the effective speed of the output of the ATM-NIC can be reduced to R in a short time.
It can be set to a value stored in the ER field of the M cell, and it is possible to prevent the ATM side from being discarded by the network side.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an ATM exchange according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of traffic shaping means according to an embodiment of the present invention.

FIG. 3 is a flowchart illustrating an operation procedure of traffic shaping means.

FIG. 4 is an AT with traffic shaping.
It is a figure explaining the state of the output from the M switch part.

FIG. 5 is a block diagram showing a configuration of the shaping means when the shaping means is mounted on the ATM-NIC.

FIG. 6 is a block diagram showing a configuration of shaping means according to another embodiment of the present invention.

FIG. 7 is a block diagram showing a configuration of an ATM exchange according to a conventional technique.

FIG. 8 is a diagram for explaining a physical speed and an effective speed of an ATM cell.

FIG. 9 is a diagram for explaining valid cells and emptying.

FIG. 10 is a diagram for explaining the problems of the above-described conventional ATM switch.

FIG. 11 is a block diagram showing a configuration of a line interface on the output side.

FIG. 12 is a block diagram showing another configuration of the ATM switch according to the conventional technique.

FIG. 13 is a block diagram showing a general configuration of an ATM-NIC.

FIG. 14 is a diagram illustrating a configuration of an RM cell.

FIG. 15 is a diagram illustrating a relationship between an ATM-NIC and a network.

[Explanation of symbols]

101 ATM switch 102, 107 Line corresponding unit 103 ATM switch unit 104 Multiplexing unit 105 Distribution unit 106 Output cell buffer 108, 109 Line 206, 1414 Traffic shaping means 702, 710, 808, 1002, 1005, 1302, 1310, 1317 Selector 704 , 807, 1003, 1304 Free cell pattern holding unit 705, 1305 m value holding unit 706, 1306 register 707, 1307 n value holding unit 707 ′ α value holding unit 708, 1308 comparator 709, 1309 subtractor 711, 1311 adder 508, 1413 Cell buffer 509 Output side line 801 FIFO (First In First Out Memory) memory 803 Effective cell detection unit 810 “0” detection unit 811 Signal inversion unit 1004 Counter 1006 Bandwidth control unit 1007 Remaining amount monitoring unit 1008 “0” detection Part 1009 Band Your table 1315 RM cell determination unit 1318 ER extraction unit 1401 ATM-NIC 1402 physical layer processing unit 1403 ATM layer processing section 1410 AAL (ATM Adaptation Layer) processor

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Takeshi Yasuda Inventor Takeshi Yasuda 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd. Information & Communication Division (72) Inventor Masashi Miyao 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Address: Hitachi, Ltd., Information & Communication Division (72) Inventor, Norihiko Moriwaki 1-280, Higashi Koigokubo, Kokubunji, Tokyo Metropolitan Institute, Hitachi, Ltd. (72) Hiroaki Kasahara, 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd. Information & Communication Division (72) Inventor Makoto Matsuoka 216 Totsuka-cho, Totsuka-ku, Yokohama City, Kanagawa Prefecture Hitachi, Ltd. Information & Communication Division (56) Reference JP-A-7-327033 (JP, A) ) (58) Fields surveyed (Int.Cl. ⁷ , DB name) H04L 12/28 H04L 12/56

Claims (5)

(57) [Claims] 1. An ATM cell shaping means for outputting valid cells and empty cells at a ratio of n to mn,
The first storage means for holding the value of n, the second storage means for holding the value of m, and the third storage means for holding the variable are provided, and the storage value of the third storage means is stored. When the added value obtained by adding the holding value of the first storage means is equal to or more than the holding value of the second storage means, a valid ATM cell is read from the cell buffer, and at the same time, the holding value of the second storage means is read from the addition value. Is newly stored in the third storage means, and when the added value is less than the holding value of the second storage means, an empty cell is output and at the same time, the added value is newly added to the third storage means. Shaping means for performing the operation of storing in every cell time. 2. The second storage means holds the physical speed of the transmission path, and holds the value of the ER field inside the RM cell received by the first storage means. The shaping means according to item 1. 3. An ATM cell shaping means for outputting valid cells and empty cells at a ratio of α to 1−α, and a first storage means for holding a value of α and a first storage means for holding a variable. When the addition value obtained by adding the holding value of the first storage means to the holding value of the second storage means is 1 or more, a valid ATM cell is read from the cell buffer and at the same time, the addition is performed. A value obtained by subtracting 1 from the value is newly stored in the second storage means, and when the addition value is less than 1, an empty cell is output and at the same time, the addition value is newly stored in the second storage means. Shaping means for performing every 1 cell time. 4. An ATM switch, wherein the shaping means according to claim 1 or 3 is provided in an ATM switch section of the ATM switch. 5. An ATM-, characterized in that the shaping means according to claim 1, 2 or 3 is provided at the output part thereof.
NIC.