JP3525149B2 - Method for manufacturing silicon carbide semiconductor device - Google Patents
Method for manufacturing silicon carbide semiconductor deviceInfo
- Publication number
- JP3525149B2 JP3525149B2 JP16547197A JP16547197A JP3525149B2 JP 3525149 B2 JP3525149 B2 JP 3525149B2 JP 16547197 A JP16547197 A JP 16547197A JP 16547197 A JP16547197 A JP 16547197A JP 3525149 B2 JP3525149 B2 JP 3525149B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon carbide
- semiconductor device
- oxide film
- carbide semiconductor
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 229910010271 silicon carbide Inorganic materials 0.000 title claims description 37
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims description 35
- 238000000034 method Methods 0.000 title claims description 32
- 239000004065 semiconductor Substances 0.000 title claims description 27
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 230000003647 oxidation Effects 0.000 claims description 43
- 238000007254 oxidation reaction Methods 0.000 claims description 43
- 238000000137 annealing Methods 0.000 claims description 29
- 239000012298 atmosphere Substances 0.000 claims description 25
- 125000004435 hydrogen atom Chemical group [H]* 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 11
- 238000001816 cooling Methods 0.000 claims description 11
- 239000007789 gas Substances 0.000 claims description 11
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 9
- 238000010438 heat treatment Methods 0.000 claims description 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 8
- 239000001257 hydrogen Substances 0.000 claims description 8
- 229910052739 hydrogen Inorganic materials 0.000 claims description 8
- 239000011261 inert gas Substances 0.000 claims description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 7
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 3
- 238000004904 shortening Methods 0.000 claims 1
- 238000007669 thermal treatment Methods 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 6
- 239000001301 oxygen Substances 0.000 description 6
- 229910052760 oxygen Inorganic materials 0.000 description 6
- 238000009279 wet oxidation reaction Methods 0.000 description 6
- 239000000758 substrate Substances 0.000 description 5
- 239000002184 metal Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910052984 zinc sulfide Inorganic materials 0.000 description 2
- 238000005275 alloying Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
- WGPCGCOKHWGKJJ-UHFFFAOYSA-N sulfanylidenezinc Chemical compound [Zn]=S WGPCGCOKHWGKJJ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/048—Making electrodes
- H01L21/049—Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Description
【0001】[0001]
【発明の属する技術分野】この発明は、炭化ケイ素を用
い、MOS(金属−酸化膜−半導体)構造を有する炭化
ケイ素半導体装置の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a silicon carbide semiconductor device having a MOS (metal-oxide film-semiconductor) structure using silicon carbide.
【0002】[0002]
【従来の技術】最近、炭化ケイ素(以下SiCと略す)
を基板結晶として用いたMOS型電界効果トランジスタ
(以下MOSFETと記す)の試作がおこなわれてい
る。これは、SiCがシリコンに比べて、バンドギャッ
プが大きくまた比電界強度が大きいことから、高耐圧、
大電流を制御する電力用半導体装置の特性改善が期待さ
れることと、6H−SiCや4H−SiCなどの単結晶
が、かなり高品質で製造できるようになってきたことに
よる。これらは、閃亜鉛鉱型とウルツ鉱型とが積層され
た形のアルファ相SiCである。また、MOSFETだ
けではなく、バイポーラ素子である絶縁ゲートバイポー
ラトランジスタ(以下IGBTと略す)の検討も始めら
れている。2. Description of the Related Art Recently, silicon carbide (hereinafter abbreviated as SiC)
A prototype of a MOS type field effect transistor (hereinafter referred to as a MOSFET) using is used as a substrate crystal. This is because SiC has a larger bandgap and a larger specific electric field strength than silicon, and therefore has a high breakdown voltage.
This is due to the expectation that the characteristics of power semiconductor devices for controlling large currents will be improved, and that single crystals such as 6H-SiC and 4H-SiC can now be manufactured with considerably high quality. These are alpha-phase SiC in a form in which a zinc blende type and a wurtzite type are laminated. Further, not only MOSFETs but also insulated gate bipolar transistors (hereinafter abbreviated as IGBTs), which are bipolar elements, have been studied.
【0003】これらのデバイスは、絶縁膜上の電極に電
圧を印加することによって、絶縁膜の下の半導体表面に
チャネルを形成し、電流を制御するMOS型半導体装置
である。最近のシリコンLSIもMOS構造を利用した
デバイスが重要となっているが、シリコン半導体装置で
は、シリコン基板表面に熱酸化により形成したシリコン
酸化膜を絶縁膜として利用している。These devices are MOS type semiconductor devices in which a voltage is applied to an electrode on an insulating film to form a channel on the semiconductor surface under the insulating film to control a current. A device using a MOS structure is also important for a recent silicon LSI, but in a silicon semiconductor device, a silicon oxide film formed by thermal oxidation on the surface of a silicon substrate is used as an insulating film.
【0004】SiCはシリコンと同様に、熱酸化によ
り、良好な半導体−絶縁膜界面をもつシリコン酸化膜が
得られ、そのシリコン酸化膜をゲート絶縁膜や安定化膜
として利用することができることから、これらのデバイ
スへの応用が容易である。Similar to silicon, SiC can be thermally oxidized to form a silicon oxide film having a good semiconductor-insulating film interface, and the silicon oxide film can be used as a gate insulating film or a stabilizing film. Application to these devices is easy.
【0005】[0005]
【発明が解決しようとする課題】ところが、SiCにお
いては、熱酸化によってシリコン酸化膜を形成した場
合、シリコン酸化膜とSiCとの間に発生する界面凖位
密度がシリコン基板の場合と比較して非常に多いという
報告が、多数なされている。[例えば、Shenoy,J.N.
他: J. of Electron Materials,Vol.24,(1995) p.303]
界面凖位密度が多いことは、極く表面に近い部分の電
子を制御するMOS型半導体装置にとって、致命的であ
り、界面凖位密度を減少させる試みが、幾つかなされて
いる。ここで、以下の説明を容易にするため、酸化工程
について説明する。However, in SiC, when a silicon oxide film is formed by thermal oxidation, the interface level density generated between the silicon oxide film and SiC is smaller than that in the case of a silicon substrate. There are many reports that the number is very large. [For example, Shenoy, JN
Others: J. of Electron Materials, Vol.24, (1995) p.303]
The fact that the interface density is high is fatal to the MOS type semiconductor device that controls the electrons in the portion very close to the surface, and some attempts have been made to reduce the interface density. Here, in order to facilitate the following description, the oxidation step will be described.
【0006】図2は、典型的な酸化工程の、温度変化を
表すフローチャートである。すなわち、横軸は時間、縦
軸は温度を表している。温度T1 において試料を酸化炉
に導入し、その後、炉の温度を酸化温度T2 まで上昇さ
せる工程が、Aのプロセスである。その後、温度T2 で
t1 の時間だけ酸化をおこなう。この際、炉内には、酸
化性雰囲気としてスチームや、水蒸気を含ませた酸素で
あるウェット酸素、或いは水蒸気を含まないドライ酸素
などが流される。この工程Bが、酸化工程となる。その
あと、酸化と同一温度、またはそれ以外の温度におい
て、例えば窒素やアルゴン等の不活性ガス中でのアニー
ル工程を経て、炉は冷却され、最後に試料が炉から取り
出される。これが最後の工程Cである。一般にシリコン
半導体装置の製造工程においては、界面凖位密度の低減
等のため、不活性ガス中でのアニールが必要とされてい
る。図では、アニール時間をt2 として示した。又、図
では、アニールを酸化温度と同一としたが、変えても良
い。FIG. 2 is a flow chart showing a temperature change in a typical oxidation process. That is, the horizontal axis represents time and the vertical axis represents temperature. The process of A is the step of introducing the sample into the oxidation furnace at the temperature T1 and then raising the temperature of the furnace to the oxidation temperature T2. After that, oxidation is performed at a temperature T2 for a time t1. At this time, steam, wet oxygen, which is oxygen containing water vapor, or dry oxygen, which does not contain water vapor, is caused to flow in the furnace as an oxidizing atmosphere. This step B is an oxidation step. After that, the furnace is cooled at the same temperature as the oxidation or at a temperature other than that, through an annealing step in an inert gas such as nitrogen or argon, and finally the sample is taken out of the furnace. This is the final step C. Generally, in a manufacturing process of a silicon semiconductor device, annealing in an inert gas is required in order to reduce interface density. In the figure, the annealing time is shown as t2. Also, in the figure, the annealing is the same as the oxidation temperature, but it may be changed.
【0007】上記の界面凖位密度を減少させる試みはい
くつかある。von Kamienski E. S.他:Materials Sci.
and Eng. B29,(1995) p.131 では、ウェット酸化が、
ドライ酸化より良好なことが示され、また Lipkin L.
A. 他: Proc. 26th IEEE Semicond. Interface Special
ist Conf.(1995) p.131においては、酸化温度より低い
温度において、追加のウェット酸化をおこなうことが界
面凖位の低減に良いとしている。There are several attempts to reduce the above interface density. von Kamienski ES and others: Materials Sci.
and Eng. B29, (1995) p.131, wet oxidation
It was shown to be better than dry oxidation and also Lipkin L.
A. Others: Proc. 26th IEEE Semicond. Interface Special
ist Conf. (1995) p.131 states that additional wet oxidation at a temperature lower than the oxidation temperature is good for reducing the interface level.
【0008】このような試みがあるものの、界面凖位は
依然として高い水準にあり、その改善が要望されてい
る。以上の問題に鑑み本発明の目的は、界面凖位を低減
した炭化ケイ素半導体装置の熱酸化膜形成方法を提供す
ることにある。[0008] Despite such attempts, the interface level is still at a high level, and its improvement is desired. In view of the above problems, an object of the present invention is to provide a method for forming a thermal oxide film of a silicon carbide semiconductor device in which the interface height is reduced.
【0009】[0009]
【課題を解決するための手段】上記課題解決のため本発
明は、炭化ケイ素表面に熱酸化によってシリコン酸化膜
を形成する熱酸化膜形成工程を有する炭化ケイ素半導体
装置の製造方法において、前記熱酸化後、窒素ガス雰囲
気中で行うアニールを2時間より短いものとする。10
月2日付けで名称変更届けを提出済みです。To solve the above problems, the present invention provides a method for manufacturing a silicon carbide semiconductor device, which comprises a thermal oxide film forming step of forming a silicon oxide film on a surface of silicon carbide by thermal oxidation. after, you annealing carried out in a nitrogen gas atmosphere is shorter than 2 hours. 10
The name change notification has been submitted on the 2nd of the month.
【0010】不活性ガス雰囲気中でのアニールの影響を
説明するメカニズムの詳細は不明であるが、後述の実験
結果が示すように、アニールを行うことにより界面準位
密度が上昇する。また、炭化ケイ素表面に熱酸化によっ
てシリコン酸化膜を形成する熱酸化膜形成工程を有する
炭化ケイ素半導体装置の製造方法において、前記熱酸化
により酸化膜を形成した後でかつ、不活性雰囲気中でア
ニールを行った後、水素原子を含むガス雰囲気中で、3
00〜500℃の範囲でアニールするものとする。Although the details of the mechanism for explaining the effect of annealing in an inert gas atmosphere are unknown, as shown by the experimental results described later, the annealing increases the interface state density. Also, in the method for manufacturing a silicon carbide semiconductor device having a thermal oxide film forming step of forming a silicon oxide film on the surface of silicon carbide by thermal oxidation, in the method for annealing after forming the oxide film by the thermal oxidation, and annealing in an inert atmosphere. Then, in a gas atmosphere containing hydrogen atoms,
Annealing is performed in the range of 00 to 500 ° C.
【0011】そのようにすれば、後述の実験結果が示す
ように、界面凖位密度が約20%減少する。温度範囲と
しては、下は300℃から、金属が融解しない程度の温
度、例えば、最も一般的な金属としてAlを使用するの
であれば、上は500℃程度が望ましい。更に、酸化終
了後の冷却過程および熱酸化膜形成工程後に行う熱処理
後の冷却過程の少なくとも一部の期間に、水素、或いは
水等の水素原子を含むガスによって雰囲気を形成するこ
とが最も良い。By doing so, as shown by the experimental results described later, the interface density is reduced by about 20%. As for the temperature range, it is desirable that the lower temperature range is from 300 ° C. to a temperature at which the metal does not melt, for example, if Al is used as the most common metal, the upper temperature range is around 500 ° C. Furthermore, it is best to form the atmosphere with hydrogen or a gas containing hydrogen atoms such as water during at least a part of the cooling process after the oxidation and the cooling process after the heat treatment performed after the thermal oxide film forming process.
【0012】そのようにすれば、後述の実験結果が示す
ように、界面凖位密度が大幅に減少する。メカニズムの
詳細は不明である。[0012] By doing so, as shown in the experimental results described later, the interface density is significantly reduced. The details of the mechanism are unknown.
【0013】[0013]
【発明の実施の形態】上記課題解決のため本発明の炭化
ケイ素半導体装置の製造方法は、熱酸化後の不活性ガス
雰囲気中でのアニール時間、この不活性ガス雰囲気中で
のアニール後の低温熱処理、或いは熱酸化後の冷却時の
雰囲気等を吟味することによって、MOS型半導体装置
の重要な特性である界面凖位密度を低減するものであ
る。BEST MODE FOR CARRYING OUT THE INVENTION In order to solve the above problems, a method for manufacturing a silicon carbide semiconductor device according to the present invention comprises an annealing time in an inert gas atmosphere after thermal oxidation, and a low temperature after annealing in this inert gas atmosphere. By examining the atmosphere at the time of cooling after heat treatment or thermal oxidation, the interface density which is an important characteristic of the MOS semiconductor device is reduced.
【0014】以下図面を参照しながら、本発明の実施の
形態を説明する。
[実施例1]1×1016cm-3のキャリア濃度のAlド
ープ、面方位(0001)シリコン面のp型SiCを用
いた。炉の昇温時には、ドライ酸素を流しているが、こ
れは、ウェット雰囲気でも不活性雰囲気でも構わない。
95℃の熱水中に酸素をバブルさせたウェット酸素で1
100℃、5時間、ウェット酸化をおこない、厚さ35
nmの酸化膜を成長させた。雰囲気ガスを乾燥窒素に変
え、0〜10時間のアニールをおこない、乾燥窒素中で
冷却した。Embodiments of the present invention will be described below with reference to the drawings. Example 1 Al-doped with a carrier concentration of 1 × 10 16 cm −3 and p-type SiC having a plane orientation (0001) silicon surface was used. Dry oxygen is flown when the temperature of the furnace is raised, but this may be a wet atmosphere or an inert atmosphere.
1 with wet oxygen that bubbled oxygen into hot water at 95 ℃
Wet oxidation at 100 ° C for 5 hours, thickness 35
nm oxide film was grown. The atmosphere gas was changed to dry nitrogen, annealing was performed for 0 to 10 hours, and cooling was performed in dry nitrogen.
【0015】得られた試料の界面凖位密度を図1に示
す。横軸に酸化後のアニール時間を、縦軸に得られた界
面凖位密度を示したものである。窒素ガス雰囲気中での
アニールによって界面準位密度が上昇することがわかっ
た。熱酸化工程での不活性雰囲気中でのアニールは、時
間0が最良であることがわかる。The interface density of the obtained sample is shown in FIG. The horizontal axis shows the annealing time after oxidation, and the vertical axis shows the interface interface density obtained. It was found that the interface state density increased by annealing in a nitrogen gas atmosphere. It can be seen that time 0 is the best for annealing in an inert atmosphere in the thermal oxidation step.
【0016】しかしながら、熱酸化工程後には様々な熱
処理工程がありうる。例えば、ゲートポリシリコンを熱
酸化膜の上に堆積した場合、ポリシリコンへの不純物ド
ーピング、金属とのオーミックを形成するための合金化
熱処理などが考えられる。これらの熱処理は通常1000℃
前後で行われる。よって、今回得られた実験結果から酸
化工程中および酸化工程後の熱処理工程において、不活
性ガス雰囲気中でのアニールを行う場合、その時間の総
和は2時間以内とすることが望ましい。
[実施例2]実施例1の試料を、改めて水素を10%含
む窒素雰囲気中で400℃で1時間アニールした。得ら
れた試料の界面凖位密度を図1に示す。横軸は、アニー
ル時間、縦軸は界面凖位密度である。However, there may be various heat treatment steps after the thermal oxidation step. For example, when gate polysilicon is deposited on a thermal oxide film, impurity doping into polysilicon, alloying heat treatment for forming ohmic contact with a metal, and the like can be considered. These heat treatments are usually 1000 ° C
Before and after. Therefore, from the experimental results obtained this time, when annealing is performed in an inert gas atmosphere in the oxidation process and the heat treatment process after the oxidation process, it is desirable that the total time be within 2 hours. Example 2 The sample of Example 1 was annealed again at 400 ° C. for 1 hour in a nitrogen atmosphere containing 10% hydrogen. The interface density of the obtained sample is shown in FIG. The horizontal axis represents the annealing time, and the vertical axis represents the interface density.
【0017】この結果から、明らかに界面凖位密度が全
体的に減少している様子がわかる。例えば、2時間アニ
ールした試料の界面凖位密度は、3.3×1012cm-2
・eV-1から、2.5×1012cm-2eV-1と約25%
の減少が見られる。この事実は、何らかの問題で酸化後
の界面凖位密度が悪かった場合に、ゲート電極を形成し
たあとでも界面凖位密度を改善する方法を与えている。From this result, it can be clearly seen that the interface plate density is entirely reduced. For example, the interface plate density of the sample annealed for 2 hours is 3.3 × 10 12 cm -2
・ From eV -1 to 2.5 × 10 12 cm -2 eV -1 , about 25%
Is seen. This fact provides a method for improving the interface texture density even after the gate electrode is formed, when the interface texture density after oxidation is bad for some reason.
【0018】今回の実験では、400℃において実施し
たが、これは必ずしも重要な条件ではない。すなわち、
温度が低ければ、アニール時間を長く設定すればよく、
また、温度が高ければアニール時間を短くすれば良い。
実用的な温度としては、下は300℃、上は金属が融解
しない程度の温度、例えば、Alを使用するのであれ
ば、500℃程度が望ましい。アニール時間としては、
30分間〜2時間程度の範囲から選択して行うことが望
ましい。
[実施例3]実施例1と同じSiC基板を用い、同じ条
件のウェット酸化で厚さ35nmの酸化膜を成長させ
た。その後、試料の冷却期間においても、ウェット雰囲
気にした。In this experiment, it was carried out at 400 ° C., but this is not an important condition. That is,
If the temperature is low, you can set the annealing time longer,
If the temperature is high, the annealing time may be shortened.
As a practical temperature, it is desirable that the lower temperature is 300 ° C. and the upper temperature is such that the metal does not melt, for example, if Al is used, about 500 ° C. The annealing time is
It is desirable to select from a range of about 30 minutes to 2 hours. [Example 3] Using the same SiC substrate as in Example 1, an oxide film having a thickness of 35 nm was grown by wet oxidation under the same conditions. After that, the wet atmosphere was maintained even during the cooling period of the sample.
【0019】得られた試料の界面凖位密度は、1×10
11cm-2・eV-1と著しい減少が見られた。(図1中の
三角印)この事実は、Lipkinの論文の結果と似ているよ
うに思われるが、Lipkinの方法は、低温で追加の酸化を
行い、その温度は950℃が最適という結果になってお
り、水素原子を含む雰囲気中で冷却するだけの本発明の
方法は、明らかに異質の実験結果とみることができる。
すなわち、ここで得られた実験事実は、全く新規なもの
であることがわかる。
[実施例4]同じSiC基板を用い、同様にウェット酸
化をおこなった後、10%の水素を含む窒素中で冷却し
た。The interface density of the obtained sample was 1 × 10 5.
A significant decrease of 11 cm -2 · eV -1 was observed. (Triangle in Figure 1) This fact seems to be similar to the result of Lipkin's paper, but Lipkin's method results in additional oxidation at low temperature, which is optimal at 950 ° C. Therefore, the method of the present invention in which only the cooling is performed in the atmosphere containing hydrogen atoms can be regarded as an experimental result of a different nature.
That is, it can be seen that the experimental facts obtained here are completely new. [Example 4] The same SiC substrate was used, wet oxidation was similarly performed, and then cooled in nitrogen containing 10% hydrogen.
【0020】得られた試料の界面凖位密度は、1×10
11cm-2・eV-1であった。この結果から、冷却過程中
の雰囲気は還元性でもよく、水素原子の存在が重要であ
ることを示している。以上の結果は、アニールにおいて
は水素が重要であるという結論に帰着する。すなわち、
酸化後に温度を下げる場合にも水素の入ったガスを用い
るべきことがわかる。その代用手段として、水素原子を
含む水を用いたのが本発明の一つの重要なポイントであ
る。もちろん、水素でもよいことは本発明の最後に指摘
した点からも明らかであるが、1000℃近くの高温で
水素を用いることは危険であるから、水を用いただけで
あって、水素原子を含むガスであればよい。水素原子の
含有量としては10%以上が望ましい。The interface plate density of the obtained sample was 1 × 10 5.
It was 11 cm -2 · eV -1 . This result indicates that the atmosphere during the cooling process may be reducing and the presence of hydrogen atoms is important. The above results result in the conclusion that hydrogen is important in annealing. That is,
It can be seen that a gas containing hydrogen should be used also when the temperature is lowered after the oxidation. As a substitute means of using water containing a hydrogen atom is Ru Oh <br/> in one of the important points of the present invention. Of course, it is also clear from the point pointed out at the end of the present invention that hydrogen may be used, but since it is dangerous to use hydrogen at a high temperature near 1000 ° C., only water is used and it contains a hydrogen atom. Any gas will do. The content of hydrogen atoms is preferably 10% or more.
【0021】尚ウェット酸化の例のみを示したが、スチ
ーム酸化やドライ酸化の試料においても、本発明の熱処
理方法で界面凖位密度の大幅な低減がなされることを確
認した。Although only an example of wet oxidation is shown, it was confirmed that the interface heat sink density was significantly reduced by the heat treatment method of the present invention even in the samples of steam oxidation and dry oxidation.
【0022】[0022]
【発明の効果】以上説明したように本発明によれば、炭
化ケイ素半導体装置の熱酸化膜形成方法は、熱酸化後の
アニール時間、一度形成した熱酸化膜の低温熱処理、或
いは熱酸化後の冷却時の雰囲気等を吟味することによっ
て、界面凖位密度を低減することができる。As described above, according to the present invention, the method for forming a thermal oxide film of a silicon carbide semiconductor device is provided with an annealing time after thermal oxidation, a low temperature heat treatment of a thermal oxide film once formed, or a thermal oxide film after thermal oxidation. The interface density can be reduced by examining the cooling atmosphere and the like.
【0023】界面凖位密度はMOS型半導体装置の重要
な特性であり、本発明によりその密度を低減すること
は、炭化ケイ素のMOS型半導体装置の実用化に資する
ところ大である。The interface density is an important characteristic of a MOS semiconductor device, and reducing the density according to the present invention greatly contributes to the practical application of a silicon carbide MOS semiconductor device.
【図1】本発明第一、第二、第三の実施例の界面凖位密
度特性図FIG. 1 is a diagram showing interface interface density characteristics of the first, second and third embodiments of the present invention.
【図2】熱酸化工程の温度フローチャートFIG. 2 is a temperature flowchart of the thermal oxidation process.
【符号の説明】 A 昇温期間 B 酸化期間 C アニール期間 t1 酸化時間 t2 アニール時間 T1 挿入温度 T2 酸化温度[Explanation of symbols] A temperature rising period B Oxidation period C annealing period t1 oxidation time t2 annealing time T1 insertion temperature T2 oxidation temperature
フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 21/312 H01L 21/314 H01L 21/316 H01L 21/318 Continuation of front page (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 21/312 H01L 21/314 H01L 21/316 H01L 21/318
Claims (6)
酸化膜を形成する熱酸化膜形成工程を有する炭化ケイ素
半導体装置の製造方法において、前記熱酸化後、窒素ガ
ス雰囲気中で行うアニールは2時間より短くすることを
特徴とする炭化ケイ素半導体装置の製造方法。1. A method for manufacturing a silicon carbide semiconductor device, comprising a thermal oxide film forming step of forming a silicon oxide film on a surface of silicon carbide by thermal oxidation, wherein the annealing performed in a nitrogen gas atmosphere after the thermal oxidation is performed for 2 hours or more. A method for manufacturing a silicon carbide semiconductor device, which comprises shortening.
酸化膜を形成する熱酸化膜形成工程と前記熱酸化後に不
活性ガス雰囲気中で行うアニール工程を有する炭化ケイ
素半導体装置の製造方法において、前記不活性ガス雰囲
気中で行うアニール工程後、水素原子を含むガス雰囲気
中で、300〜500℃の範囲でアニールする工程を有
することを特徴とする炭化ケイ素半導体装置の製造方
法。2. A method for manufacturing a silicon carbide semiconductor device comprising: a thermal oxide film forming step of forming a silicon oxide film on the surface of silicon carbide by thermal oxidation; and an annealing step performed in an inert gas atmosphere after the thermal oxidation. A method of manufacturing a silicon carbide semiconductor device, comprising a step of annealing in a gas atmosphere containing hydrogen atoms in a range of 300 to 500 ° C. after an annealing step performed in an active gas atmosphere.
酸化膜を形成する熱酸化膜形成工程を有する炭化ケイ素
半導体装置の製造方法において、前記熱酸化膜形成工程
中の熱酸化後の冷却過程および熱酸化膜形成工程後に行
う熱処理工程の冷却過程の少なくとも一部の期間に、水
素原子を含むガスによって雰囲気を形成することを特徴
とする炭化ケイ素半導体装置の製造方法。3. A method of manufacturing a silicon carbide semiconductor device comprising a thermal oxide film forming step of forming a silicon oxide film on the surface of silicon carbide by thermal oxidation, comprising a cooling step and thermal treatment after the thermal oxidation in the thermal oxide film forming step. A method for manufacturing a silicon carbide semiconductor device, comprising forming an atmosphere with a gas containing hydrogen atoms during at least a part of a cooling process of a heat treatment process performed after the oxide film forming process.
酸化膜を形成する熱酸化膜形成工程を有する炭化ケイ素
半導体装置の製造方法において、前記熱酸化形成工程
は、前記熱酸化と、少なくとも一部の期間に水素原子を
含むガス雰囲気中で行う冷却と、からなることを特徴と
する炭化ケイ素半導体装置の製造方法。4. A method for manufacturing a silicon carbide semiconductor device, which comprises a thermal oxide film forming step of forming a silicon oxide film on a surface of silicon carbide by thermal oxidation, wherein the thermal oxidation forming step includes at least a part of the thermal oxidation. A method of manufacturing a silicon carbide semiconductor device, comprising: cooling in a gas atmosphere containing hydrogen atoms for a certain period.
徴とする請求項2ないし4のいずれかに記載の炭化ケイ
素半導体装置の製造方法。5. The method for manufacturing a silicon carbide semiconductor device according to claim 2, wherein the gas containing hydrogen atoms is hydrogen.
とする請求項2ないし4のいずれかに記載の炭化ケイ素
半導体装置の製造方法。6. The method for manufacturing a silicon carbide semiconductor device according to claim 2, wherein the gas containing hydrogen atoms is water.
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JP16547197A JP3525149B2 (en) | 1996-08-12 | 1997-06-23 | Method for manufacturing silicon carbide semiconductor device |
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EP1965430A2 (en) | 2007-02-28 | 2008-09-03 | Denso Corporation | Sic semiconductor device and method for manufacturing the same |
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JP4525958B2 (en) | 2001-08-27 | 2010-08-18 | 独立行政法人産業技術総合研究所 | Manufacturing method of semiconductor device |
AU2003280487A1 (en) | 2002-06-28 | 2004-01-19 | National Institute Of Advanced Industrial Science And Technology | Semiconductor device and its manufacturing method |
US7880173B2 (en) | 2002-06-28 | 2011-02-01 | National Institute Of Advanced Industrial Science And Technology | Semiconductor device and method of manufacturing same |
JP2007096263A (en) | 2005-08-31 | 2007-04-12 | Denso Corp | SiC SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME |
JP5229845B2 (en) * | 2006-03-07 | 2013-07-03 | 独立行政法人産業技術総合研究所 | Method for manufacturing silicon carbide MOSFET and silicon carbide MOSFET |
JP2008244456A (en) * | 2007-02-28 | 2008-10-09 | Denso Corp | Silicon carbide semiconductor device and manufacturing method thereof |
JP4844609B2 (en) * | 2008-09-25 | 2011-12-28 | 富士電機株式会社 | Method for forming oxide film on silicon carbide semiconductor substrate |
JP2012186490A (en) * | 2012-05-07 | 2012-09-27 | National Institute Of Advanced Industrial & Technology | Semiconductor device and semiconductor substrate deuterium treatment apparatus |
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