JP3484982B2 - Dynamic range extended display method for each object - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dynamic range extension display system for each object in an infrared imager, and in particular, it recognizes a plurality of objects to be observed in an image screen,
The present invention relates to a dynamic range extension display method for each object that enables independent processing of display quality.

[0002]

2. Description of the Related Art FIG. 75 is a diagram illustrating a conventional infrared imager (first), and FIG. 76 is a diagram illustrating an image signal in FIG.

Infrared imager 100 shown in FIG. 75.
Is composed of an infrared detector 300, an A / D converter 400, an image signal processor 200, a D / A converter 500, and an image display device 600.

When the infrared detector 300 receives an infrared ray of a specific wavelength radiated from each pixel of an image pickup screen composed of a total of 250,000 units of pixels composed of 500 units horizontally and 500 units vertically, the infrared detector 300 The electric signal is converted into an analog electric signal corresponding to the intensity and transmitted to the A / D conversion unit 400.

The A / D conversion unit 400 includes an infrared detector 30.
The analog electric signal transmitted from 0 is converted into a digital electric signal [hereinafter referred to as an image signal (d)] composed of a predetermined number of bits [for example, 12 bits], and transmitted to the image signal processing unit 200. To do.

FIG. 76A shows an image signal (d) for one line transmitted from the A / D conversion unit 400 to the image signal processing unit 200 as a result of the infrared detector 300 scanning the imaging screen by one line. Is displayed in analog form, and ± 0
The maximum (M
_D ) [for example, M _D = about 2000] gradation [hereinafter referred to as detected gradation (m _D )] can be adopted.

The sections a and c in FIG.
It is a signal corresponding to the outside of the image pickup screen such as a synchronization signal, and the section B indicates the image signal (d) in the true image pickup screen.
For the image signal (d) transmitted from the A / D conversion unit 400, the image signal processing unit 200 displays the maximum (M _V ) [For example, M _V = 256] gradation (hereinafter referred to as display gradation (m _V )) is converted to an image signal (d), which is referred to as “display quality processing” hereinafter, and adjustment is performed. The level setting unit 201, the addition unit 202, the upper and lower limit limiting unit 203, the adjustment gain setting unit 204, the multiplication unit 205, and the upper and lower limit limiting unit 206.

The adjustment level setting unit 201 externally sets an arbitrary adjustment level (L) for moving the image signal (d) transmitted from the A / D converter 400 up and down, and the adjustment gain. The setting unit 204 includes an A / D conversion unit 40
An arbitrary adjustment gain (G) for vertically expanding / compressing the image signal (d) transmitted from 0 and translated in parallel by the adjustment level (L) is set from the outside, and the addition is performed. The unit 202 is transmitted from the A / D conversion unit 400 by adding the adjustment level (L) set in the adjustment level setting unit 201 to the image signal (d) transmitted from the A / D conversion unit 400. The image signal (d) is vertically moved in parallel, and the upper and lower limit limiter 203 determines that the image signal (d) after addition of the adjustment level (L) is within the allowable gradation range [± M _V described above]. If it exceeds, limit to the maximum and minimum values.

In FIG. 76 (b), the image signal (d) at the output stage from the upper / lower limit limiting section 203 is displayed in analog form. Further, the multiplication unit 205 adds the adjustment gain setting unit 204 to the image signal (d) output from the upper and lower limit limiting unit 203.
The image signal (d) transmitted from the upper / lower limit limiting unit 203 is expanded / compressed in the up / down direction by multiplying the adjusted gain (G) that has already been set, by the upper / lower limit limiting unit 206. When the image signal (d) after being multiplied by) exceeds the allowable gradation range [± M _V described above], it is limited to the maximum value and the minimum value and transmitted to the D / A conversion unit 500.

In FIG. 76 (c), the image signal (d) at the output stage from the upper and lower limit limiting section 206 is displayed in analog form. The D / A conversion unit 500 includes the image signal processing unit 20.
The digital image signal (d) transmitted from
After being converted back to the analog format, the image is transmitted to the image display device 600.

The image display device 600 includes a D / A converter 50.
The analog image signal (d) transmitted from 0 is received, and an image is displayed. As a result, in the conventional infrared imaging device (first) 100, since the adjustment level (L) and the adjustment gain (G) are set centering on the target object, the temperature of the target object is other than that. When the temperature is far away from the [background] temperature, the upper and lower limit limiters 203 and 206 saturate each other, so that a phenomenon other than the target object disappears.

Particularly, when there are a plurality of target objects in one image pickup screen, the optimum adjustment level (L) for all target objects is obtained.
It is difficult to set the adjustment gain (G) and the adjustment gain (G), and it is necessary to repeat the observation in which the optimum adjustment level (L) and the adjustment gain (G) are set for each target object.

Next, FIG. 77 is a diagram illustrating a conventional infrared imaging device (2), and FIG. 78 is a diagram illustrating an image signal in FIG. 77. The infrared imaging device (No. 2) 100 shown in FIG. 77 is similar to the infrared imaging device (No. 1) 100 described above, and the infrared detector 300, A /
It is composed of a D conversion unit 400, an image signal processing unit 200, a D / A conversion unit 500, and an image display device 600. The image signal processing unit 200 includes a DSC unit 211, a frame memory (FM) 212, and an object identification. It is composed of a unit 213, a gain coefficient generation unit 214, a level control signal generation unit 215, a multiplication unit 216 and an addition unit 217.

The infrared imager (part 2) 100 is
Although it has been disclosed in Japanese Patent Laid-Open No. 8-223485, the outline thereof will be described. Infrared detector 30
0 is detected and the image signal (d) for one image pickup screen [one frame] converted into a digital format by the A / D converter 400 is stored in the frame memory 212, and then the DS signal is displayed.
One pixel is sequentially extracted by the C unit 211 and transmitted to the object identifying unit 213, the gain coefficient generating unit 214, and the level control signal generating unit 215.

The object identifying unit 213 identifies one of the observation objects based on the transmitted image signal (d) for one frame, and designates the image signal (d) constituting the identified observation object. A timing signal to be output is output to the gain coefficient generation unit 214 and the level control signal generation unit 215.

The gain coefficient generating section 214 is an image signal (d) for which a timing signal is transmitted from the object identifying section 213 out of the image signals (d) for one frame transmitted from the frame memory 212, that is, an observation target. The adjustment gain (G) is generated only for the image signal (d) that constitutes the object,
The signal is transmitted to the multiplication unit 216 and is also transmitted to the level control signal generation unit 21.
5 is an image signal (d) to which a timing signal is transmitted from the object identifying unit 213 among the image signals (d) of one frame transmitted from the frame memory 212, that is, an image signal ( The adjustment level (L) is generated only for d) and is transmitted to the addition unit 217.

The multiplying unit 216 is an image signal (d) to which the adjustment gain (G) is transmitted from the gain coefficient generating unit 214 among the image signals (d) of one frame transmitted from the frame memory 212, that is, observation. Only the image signal (d) forming the target object is multiplied by the adjustment gain (G) and transmitted to the adder 217, and the adder 217 transmits the image signal (d) for one frame transmitted from the frame memory 212. Among these, the adjustment level (L) is added only to the image signal (d) to which the adjustment level (L) is transmitted from the level control signal generation unit 215, that is, the image signal (d) forming the observation target object, and D / It is transmitted to the A conversion unit 500.

Thereafter, the D / A conversion section 500 reversely converts the digital image signal (d) transmitted from the image signal processing section 200 into an analog format, as described above.
Image display device 600
In the same manner as described above, receives the analog image signal (d) transmitted from the D / A conversion unit 500 and displays the image.

As a result, even in the conventional infrared imager (second) 100, the adjustment level (L) and the adjustment gain (G) are generated only for the image signal (d) of one target object. When there are multiple target objects within one image capture screen, only one specified object can be displayed quality processing, and other objects cannot be displayed properly. However, it has been necessary to individually specify each target object to generate an adjustment level (L) and an adjustment gain (G) and repeat the observation.

[0020]

As is apparent from the above description, in the conventional infrared imaging device 100, the adjustment level (L) and the adjustment gain (G) are set around the target object, so that the target is set. When the temperature of the object to be set is far apart from the temperature of the other (background etc.), there is a phenomenon that only the target object can be seen, especially when there are multiple target objects in one imaging screen, It was necessary to repeat the observation in which the optimum adjustment level (L) and adjustment gain (G) were set for each target object.

An object of the present invention is to enable execution of optimum display quality processing for each target object at a time even when a plurality of target objects are present in one image pickup screen.

[0022]

FIG. 1 shows the principle of the present invention. In FIG. 1, reference numeral 100 is an infrared imaging device which is the subject of the present invention.

Reference numeral 700 is an object recognition means provided according to the present invention. 800 is a dispensing means provided by the present invention. 900 is a synthesizing means provided by the present invention.

A plurality of individual image signal processing means 1000 are provided according to the present invention. Infrared imaging device 100
Captures the temperature of the imaging screen as an image signal and displays the temperature distribution on the screen.

The object recognizing means 700 independently recognizes a plurality of objects having a temperature difference of a predetermined value or more with respect to the background by using all image signals in the image pickup screen. Distribution means 8
00 separates the image signal corresponding to each object recognized by the object recognition means 700.

Each individual image signal processing means 1000 individually receives the image signal corresponding to each object separated by the distributing means 800, and processes the display quality of the object on the display screen.

The synthesizing means 900 synthesizes the image signals corresponding to the respective objects processed by the individual image signal processing means 1000 to assemble the image signals of the entire image pickup screen. [The above is related to the present invention (claim 1)] Note that each individual image signal processing unit 1000 obtains the frequency distribution for each temperature gradation for each pixel in one frame, and then the temperature is equal to or higher than a predetermined threshold value. It is considered that the histogram conversion processing means extracts only the gradation and converts it into the display gradation on the display screen. [Related to the Present Invention (Claim 2)] Further, each individual image signal processing means 1000 obtains the frequency distribution for each temperature gradation for each pixel in one frame, and then equalizes the frequencies for each display gradation on the display screen. It is considered to be configured by a histogram equalization processing unit that correlates with each other. [Related to the Present Invention (Claim 3)] Further, each individual image signal processing means 1000 uses the temperature gradation for each pixel in one frame as the reference value, and the average value of the temperature gradation for each pixel in the one frame as a reference value. It is considered that the automatic level adjustment processing means for performing the conversion as described above is used. [Related to the Present Invention (Claim 4)] Further, each individual image signal processing means 1000 has the automatic level adjustment processing means and the maximum temperature gradation and the minimum temperature gradation after being converted by the automatic level adjustment processing means. Is considered to be constituted by the automatic level gain adjustment processing means for converting the display gradation into the highest value and the lowest value of the display gradation on the display screen.
[Related to the Present Invention (Claim 5)] Further, each individual image signal processing means 1000 is designated from among the above-mentioned three processing means, respectively, a histogram conversion processing means, a histogram equalization processing means, an automatic level gain adjustment processing means. And an individual image signal processing unit 1 selected for each object.
Considering the display quality of the object by 000. [Related to the Present Invention (Claim 6)] Further, each individual image signal processing means 1000 gives the average value of each image signal distributed by the distribution means 800 to the individual image signal processing means 1000 according to claims 2 to 4. Calculate,
It is considered that the result obtained by multiplying the average value by a predetermined coefficient value can be added to each processing result. [Related to the Present Invention (Claim 7)] Further, each individual image signal processing means 1 according to claims 2 to 4.
000 performs the above-described display quality processing on each image signal distributed by the distribution unit 800, calculates an average value of each image signal distributed by the distribution unit 800, and sorts the average value in descending order. After determining, it is considered to determine a predetermined adjustment level having a certain difference and add the determined adjustment level to the display quality processing result. [Related to the Present Invention (Claim 8)] Further, the object recognizing means 700 adds a means for sequentially and easily changing the threshold value set for edge detection, so It is considered that the edge of the missing portion is also detected and made recognizable. [Relating to the Present Invention (Claim 9)] The object recognizing means 700 further changes the number of logical stages of the logical filter used for edge detection to add means for enlarging the edge detection pixel area. It is considered that both an object having a missing part edge and an edge of the missing part can be detected and recognized. [The present invention (claim 1
0) Relation] Further, the object recognition means 700 compares the occupied areas of all the objects recognized by using all the image signals in the imaging screen, and selects only a predetermined number of objects from the objects having a large area as the target objects. It is considered to add a means for doing so. [Related to the Present Invention (Claim 11)] Further, the object recognition unit 700 recognizes the number of objects when the number of all the objects recognized using all the image signals in the imaging screen exceeds a predetermined number. It is considered to add a means for sequentially changing the thresholds set for edge detection to detection difficulty so that the number decreases to the predetermined number. [Related to the Present Invention (Claim 12)] Therefore, according to the present invention (Claims 1 to 8), even when a plurality of target objects are present in one image-capturing screen, once for each target object. According to the present invention (claims 9 and 10), the recognition accuracy of the target object existing in one imaging screen is improved, and the present invention (claim 11) According to claim 12), it becomes possible to recognize only a predetermined number of target objects to be dealt with in the display quality processing from among a plurality of objects existing in one imaging screen, and the infrared image device Economical efficiency is improved.

[0028]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. First, an embodiment (first) of the present invention (claim 2) will be described with reference to FIGS. 2 to 9.

FIG. 2 is a diagram showing an infrared imaging device according to an embodiment (first) of the present invention (claim 2), FIG. 3 is a diagram illustrating an object recognition unit in FIG. 2, and FIG. 4 is a diagram. Three
FIG. 5 is a diagram illustrating an object number assigning unit in FIG. 5, FIG. 5 is a diagram illustrating a number downfilling unit in FIG. 3, and FIG.
7 is a diagram illustrating a histogram conversion unit in FIG.
FIG. 9 is a diagram illustrating an object number assigning process on an imaging screen, FIG. 8 is a diagram illustrating a histogram converting process in FIG. 6, and FIG. 9 is a diagram illustrating an image signal in FIG. 2.

The infrared imaging device 100 shown in FIG.
Infrared detector 300 and A / D converter 40, as in the conventional infrared imager 100 (see FIGS. 75 and 77).
0, an image signal processing unit 200, a D / A conversion unit 500, and an image display device 600, of which the infrared detector 300, the A / D conversion unit 400, and the D / A conversion unit 5 are included.
00 and the image display device 600 are the same as the conventional infrared image device 100, but only the image signal processing unit 200 is different from the conventional image signal processing unit 200.

The image signal processing unit 200 shown in FIG.
Object recognition unit 1, distribution unit (MUL) 221, synthesis unit (SE
L) 222 and a plurality of histogram conversion units (HP) 2
[Each histogram conversion unit (HP) is set to 2 _i (where i =
1) to K)], the object recognition unit 1 plays the role of the object recognition unit 700 in FIG. 1, and the distribution unit (MUL) 221 also functions as the distribution unit 800 in FIG. And also the synthesis department (SEL)
222 functions as the synthesizing means 900 in FIG.
Further, each histogram conversion unit (HP) 2 has a configuration shown in FIG.
Of the individual image signal processing means 1000 in FIG.

As shown in FIG. 3, the object recognition unit 1 includes a frame memory (FM) 11 and a smoothing filter (SMF) 1.
2, Laplacian filter (EDF) 13, comparison unit (C
MP) 14, an object number assigning unit (ONB) 15, a number downfilling unit (NRA) 16 and a threshold setting unit (THR) 17, of which the object number assigning unit (ONB) 1
No. 5 has a structure as shown in FIG.
A) 16 has a structure as shown in FIG.

In FIG. 2, the image signal processing unit 200 has the same structure as in the conventional infrared imager 100.
Output from the infrared detector 300, A / D converter 400
Detected gradation (m _D ) converted to digital format by
The image signal (d) having [+ M _D ≧ m _D ≧ −M _D , in the previous example, M _D ≈2000 gray scales] is repeatedly input at a constant pause interval for each frame.

When the image signal processing unit 200 finishes receiving the image signal (d) for one frame, the image signal processing unit 200 receives a pause interval until the input of the image signal (d) for the next frame starts.
Display quality processing as described below is executed, and is transmitted to the image display device 600 via the D / A conversion unit 500 for visual display.

In the image signal processing section 200, the object recognizing section 1 executes the processing described below, and from the image signal (d) for one frame, the gradation difference of a predetermined threshold value or more is compared with the background. recognized as an independent area objects with (B), to grant object number (N _B) in each object recognized (B), each pixel constituting the granted object number (N _B) of the object (B) In addition, the distribution unit (MUL) 221 is synchronized with the image signal (d).
Communicate to.

For example, the image signal (d) shown in FIG. 7 (a)
, Two objects (B ₁ ) and (B
₂₎ it is recognized, the object number in the background (N _B = "1"), each object (B ₁₎ and each object number (B ₂₎ (N _B
= "2") and has granted (N _B = "3").

The distribution unit (MUL) 221 associates the object number (N _B ) transmitted from the object recognition unit 1 with each of the plurality of histogram conversion units (HP) 2 _i provided, and the object recognition unit Object number transmitted from 1 (N _B )
Accordingly, the corresponding histogram conversion unit (HP) 2 _i is selected, and the image signal (d) transmitted from the object recognition unit 1 in synchronization with the object number (N _B ) is selected, and the selected histogram conversion unit (HP) 2 distribute to _i .

Thereafter, the image signal (d) distributed by the distribution unit (MUL) 221 to each histogram conversion unit (HP) 2 _i [corresponding to individual image signal processing means 1000] is referred to as an individual image signal (d _i ). To call. [Same as below. ] With respect to the image signal (d) shown in FIGS. 7 (a) for example, the histogram conversion unit (HP) 2 _1, 2 ₂ and 2 _3, object number (N _B = "1"), (N _B = " 2 ") and (N _B
= “3”).

Each histogram conversion section (HP) 2 _i executes the display quality processing, which will be described later, on each individual image signal (d _i ) distributed from the distribution section (MUL) 221, and the processing result is combined by the synthesis section ( SEL) 222.

Thereafter, each histogram conversion unit (HP) 2 _i
The display quality processed individual image signal (d _i ) output from [the individual image signal processing means 1000 equivalent part] is referred to as a processed individual image signal (d _Pi ). [Same as below. The synthesis unit (SEL) 222 receives the object number (N _B ) from the object recognition unit 1 in parallel with the distribution unit (MUL) 221, and the histogram corresponding to the transmitted object number (N _B ). The conversion unit (HP) 2 _i is selected, and the processed individual image signals (d _Pi ) in one frame to be output are extracted, and combined into the image signal (d) for one frame, and the D / A conversion unit 500. The image is output to the image display device 600 via.

Thereafter, the image signal processing unit 200 synthesizes each processed individual image signal (d _Pi ) and outputs the combined image signal (d).
Is called a processed image signal (d _P ). [Same as below. After the image signal processing unit 200 finishes executing the above display quality processing, the infrared detector 300 is changed to the A / D conversion unit 400.
The image signal (d) for the next one frame is transmitted to the image signal processing unit 200 via.

Next, the object recognition processing by the object recognition unit 1 in the image signal processing unit 200 and the display quality processing process by each histogram conversion unit (HP) 2 will be sequentially described. 3 to 5, when the image signal (d) transmitted from the A / D conversion unit 400 to the object recognition unit 1 arrives at the frame memory (FM) 11 and the smoothing filter (SMF) 12, the frame memory (FM). ) 11, the image signal (d) that has arrived at the smoothing filter (SMF) 12 is the Laplacian filter (EDF) 13 and the comparison unit (CMP) 1.
4, after each via an object number assigning portion (ONB) 15 and number under packed portion (NRA) 16 were subjected to a predetermined process, object number with the number under packed portion (NRA) 16 (N _B)
The received image signal (d) is held until is output, and then is output in synchronization with the output of the object number (N _B ).

The smoothing filter (SMF) 12 executes the following smoothing processing on the received image signal (d) for one frame. That is, the image signal (d) corresponding to nine pixels in total in three rows and three columns centering on each target pixel
The noise superimposed on the image signal (d) is reduced by calculating the average value of (1) and outputting it as the image signal (d) of the target pixel, and the noise is transmitted to the Laplacian filter (EDF) 13.

The Laplacian filter (EDF) 13
Performs the following edge recognition processing on the smoothed image signal (d) for one frame transmitted from the smoothing filter (SMF) 12.

That is, among nine pixels in total in three rows and three columns centered on each target pixel, the total value of the image signal (d) corresponding to eight peripheral pixels other than the central pixel The value of eight times the value of the image signal (d) corresponding to the pixel is subtracted, output as the edge signal (e) corresponding to the target pixel, and transmitted to the comparison unit (CMP) 14.

The comparison unit (CMP) 14 is a Laplacian filter.
Edge signal (e) received from filter (EDF) 13
Is the edge threshold value already set in the threshold value setting unit (THR) 17.
(E_TH), The received edge signal (e) is an edge
Threshold (e_TH) If it is above, output edge detection signal
By setting (ed) to logical "1", the object
(B) indicates that the contour has been detected, and
Edge signal (e) _THIf less than
Set the applied edge detection signal (ed) to logic "0"
Therefore, the contour of the object (B) has not been detected.
Indicates.

The edge detection signal (ed) output from the comparison unit (CMP) 14 is the object number assigning unit (ONB) 15
Be transmitted to. The object number assigning unit (ONB) 15 is shown in FIG.
Line memory (LM) 151 and 1 as shown in FIG.
5A, flip-flops (FF) 152, 153, 15
4, 15B, 15C, 15D, 15H and 15M, a decoding unit (DCR) 155, a NOR unit (NOR) 156.
And 15N, AND section (AND) 157 and 15
J, counting unit (CNT) 158, selection unit (SEL) 15
9, register (REG) 15E, frame memory (F
M) 15F, 15G and 15L, comparison unit (CMP) 1
5I and dual port memory (DPM) 15K.

The dual port memory (DPM) 15
The K, the object number assigning portion (ONB) at the beginning time of 15 to the edge detection signal of each frame (ed) arrives, the address (A _15K) to the address (A _15K) data having the same value (D _15K) Is stored.

In FIG. 4, the edge detection signal (ed) arriving from the comparison unit (CMP) 14 is the line memory (L).
M) 151, flip-flop (FF) 154, and logical product section (AND) 157.

The line memory (LM) 151 stores the image signal (d) corresponding to the pixels for one scanning line of the image pickup screen. Therefore, at the beginning of the line memory (LM) 151, the edge detection signal corresponding to the pixel one pixel after the beginning on the line immediately preceding the pixel corresponding to the arrived edge detection signal (ed). (Ed) is accumulated and the flip-flop (FF) 152 corresponds to the pixel at the same position on the line immediately preceding the pixel corresponding to the edge detection signal (ed) that has arrived. The edge detection signal (ed) is accumulated, and the flip-flop (F
F) 153 stores the edge detection signal (ed) corresponding to the pixel immediately before the first pixel on the line immediately preceding the pixel corresponding to the arrived edge detection signal (ed), Further, the flip-flop (FF) 154 stores the edge detection signal (ed) that arrives immediately before the arrived edge detection signal (ed).

As a result, when one edge detection signal (ed) arrives from the comparison unit (CMP) 14, the decoding unit (DC)
The edge detection signal (ed) at the front position, the same position, and the rear position on the immediately preceding line and the edge detection signal (ed) at the front position on the same line are input to the R) 155.

The decoding unit (DCR) 155 generates a selection signal (s ₁₅₅ ) as described below from the combination of the four types of input edge detection signals (ed), and the selection unit (SEL) 15
9 is transmitted.

In the decoding unit (DCR) 155, all four types of edge detection signals (ed) are logic "0" [edge not detected].
In this case, the selection unit (SEL) 1 generates a selection signal (s ₁₅₅ ) such that the object number (N _B ) output from the counting unit (CNT) 158 is selected by the selection unit (SEL) 159.
If the edge detection signal (ed) that is transmitted to 59 and is output from the flip-flop (FF) 154 is logic “1” [edge detection], the flip-flop (FF) 15
The selection signal (s ₁₅₅ ) for selecting the object number (N _B ) output from B is generated and transmitted to the selection unit (SEL) 159, and the edge detection signal (from the flip-flop (FF) 154) ( ed) is a logic "0", and the edge detection signal (ed) output from the line memory (LM) 151 is a logic "1", the object number output from the line memory (LM) 15A ( N _B ) is generated to generate a selection signal (s ₁₅₅ ), and a selection unit (SE
L) 159, and also flip-flop (FF) 1
When the edge detection signal (ed) output from 54 is a logic “0” and the edge detection signal (ed) output from the flip-flop (FF) 152 is a logic “1”, the flip-flop (FF) ) A selection signal (s ₁₅₅ ) for selecting the object number (N _B ) output from the 15C is transmitted to the selection unit (SEL) 159, and an edge detection signal output from the flip-flop (FF) 154. When (ed) is a logic “0” and the edge detection signal (ed) output from the flip-flop (FF) 153 is a logic “1”, the object number output from the flip-flop (FF) 15D A selection signal (s ₁₅₅ ) for selecting (N _B ) is generated and transmitted to the selection unit (SEL) 159.

The four types of edge detection signals (ed) input to the decoding unit (DCR) 155 are supplied to the NOR unit (N).
OR) 156 is also input. NOR (NO)
R) 156 receives the four types of input edge detection signals (e
The output signal (g ₁₅₆ ) transmitted to the logical product part (AND) 157 is set to the logic “1” only when all the d) are logic “0”, that is, all the edges are not detected.

The logical product part (AND) 157 outputs the output signal (g ₁₅₆ ) transmitted from the negative logical sum part (NOR) 156.
Is set to the logic "1" and the edge detection signal (ed) set to the logic "1" from the comparison unit (CMP) 14 arrives, the output signal (g) transmitted to the counting unit (CNT) 158. ₁₅₇ ) is set to logic "1".

The counting unit (CNT) 158 is a logical product unit (A
When the output signal (g ₁₅₇ ) transmitted from the ND) 157 is set to logic “1”, the count value (n ₁₅₈ ) is advanced by one step and transmitted to the selection unit (SEL) 159 as the object number (N _B ). To do.

The selection unit (SEL) 159 is connected to the decoding unit (DC
R) 155 selects the object number (N _B ) selected based on the selection signal (s ₁₅₅ ) from the object number assigning unit (ONB) 1 this time.
5 is output as the object number (N _B ) given to the edge detection signal (ed) arriving at 5, and the register (REG) 15E
And the line memory (LM) 15A and the flip-flop (FF) 15B.

The object number (N _B ) stored in the register (REG) 15E is held until the next edge detection signal (ed) arrives. As described above, when the edge detection signal (ed) for one frame has reached the object number assigning unit (ONB) 15, all of the signals transmitted from the comparing unit (CMP) 14 are transmitted to the frame memory (FM) 15L. Edge detection signal (ed) of the frame memory (FM) 1
In 5F, the object numbers (N _B ) given to the pixels corresponding to all the edge detection signals (ed) held in the frame memory (FM) 15L are held correspondingly.

For example, in the image pickup screen shown in FIG. 7A, assuming that the object number (N _B = “1”) is secured in the background, the object (B ₁ ) has a single object number (N _B = "2")
Although but is applied, the object (B _2), the object number (N _B =
"3") is added to the lower left portion, and the object number (N _B =
"4") may be added to the right part.

Next, line memories (LM) 15F and 1
The 5L sequentially extracts the held object number (N _B ) and the edge detection signal (ed) by changing the extraction order and transmits them to the flip-flops (FF) 15H and 15M, respectively.

Here, the change of the extraction order means that the edge detection signal (ed) and the object number (N _B ) detected by scanning the image pickup screen in the column direction (that is, the vertical direction with respect to the image pickup screen) are detected. , Scan in the row direction with respect to the image pickup screen (that is, in the lateral direction with respect to the image pickup screen).

The edge detection signal (ed) extracted from the frame memory (FM) 15L is directly connected to the NOR circuit (N).
OR) 15N, and after being temporarily stored in the flip-flop (FF) 15M, the NOR circuit (N)
OR) 15N.

As a result, the NOR unit (NOR) 15N
Is input with two sets of edge detection signals (ed) continuously extracted from the frame memory (FM) 15L. The NOR unit (NOR) 15N is connected to the frame memory (F
M) An output signal (g _15N ) transmitted to the AND section (AND) 15J only when two sets of edge detection signals (ed) continuously extracted from 15L are both set to logic “0”. ) Is set to logic "1".

The object number (N _B ) extracted from the frame memory (FM) 15F is the frame memory (FM).
15G, the dual port memory (DPM) 15K of address terminals (A _L), while being transferred to the comparator (CMP) 15I, once stored in the flip-flop (FF) 15H, dual port memory (DPM) of 15K The data is transmitted to the data terminal (D _L ) and the comparison unit (CMP) 15I.

As a result, the comparison unit (CMP) 15I has
Two sets of object numbers (N _B ) that are continuously extracted from the frame memory (FM) 15F are input. Comparison section (CM
P) 15I compares two sets of object numbers (N _B ) continuously extracted from the frame memory (FM) 15F, and if both object numbers (N _B ) match, the logical product part (AN).
D) The comparison result signal (cr _15I ) transmitted to 15J is set to the logic "0", but when both object numbers (N _B ) do not match, the comparison result signal transmitted to the AND section (AND) 15J Set (cr _15I ) to logic "1".

The logical product section (AND) 15J outputs the output signal (g _15N ) transmitted from the negative logical sum section (NOR) 15N.
And the comparison result signal (cr _15I ) transmitted from the comparison unit (CMP) 15I are both set to logic "1", and are transmitted to the load terminal (L) of the dual port memory (DPM) 15K. Output signal (g _15J ) is logical "1"
Set to.

Dual port memory (DPM) 15K
When the output signal (g _15J ) transmitted from the logical product part (AND) 15J to the load terminal (L) is set to logic “1”, the current frame input to the address terminal ( _AL ) The object number (N _B ) extracted from the memory (FM) 15F is used as the address (A _15K ), and the previous frame memory (F _L ) is input to the data terminal ( _DL ).
M) The object number (N _B ) corresponding to the previous pixel extracted from 15F is stored as data (D _15K ).

That is, when the edge detection signals (ed) continuously extracted from the frame memory (FM) 15L are both logical "0", that is, no edge is detected in any pixel, the frame memory (FM) 15F is detected. Only when the object numbers (N _B ) continuously extracted from are different, it is determined that the object number (N _B ) given to the same object is changed on the way, and the object number (N _B ) extracted this time is determined. The same object number (N _B ) stored as data (D _15K ) in the address (A _15K ) corresponding to is changed to the previously extracted object number (N _B ).

For example, in the image pickup screen shown in FIG. 7, when the scanning direction is changed from the up-down direction to the left-right direction, when the lower left portion and the lower right portion of the object (B ₂ ) are scanned by one line, Object number (N _B = “3”) and object number (N
Despite continuous detection of _B = "4"), the edge detection signal (ed = logic "0") is detected [edge not detected], and the address (A _15K = "4") is detected. corresponding data) (D _15K = "4") is, the data (D _15K =
It will be updated to "3").

The object number (N _B ) for one frame already held in the frame memory (FM) 15F and the edge detection signal (ed) for one frame already held in the frame memory (FM) 15L are in order. end extracted by modified, dual-port memory (DPM) 15K in already-set data, i.e., after the object number (N _B) has changed finished, frame memory (FM) 15G accumulation already the object number (N _B) is When sequentially extracted and transmitted to the address terminal (A _R ) of the dual port memory (DPM) 15K, the changed data (D _15K ) stored in each address (A _15K ) in the dual port memory (DPM) 15K is stored. ) Is extracted from the data terminal (D _R ) as the object number (N _B ) of each pixel, and is transmitted to the number sub-filling section (NRA) 16.

As a result of the above, the object number assigning unit (ONB) 1
The object number (N _B ) transmitted from the number 5 to the number underlaying unit (NRA) 16 is detected within one frame because it is unified that a plurality of object numbers (N _B ) are given to the same object. The object numbers (N _B ) given to the plurality of objects are not always continuous.

As shown in FIG. 5, the number lowering unit (NRA) 16 includes a frame memory (FM) 161, dual port memories (DPM) 162 and 167, and an adding unit 16.
3, number "1" setting unit 164, counting unit (CNT) 165
And an address generator (ADG) 166.

In FIG. 5, the object number assigning section (ONB)
The object number (N _B ) for one frame arriving from 15 is
While being stored in the frame memory (FM) 161, a dual port memory (DPM) 162 address terminals (A _L), is input as an address (A _162).

Dual Port Memory (DPM) 162
Extracts the data (D ₁₆₂ ) stored at the input address (A ₁₆₂ ) from the data terminal (D _L ), and the addition unit 163 stores the stored number “1” in the number “1” setting unit 164. After adding, the data is again stored in the address (A ₁₆₂ ) from the data terminal (D _L ).

Therefore, at the time when the object number (N _B ) for one frame has arrived from the object number assigning unit (ONB) 15, the dual port memory (DPM) 162 stores
The number of arrivals of the object number (N _B ) is stored in the address (A ₁₆₂ ) corresponding to the received object number (N _B ).

Then, from the address generator (ADG) 166, consecutive addresses (A) whose initial value is the numeral "1" are set.
Is generated and input to the address terminal (A _R ) of the dual port memory (DPM) 162 as the address (A ₁₆₂ ), the address (A _R ) is input from the data terminal (D _R ) of the dual port memory (DPM) 162. The number of object numbers already stored in A ₁₆₂ ) is extracted as data (D ₁₆₂ ) and transmitted to the counting unit (CNT) 165.

The counting unit (CNT) 165 counts in the initial state.
Numerical value (n₁₆₅= “0”) is set and the dual port
Data (DPM) transmitted from the automatic memory (DPM) 162.
₁₆₂) Is other than “0”, the count value (n₁₆₅) To a number
Add the character "1" to the object number (N_B) As dual port
Data terminal (DPM) 167 data terminal (D_R) To
Reach, but from dual port memory (DPM) 162
The transmitted data (D ₁₆₂) Is "0", a number
The previous count value (n_{16 Five})
Body number (N_B) As dual port memory (DPM)
167 data terminal (D_R).

Dual port memory (DPM) 16
7 of address terminals A (A _R), the address generating unit (AD
G) The address (A) generated by 166 is the address (A
₁₆₇ ) and the object number (N _B ) transmitted from the counting unit (CNT) 165 to the data terminal (D _R ) is stored in each address (A ₁₆₇ ).

As a result, the dual port memory (DP
In M) 167, consecutive object numbers (N _B ) are stored only in the address (A ₁₆₇ ) corresponding to the object number (N _B ) transmitted from the object number assigning unit (ONB) 15. .

In this state, the frame memory (FM) 1
Object number accumulated in 61 (N _B) Are sequentially extracted
Address of dual port memory (DPM) 167
Terminal (A_L) To the transmitted object number (N
_B) Corresponding to the address (A_{16 7}) Accumulated in continuous
Object number (N_B) Is the data terminal (D_L) Is extracted from
Image signal extracted from frame memory (FM) 11
It is transmitted to the distribution unit (MUL) 221 in synchronization with (d).
It

As a result of the above, consecutive object numbers (N _B ) are given to a plurality of objects detected in one frame from the number sub-filling section (NRA) 16 to the distribution section (MUL) 221. Becomes

For example, in the image pickup screen shown in FIG. 7, the object number (N _B =
"1") is secured in the background, the object number in the object (B ₁₎ (N
_B = “2”) is added, and the object number (N ₂ ) of the object (B ₂ )
_When ( _B ) is unified to (N _B = “3”) and then transmitted to the number filling unit (NRA) 16, the object number (N _B ) of the object (B ₂ ) becomes (N _B = “3”). ") as one likes held in a continuous object number to one frame (N _B =" 1 "), (N _B =
And thus "2") and the (N _B = "3") is allocated.

The distribution unit (MUL) 221 is the object recognition unit 1
Image signal (d) and the object that are transmitted from the camera in synchronization with each pixel
Body number (N_B) And, as described above, the object number
(N _B) Corresponding to the histogram conversion unit (HP) 2
_i, The corresponding individual image signals (d_i)
It

The image signal for one frame shown in FIG.
In No. (d), the object number (N _B= “1”)
Individual image signal (d₁) Is the histogram
Exchange part (HP) 2₁Object number (N_B=
The object (B) to which "2") has been added₁) Partial image signal
(D₂) Is the histogram converter (HP) 2₂Distributed to
Object number (N_B= (3))-added object (B₂)
Individual image signal (d₃) Is the histogram conversion unit (H
P) 2₃Will be distributed to.

Each histogram conversion section (HP) 2 is shown in FIG.
, A frame memory (FM) 21, dual port memories (DPM) 22, 26 and 2F, an adder 23, a numeral “1” setting unit 24, an address generator (AD).
G) 25 and 2E, comparison unit (CMP) 27, accumulation unit (ACL) 28, register (REG) 29, multiplication unit 2A
And 2D, reciprocal number generation units (CVM) 2B and 2C, a histogram threshold setting unit (HTH) 2G and a display gradation setting unit (MV) 2H.

The histogram threshold value setting unit (HTH) 2G is preset with a histogram threshold value (h _TH ) defined for the histogram conversion process, and the display gradation setting unit (MV) 2H has an image display function. the maximum value of the display gradation determined by the device _{600 (m V) (M V} ) [e.g. 256 gradations] is preset.

In FIG. 6, the individual image signal (d _i ) of the corresponding object arriving in pixel units from the distribution unit (MUL) 221.
Are transmitted to the frame memory (FM) 21 and the dual port memory (DPM) 22.

[0088] The frame memory (FM) 21 accumulates one frame of the individual image signals (d _i), the individual image signal transmitted to the dual port memory (DPM) 22 (d _i) is the histogram conversion below The received individual image signal (d _i ) is held until it is processed and stored in the dual port memory (DPM) 2F, and then output to the dual port memory (DPM) 2F.

The dual port memory (DPM) 22 is
Individual images that arrive from the distribution unit (MUL) 221 in pixel units
Image signal (d_i) To the address terminal (A_L) From address
(A _{twenty two}) As the address (A_{twenty two}) Accumulated in
Data (D_{twenty two}) To the data terminal (D_L),
The number already stored in the number "1" setting unit 24 by the adding unit 23
After adding "1", the data terminal (D_L) From
Less (A_{twenty two}).

Therefore, when the transmission of the individual image signal (d _i ) for one frame from the distributor (MUL) 221 is completed, the received image signal (d) is detected in the dual port memory (DPM) 22. The number of received image signals (d) (hereinafter referred to as the number of histograms (h)) is stored at the address (A ₂₂ ) corresponding to the gradation (m _D ).

FIG. 8A shows a dual port memory (D
The number of histograms (h) of the individual image signal (d _i ) accumulated in the PM) 22 for each detected gradation (m _D ) is illustrated. Then, the address generation unit (ADG) 25 generates a continuous address (A) corresponding to the detected gradation (m _D ) [+ M _D ≧ m _D ≧ −M _D ], and the continuous address (A) of the dual port memory (DPM) 22 is generated. to the address terminal (a _R), the address is input as (a _22), the dual port memory (DPM) 22 of the data terminal (D _R), address (a ₂₂₎ in the histogram the number of storage already (h) Is the data (D
₂₂ ) and transmitted to the comparison unit (CMP) 27.

The comparison unit (CMP) 27 is a dual port
Number of histograms transmitted from memory (DPM) 22
(H) is set in the histogram threshold setting unit (HTH) 2G.
Predetermined histogram threshold (h_TH) Compared to histogra
Number (h) is the histogram threshold (h_TH) In case of above
Is the comparison result signal (cr₂₇) Is set to logic “1” and
The number of histograms is transmitted to the arithmetic unit (ACL) 28.
(H) is the histogram threshold (h _TH) Less than, the ratio
Comparison result signal (cr₂₇) Is set to logic "0", and the accumulation part
(ACL) 28.

The accumulator (ACL) 28 sets the accumulative value (m _HP ) to be output in the initial state to "0", and the comparator (CMP) 27 sets the comparison value to "1". When the result signal (cr ₂₇ ) is transmitted, “1” is added to the accumulated value (m _HP ) and the result is output.
P) 27 from the comparison result signal (c
When r ₂₇ ) is transmitted, the previous accumulated value (m _HP ) is output without adding “1” to the count value.

The accumulated value (m _HP ) output from the accumulator (ACL) 28 is input to the data terminal (D _L ) of the dual port memory (DPM) 26, and also the register (RE).
G) 29 is also accumulated.

The address (A) generated by the address generator (ADG) 25 is the dual port memory (DP
It is also transmitted to the address terminal ( _AL ) of M) 26. Dual port memory (DPM) 26 receives address generator an address which is transmitted from the (ADG) 25 to the address terminal (A _L) (A) as an address (A _26), the data from the accumulator (ACL) 28 accumulated value transmitted to the terminal (D _L) and (m _HP) accumulates.

FIG. 8B shows a dual port memory (DP
The cumulative value distribution stored in M) 26 is shown. On the other hand, the register (REG) 29 updates the stored contents with the accumulated value (m _HP ) transmitted from the accumulator (ACL) 28, and the total number of histograms (h) from the dual port memory (DPM) 22 is When the extraction is completed, the accumulator (ACL) 28
Final accumulated value (m _HP ), that is, the total number of detected gradations (m _D ) of the image signal (d) for which the number of histograms (h) is greater than or equal to the histogram threshold (h _TH ) [histogram gradation (M _HP )
Will be accumulated.

[0097] The reciprocal generator (CVM) 2B may generate the reciprocal (1 / M _V) of the display gradation of setting end in the display gradation setting unit (MV) 2H maximum value of (m _V) (M _V) Then, the multiplication unit 2A
Communicate to.

The multiplication unit 2A multiplies the histogram gradation (M _HP ) accumulated in the register (REG) 29 by the reciprocal number (1 / M _V ) transmitted from the reciprocal number generation unit (CVM) 2B, and performs multiplication. Result (M _HP / M _V ) reciprocal number generator (CVM)
Transmit to 2C.

The reciprocal number generation unit (CVM) 2C includes a multiplication unit 2A.
The multiplication result (M_HP/ M _V) Reciprocal (M_V/
M_HP) Is generated and transmitted to the multiplication unit 2D. Then address
Address generator (ADG) 2E to address generator (AD
G) A continuous address (A) similar to 25 is generated,
Address terminal of dual port memory (DPM) 26
(A_R) To the address (A₂₆).
Data terminal (DPM) of the alport memory (DPM) 26_R)
From the address (A₂₆) Accumulated value (m_HP)But
It is extracted and transmitted to the multiplication unit 2D.

The multiplication unit 2D is a dual port memory (D
Multiplied PM) 26 accumulated value transmitted from the (m _HP), the reciprocal generator a (reciprocal transmitted from _{CVM) 2C (M V / M} HP), the multiplication result (m _HP × M _V / M _HP ) to the data terminal (D _R ) of the dual port memory (DPM) 2F.

Dual port memory (DPM) 2F
Address terminal (A_R), The address generator (AD
G) The address (A) generated by 2E is the address (A_2F)
As the data terminal (D_R) To
The multiplication result transmitted (m_HP× M _V/ M_HP) Is the address
Su (A_2F) Is accumulated in.

As a result, the dual port memory (DP
M) 2F has been processed to output the detected gradation (m _D ) of the individual image signal (d _i ) transmitted from the distribution unit (MUL) 221 to the synthesis unit (SEL) 222 as the address (A _2F ). Display gradation (m _V = m _HP × M) of individual image signal (d _Pi )
_V / M _HP ) will be retained.

FIG. 8C shows the dual port memory (DP
M) Detection gradation (m _D ) of the individual image signal (d _i ) and display gradation (m _V = m _HP × M _V / M _HP ) of the processed individual image signal (d _Pi ) held in 2F Is shown.

In this state, the frame memory (FM) 2
Individual image signals stored in the 1 (d _i) are sequentially extracted in units of pixels and is transmitted to the dual port memory (DPM) 2F address terminals (A _L), the transmitted individual image signal (d _i ), The display gradation (m _V = m _HP × M _V / previously stored in the address (A _2F ) corresponding to the detected gradation (m _D ).
The individual image signal (d _i ) having M _HP ) is transferred to the data terminal (D
_L ), and is transmitted to the combining unit (SEL) 222 as a processed individual image signal (d _Pi ).

The synthesizing section (SEL) 222 synthesizes the processed individual image signals (d _Pi ) transmitted from the respective histogram transforming sections (HP) 2 to edit the image signal (d) for one frame, D / A converter 50 as the completed image signal (d _P ).
It is transmitted to the image display device 600 via 0 and displayed visually.

FIG. 9A shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

As is clear from the above description, the present invention (contract)
According to the embodiment (part 1) of claim 2), image signal processing
The section 200 is a circuit that is transmitted from the A / D conversion section 400.
From the image signal (d) corresponding to the frame, the object recognition unit 1 detects the target
Object (B₁) And (B ₂), And the distribution unit (M
UL) 221 for the background and each object (B₁)and
(B₂) Individual image signal (d₁) To (d₃)
Histogram conversion unit (HP) 2 corresponding to₁No
To 2₃Each histogram conversion unit (HP) 2₁No
To 2₃Respectively correspond to the background and each object (B₁)
And (B₂) Optimal histogram conversion process, i.e. table
Gradation (m_VWithin the range that does not saturate [M _V≧ m_V]]
Used to make a substantially linear histogram conversion
After that, each histogram conversion unit (HP) 2₁Through 2₃by
Processed individual image signal (d_P1) To (d_P3)
Processed image signal for frame (d_P) To create
The image signal (d) for one frame in which a number of objects exist,
While executing the optimal histogram conversion process for each object,
The display quality processing can be executed at one time.

Next, an embodiment (1) of the present invention (claim 3) will be described with reference to FIGS. Figure 10
11 is a diagram showing an image signal processing unit according to an embodiment (first) of the present invention (claim 3), FIG. 11 is a diagram illustrating a histogram equalizing unit in FIG. 10, and FIG.
11 is a diagram illustrating the histogram equalization process in FIG. 1, and FIG. 13 is a diagram illustrating the image signal in FIG. 10.

The infrared imaging device 100 according to the embodiment of the present invention (claim 3) is the same as the infrared imaging device 100 according to the embodiment of the invention (claim 2) [see FIG. 2].
Instead of each of the histogram conversion units (HP) 2 constituting the image signal processing unit 200, a histogram equalization unit (HE) 3 is used as the individual image signal processing unit 1000 in FIG. Infrared detector 3
00, the A / D conversion unit 400, the D / A conversion unit 500, and the image display device 600 are all the same as those in FIG. 2, so only the image signal processing unit 200 is illustrated.

[Note that, also in the embodiments of the following claims, only the image signal processing unit 200 is shown for the same reason. The same image signal (d) as in the embodiment of the present invention (Claim 2) is also supplied to the A / D conversion unit in the image signal processing unit 200 according to the embodiment (No. 3) of the present invention (Claim 3). 400
Transmitted from. Also in the image signal processing unit 200, the object recognition unit 1 and the distribution unit (MUL) 221 function in the same manner as in the embodiment (part 1) of the present invention (claim 2), so that each histogram equalization unit ( HE) 3 _i
In the same manner as for each histogram conversion unit (HP) 2 _i in the embodiment (first) of the present invention (claim 2), an individual image signal (d _i ) with a corresponding object number (N _B ) is Is distributed.

As shown in FIG. 11, each histogram equalizing unit (HE) 3 includes a frame memory (FM) 31, dual port memories (DPM) 32 and 36, an adding unit 33, a numeral “1” setting unit 34, Address generator (AD
G) 35, accumulator (ACL) 37, multipliers 38 and 3
C, total pixel number setting unit (NF) 39, reciprocal number generation unit (CV
M) 3A and display gradation setting section (MV) 3B.

[0112] The total pixel number setting unit (NF) 39, one frame total number of pixels (N _F) has been set in advance, and the display gradation setting unit (MV) 3B, the display tone (m _V) the maximum value of (M _V) [256 gradations in the previous example] is preset.

In FIG. 11, the distribution unit (MUL) 221.
The individual image signal (d _i ) of the corresponding object arriving from each pixel unit is transmitted to the frame memory (FM) 31 and the dual port memory (DPM) 32.

The frame memory (FM) 31 stores the individual image signal (d _i ) for one frame, and the image signal (d) transmitted to the dual port memory (DPM) 32 is
The received individual image signal (d _i ) is held until it is subjected to a histogram equalization process described later and accumulated in the dual port memory (DPM) 36, and then output to the dual port memory (DPM) 36.

The dual port memory (DPM) 32 is
Together with the adder 33 and the number “1” setting unit 34, the function similar to the dual port memory (DPM) 22 in the histogram converter (HP) 2 [see FIG. 6], and one frame from the distributor (MUL) 221. Individual image signal (d
At the time when _i ) has arrived, the histogram number (h) for each detected gradation (m _D ) is accumulated as shown in FIG. 12 (a) [same as FIG. 8 (a)].

Subsequently, the address generation unit (ADG) 35 generates continuous addresses (A) corresponding to the detected gradation (m _D ) [+ M _D ≧ m _D ≧ −M _D ] and the dual port memory (DPM) is generated. ) to 32 address terminals (a _R), it is input as an address (a _32), from the dual port memory (DPM) 32 of the data terminal (D _R), the number of histogram accumulation already in the address (a ₃₂₎ (H) is extracted as data (D ₃₂ ) and transmitted to the accumulator (ACL) 37.

The accumulator (ACL) 37 has the accumulation result (Σh) set to “0” in the initial state, and accumulates the number of histograms (h) transmitted from the dual port memory (DPM) 32. Then, the accumulation result (Σh) is multiplied by the multiplication unit 38.
Communicate to.

FIG. 12B illustrates the accumulation result (Σh) output from the accumulation unit (ACL) 37. The reciprocal number generation unit (CVM) 3A reciprocates (1 / N) the total number of pixels (N _F ) for one frame that has been set in the total pixel number setting unit (NF) 39.
_F ) is generated and transmitted to the multiplication unit 3C.

The multiplication unit 3C is a reciprocal number generation unit (CVM) 3A.
The maximum value of the reciprocal (1 / N _F) and the display gradation of setting the display gradation setting unit (MV) 3B (m _V) transmitted from the (M
_V ) and the multiplication result (M _V / N _F ) is multiplied by the multiplication unit 38.
Communicate to.

The multiplication unit 38 multiplies the accumulation result (Σh) transmitted from the accumulation unit (ACL) 37 by the multiplication result (M _V / N _F ) transmitted from the multiplication unit 3C to obtain the multiplication result. Rounds down the decimal part of the
X M _V / N _F )] is transmitted to the data terminal (D _R ) of the dual port memory (DPM) 36.

That is, the multiplication result (Σh × M _V / N _F ) is obtained by comparing the individual image signal (d _i ) input to the histogram equalization unit (HE) 3 with the histogram distribution (h) for the detected gradation (m _D ). ) considering乍Ra shows the results of the utmost evenly redistributed display gradation (m _V).

The dual port memory (DPM) 36
Address terminal (A_R), The address generator (AD
G) The address (A) generated by 35 is the address (A₃₆)
And the data terminal (D_R) To
Multiplication result transmitted (Σh × M _V/ N_F) Is the address
Su (A₃₆) Is accumulated in.

As a result, the dual port memory (DP
M) 36 is a processing unit which outputs the detected gradation (M _D ) of the individual image signal (d _i ) transmitted from the distribution unit (MUL) 221 to the synthesis unit (SEL) 222 as the address (A ₃₆ ). The equalized display gradation (m) of the individual image signal (d _Pi )
_{V = Σh × M V / N} F) is to be retained.

FIG. 12C shows the dual port memory (D
PM) 36, the individual image signal (d_i) Detection
Gradation (m_D) And the processed individual image signal (d_Pi) Display gradation
(M _V) Is shown.

In this state, the frame memory (FM) 3
Individual image signals stored in the 1 (d _i) are extracted sequentially pixel and is transmitted to the dual port memory (DPM) 36 address terminals (A _L), the transmitted individual image signal (d _i corresponding to the detected gray scale (m _D)) of the address (storage already display gradations _{a 36) (m V = Σh} × M V /
N _F ) processed individual image signal (d _Pi ) is the data terminal (D
_L ) and transmitted to the combiner (SEL) 222.

The synthesizing unit (SEL) 222 has the processed individual image signal (d) transmitted from each histogram equalizing unit (HE) 3 as in the embodiment (first) of the present invention (Claim 2). _Pi ) is combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 and is displayed visually.

FIG. 13A shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

As is apparent from the above description, the present invention (contract)
According to the embodiment (part 1) of claim 3), image signal processing
The section 200 is a circuit that is transmitted from the A / D conversion section 400.
From the image signal (d) corresponding to the frame, the object recognition unit 1 detects the target
Object (B₁) And (B ₂), And the distribution unit (M
UL) 221 for the background and each object (B₁)and
(B₂) Individual image signal (d₁) To (d₃)
Histogram equalization unit (HE) 3 corresponding to₁
Through 3₃Each histogram equalization unit (HE) 3
₁Through 3₃Respectively correspond to the background and each object (B
₁) And (B ₂) Optimal histogram equalization,
That is, display gradation (m_VWithin the range that does not saturate [M_V≧
m_V] To make full use of
After performing each histogram equalization unit (HE) 3₁Through 3
₃Processed individual image signal (d_P1) To (d_P3)
The processed image signal for one frame (d_P) Is created
Image signal for one frame where multiple objects exist
(D) is the optimal histogram equalization process for each object
While executing, it is possible to execute the display quality processing at once.

Next, an embodiment (first) of the present invention (claim 4) will be described with reference to FIGS. 14 to 16. 14
FIG. 15 is a diagram showing an image signal processing unit according to an embodiment (first) of the present invention (claim 4), FIG. 15 is a diagram illustrating an automatic level adjusting unit in FIG. 14, and FIG. 16 is an image in FIG. It is a figure which illustrates a signal.

Embodiment (1) of the present invention (claim 4)
The image signal processing unit 200 according to the present invention is the image signal processing unit 200 according to the embodiment (No. 1) of the present invention (claim 2) [FIG.
Each of the histogram conversion units (HP) 2
Instead of each, automatic level adjustment unit (ALC) 4
Is used as the individual image signal processing means 1000 in FIG.

Embodiment (1) of the present invention (claim 4)
The image signal processing unit 200 according to the present invention also includes the present invention (Claim 2).
Image signal (d) similar to that in the embodiment (No. 1)
Is transmitted from the A / D conversion unit 400.

Also in the image signal processing unit 200, since the object recognizing unit 1 and the distributing unit (MUL) 221 function in the same manner as in the embodiment (first) of the present invention (Claim 2), each automatic level is improved. The adjusting unit (ALC) 4 _i includes
Similar to the respective histogram conversion units (HP) 2 _i in the embodiment (first) of the present invention (claim 2), the individual image signal (d) with the corresponding object number (N _B ) respectively.
_i ) is distributed.

Each automatic level adjuster (ALC) 4 is shown in FIG.
As shown in FIG. 5, the adders 41 and 46, the registers (REG) 42 and 43, the multiplier 44, the inverse number generator (CVM) 45, and the total pixel number setting unit (NF) 47 are included.

[0134] All pixel number setting unit (NF) 47 is one frame total number of pixels (N _F) has been set in advance. Figure 15
In the distribution unit (MUL) 221, the corresponding object (B)
When the individual image signal (d _i ) for one frame starts to arrive, the register (REG) 43 is changed to the register (REG)
The accumulated contents of 42 are accumulated and held, and the contents of the register (RE
G) The stored contents of 42 are deleted and the stored contents are set to "0".

Subsequently, the individual image signal (d _i ) of the corresponding object (B) arriving in pixel units from the distribution unit (MUL) 221.
Is transmitted to the adders 41 and 46. Also adder 4
1 has been transferred the contents stored in the register (REG) 42, and is added to the newly arrived individual image signal (d _i ),
The addition result is stored in the register (REG) 42.

Therefore, the individual image signal (d _i ) for one frame is accumulated in the register (REG) 42 at the start of arrival and is accumulated as the accumulation result (Σd _i ). At the time when the image signal (d _i ) has arrived, the accumulation result of individual image signals (d _i ) for one frame [hereinafter referred to as total accumulation result (Σd _NFi )] is accumulated.

Individual image signal (d _i ) for the next one frame
At the start of arrival, the total accumulation result (Σd _NFi ) accumulated in the register (REG) 42 is returned to the register (REG) 43.
Image signal (d _i ) for the next one frame
Will be held until the arrival of.

The total accumulation result (Σd _NFi ) held in the register (REG) 43 is transmitted to the multiplication unit 44. The reciprocal number generation unit (CVM) 45 includes a total pixel number setting unit (N
F) The reciprocal number (1 / N _F ) of the total number of pixels (N _F ) for one frame which has been set in F) 47 is generated and transmitted to the multiplication unit 45.

The multiplication unit 45 is a register (REG) 43.
Total accumulation result (Σd_NFi) And the reciprocal generator
Total number of pixels for one frame transmitted from (CVM) 39
(N_F) Reciprocal (1 / N_F) And are multiplied, and the multiplication result (Σ
d_NFi/ N_F) Adjust level (L _i) As addition section 46
Communicate to.

That is, the adjustment level (L _i ) is the average value (Σ) of the image signals (d) for one frame that arrived one frame before.
d _NFi / N _F ). The addition unit 46 is a distribution unit (M
UL) 221 from each individual image signal (d _i ) arriving on a pixel-by-pixel basis, after subtracting the adjustment level (L _i = Σd _NFi / N _F ) transmitted from the multiplication unit 44, the processed individual image signal (d _i ) _dP i) as a synthesis unit (SEL) 222
Communicate to.

As a result, each automatic level adjustment unit (ALC)
The processed individual image signal (d _Pi ) output from No. 4 is distributed around the reference level [= ± “0” level] of the detected gradation (m _D ).

The synthesizing unit (SEL) 222 receives the processed individual image signal (d) transmitted from each automatic level adjusting unit (ALC) 4 as in the embodiment (first) of the present invention (Claim 2). _Pi ) is combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 and is displayed visually.

FIG. 16A shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

As is clear from the above description, the present invention (contract)
According to the embodiment (part 1) of claim 4), image signal processing
The section 200 is a circuit that is transmitted from the A / D conversion section 400.
From the image signal (d) corresponding to the frame, the object recognition unit 1 detects the target
Object (B₁) And (B ₂), And the distribution unit (M
UL) 221 for the background and each object (B₁)and
(B₂) Individual image signal (d₁) To (d₃)
Automatic level adjustment unit (ALC) 4₁Through
Four₃To each automatic level adjustment unit (ALC) 4₁Through
Four₃Respectively correspond to the background and each object (B₁) Oh
And (B₂) Optimal automatic level adjustment process, that is, the detection floor
Key (m_D) Center level [= ± "0" level]
After performing level adjustments with less distributed saturation, each automatic
Level adjuster (ALC) 4₁Through 4₃Individually processed by
Image signal (d_P1) To (d_P3) Is combined and one frame
Processed image signal (d_P) To create multiple objects
The existing image signal (d) for one frame is calculated for each object.
While performing the optimum automatic level adjustment processing, display items at once
Quality processing becomes feasible.

Next, an embodiment (first) of the present invention (claim 5) will be described with reference to FIGS. 17 to 19. FIG. 17
18 is a diagram showing an image signal processing unit according to an embodiment (first) of the present invention (claim 5), FIG. 18 is a diagram illustrating an automatic gain adjustment unit in FIG. 17, and FIG. 19 is an image in FIG. It is a figure which illustrates a signal.

Embodiment (No. 1) of the present invention (Claim 5)
The image signal processing unit 200 according to the present invention is the image signal processing unit 200 according to the embodiment (No. 1) of the present invention (claim 2) [FIG.
Each of the histogram conversion units (HP) 2
Instead of the above, an automatic level adjusting unit (ALC) 4 and an automatic gain adjusting unit (AGC) 5 connected in series are used as the individual image signal processing means 1000 in FIG.

After that, the automatic level adjusting units (A
The LC) 4 and the automatic gain adjustment unit (AGC) 5 are collectively referred to as an automatic level / gain adjustment unit (ALC + AGC) 9. In the image signal processing unit 200 according to the embodiment (first) of the present invention (Claim 5), the same image signal (d) as in the embodiment (first) of the present invention (Claim 2) is A / It is transmitted from the D conversion unit 400.

Also in the image signal processing unit 200, since the object recognizing unit 1 and the distributing unit (MUL) 221 function in the same manner as in the embodiment (first) of the present invention (Claim 2), each automatic level is improved. / Gain adjuster (ALC + AG
C) 9 _i includes an individual image signal with a corresponding object number (N _B ), as in the case of each histogram conversion unit (HP) 2 _{i according} to the embodiment (first) of the present invention (claim 2). (D _i ) are distributed.

Each automatic level adjuster (ALC) 4_iIs a figure
Implementation of the present invention (Claim 4) having the configuration already introduced in 15
In the same process as in the form (No. 1), the distribution unit (MU
L) Individual images arriving from the 221 in pixel units
Signal (d_i), The individual image transmitted one frame before
Signal (d_iAdjustment level (L_i= Σd_NFi/
N_F) Is subtracted from each of the
Gain adjustment unit (AGC) 5 _iCommunicate to.

Each automatic gain adjustment section (AGC) 5 is shown in FIG.
As shown in, the comparison units (CMP) 51 and 52, the registers (REG) 53, 54 and 58, the addition unit 55,
The reciprocal number generation unit (CVM) 56, the multiplication units 57 and 59, and the display gradation setting unit (MV) 5A.

[0151] The display gradation setting unit (MV) 5A, the maximum value of the display gradation (m _V) (M _V) is set in advance. In FIG. 18, the automatic level adjusting unit (ALC) 4 _{i in the} previous stage is shown.
Arriving from adjusting the level _{(L i = Σd NFi / N} F) subtraction already discrete image signal (d _i) [hereinafter individual image signal (d _i
-L _i )] is transmitted to the multiplying unit 59 and also to the comparing units (CMP) 51 and 52 and the registers (REG) 53 and 54.

The comparators (CMP) 51 and 52 have corresponding registers (REG) 53 or 5 respectively.
The accumulated contents of 4 are also transmitted. Comparison unit (CMP) 51
Is the individual image signal (d _i −L _i ) received from the automatic level adjusting unit (ALC) 4 _i and the corresponding register (RE
G) Compared with the stored contents received from 53, if the individual image signal (d _i −L _i ) is larger than the stored contents of the register (REG) 53, the comparison result signal ( cr ₅₁ ) is set to logic “1” and the individual image signal (d) transmitted to the register (REG) 53 is set.
_i −L _i ) is stored in the register (REG) 53,
The individual image signal (d _i −L _i ) is registered in the register (REG) 53.
In the following cases, the comparison result signal (cr ₅₁ ) transmitted to the register (REG) 53 is set to logic “0”, and the individual image signal (d _i −) transmitted to the register (REG) 53 is set. L _i ) is not stored in the register (REG) 53, and the current stored content is held as it is.

Therefore, the automatic level adjusting unit (AL
C) Individual image signal (d _i −) for 4 frames from 4 _i
When L _i ) has arrived, the register (REG)
In 53, the maximum value (hereinafter referred to as the maximum image signal (d _MAX )) in the individual image signals (d _i −L _i ) for one frame received from the automatic level adjusting unit (ALC) 4 _i in the preceding stage is shown. Will be accumulated.

[0154] The comparator unit (CMP) 52, the automatic level controller (ALC) individual image signals received from the 4 _i (d _i
-L _i ) and the stored contents received from the corresponding register (REG) 54 are compared, and the individual image signal (d _i −L _i )
Is smaller than the content stored in the register (REG) 54, the comparison result signal (cr ₅₂ ) transmitted to the register (REG) 54 is set to logic “1”, and the register (REG) 54 is set.
The individual image signal (d _i −L _i ) transmitted to the register 54 is stored in the register (REG) 54, but when the individual image signal (d _i −L _i ) is equal to or more than the stored content of the register (REG) 54. Sets the comparison result signal (cr ₅₂ ) transmitted to the register (REG) 54 to logic “0”, and the individual image signal (d _i −) transmitted to the register (REG) 54.
L _i ) is not stored in the register (REG) 54, and the current stored content is held for the moment.

Therefore, the automatic level adjusting unit (AL
C) Individual image signal (d _i −L _i ) for 4 frames from 4
At the end of arrival, the register (REG) 54 stores in the individual image signal (d _i −L _i ) for one frame received from the automatic level adjusting unit (ALC) 4 _i at the preceding stage,
The minimum value [hereinafter referred to as the minimum image signal (d _MIN )] is accumulated.

Registers (REG) 53 and 54
Transmits the accumulated maximum image signal (d _MAX ) or minimum accumulated image signal (d _MIN ) to the adder 55. The addition unit 55 subtracts the minimum image signal (d _MIN ) transmitted from the register (REG) 54 from the maximum image signal (d _MAX ) transmitted from the register (REG) 53, and the subtraction result (d _MAX −d _MIN ) to the reciprocal number generation unit (CVM) 56.

The reciprocal number generation unit (CVM) 56 includes an addition unit 55.
The subtraction result (d_MAX-D_MIN) Reciprocal (1
/ D_MAX-D_MIN) Is generated and transmitted to the multiplication unit 57.
The multiplication unit 57 has already been set in the display gradation setting unit (MV) 5A.
Display gradation (m_V) Maximum value (M_V) And an inverse number generator (C
The subtraction result (d_MAX-D_MIN)
Reciprocal of (1 / (d_MAX-D_MIN)) And multiply and multiply
Fruit (M_V/ (D _MAX-D_MIN)) Adjust gain (G_i)When
And stores it in the register (REG) 58.

That is, it is stored in the register (REG) 58.
Adjustment gain (G_i) Is a frame that arrived one frame before
Individual image signal (d_i-L_i) Fluctuation range [maximum image
Image signal (d_MAX) To the minimum image signal (d_MIN)]
Gradation (m_V) Maximum value (M _V) To match
Equivalent to.

The multiplication unit 59 is an automatic level adjustment unit (AL
C) Each individual image signal (d _i −L _i ) arriving from 4 _i
And the adjusted gain (G _i ) already stored in the register (REG) 58.
= M _V / (d _MAX −d _MIN ))
Synthesis unit (SEL) 2 as processed individual image signal (d _Pi )
22.

The synthesizing unit (SEL) 222 receives the processed individual image transmitted from each automatic level / gain adjusting unit (ALC + AGC) 9 _i as in the embodiment (first) of the present invention (Claim 2). The signal (d _Pi ) is combined to edit the processed image signal (d _P ) for one frame, and the D / A conversion unit 5
It is transmitted to the image display device 600 via 00 and is displayed visually.

FIG. 19A shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

As is clear from the above description, the present invention (contract)
According to the embodiment (part 1) of claim 5), image signal processing
The section 200 is a circuit that is transmitted from the A / D conversion section 400.
From the image signal (d) corresponding to the frame, the object recognition unit 1 detects the target
Object (B₁) And (B ₂), And the distribution unit (M
UL) 221 for the background and each object (B₁)and
(B₂) Individual image signal (d₁) To (d₃)
Corresponding to the automatic level / gain adjustment unit (ALC +
AGC) 9₁Through 9₃Automatic level adjustment section in front of
(ALC) 4₁Through 4₃To each automatic level adjustment unit
(ALC) 4₁Through 4₃The corresponding backgrounds and sequences
Each object (B₁) And (B₂) Suitable for automatic level adjustment
Adjustment processing, that is, detected gradation (m_D) Reference level [= ±
Level adjustment with little saturation distributed around "0" level]
The result of the adjustment is the corresponding automatic gain adjustment in the subsequent stage.
Alignment unit (AGC) 5₁Through 5₃Is the optimum automatic gain
Adjustment processing, that is, the maximum image signal of the image signal (d)
(D_MAX) And the minimum image signal (d_MIN) Is the display gradation
(M_VWithin the range that does not saturate [M_V≧ m_V] Is enough
The automatic gain adjustment process using
Adjustment unit (ALC + AGC) 9₁Through 9 ₃Processed by
Another image signal (d_P1) To (d_P3) Are combined to form one frame
Minute processed image signal (d_P) To create multiple objects
The image signal (d) for one frame in which
Optimum automatic level adjustment process and automatic gain adjustment process
While executing, it is possible to execute the display quality processing at once.

Next, an embodiment of the present invention (claim 6) will be described.
This will be described with reference to FIGS. 20 and 21. 20 is a diagram showing an image signal processing unit according to the embodiment of the present invention (claim 6), and FIG. 21 is a diagram illustrating the image signal in FIG.

The image signal processing unit 200 according to the embodiment of the present invention (Claim 6) constitutes the image signal processing unit 200 according to the embodiment (No. 1) of the present invention (Claim 2) [see FIG. 2]. Instead of the respective histogram conversion units (HP) 2, the multi-function image signal processing unit 230 shown in FIG.
It is used as the individual image signal processing means 1000 in FIG.

In the image signal processing unit 200, the distribution unit (M) is shared by all the multifunctional image signal processing units (230).
UL) 234 is provided. Each multi-function image signal processing unit 230 has a histogram conversion unit (HP) 2,
Histogram equalization unit (HE) 3, automatic level / gain adjustment unit (ALC + AGC) 9, distribution unit (MUL) 231,
Selector (SEL) 232 and register (REG) 23
It consists of three.

The histogram conversion unit (HP) 2 has already been described with reference to FIG. 6 in the embodiment (first) of the present invention (claim 2), and the histogram equalization unit (HE) 3
11 has already been described with reference to FIG. 11 in the embodiment (first) of the present invention (claim 3), and the automatic level / gain adjusting unit (ALC + AGC) 9 is the embodiment of the present invention (claim 5). 15), FIG. 17, and FIG. 18, and the distribution unit (MUL) 231 transmits the image signal (d) distributed from the distribution unit (MUL) 221 this time to the histogram conversion unit (HP). ) 2, a histogram equalization unit (HE) 3 or an automatic level / gain adjustment unit (ALC + AGC) 9, and a selection unit (SE
L) 232 is a synthesis unit that synthesizes the image signal (d) output from the histogram conversion unit (HP) 2, the histogram equalization unit (HE) 3 or the automatic level / gain adjustment unit (ALC + AGC) 9 that has performed display quality processing. (SEL) 222, and also registers (REG) 233.
Is a distribution unit (MUL) 231 and a selection unit (SEL) 2
It plays a role of accumulating a designation signal (set) for controlling the setting state of 32.

The user of the infrared imaging device 100 can find the objects (B ₁ ) and (B ₂ ) existing in the video screen transmitted from the infrared detector 300 to the image signal processing unit 200 via the A / D conversion unit 400. ) are grasped in advance, and also the object recognition unit 1 background, the object (B ₁₎ and (object numbers for the B ₂₎ (N _B), made to correspond to each of the multi-functional image signal processing unit 230 _i Therefore, it is assumed that the histogram conversion unit (HP) 2 _i , the histogram equalization unit (HE) 3 _i or the automatic level / gain adjustment unit (ALC + AGC) 9 _i that executes the optimum display quality processing is determined.

Based on the above determination, the user can perform image signal processing.
Each multifunction image is displayed in the distribution unit (MUL) 231 of the management unit 200.
Signal processing unit 230_iCorresponds to the object number (N_B), Vs
Performs display quality processing of the background or object (B) to be an elephant
Histogram converter (HP) 2_i, Histogram even
Conversion part (HE) 3_iOr automatic level / gain adjuster (AL
C + AGC) 9_iSpecified signal (set_i) And enter
And the distribution unit (MUL) 231 receives the input object number
(N_B) Multifunctional image signal processing unit 230 corresponding to _iIncluded in
Register (REG) 233_iIs selected and entered
Specified signal (set_i) Is accumulated.

The designation signal (set _i ) accumulated in the register (REG) 233 _i is the same multifunctional image signal processing unit 2
Distributor (MUL) 231 _i and selector (SUL) within 30 _i
EL) 232 _i .

The distribution unit (MUL) 231 _i and the selection unit (SEL) 232 _i respectively correspond to the corresponding registers (R).
EG) 233 _i based on the designated signal (set _i ) transmitted from each of the multifunctional image signal processing units 230 _i , the histogram conversion unit (HP) 2 _i and the histogram equalization unit (H).
E) 3 _i or automatic level / gain adjustment unit (ALC + AG
C) Set to select 9 _i .

In the image signal processing unit 200 according to the embodiment of the present invention (Claim 6), the same image signal (d) as in the embodiment (No. 1) of the present invention (Claim 2) is A / D.
It is transmitted from the conversion unit 400.

Also in the image signal processing unit 200, since the object recognition unit 1 and the distribution unit (MUL) 221 function in the same manner as in the embodiment (part 1) of the present invention (Claim 2), each multi-function. The image signal processing unit 230 _i has an individual object number (N _B ) corresponding to each histogram conversion unit (HP) 2 _i in the embodiment (first) of the present invention (claim 1). The image signal (d _i ) is distributed.

In each of the multi-function image signal processing units 230 _i , the distribution unit (MUL) 231 _i is the distribution unit (MUL) 2
The individual image signal (d _i ) arriving from 21 _{i is} converted into the histogram conversion unit (H) specified by the specification signal (set _i ).
P) 2 _i , the histogram equalization unit (HE) 3 _i or the automatic level / gain adjustment unit (ALC + AGC) 9 _i to perform a predetermined display quality process, and each selection unit (SEL)
232 _i .

Each selection unit (SEL) 232 _i has a histogram conversion unit (H) designated by a designation signal (set _i ).
P) 2 _i , the histogram equalization unit (HE) 3 _i or the automatic level / gain adjustment unit (ALC + AGC) 9 _i and the processed individual image signal (d _Pi ) transmitted to the synthesis unit (SE
L) 222.

The synthesizing unit (SEL) 222 is the same as in the embodiment (first) of the present invention (Claim 2), and the processed individual image signal (d) transmitted from each multifunction image signal processing unit 230 _{i. Pi} ) is combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 and is displayed visually.

FIG. 21A shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In b), the histogram conversion unit (HP) 2 ₁ is designated in the multifunctional image signal processing unit 230 ₁ , and the multifunctional image signal processing unit 230 ₁ is designated.
_{In 2} , the automatic level / gain adjustment unit (ALC + AG
C) 9 ₂ is specified, and in the multifunctional image signal processing unit 230 ₃ , the histogram equalization unit (HE) 3 ₃ is specified, the image signal processing unit 200 to the D / A conversion unit 50
Display gradation (m) of the processed image signal (d _P ) transmitted to 0
_V ) is indicated.

As is clear from the above description, according to the embodiment of the present invention (Claim 6), the image signal processing section 200
Recognizes the target objects (B ₁ ) and (B ₂ ) by the object recognition unit 1 from the image signal (d) for one frame transmitted from the A / D conversion unit 400, and the distribution unit (MUL) 2
21 the background, and each object (B ₁ ) and (B ₂ )
Multifunction image signal processing units 230 _{1 to} 230 ₃ respectively corresponding to the individual image signals (d ₁ ) to (d ₃ ) corresponding to
To each of the multifunctional image signal processing units 230 _{1 to} 230.
₃ designates the corresponding background and the designated signals (set ₁ ) to (set ₃ ) for the respective objects (B ₁ ) and (B ₂ ).
Display quality processing specified by is executed, and the processed individual image signals (d _P1 ) to (d _P3 ) are combined to create a processed image signal (d _P ) for one frame. It is possible to perform the display quality processing at a time while performing the optimum display quality processing for each object for the image signal (d) for one frame in which there is a.

Next, an embodiment (No. 2) of the present invention (claims 2 to 4) will be described with reference to FIGS. 22 to 27. 22 is a diagram showing an image signal processing unit according to an embodiment (part 2) of the present invention (claim 2), FIG. 23 is a diagram illustrating an image signal in FIG. 22, and FIG. 24 is a diagram showing the present invention (claim 2). FIG. 25 is a diagram showing an image signal processing unit according to the embodiment (second) of Item 3), FIG. 25 is a diagram illustrating the image signal in FIG. 24, and FIG. 26 is an embodiment of the present invention (claim 4). It is a figure which shows the image signal processing part by the 2), and FIG. 27 is a figure which illustrates the image signal in FIG.

First, an embodiment (2) of the present invention (claim 2) will be described with reference to FIGS. 22 and 23. The image signal processing unit 200 according to the embodiment (Part 2) of the present invention (Claim 2) constitutes the image signal processing unit 200 according to the embodiment (Part 1) of the present invention (Claim 2) [see FIG. 2]. A register (REG) 242 _i and an adder 243 _i are added to each of the histogram conversion units (HP) 2 _i that are in operation, thereby playing the role of the individual image signal processing unit 1000 in FIG. 1.

Thereafter, a histogram conversion unit (HP) to which a register (REG) 242 _i and an addition unit 243 _i are added
2 _i is referred to as an individual image signal processing unit 1011 _i . Further, in the image signal processing unit 200, a distribution unit (MUL) 241 is provided in common to all individual image signal processing units 1011 _i .

Embodiment (2) of the present invention (claim 2)
The image signal processing unit 200 according to the present invention also includes the present invention (Claim 2).
Image signal (d) similar to that in the embodiment (No. 1)
Is transmitted from the A / D conversion unit 400.

Also in the image signal processing unit 200, since the object recognition unit 1 and the distribution unit (MUL) 221 function in the same manner as in the embodiment (first) of the present invention (Claim 2), each individual image The signal processing unit 1011 _i has the individual image signal (d _i ) with the corresponding object number (N _B ) as in the histogram conversion unit (HP) 2 _{i according} to the embodiment of the present invention (claim 2). ) Is distributed.

The histogram conversion unit (HP) 2 _i in each individual image signal processing unit 1011 _i has the configuration introduced in FIG. 6, and in the same process as in the embodiment of the present invention (claim 2). , The optimal histogram conversion processing is performed on each image signal (d) arriving from the distribution unit (MUL) 221, and then transmitted to the corresponding addition unit 243 _i .

On the other hand, when the user of the infrared video device 100 desires to individually distinguish the display level of the processed individual image signal (d _Pi ) by each histogram conversion unit (HP) 2 _i , The object number (N _Bi ) of the target object (B _i ) and the desired adjustment level (L _i ) are distributed to the distribution unit (M
UL) 241, the distribution unit (MUL) 241
Selects the register (REG) 242 _i in the individual image signal processing unit 1011 _i corresponding to the input object number (N _Bi ) and stores the input adjustment level (L _i ).

[0185] register (REG) 242 _i to the stored adjusted level (L _i) is transmitted to the corresponding adder section 243 _i. Each addition unit 243 _i receives the processed individual image signal (d _Pi ) transmitted from the corresponding histogram conversion unit (HP) 2 _i and the adjustment level (L _i ) transmitted from the corresponding register (REG) 242 _i. And are added, and the addition result is used as a new processed individual image signal (d _Pi ).
L) 222.

The synthesizing unit (SEL) 222 has the processed individual image signal (d _Pi ) transmitted from each adding unit 243 _i , as in the embodiment (first) of the present invention (Claim 2).
Are processed to edit the processed image signal (d _P ) for one frame, and the image display device 600 is processed through the D / A conversion unit 500.
It is transmitted to and displayed visually.

FIG. 23 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In b), the adjustment level (L ₁ ) is added only to the individual image signal (d ₁ ) corresponding to the background to which the object number (N _B = “1”) is added, and the image signal processing unit 200 outputs D / A. The display gradation (m _V ) of the processed image signal (d _P ) transmitted to the conversion unit 500 is shown.

Next, an embodiment (No. 2) of the present invention (claim 3) will be described with reference to FIGS. 24 and 25. The image signal processing unit 200 according to the embodiment (Part 2) of the present invention (Claim 3) constitutes the image signal processing unit 200 according to the embodiment (Part 1) of the present invention (Claim 3) [see FIG. 10]. In each histogram equalizing unit (HE) 3 _i , the adjustment level (L _i ) addition register (REG) 2 is added to the histogram equalizing unit (HE) 3 _{i as} in the embodiment (part 2) of the present invention (claim 2).
42 _i and an addition unit 243 _i are added to play the role of each individual image signal processing unit 1000 in FIG.

After that, a histogram equalizer (H) added with a register (REG) 242 _i and an adder 243 _i.
E) 3 _i is referred to as an individual image signal processing unit 1012 _i .
Further, in the image signal processing unit 200, a distribution unit (MUL) 241 is provided in common to all individual image signal processing units 1012 _i .

As a result, each individual image signal processing unit 1012
Histogram equalization unit in the _i (HE) 3 _i is the present invention in embodiments similar process as in (Part 1) of (claim 3), each individual image signals respectively transmitted from the distribution unit (MUL) 221 In (d _i ), the adjustment level (L _i ) individually input by the user of the infrared imaging device 100 to the processed individual image signal (d _Pi ) that has been subjected to the optimal histogram equalization process is the present invention ( According to the embodiment (2) of claim 2), they are added in the same process as the above, and are transmitted to the synthesizing unit (SEL) 222 as a new processed individual image signal (d _Pi ). The processed image signal (d _P ) for the frame is edited, and the D / A conversion unit 500
The image is transmitted to the image display device 600 via and is displayed visually.

FIG. 25A shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In b), the adjustment level (L ₁ ) is added only to the processed individual image signal (d _P1 ) corresponding to the background to which the object number (N _B = “1”) is added, and the image signal processing unit 200 outputs D The display gradation (m _V ) of the processed image signal (d _P ) transmitted to the / A converter 500 is shown.

Next, an embodiment (second) of the present invention (claim 4) will be described with reference to FIGS. 26 and 27. The image signal processing unit 200 according to the embodiment (second) of the present invention (Claim 4) constitutes the image signal processing unit 200 (see FIG. 14) according to the embodiment (first) of the present invention (Claim 4). In each of the automatic level adjustment units (ALC) 4 _{i, which} are provided, as in the embodiment (part 2) of the present invention (claim 2),
Adjustment level (L _i ) addition register (REG) 242
_i and an adder 243 _i are added to play the role of each individual image signal processing unit 1000 in FIG.

After that, an automatic level adjusting unit (ALC) in which a register (REG) 242 _i and an adding unit 243 _i are added.
4 _i is referred to as an individual image signal processing unit 1013 _i . In the image signal processing unit 200, a distribution unit (MUL) 241 is provided in common to all individual image signal processing units 1013 _i .

As a result, each individual image signal processing unit 1013
automatic level adjuster in _i (ALC) 4 _i is the present invention in embodiments similar process as in (Part 1) of (Claim 4), each individual image signals respectively transmitted from the distribution unit (MUL) 221 In (d _i ), the adjustment level (L _i ) individually input by the user of the infrared imaging device 100 to the processed individual image signal (d _Pi ) that has been subjected to the optimum automatic level adjustment processing is the present invention ( Embodiment (2) of claim 2)
According to the above, they are added in the same process and transmitted as a new processed individual image signal (d _Pi ) to the synthesizing unit (SEL) 222, and the synthesizing unit (SEL) 222 processes one frame of the processed image signal (d _P ). Edited, and transmitted to the image display device 600 via the D / A conversion unit 500 to be visually displayed.

FIG. 27A shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In b), the adjustment level (L ₃ ) is added only to the individual image signal (d ₃ ) corresponding to the object (B ₂ ) to which the object number (N _B = “3”) is added, and the image signal processing unit 200 Display gradation (m _V ) of the processed image signal (d _P ) transmitted from the digital camera to the D / A converter 500
Is shown.

As is clear from the above description, the present invention (contract)
According to the embodiment (part 2) of claim 2 to claim 4),
The image signal processing unit 200 transmits from the A / D conversion unit 400.
Based on the image signal (d) for one frame, the object recognition unit 1
The target object (B₁) And (B₂) Is recognized
However, the distribution unit (MUL) 221 uses the background and each object.
(B₁) And (B₂) Corresponding individual image signal
(D₁) To (d₃) Each corresponding individual image signal
Processing unit 1011₁Through 1011₃, Individual image signal processing unit
1012₁Through 1012₃, Or individual image signal processor
1013₁Through 1013 ₃Each individual image signal processing
Science Department 1011₁Through 1011₃, Individual image signal processing unit 1
012₁Through 1012₃, Or the individual image signal processing unit 1
013₁Through 1013₃But each corresponding background, average
Each object (B₁) And (B₂) Each best table
The processed individual image signal (d_Pi),
The user of the infrared imaging device 100 can select any object number
(N_B) For any adjustment level (L_i) Can be added
And the image signal for one frame where multiple objects exist
In (d), display quality processing can be executed at once, and
Further adjust each object (B) to the display level desired by the user
It will be possible.

Next, an embodiment (No. 2) of the present invention (claim 5) will be described with reference to FIGS. 28 and 29. Figure 2
8 is a diagram showing an image signal processing unit according to an embodiment (second) of the present invention (claim 5), and FIG. 29 is a diagram illustrating the image signal in FIG. 28.

Embodiment (2) of the present invention (claim 5)
The image signal processing unit 200 according to the present invention is the image signal processing unit 200 according to the embodiment (first) of the present invention (claim 5) [FIG.
7]], the automatic level / gain adjustment unit (A
A register (REG) 245 _i for adjusting gain (G _i ) multiplication and a multiplication unit 246 _i are added to the LC + AGC) 9 _{i so} that each individual image signal processing means 1000 in FIG.

After that, an automatic level / gain adjustment unit (A) to which a register (REG) 245 _i and a multiplication unit 246 _i are added.
LC + AGC) 9 _i to the individual image signal processing unit 1024 _i
Called.

In the image signal processing unit 200, a distribution unit (MU) is shared by all the individual image signal processing units 1024 _i.
L) 244 is provided. Also in the image signal processing unit 200 according to the embodiment (second) of the present invention (claim 5), the same image signal (d) as in the embodiment (first) of the present invention (claim 2) is A / It is transmitted from the D conversion unit 400.

Also in the image signal processing unit 200, since the object recognition unit 1 and the distribution unit (MUL) 221 function in the same manner as in the embodiment of the present invention (claim 2), each individual image signal processing unit 1024. _{For i} , as in the case of each histogram conversion unit (HP) 2 _i in the embodiment (first) of the present invention (Claim 2), the individual image signal (d _i ) with the corresponding object number (N _B ) respectively. ) Is distributed.

The automatic level / gain adjusting unit (ALC + AGC) 9 _i in each individual image signal processing unit 1024 _i is the embodiment (No. 1) of the present invention (Claim 5) (see FIGS. 17, 15 and 18). ), And the individual image signals (d _i ) respectively arriving from the distribution unit (MUL) 221 in the same process as in the embodiment (1) of the present invention (Claim 5). , The processed individual image signals (d _Pi ) that have _undergone the optimum automatic level adjustment processing and automatic gain adjustment processing are transmitted to the corresponding multiplication units 246 _i .

On the other hand, the user of the infrared imaging device 100
Automatic level / gain adjustment unit (ALC + AGC) 9_iby
Processed individual image signal (d_Pi) Display gain adjusted individually
Object number (N
_Bi) And the desired adjustment gain (G _i) And distribution unit (MUL)
244, the distribution unit (MUL) 244 inputs
Object number (N_Bi) Individual image signal processing unit corresponding to
1024_iInternal register (REG) 245_iSelect
Input adjustment gain (G_i) Is accumulated.

Register (REG) 245_iAccumulated in
Adjustment gain (G_i) Is the corresponding multiplication unit 246_iTransmitted to
Be done. Each multiplication unit 246_iIs the corresponding automatic level / gain
Adjustment unit (ALC + AGC) 9 _iProcessed individual arriving from
Image signal (d_Pi) And the corresponding register (REG) 24
5_iThe adjustment gain (G_i) And multiply and multiply
The result is a new processed individual image signal (d_Pi) As the synthesis department
(SEL) 222.

The synthesizing unit (SEL) 222 has the processed individual image signal (d _Pi ) transmitted from each individual image signal processing unit 1024, as in the embodiment (first) of the present invention (Claim 2). Image signals for one frame by combining (d)
The image display device 6 via the D / A converter 500.
00 for visual display.

FIG. 29 (a) shows an object from the A / D converter 400.
The image signal (d) for one line transmitted to the body recognition unit 1
Detection gradation (m_D) Is shown, and in Fig. 29 (b), each automatic
Level / gain adjuster (ALC + AGC) 9_iOutput from
Processed individual image signal (d _Pi) Display gradation (m_V)But
29 (c), the object number (N_B= "2")
Object (B₁) Processed individual image signal
Issue (d_P2) Adjustment gain (G₂) And the image signal
Processing transmitted from the processing unit 200 to the D / A conversion unit 500
Done image signal (d_P) Display gradation (m_V) Is indicated.

As is clear from the above description, the present invention (contract)
According to the embodiment (part 2) of claim 5), image signal processing
The section 200 is a circuit that is transmitted from the A / D conversion section 400.
From the image signal (d) corresponding to the frame, the object recognition unit 1 detects the target
Object (B₁) And (B ₂), And the distribution unit (M
UL) 221 for the background and each object (B₁)and
(B₂) Individual image signal (d₁) To (d₃)
The individual image signal processing unit 1024 corresponding to₁Through
1024₃Each individual image signal processing unit 1024₁
Through 1024₃The corresponding background and each object
(B₁) And (B₂Display quality processing for each
Processed individual image signal (d_P1) To (d_P3)
In addition, the user of the infrared imaging device 100 can select any object number
(N_B) Can be multiplied by any adjustment gain (G)
Image signal for one frame in which multiple objects exist
In (d), display quality processing can be executed at once, and
Furthermore, each object (B) can be adjusted to the display gain desired by the user.
It becomes Noh.

Next, the present invention (claims 2 and 3)
Embodiment (No. 3) will be described with reference to FIGS. 30 to 33. 30 is a diagram showing an image signal processing unit according to an embodiment (third) of the present invention (claim 2), FIG. 31 is a diagram illustrating the image signal in FIG. 30, and FIG. FIG. 34 is a diagram showing an image signal processing unit according to the embodiment (part 3) of item 3), and FIG. 33 is a diagram illustrating the image signal in FIG. 32.

First, an embodiment (third) of the present invention (claim 2) will be described with reference to FIGS. 30 and 31. The image signal processing section 200 according to the embodiment (part 3) of the present invention (claim 2) constitutes the image signal processing section 200 according to the embodiment (part 1) of the present invention (claim 2) [see FIG. 2]. To each of the histogram converting units (HP) 2 _i , the registers (REG) 242 _i and 245 _i , and the adding unit 2 respectively.
43 _i and a multiplying unit 246 _i are added to play the role of the individual image signal processing means 1000 in FIG.

Hereinafter, the histogram converter (HP) 2 _i to which the registers (REG) 242 _i and 245 _i , the adder 243 _i and the multiplier 246 _i are added will be referred to as an individual image signal processor 1031 _i .

In the image signal processing unit 200, a distribution unit (MU) is shared by all the individual image signal processing units 1031 _i.
L) 241 and 244 are provided. Image signal processing unit 2 according to an embodiment (third) of the present invention (claim 2)
00, the same image signal (d) as in the embodiment (first) of the present invention (claim 2) is obtained by the A / D converter 400.
Transmitted from.

Also in the image signal processing unit 200, since the object recognition unit 1 and the distribution unit (MUL) 221 function in the same manner as in the embodiment (first) of the present invention (Claim 2), each individual image The signal processing unit 1031 _i has the individual image with the corresponding object number (N _B ) as in the histogram conversion unit (HP) 2 _{i according} to the embodiment (first) of the present invention (claim 2). The signals (d _i ) are distributed respectively.

The histogram conversion section (HP) 2 _i in each individual image signal processing section 1031 _i has the configuration introduced in FIG. 6, and in the embodiment (part 1) of the present invention (claim 2), In the same process, the processed individual image signal (d _Pi ) obtained by executing the optimum histogram conversion process on each individual image signal (d _i ) arriving from the distribution unit (MUL) 221.
Are transmitted to the corresponding adder 243 _i .

On the other hand, when the user of the infrared video device 100 has a desire to individually adjust the display level of the processed individual image signal (d _Pi ) by each histogram conversion section (HP) 2 _i , When a target object number (N _Bi ) and a desired adjustment level (L _i ) are input to the distribution unit (MUL) 241, the distribution unit (MUL) 241 corresponds to the input object number (N _Bi ). Individual image signal processing unit 1031 _i
The register (REG) 242 _i therein is selected, and the input adjustment level (L _i ) is accumulated.

[0215] register (REG) 242 _i to the stored adjusted level (L _i) is transmitted to the corresponding adder section 243 _i. In addition, if the user of the infrared imaging device 100 has a desire to individually adjust the display gain of the processed individual image signal (d _Pi ) by each histogram conversion unit (HP) 2 _i, this is targeted. When the object number (N _Bi ) and the desired adjustment gain (G _i ) are input to the distribution unit (MUL) 244, the distribution unit (MUL) 244 causes the individual image corresponding to the input object number (N _Bi ). select register (REG) 245 _i of the signal processing unit 1031 _i, stores the inputted adjusted gain (G _i). Register (REG) 245 _i
The adjusted gain (G _i ) stored in the
6 _i .

Each adder 243 _i applies the processed individual image signal (d _Pi ) transmitted from the corresponding histogram converter (HP) 2 _i to the adjustment level (transmitted from the corresponding register (REG) 242 _i ( L _i ), and the addition result is used as a new processed individual image signal (d _Pi ).
communicate to _i .

Each multiplication unit 246 _i has a corresponding addition unit 24.
The processed individual image signal (d _Pi ) transmitted from 3 _i is multiplied by the adjustment gain (G _i ) transmitted from the corresponding register (REG) 245 _i , and the multiplication result is a new processed individual image signal ( It is transmitted to the combining unit (SEL) 222 as d _Pi ).

The synthesizing unit (SEL) 222 has the processed individual image signal (d _Pi ) transmitted from each individual image signal processing unit 1031 as in the embodiment (first) of the present invention (Claim 2). Image signals for one frame by combining (d)
The image display device 6 via the D / A converter 500.
00 for visual display.

FIG. 31 (a) shows an object from the A / D converter 400.
The image signal (d) for one line transmitted to the body recognition unit 1
Detection gradation (m_D) Is shown, and the object number is shown in Fig. 31 (b).
Issue (N_B= "1") processed corresponding to the background
Individual image signal (d_P1) To the adjustment level (L₁) Is added,
And the object number (N_B= "3")
(B ₂Processed individual image signal (d_P3) Adjusted
Gain (G₃) Multiplied by a new processed individual image signal (d
_Pi), And the D / A conversion from the image signal processing unit 200 is performed.
The processed image signal (d_P)Display of
Gradation (m_V) Is indicated.

Next, an embodiment (third) of the present invention (claim 3) will be described with reference to FIGS. 32 and 33. An image signal processing unit 200 according to an embodiment (third) of the present invention (Claim 3) constitutes an image signal processing unit 200 (see FIG. 10) according to an embodiment (No. 1) of the present invention (Claim 3). Each histogram equalizing unit (HE) 3 _i is provided with a register (REG) 2 for adjusting level (L _i ) addition, as in the embodiment (third) of the present invention (claim 2).
42 _i and an adder 243 _i , a register (REG) 245 _i for adjusting gain (G _i ) multiplication, and a multiplier 246 _i.
, And each individual image signal processing means 10 in FIG.
It plays the role of 00.

Hereinafter, the histogram equalizing unit (HE) 3 _i to which the registers (REG) 242 _i and 245 _i , the adding unit 243 _i and the multiplying unit 246 _i are added is referred to as an individual image signal processing unit 1032 _i .

In the image signal processing unit 200, a distribution unit (MU) is shared by all the individual image signal processing units 1032 _i.
L) 241 and 244 are provided. as a result,
The histogram equalization unit (HE) 3 _{i in} each individual image signal processing unit 1032 _i performs a distribution unit (MUL) in the same process as in the embodiment (first) of the present invention (Claim 3).
Each individual image signal (d _i ) transmitted from 221
In addition, the adjustment level (L _i ) individually input by the user of the infrared imaging device 100 to the processed individual image signal (d _Pi ) that has been subjected to the optimum histogram equalization processing is the present invention (claim 2). According to the third embodiment, the adjustment gains (G _i ) individually input by the user of the infrared imaging device 100 after being added in the same process as in the third embodiment of the present invention (claim 2). According to No. 3), multiplication is performed in the same process, and it is transmitted to the synthesizing unit (SEL) 222 as a new processed individual image signal (d _Pi ), and the synthesizing unit (SEL) 222.
Is processed into a processed image signal (d _P ) for one frame, transmitted to the image display device 600 via the D / A conversion unit 500, and displayed visually.

FIG. 33 (a) shows an object from the A / D converter 400.
The image signal (d) for one line transmitted to the body recognition unit 1
Detection gradation (m_D) Is shown, and the object number is shown in FIG.
Issue (N_B= "1") processed corresponding to the background
Individual image signal (d_P1) To the adjustment level (L₁) Is added,
And the object number (N_B= "3")
(B ₂Processed individual image signal (d_P3) Adjusted
Gain (G₃) Multiplied by a new processed individual image signal (d
_Pi), And the D / A conversion from the image signal processing unit 200 is performed.
The processed image signal (d_P)Display of
Gradation (m_V) Is indicated.

As is clear from the above description, the present invention (contract)
According to the embodiment (third) of claim 2 and claim 3)
For example, the image signal processing unit 200 is the same as the A / D conversion unit 400.
Object recognition from the transmitted image signal (d) for one frame
The target object (B ₁) And (B₂)
Knowledge and background by the distribution unit (MUL) 221 as well as each object
Body (B₁) And (B₂) Individual image signal (d
₁) To (d₃) Individual image signal processing
Part 1031₁Through 1031₃Or individual image signal processor
1032₁Through 1032₃Each individual image signal processing
Science Department 1031₁Through 1031₃Or individual image signal processing
Part 1032₁Through 1032₃Are the corresponding backgrounds,
And each object (B₁) And (B₂) For each
The processed individual image signal (d_P1) No
To (d_P3), The user of the infrared imaging device 100
Object number (N_B) Corresponding to any adjustment level (L_i)
Is added, and an arbitrary object number (N_B) Corresponding to any
Adjustment gain (G_i) Can be multiplied and multiple objects exist
Display quality of the existing image signal (d) for one frame at a time
Process can be executed and each object (B) is used
The display level and display gain desired by the user.
It

Next, an embodiment (first to fourth) of the present invention (claim 7) will be described with reference to FIGS. 34 to 41. FIG. 34 shows an embodiment (No. 1) of the present invention (claim 7).
FIG. 35 is a diagram showing an image signal processing unit according to FIG.
FIG. 36 is a diagram illustrating an image signal in FIG. 36, FIG. 36 is a diagram illustrating an image signal processing unit according to an embodiment (part 2) of the present invention (claim 7), and FIG. 37 is a diagram illustrating the image signal in FIG. 36. 38 is a diagram showing an image signal processing unit according to an embodiment (part 3) of the present invention (claim 7),
FIG. 39 is a diagram illustrating the image signal in FIG. 38,
40 is a diagram showing an image signal processing unit according to the embodiment (fourth) of the present invention (claim 7), and FIG. 41 is a diagram illustrating the image signal in FIG.

First, an embodiment (first) of the present invention (claim 7) will be described with reference to FIGS. 34 and 35. The image signal processing unit 200 according to the embodiment (first) of the present invention (Claim 7) constitutes the image signal processing unit 200 (see FIG. 2) according to the embodiment (first) of the present invention (Claim 2). Each histogram conversion unit (HP) 2 _i is provided with an average value calculation unit (MN) 251 _i and a coefficient multiplication unit (CFC).
252 _i and an addition unit 253 _i are added to play the role of the individual image signal processing means 1000 in FIG. 1.

Hereinafter, the histogram conversion unit (HP) 2 _i to which the average value calculation unit (MN) 251 _i , the coefficient multiplication unit (CFC) 252 _i and the addition unit 253 _i are added is referred to as an individual image signal processing unit 1041 _i. .

Embodiment (No. 1) of the present invention (Claim 7)
The image signal processing unit 200 according to the present invention also includes the present invention (Claim 2).
Image signal (d) similar to that in the embodiment (No. 1)
Is transmitted from the A / D conversion unit 400.

Also in the image signal processing unit 200, since the object recognition unit 1 and the distribution unit (MUL) 221 function in the same manner as in the embodiment (first) of the present invention (Claim 2), each individual image In the signal processing unit 1041 _i , as in the case of each histogram conversion unit (HP) 2 _i in the embodiment (first) of the present invention (claim 2), an individual image with a corresponding object number (N _B ) The signal (d _i ) is distributed.

The histogram conversion section (HP) 2 _i in each individual image signal processing section 1041 _i has the configuration introduced in FIG. 6, and in the embodiment (part 1) of the present invention (claim 2), In the same process, each individual image signal (d _i ) transmitted from the distribution unit (MUL) 221 is processed individual image signal (d _Pi ) obtained by performing the optimum histogram conversion process.
Is transmitted to the corresponding addition unit 253 _i .

The individual image signal processing unit 1041_iUchihira
Average value calculation unit (MN) 251_iIs a distribution unit (MUL) 22
One frame of individual image signal transmitted from each 1
(D _i) Average value (mn_Fi), The coefficient multiplication unit (CF
C) 252_iCommunicate to.

The coefficient multiplication unit (CFC) 252 _i receives the average value (m) transmitted from the average value calculation unit (MN) 251 _i.
n _Fi ) is multiplied by a predetermined coefficient (x), and the multiplication result (mn _Fi
Xx) is transmitted to the adder 253 _i .

Each addition unit 253 _i has the processed individual image signal (d _Pi ) transmitted from the histogram conversion unit (HP) 2 _i and the multiplication result (mn _Fi ×) transmitted from the coefficient multiplication unit (CFC) 252. x) and the addition result as a new processed individual image signal (d _Pi ) to the combining unit (SEL)
To 222.

The synthesizing unit (SEL) 222 has the processed individual image signals (d _Pi transmitted from each individual image signal processing unit 1041 _i , similarly to the embodiment (first) of the present invention (Claim 2). ) Are combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 to be visually displayed.

FIG. 35 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

Next, an embodiment (2) of the present invention (claim 7) will be described with reference to FIGS. 36 and 37. An image signal processing unit 200 according to an embodiment (second) of the present invention (Claim 7) constitutes an image signal processing unit 200 according to an embodiment (first) 0 of the present invention (Claim 3) [see FIG. 10]. As in the embodiment (first) of the present invention (Claim 7), each of the histogram equalization units (HE) 3 _i performing the calculation is average value calculation unit (MN) 251 _i and coefficient multiplication unit (CFC). ) 252 _i and adder 253 _i are added,
Each individual image signal processing means 1000 in FIG. 1 plays a role.

Thereafter, the histogram equalization unit (HE) 3 _i to which the average value calculation unit (MN) 251 _i , the coefficient multiplication unit (CFC) 252 _i and the addition unit 253 _i are added is referred to as an individual image signal processing unit 1042 _i . To call.

As a result, each individual image signal processing unit 1042
_{In i} , the histogram equalization unit (HE) 3 _i transmits each individual image signal from the distribution unit (MUL) 221 in the same process as in the embodiment (first) of the present invention (Claim 3). At (d _i ), the optimum histogram equalization process is executed to output the processed individual image signal (d _Pi ), and the average value calculation unit (MN) 251 _i and the coefficient multiplication unit (CFC) 252 _i According to the embodiment (first) of the present invention (claim 7), the multiplication result (mn _Fi ×
x) is calculated, and the adding unit 253 _i adds the processed individual image signal (d _Pi ) and the multiplication result (mn _Fi × x) to form a new processed individual image signal (d _Pi ) in the combining unit (d _Pi ). SEL)
Transmitted to 222, the synthesis unit (SEL) 222 is processed individual image signal (d _Pi) of one frame of the processed image signal output from each individual image signal processing unit 1042 _i (d _P)
To the image display device 6 via the D / A converter 500.
00 for visual display.

FIG. 37 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

Next, an embodiment of the present invention (Claim 7) will be described.
No. 3) will be described with reference to FIGS. 38 and 39. Starting
Image signal processing according to the embodiment (third) of Ming (Claim 7)
The management unit 200 is an embodiment of the present invention (Claim 4).
The image signal processing unit 200 according to 1) (see FIG. 14) is configured.
Each automatic level adjustment unit (ALC) 4_iThe present invention
As in the embodiment (1) of (claim 7),
Average value calculation unit (MN) 251 _i, Coefficient multiplier
(CFC) 252_iAnd adder 253_iAnd add
1 plays the role of each individual image signal processing means 1000.
I am making it happen.

Thereafter, the automatic level adjusting unit (ALC) 4 _i to which the average value calculating unit (MN) 251 _i , the coefficient multiplying unit (CFC) 252 _i and the adding unit 253 _i are added is referred to as an individual image signal processing unit 1043 _i . To call.

As a result, each individual image signal processing unit 1043
_{In i} , the automatic level adjusting unit (ALC) 4 _i transmits each individual image signal transmitted from the distributing unit (MUL) 221 in the same process as in the embodiment (first) of the present invention (Claim 4). At (d _i ), the optimum automatic level adjustment process is executed and the processed individual image signal (d _Pi ) is output, and the average value calculation unit (MN) 251 _i and the coefficient multiplication unit (C
FC) 252 _i calculates the multiplication result (mn _Fi × x) in the same process as in the embodiment (first) of the present invention (Claim 7), and the adding unit 253 further processes the processed individual image signal (d). _Pi ) and the multiplication result (mn _Fi × x) are added to each other to generate a new processed individual image signal (d _Pi ) in the combining unit (SEL) 2
Then, the synthesizing unit (SEL) 222 edits the processed individual image signal (d _Pi ) output from each individual image signal processing unit 1043 _i into a processed image signal (d _P ) for one frame. , The image display device 60 via the D / A conversion unit 500.
It is transmitted to 0 and displayed visually.

FIG. 39 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

Next, an embodiment (No. 4) of the present invention (claim 7) will be described with reference to FIGS. 40 and 41. The image signal processing unit 200 according to the embodiment (fourth) of the present invention (Claim 7) is an automatic signal forming the image signal processing unit 200 (see FIG. 17) according to the embodiment of the present invention (Claim 5). The level / gain adjustment unit (ALC + AGC) 9 _i is provided with an average value calculation unit (MN) 251 _i and a coefficient multiplication unit (CF) as in the embodiment (first) of the present invention (Claim 7).
C) 252 _i and adder 253 _i are added to play the role of each individual image signal processing means 1000 in FIG.

Thereafter, an automatic level / gain adjustment unit (ALC + AGC) 9 _{i to which} an average value calculation unit (MN) 251 _i , a coefficient multiplication unit (CFC) 252 _i and an addition unit 253 _i are added.
Will be referred to as an individual image signal processing unit 1044 _i .

As a result, each individual image signal processing unit 1044
_i , automatic level / gain adjustment unit (ALC + AG
C) 9 _i is an embodiment (first) of the present invention (claim 5)
In the same process as in the above, the individual image signals (d _i ) respectively transmitted from the distribution unit (MUL) 221 are subjected to optimum automatic level adjustment processing and automatic gain adjustment processing, and processed individual image signals (d _Pi ) Is output, and an average value calculation unit (MN) 251 _i and a coefficient multiplication unit (CFC) 252 _i are output.
However, the multiplication result (mn _Fi × x) is calculated in the same process as in the embodiment (part 1) of the present invention (claim 7), and the addition unit 253 _i further outputs the processed individual image signal (d _Pi ). The multiplication result (mn _Fi × x) is added and transmitted as a new processed individual image signal (d _Pi ) to the combining unit (SEL) 222, and the combining unit (SEL) 222 causes each individual image signal processing unit 1044.
_The processed individual image signal (d _Pi ) output from _i is edited into a processed image signal (d _P ) for one frame, and the processed image signal is transmitted to the image display device 600 via the D / A conversion unit 500 for visual display. Let

FIG. 41 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

As is clear from the above description, according to the embodiment (No. 1 to No. 4) of the present invention (Claim 7), the image signal processing unit 200 is transmitted from the A / D conversion unit 400. The object recognition unit 1 recognizes the target objects (B ₁ ) and (B ₂ ) from the image signal (d) for the frame,
By the distribution unit (MUL) 221, the background and each object (B
₁ ) and the individual image signal processing unit 10 corresponding to the individual image signals (d ₁ ) to (d ₃ ) corresponding to (B ₂ ), respectively.
41 _{1 to} 1041 ₃ , individual image signal processing unit 1042 ₁
Through 1042 ₃ , individual image signal processing units 1043 ₁ through 1
043 ₃ or individual image signal processing units 1044 _{1 to} 10
44 ₃ to distribute, each individual image signal processing unit 1041 ₁ to 1041 _3, individual image signal processing unit 1042 ₁ to 104
2 ₃ , the individual image signal processing units 1043 _{1 to} 1043 ₃ or the individual image signal processing units 1044 _{1 to} 1044 ₃ respectively optimize the histogram conversion processing result, the histogram equalization processing result, the automatic level adjustment processing result, or the automatic level adjustment processing. By adding the multiplication result (mn _F × x) associated with the average value (mn _F ) to the automatic gain adjustment processing result [processed individual image signal (d _Pi )], a plurality of objects can be detected. Display quality processing can be executed at a time for image signals (d) for frames, and
Furthermore, it becomes possible to reproduce the background and the relative relationship of the processed individual image signals (d _Pi ) for each of the objects (B ₁ ) and (B ₂ ).

Next, an embodiment (No. 5 to No. 7) of the present invention (claim 7) will be described with reference to FIGS. 42 to 47. FIG. 42 shows an embodiment (No. 5) of the present invention (Claim 7).
FIG. 43 is a diagram showing an image signal processing unit according to FIG.
FIG. 44 is a diagram illustrating an image signal in FIG. 44, FIG. 44 is a diagram illustrating an image signal processing unit according to an embodiment (sixth) of the present invention (claim 7), and FIG. 45 is a diagram illustrating the image signal in FIG. 44. 46 is a diagram showing an image signal processing unit according to an embodiment (seventh) of the present invention (claim 7),
FIG. 47 is a diagram illustrating the image signal in FIG. 46.

First, an embodiment (No. 5) of the present invention (claim 7) will be described with reference to FIGS. 42 and 43. The image signal processing unit 200 according to the embodiment (Part 5) of the present invention (Claim 7) constitutes the image signal processing unit 200 according to the embodiment (Part 3) of the present invention (Claim 7) [see FIG. 38]. The histogram conversion unit (HP) 2 is further added to the synthesizing unit (SEL) 222 that is installed, and the synthesizing unit 90 in FIG.
It plays the role of 0.

Embodiment (No. 5) of the present invention (Claim 7)
The image signal processing unit 200 according to the present invention also includes the present invention (Claim 2).
Image signal (d) similar to that in the embodiment (No. 1)
Is transmitted from the A / D conversion unit 400.

Also in the image signal processing section 200, each individual image signal processing section 1043 _i has the same configuration as that of each individual image signal processing section 1043 _i in the embodiment (part 3) of the present invention (claim 7). , The individual image signals (d _i ) with their corresponding object numbers (N _B ) are distributed.

In each individual image signal processing unit 1043 _i , the automatic level adjusting unit (ALC) 4 _i and the distributing unit (MUL) 221 are the same as in the embodiment (third) of the present invention (Claim 7). Individual image signal (d _i ) transmitted from
Then, the optimum automatic level adjustment processing is executed to output the processed individual image signal (d _Pi ) and the average value calculation unit (MN) 2
51 _i and a coefficient multiplication unit (CFC) 252 _i multiply an average value (mn _Fi ) obtained from the image signal (d) for one frame transmitted from the distribution unit (MUL) 221 by a predetermined coefficient (x). To calculate a multiplication result (mn _Fi × x), and the addition unit 253 _i adds the processed individual image signal (d _Pi ) and the multiplication result (mn _Fi × x) to obtain a new processed individual image signal. It is transmitted to the combining unit (SEL) 222 as (d _Pi ).

The synthesizing unit (SEL) 222 is the same as in the embodiment (first) of the present invention (Claim 2), and the processed individual image signal (d _Pi) transmitted from each individual image signal processing unit 1043 _i. ) Are combined to edit the processed image signal (d _P ) for one frame, and the edited image signal (d _P ) is transmitted to the histogram conversion unit (HP) 2.

The histogram conversion section (HP) 2 has the same configuration as shown in FIG. 6, and in the same process as in the embodiment (No. 1) of the present invention (claim 2), the synthesis section (S).
After the optimum histogram conversion process is performed on the processed image signal (d _P ) for one frame transmitted from the EL) 222, D is output as a new processed image signal (d _P ).
It is transmitted to the image display device 600 via the / A conversion unit 500 and is displayed visually.

FIG. 43 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the synthesis unit (SEL) 222 to the histogram conversion unit (HP) 2.
43 (c), the histogram conversion unit (H
The display gradation (m _V ) of the new processed image signal (d _P ) transmitted from P) 2 to the D / A converter 500 is shown.

Next, an embodiment (sixth) of the present invention (claim 7) will be described with reference to FIGS. 44 and 45. The image signal processing unit 200 according to the embodiment (sixth) of the present invention (claim 7) is the embodiment (third) of the present invention (claim 7).
As in the embodiment (No. 5) of the present invention (claim 7), the histogram equalization unit (HE) is added to the synthesizing unit (SEL) 222 constituting the image signal processing unit 200 (see FIG. 38). ) 3 is added to play the role of the synthesizing means 900 in FIG.

Therefore, also in the image signal processing unit 200 according to the embodiment (sixth) of the present invention (Claim 7), the object recognizing unit 1, the distributing unit (MUL) 221, each individual image signal processing unit 1043 and the combining unit. The (SEL) 222 performs the same function as in the embodiment (No. 5) of the present invention (Claim 7), and as a result, the synthesizing unit (SEL) 222 implements the present invention (Claim 7). Similar to the form (No. 5), the combined one frame of the processed image signal (d _P ) is transmitted to the histogram equalization unit (HE) 3.

The histogram equalizing unit (HE) 3 is shown in FIG.
The present invention has the same structure as that shown in FIG.
In the same process as in the first embodiment (No. 1), the optimum histogram equalization process is executed on the processed image signal (d _P ) for one frame transmitted from the synthesizing unit (SEL) 222. After that, it is transmitted as a new processed image signal (d _P ) to the image display device 600 via the D / A conversion unit 500 to be displayed visually.

FIG. 45A shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In b), the synthesis unit (SEL) 222 to the histogram equalization unit (HE) 3
The display gradation (m _V ) of the processed image signal (d _P ) transmitted to the D / A conversion unit 500 is further transmitted from the histogram equalization unit (HE) 3 to the D / A conversion unit 500 in FIG. 45 (c). The new display gradation (m _V ) of the processed image signal (d _P ) is shown.

Next, an embodiment (seventh) of the present invention (claim 7) will be described with reference to FIGS. 46 and 47. An image signal processing unit 200 according to an embodiment (seventh) of the present invention (claim 7) is an embodiment (third) of the present invention (claim 7).
In the synthesizing unit (SEL) 222 constituting the image signal processing unit 200 (see FIG. 38) according to the present invention, the automatic gain adjusting unit (AGC) is further provided as in the embodiment (No. 5) of the present invention (Claim 7). ) 5 is added to the synthesizing means 90 in FIG.
It plays the role of 0.

Therefore, also in the image signal processing section 200 according to the embodiment (seventh) of the present invention (Claim 7), the object recognizing section 1, the distributing section (MUL) 221, each individual image signal processing section 1043 and the combining section. The (SEL) 222 performs the same function as in the embodiment (No. 5) of the present invention (Claim 7), and as a result, the synthesizing unit (SEL) 222 implements the present invention (Claim 7). The processed one-frame processed image signal (d _P ) similar to that in the form (No. 5) is transmitted to the automatic gain adjustment unit (AGC) 5.

The automatic gain adjusting section (AGC) 5 has the same configuration as that shown in FIG. 18, and in the same process as in the embodiment (No. 1) of the present invention (claim 5), the combining section (AGC) 5 S
After the optimum automatic gain adjustment process is performed on the processed image signal (d _P ) for one frame transmitted from the EL) 222, D / A is output as a new processed image signal (d _P ).
It is transmitted to the image display device 600 via the conversion unit 500 and is displayed visually.

FIG. 47 (a) shows an object from the A / D converter 400.
The image signal (d) for one line transmitted to the body recognition unit 1
Detection gradation (m_D) Is shown, and in FIG.
Transmission from (SEL) 222 to automatic gain adjustment unit (AGC) 5
The processed image signal reached (d _P) Display gradation (m_V)But
As shown in FIG. 47 (c), the automatic gain adjustment unit (AGC) is shown.
New processed image transmitted from D5 to D / A converter 500
Image signal (d_P) Display gradation (m_V) Is indicated.

As is apparent from the above description, in the above-described embodiment (third) of the present invention (claim 7), each individual image signal processing section 1043 has a background, an object (B
After performing the automatic level adjustment processing on the individual image signals (d _i ) for each of ₁ ) and (B ₂ ), the average values (mn _F )
The sum of the multiplication results (mn _F × x) related to
Because you are combined by the combining unit (SEL) 222, but preventing乍Ra full use and display quality processing saturation of display gradation (m _V) was not necessarily been performed, the present invention (Claim 7) According to the embodiment (No. 5 to No. 7), the histogram conversion unit (HP) is added to the synthesis unit (SEL) 222.
2. Since any one of the histogram equalization unit (HE) 3 and the automatic gain adjustment unit (AGC) 5 is added, the synthesis unit (S
The EL) 222 combined image signal by (d), will be display quality processing in consideration of preventing乍Ra utilizing saturation of display gradation (m _V) is performed, the present invention (Claim 7) A feature in the embodiment (third), that is, the image quality signal (d) for one frame in which a plurality of objects exist can be displayed at a time, and the background, each object (B ₁ ) and (B ₂ ) can be processed. while maintaining feature to be reproduced relative relationship between the image signal (d) for each, to prevent saturation of the display gradation of the processed image signal in the image display device _{600 (d P) (m V} )乍Ra sufficient It is possible to make full use of it.

Next, an embodiment (first to fourth) of the present invention (claim 8) will be described with reference to FIGS. 48 to 55. FIG. 48 shows an embodiment (first) of the present invention (claim 8).
FIG. 49 is a diagram showing an image signal processing unit according to FIG.
50 is a diagram illustrating an image signal in FIG. 50, FIG. 50 is a diagram illustrating an image signal processing unit according to an embodiment (part 2) of the present invention (claim 8), and FIG. 51 is a diagram illustrating the image signal in FIG. 50. 52 is a diagram showing an image signal processing unit according to an embodiment (third) of the present invention (claim 8),
FIG. 53 is a diagram illustrating the image signal in FIG. 52,
54 is a diagram showing an image signal processing unit according to the embodiment (fourth) of the present invention (claim 8), and FIG. 55 is a diagram illustrating the image signal in FIG. 54.

First, an embodiment (first) of the present invention (claim 8) will be described with reference to FIGS. 48 and 49. The image signal processing unit 200 according to the embodiment (first) of the present invention (Claim 8) constitutes the image signal processing unit 200 according to the embodiment (first) of the present invention (Claim 2) [see FIG. 2]. An average value calculation unit (MN) 251 _i and an addition unit 253 _i are individually added to each histogram conversion unit (HP) 2 _i , and each histogram conversion unit (HP)
Common to 2 _i , mean value order adjustment level generator (MNO)
254 is added, and the individual image signal processing means 1 in FIG.
000 roles are played.

After that, the histogram conversion unit (HP) 2 _{i to which} the average value calculation unit (MN) 251 _i and the addition unit 253 _i are individually added and the average value order adjustment level generation unit (MNO) 254 is commonly added is added. Will be referred to as an individual image signal processing unit 1051 _i .

Embodiment (No. 1) of the present invention (claim 8)
The image signal processing unit 200 according to the present invention also includes the present invention (Claim 2).
Image signal (d) similar to that in the embodiment (No. 1)
Is transmitted from the A / D conversion unit 400.

Also in the image signal processing unit 200, since the object recognition unit 1 and the distribution unit (MUL) 221 function in the same manner as in the embodiment (first) of the present invention (Claim 2), each individual image The signal processing unit 1051 _i includes the individual images with the corresponding object numbers (N _B ) as in the histogram conversion unit (HP) 2 _i in the embodiment (first) of the present invention (claim 2). The signal (d _i ) is distributed.

Each individual image signal processing section 1051_iAt
Is a histogram conversion unit (HP) 2 _iBut introduced in Figure 6
And an embodiment of the present invention (claim 2) (that
In the same process as in 1), the distribution unit (MUL) 221
From the individual image signals (d_i)
A processed individual image signal that has undergone appropriate histogram conversion processing.
Issue (d_Pi) Is added to the corresponding addition unit 253._iCommunicate to.

The average value calculation unit (MN) 251 _i obtains the average value (mn _Fi ) of the individual image signals (d _i ) for one frame transmitted from the distribution unit (MUL) 221 and calculates each individual image. The average value order adjustment level generating unit (MNO) 254 provided in common to the signal processing unit 1051 _i is transmitted.

Mean value order adjustment level generator (MNO) 2
Reference numeral 54 is the same number (i = K) as the individual image signal processing unit 1051 _i set to an arithmetic series having a predetermined value [positive or negative value] as an initial value and a constant difference number [positive value]. Holding additional data (ad _i ) [additional data (ad ₁ = initial value) <additional data (ad ₂ ) <additional data (ad ₃ ) <... <additional data (ad _K )] Number (N
_B = “1” to “3”) corresponding average value calculation unit (MN) 2 of each individual image signal processing unit 1051 _{1 to} 1051 <sub>3
51. 1</sub> to be transmitted 251 ₃ each mean value from the (mn _F1) to (mn _F3), the average value (mn _F1) to (m
n _F3 ) is compared, and the average value (mn _F1 ) <average value (m
When it is found that n _F2 ) <average value (mn _F3 ), the minimum additional data (ad ₁ ) is transmitted to the addition unit 253 ₁ in the individual image signal processing unit 1051 ₁ that has transmitted the minimum average value (mn _F1 ). Then, the next largest additional data (ad ₂ ) is transmitted to the adding unit 253 ₂ in the individual image signal processing unit 1051 ₂ that has transmitted the next largest average value (mn _F2 ), and the next largest average value (mn _F3 ) is transmitted. ) to the adder 253 ₃ of the individual image signal processor 1051 ₃ that communicated, then large additional data (ad ₃₎
To convey.

Each addition unit 253 _i has a processed individual image signal (d _Pi ) transmitted from the corresponding histogram conversion unit (HP) 2 _i and an average value order adjustment level generation unit (MNO).
The additional data (ad _i ) transmitted from 254 are added, and the addition result is transmitted to the combining unit (SEL) 222 as a new processed individual image signal (d _Pi ).

As in the embodiment (first) of the present invention (Claim 2), the synthesizing unit (SEL) 222 processes the processed individual image signals (d _Pi) transmitted from the individual image signal processing units 1051 _i. ) Are combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 to be visually displayed.

FIG. 49 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

Next, an embodiment (2) of the present invention (claim 8) will be described with reference to FIGS. 50 and 51. An image signal processing unit 200 according to an embodiment (No. 2) of the present invention (Claim 8) is an embodiment (No. 1) of the present invention (Claim 3).
In each histogram equalization unit (HE) 3 _i forming the image signal processing unit 200 (see FIG. 10) according to the above, as in the embodiment (part 1) of the present invention (claim 8),
Average value calculation unit (MN) 251 _i and addition unit 2
53 _i is added individually, and a mean value order adjustment level generation unit (MNO) 254 is added in common to each histogram equalization unit (HE) 3 _i , and the role of each individual image signal processing unit 1000 in FIG. Is fulfilled.

Thereafter, the histogram equalization unit (HE) 3 in which the average value calculation unit (MN) 251 _i and the addition unit 253 _i are individually added, and the average value order adjustment level generation unit (MNO) 254 is also added in common. _i is referred to as an individual image signal processing unit 1052 _i .

In each individual image signal processing section 1052 _i , the histogram equalization section (HE) 3 _i has the configuration introduced in FIG. 11, and the embodiment (part 1) of the present invention (claim 3). In the same process as in, the distribution unit (MUL) 22
For each individual image signal (d _i ) transmitted from 1 respectively,
The processed individual image signal (d _Pi ) that has been subjected to the optimum histogram equalization processing is transmitted to the corresponding adder 253 _i .

The average value calculation unit (MN) 251 _i functions in the same manner as in the embodiment (first) of the present invention (Claim 8) and corresponds to one frame transmitted from the distribution unit (MUL) 221. Average value (mn _Fi ) of the image signal (d) of
Is calculated and transmitted to the mean value order adjustment level generation unit (MNO) 254 provided in common to each individual image signal processing unit 1052 _i .

The mean value order adjustment level generator (MN
O) 254 functions in the same manner as in the embodiment (first) of the present invention (claim 8), and each individual image signal processing unit 1
052 average calculator of ₁ to 1052 ₃ (MN) 251
The magnitudes of the mean values (mn _F1 ) to (mn _F3 ) transmitted from _{1 to} 251 ₃ are compared, and the magnitude values are compared in order of magnitude [mean value (m
n _F1 ) <average value (mn _F2 ) <average value (mn _F3 )] corresponding additional data (ad ₁ ) <additional data (ad ₂ ) <additional data (ad ₃ ) to each individual image signal processing unit 1052.
_It is transmitted to the adders 253 _{1 to} 253 ₃ of _{1 to} 1052 ₃ .

Each addition unit 253 _i includes the processed individual image signal (d _Pi ) transmitted from the corresponding histogram equalization unit (HE) 3 _i and the average value order adjustment level generation unit (MN).
O) 254 from the additional data (a
d _i ), and the addition result is transmitted to the combining unit (SEL) 222 as a new processed individual image signal (d _Pi ).

The synthesizing unit (SEL) 222 has the processed individual image signals (d _Pi transmitted from each individual image signal processing unit 1052 _i , similarly to the embodiment (first) of the present invention (Claim 2). ) Are combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 to be visually displayed.

FIG. 51 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

Next, an embodiment of the present invention (claim 8) (that
The third) will be described with reference to FIGS. 52 and 53. The present invention
Image signal processing according to embodiment (third) of claim 8
Part 200 is an embodiment (first) of the present invention (claim 4).
Of the image signal processing unit 200 (see FIG. 14)
Each automatic level adjustment unit (ALC) 4_iThe present invention (contract
As in the embodiment (No. 1) of claim 8),
Each average value calculation unit (MN) 251 _iAnd adder 253
_iIs added individually, and each automatic level adjustment unit (AL
C) 4_i, The average value order adjustment level generation unit (MN
O) 254 is added to process each individual image signal in FIG.
It plays the role of the means 1000.

After that, the automatic level adjusting unit (ALC) 4 to which the average value calculating unit (MN) 251 _i and the adding unit 253 _i are individually added, and the average value order adjustment level generating unit (MNO) 254 is commonly added is added. _i is referred to as an individual image signal processing unit 1053 _i .

Each individual image signal processing unit 1053_iAt
Is an automatic level adjustment unit (ALC) 4 _iIntroduced in Figure 15
Embodiments of the present invention (claim 4) (that
In the same process as in 1), the distribution unit (MUL) 221
From the individual image signals (d_i)
Processed individual image signals that have undergone appropriate automatic level adjustment processing
(D_Pi) Is added to the corresponding addition unit 253._iCommunicate to.

Further, the average value calculation unit (MN) 251 _i functions in the same manner as in the embodiment (first) of the present invention (claim 8), and corresponds to one frame transmitted from the distribution unit (MUL) 221. Average value (m) of individual image signals (d _i ) of
n _Fi ), and an average value sequence adjustment level generation unit (MNO) 2 commonly provided for each individual image signal processing unit 1053 _i.
54.

Also, the average value order adjustment level generation unit (MN
O) 254 functions in the same manner as in the embodiment (first) of the present invention (claim 8), and each individual image signal processing unit 1
053 _{1 to} 1053 ₃ average value calculation unit (MN) 251
The magnitudes of the mean values (mn _F1 ) to (mn _F3 ) transmitted from _{1 to} 251 ₃ are compared, and the magnitude values are compared in order of magnitude [mean value (m
n _F1 ) <average value (mn _F2 ) <average value (mn _F3 )] corresponding additional data (ad ₁ ) <additional data (ad ₂ ) <additional data (ad ₃ ) to each individual image signal processing unit 1053.
_It is transmitted to the addition units 253 _{1 to} 253 ₃ of _{1 to} 1053 ₃ .

Each addition unit 253 _i has a processed individual image signal (d _Pi ) transmitted from the corresponding automatic level adjustment unit (ALC) 4 _i and an average value order adjustment level generation unit (MNO).
The additional data (ad _i ) transmitted from 254 are added, and the addition result is transmitted to the combining unit (SEL) 222 as a new processed individual image signal (d _Pi ).

The synthesizing unit (SEL) 222 is the same as in the embodiment (first) of the present invention (Claim 2), and the processed individual image signal (d _Pi) transmitted from each individual image signal processing unit 1053 _i. ) Are combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 to be visually displayed.

FIG. 53A shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

Next, an embodiment (fourth) of the present invention (claim 8) will be described with reference to FIGS. 54 and 55. The image signal processing unit 200 according to the embodiment (fourth) of the present invention (claim 8) is the embodiment (first) of the present invention (claim 5).
Each automatic level / gain adjustment unit (ALC + AGC) 9 _i forming the image signal processing unit 200 (see FIG. 17) by
In the same manner as in the embodiment (first) of the present invention (claim 8), an average value calculation unit (MN) 251 _i and an addition unit 253 _i are individually added, and each automatic level / gain adjustment unit is added. An average value order adjustment level generation unit (MNO) 254 is added in common to the (ALC + AGC) 9 _{i so} that each individual image signal processing unit 1000 in FIG.

Thereafter, an automatic level / gain adjustment unit (ALC + AGC) to which an average value calculation unit (MN) 251 _i and an addition unit 253 _i are individually added, and an average value order adjustment level generation unit (MNO) 254 is commonly added is added. ) 9 _i is referred to as an individual image signal processing unit 1054 _i .

In each individual image signal processing unit 1054 _i , the automatic level / gain adjustment unit (ALC + AGC) 9
_i has the configuration introduced in FIGS. 15, 17 and 18, and is transmitted from the distribution unit (MUL) 221 in the same process as in the embodiment (first) of the present invention (Claim 5). For each individual image signal (d _i ) to be processed, the processed individual image signal (d _Pi ) that has been subjected to the optimum automatic level adjustment processing and automatic gain adjustment processing is transmitted to the corresponding addition unit 253 _i .

The average value calculation unit (MN) 251 _i functions in the same manner as in the embodiment (first) of the present invention (Claim 8) and corresponds to one frame transmitted from the distribution unit (MUL) 221. Average value (m) of individual image signals (d _i ) of
n _Fi ), and an average value sequence adjustment level generation unit (MNO) 2 provided in common to each individual image signal processing unit 1054 _i.
54.

Also, the average value order adjustment level generation unit (MN
O) 254 functions in the same manner as in the embodiment (first) of the present invention (claim 8), and each individual image signal processing unit 1
054 _{1 to} 1054 ₃ average value calculation unit (MN) 251
The magnitudes of the mean values (mn _F1 ) to (mn _F3 ) transmitted from _{1 to} 251 ₃ are compared, and the magnitude values are compared in order of magnitude [mean value (m
n _F1 ) <average value (mn _F2 ) <average value (mn _F3 )] corresponding additional data (ad ₁ ) <additional data (ad ₂ ) <additional data (ad ₃ ) to the individual image signal processing unit 1054.
_{1 to} 1054 ₃ are transmitted to the adders 253 _{1 to} 253 ₃ .

Each addition unit 253_iIs the corresponding automatic level
/ Gain adjuster (ALC + AGC) 9 _iTransmitted from
Separated individual image signal (d_Pi) And the average value order adjustment level raw
Additional data transmitted from Narube (MNO) 254
(Ad_i) And are added, and the addition result is a new processed individual
Image signal (d_Pi) Is transmitted to the combining unit (SEL) 222.
To do.

The synthesizing unit (SEL) 222 has the processed individual image signals (d _Pi transmitted from each individual image signal processing unit 1054 _i , similarly to the embodiment (first) of the present invention (Claim 2). ) Are combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 to be visually displayed.

FIG. 55 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

As is clear from the above description, the present invention (contract)
According to the embodiment (No. 1 to No. 4) of claim 8), the image is
The image signal processing unit 200 is transmitted from the A / D conversion unit 400.
From the image signal (d) for one frame to the object recognition unit 1
More targeted object (B₁) And (B₂) Is recognized,
By the distribution unit (MUL) 221, the background and each object (B
₁) And (B₂) Individual image signal (d₁) Or
(D₃) Respectively corresponding individual image signal processing unit 105
1₁Through 1051₃, 1052₁Through 1052₃10,
53₁Through 1053₃, Or 1054₁Through 1054
₃Each image signal processing unit 1051₁Through 1051
₃, 1052₁Through 1052₃, 1053 ₁Through 105
Three₃, Or 1054₁Through 1054₃Is the best
Histogram conversion processing result, histogram equalization processing
Result, automatic level adjustment process result, or automatic level adjustment
Results of processing and automatic gain adjustment [Processed individual image signal
(D _Pi)] To the average value (mn_Fi) In order of magnitude
Related additional data (ad_i) By adding
Image signal (d) for one frame where multiple objects exist
Display quality processing can be executed at once, and further saturated
Background, each object (B₁) And (B
₂) Processed individual image signal (d)_Pi) Is reproduced
It will be possible.

Next, an embodiment (No. 5 to No. 7) of the present invention (claim 8) will be described with reference to FIGS. 56 to 64. FIG. 56 shows an embodiment (No. 5) of the present invention (claim 8).
FIG. 57 is a diagram showing an image signal processing unit according to FIG.
5 is a diagram illustrating a histogram conversion unit in FIG.
8 is a diagram illustrating the image signal in FIG. 56, and FIG.
9 is a diagram showing an image signal processing unit according to an embodiment (sixth) of the present invention (claim 8), FIG. 60 is a diagram illustrating the histogram equalizing unit in FIG. 59, and FIG. 61 is FIG. 62 is a diagram illustrating an image signal, FIG. 62 is a diagram illustrating an image signal processing unit according to an embodiment (seventh) of the present invention (claim 8), and FIG. 63 is an example of the automatic gain adjustment unit in FIG. 62. FIG. 64 is a diagram, and FIG. 64 is a diagram illustrating the image signal in FIG. 62.

First, the embodiment of the present invention (claim 8) (that
No. 5) will be described with reference to FIGS. 56 to 58. The present invention
Image signal processing according to the embodiment (fifth) of claim 8
Part 200 is an embodiment (first) of the present invention (claim 8).
In the image signal processing unit 200 (see FIG. 48) according to
Each individual image signal processing unit 1051_iHist that makes up
Gram converter (HP) 2_iInstead of, shown in FIG.
Histogram converter (HP) 2 _AUsing average value order
Output from the ordinal adjustment level generator (MNO) 254
Additional data (ad_i) Is added to the addition unit 253._iWith histog
Lamb converter (HP) 2_AiIndividually transmitted in Figure 1
Addition while playing the role of the image signal processing means 1000
Data (ad_i) Is taken into account
It is possible to go.

Thereafter, the average value calculation unit (MN) 251 _i and the addition unit 253 _i are individually added, and the average value sequence adjustment level generation unit (MNO) 254 is also added in common to the histogram conversion unit (HP) 2 _Ai. Will be referred to as an individual image signal processing unit 1061 _i .

An image signal (d) similar to that in the embodiment (first) of the present invention (claim 8) is transmitted from the A / D conversion unit 400 to the image signal processing unit 200, and each individual image signal is transmitted. The processing unit 1061 _i includes the individual image signal processing units 1 in the embodiment (first) of the present invention (Claim 8).
Individual image signal (d _i ) with object number (N _B ) of the corresponding object (B), similar to 051 _i
Is distributed.

In the individual image signal processing unit 1061 _i ,
The mean value calculation unit (MN) 251 _i and the mean value order adjustment level generation unit (MNO) 254 provided in common to each individual image signal processing unit 1061 _i are the embodiments of the present invention (claim 8). The same function as in (1), and the average value order corresponding to the magnitude order of the average value (mn _Fi ) of the individual image signals (d _i ) for one frame calculated by the average value calculation unit (MN) 251 _i. Adjustment level generation unit (MNO) 254
The additional data (ad _i ) selected by is transmitted to the adder 253 _i and the histogram converter (HP) 2 _Ai .

[0307] The histogram conversion unit (H
P) 2 _A is the histogram conversion unit (H
P) 2, an addition unit 2J, a multiplication unit 2K and a number "2" setting unit 2L are added.

The multiplication unit 2K has the additional data (a) transmitted from the average value order adjustment level generation unit (MNO) 254.
d _i ) and the number “2” already set in the number “2” setting unit 2L
And are multiplied, and the multiplication result [ad _i × “2”] is added to the addition unit 2J.
To the display gradation setting unit (MV).
The display gradation (M _V ) already set to 2H is input to the addition terminal and the multiplication result [ad _i
× by inputting the "2"] to the subtraction terminal, the addition result [M _V -ad _i × "2"] reciprocal generator to generate a (C
VM) 2B, and the inverse number generation unit (CVM) 2B
As a result the addition inputted from the addition unit 2J [M _V -ad _i
The inverse number [1 / (M _V −ad _i × “2”)] of × “2”] is generated and transmitted to the multiplication unit 2A.

The multiplication unit 2A stores in the register (REG) 29.
Histogram gradation (M_HPi) And the reciprocal student
Reciprocal number input from Narube (CVM) 2B [1 / (M_V−
ad _i× “2”)] and the multiplication result [M_HPi/
(M_V-Ad_iX "2")] is an inverse number generation unit (CVM) 2
C, and the reciprocal number generation unit (CVM) 2C
Multiplication result input from 2A [M_HPi/ (M_V-Ad_i
X "2")] reciprocal [[M_V-Ad_i× "2") / M
_HPi] Is generated and transmitted to the multiplication unit 2D, and further, the multiplication unit 2D
Is input from the dual port memory (DPM) 26.
Accumulated value (m_HP) And the reciprocal generator (CVM) 2C
Forced reciprocal [[M_V-Ad_i× "2") / M_HP] And
Multiply, multiply result [m_HP× (M_V-Ad_i× "2") /
M_HP] The data of dual port memory (DPM) 2F
Terminal (D_R) To the data (D_2F).

As a result, the dual port memory (DP
The M) 2F, the address (A _2F) inputted from the address generation unit (ADG) 2E to the address terminal (A _R), the data input from the multiplication unit _{2D (D 2F = m HP ×} (M V -
ad _i × “2”) / M _HPi ) will be accumulated.

The dual port memory (DPM) 2F is
As in the histogram converter (HP) 2,
Individual image signal stored in the memory 21 (FM)
(D _i) Are sequentially extracted, and the dual port memory (DP
M) 2F address terminal (A _L) Is transmitted to
Individual image signal (d_i) Detection gradation (m_D)
Address (A_2F) Already stored data (D_2F= M_HP×
(M_V-Ad_i× "2") / M_HP) Is the processed individual image
Signal (d_Pi) [Display gradation (m_V)] As
Corresponding addition unit 253_iCommunicate to.

The adder 253 _i functions in the same manner as in the embodiment (first) of the present invention (claim 8), and the processed individual image signal (HP) 2 _Ai transmitted from the corresponding histogram converter (HP) 2 _Ai ( d _Pi ) and the additional data (ad _i ) transmitted from the average value order adjustment level generation unit (MNO) 254.
And are added, and the addition result is added to the new processed individual image signal (d
_It is transmitted to the combining unit (SEL) 222 as _Pi ).

The histogram conversion unit (HP) 2 _{Ai performs the} histogram conversion processing on the processed individual image signal (d
_Pi) [the display gradation _{(m V = m HP × (} M V -ad i ×
"2") / M _HPi)], since twice the additional data (ad _i) is previously subtracted from the maximum value of the display gradation (M _V), added in the corresponding adder section 253 _i data (ad
even _i) is added, fall within the processed individual image signal (d _Pi) is the maximum value of the display gradation (M _V), it is transmitted to the synthesizing unit (SEL) 222 from the individual image signal processing unit 1061 _i Saturation of the processed individual image signal (d _Pi ) is prevented.

The synthesizing unit (SEL) 222 is the same as in the embodiment (first) of the present invention (Claim 2), and the processed individual image signal (d _Pi) transmitted from each individual image signal processing unit 1061 _i. ) Are combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 to be visually displayed.

FIG. 58 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

Next, an embodiment (sixth) of the present invention (claim 8) will be described with reference to FIGS. 59 to 61. An image signal processing unit 200 according to an embodiment (sixth) of the present invention (claim 8) is an embodiment (second) of the present invention (claim 8).
In the image signal processing unit 200 (see FIG. 50) according to
Instead of the histogram equalization unit (HE) 3 _i forming each individual image signal processing unit 1052 _i , the histogram equalization unit (HE) 3 _A shown in FIG. 60 is used to generate the average value order adjustment level. The additional data (ad _i ) output from the unit (MNO) 254 is also transmitted to the histogram equalization unit (HE) 3 _Ai together with the addition unit 253 _i , and plays the role of the individual image signal processing unit 1000 in FIG. In the meantime, the histogram equalization process considering the additional data (ad _i ) can be executed.

Thereafter, the histogram equalization unit (HE) 3 to which the average value calculation unit (MN) 251 _i and the addition unit 253 _i are individually added, and the average value order adjustment level generation unit (MNO) 254 is commonly added is also provided. the _ai, referred to as individual image signal processing unit 1062 _i.

An image signal (d) similar to that in the embodiment (first) of the present invention (claim 8) is transmitted from the A / D conversion unit 400 to the image signal processing unit 200, and each individual image signal is transmitted. The processing unit 1062 _i includes the individual image signal processing units 1 in the embodiment (second) of the present invention (Claim 8).
Individual image signal (d _i ) with object number (N _B ) of each corresponding object (B), similar to 052 _i
Is distributed.

In the individual image signal processing unit 1062 _i ,
The mean value calculation unit (MN) 251 _i and the mean value order adjustment level generation unit (MNO) 254 provided in common to each individual image signal processing unit 1062 _i are the embodiments of the present invention (claim 8). The same function as in (2), and the average value order corresponding to the magnitude order of the average value (mn _Fi ) of the individual image signals (d _i ) for one frame calculated by the average value calculation unit (MN) 251 _i. Adjustment level generation unit (MNO) 254
The additional data (ad _i ) selected by is transmitted to the addition unit 253 _i and the histogram equalization unit (HE) 3 _Ai .

The histogram equalization unit (HE) 3 _A shown in FIG. 60 includes a multiplication unit 3D, a numeral “2” setting unit 3E and an addition unit 3F in addition to the histogram equalization unit (HE) 3 shown in FIG. Has been added.

The multiplying unit 3D uses the additional data (a) transmitted from the mean value order adjustment level generating unit (MNO) 254.
d _i ) and the number “2” already set in the number “2” setting unit 3E
And are multiplied, and the multiplication result [ad _i × “2”] is added to the addition unit 3F.
To the display gradation setting unit (MV).
The maximum value of the set 3B already display gradation (m _V) is input to (M _V) to the addition terminal, the input to the subtraction terminal of the the multiplication result input from the multiplication unit 3D [ad _i × "2"] As a result, the addition result [M _V −ad _i × “2”] is generated and transmitted to the multiplication unit 3C, and the reciprocal number generation unit (CVM) 3A is also generated.
Generates a reciprocal (1 / N _F ) of the total number of pixels (N _F ) for one frame that has been set in the total number of pixels setting unit (NF) 39 and transmits it to the multiplication unit 3C. The addition result [M _V −ad _i × “2”] input from the adder (3F) and the reciprocal [1 / _V ] input from the reciprocal generator (CVM) 2B
N _F ], and the multiplication result [(M _V −ad _i ×
“2”) / N _F ] is transmitted to the multiplication unit 38.

The multiplying unit 38 outputs from the accumulating unit (ACL) 37.
The accumulated result (Σh) transmitted and the input from the multiplication unit 3C.
Multiplication result [(M_V-Ad_i× "2") / N_F] And
Multiply, truncate after the decimal point of the multiplication result, only the integer part
[After that, the multiplication result (Σh × (M _V-Ad x "2") /
N_F)]] Is a dual port memory (DPM)
36 data terminals (D_R) To the data (D₃₆) Enter as
Force

As a result, the dual port memory (DP
The M) 36, the address (A ₃₆₎ that is input from the address generation unit (ADG) 35 to the address terminal (A _R), the data input from the multiplication unit _{38 (D 36 = Σh × (} M V -
ad × “2”) / N _F ) will be accumulated.

The dual port memory (DPM) 36 is
As in the histogram equalization unit (HE) 3, the individual image signals (d _i ) accumulated in the frame memory (FM) 31 are sequentially extracted, and the dual port memory (D _i )
Once transferred to PM) 36 address terminals (A _L), the data accumulated already to the detection tone (m _D) in the corresponding address of the transmitted individual image signal _{(d i) (A 36)} (D 36 = Σh
× a (M _V -ad _i × "2") / N _F), and extracted as a processed individual image signal (d _Pi) [the display gradation (m _V)],
The result is transmitted to the corresponding adder 253 _i .

The adder 253 _i functions in the same manner as in the embodiment (part 2) of the present invention (claim 8), and the processed individual image signal transmitted from the corresponding histogram equalizer (HE) 3 _Ai. The additional data (a) transmitted from the average value order adjustment level generation unit (MNO) 254 is added to (d _Pi ).
d _i ) is added, and the addition result is transmitted to the combining unit (SEL) 222 as a new processed individual image signal (d _Pi ).

The histogram equalization unit (HE) 3_Ai
Processed individual image signal (d_Pi) [Display gradation (m_V
= Σh × (M_V-Ad_i× "2") / N_F)] Is displayed
Maximum value of gradation (M_V) To additional data (ad_i)
Has already been subtracted, the corresponding addition unit 253_iTo
Additional data (ad_i) Is added, processed individual
Image signal (d_Pi) Is the maximum value of display gradation (M_V)
The individual image signal processing unit 1062_iFrom synthesis department (SE
L) 222, the processed individual image signal (d _Pi)But
Saturation is prevented.

The synthesizing unit (SEL) 222 is the same as in the embodiment (first) of the present invention (Claim 2), and the processed individual image signal (d _Pi) transmitted from each individual image signal processing unit 1062 _i. ) Are combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 to be visually displayed.

FIG. 61 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

Next, an embodiment (seventh) of the present invention (claim 8) will be described with reference to FIGS. 62 to 64. The image signal processing unit 200 according to the embodiment (seventh) of the present invention (claim 8) is the embodiment (fourth) of the present invention (claim 8).
In the image signal processing unit 200 (see FIG. 54) according to
Instead of the automatic gain adjustment unit (AGC) 5 _i forming the automatic level / gain adjustment unit (ALC + AGC) 9 _i in each individual image signal processing unit 1054, the automatic gain adjustment unit (AGC) shown in FIG. 63. 5 _A is used, the additional data (ad _i ) output from the average value order adjustment level generation unit (MNO) 254 is transmitted to the automatic gain adjustment unit (AGC) 5 _Ai together with the addition unit 253 _i , and FIG. While the role of the individual image signal processing means 1000 in (1) is fulfilled, the automatic gain adjustment processing in consideration of the additional data (ad _i ) can be executed.

Thereafter, the automatic level / gain adjustment unit (ALC + AGC) 9 composed of the automatic level adjustment unit (ALC) 4 and the automatic gain adjustment unit (AGC) 5 _A is replaced by the automatic level / gain adjustment unit (ALC + AGC) 9 _Further , the average value calculation unit (MN) 251 _i and the addition unit 253 _i are individually added, and the average value order adjustment level generation unit (MN
O) 254 is added in common to the automatic level / gain adjustment unit (ALC + AGC) 9 _Ai.
4 _i .

The individual image signal (d _i ) similar to that in the embodiment (fourth) of the present invention (Claim 8) is transmitted from the A / D converter 400 to the image signal processor 200, and each individual image signal (d _i ) is transmitted. The image signal processing unit 1064 _i has the same object number (N) of the corresponding object (B) as that for each individual image signal processing unit 1054 _i in the embodiment (fourth) of the present invention (claim 8). _The individual image signals (d _i ) with _B ) are distributed.

In the individual image signal processing unit 1064 _i ,
The mean value calculation unit (MN) 251 _i and the mean value order adjustment level generation unit (MNO) 254 provided in common to each individual image signal processing unit 1064 _i are the embodiments of the present invention (claim 8). The same function as in (4) above, corresponding to the order of magnitude of the average value (mn _Fi ) of the individual image signals (d _i ) for one frame calculated by the average value calculation unit (MN) 251 _i , Adjustment level generation unit (MNO) 254
The additional data (ad _i ) selected by is transmitted to the adding unit 253 _i and the automatic gain adjusting unit (AGC) 5 _Ai in the automatic level / gain adjusting unit (ALC + AGC) 9 _Ai .

The automatic gain adjustment unit (AG
C) 5 _A is an automatic gain adjustment unit (AG
A multiplication unit 5B, a numeral "2" setting unit 5C, and an addition unit 5D are added to C) 5.

The multiplying unit 5B has the additional data (a) transmitted from the average value order adjustment level generating unit (MNO) 254.
d _i ) and the number “2” already set in the number “2” setting unit 5C
And are multiplied, and the multiplication result [ad _i × “2”] is added to the addition unit 5D.
To the display gradation setting unit (MV).
The display gradation (M _V ) set in 5A is input to the addition terminal, and the multiplication result [ad _i is transmitted from the multiplication unit 3D.
By inputting “ד 2 ”] to the subtraction terminal, the addition result [M _V −ad _i ד 2 ”] is generated and transmitted to the multiplication unit 57.

The multiplication unit 57 receives the addition result [M _V −ad _i × “2”] input from the addition unit (3F) and the reciprocal number [1 / (d _MAX ) input from the reciprocal number generation unit (CVM) 56. -D
_MIN )] and the multiplication result [(M _V −ad _i ×
"2") / (d _MAX -d _MIN)] accumulated in the register (REG) 58 as the adjusted gain (G).

That is, it is stored in the register (REG) 58.
The adjustment gain (G) is one frame that arrived one frame before.
Minute image signal (d) fluctuation range [maximum image signal
(D_MAX) -Minimum image signal (d_MIN)] For the display gradation
Maximum value (M_V) To additional data (ad _i) Twice
The result [M_V-Ad_i× "2"] to match
Equivalent to the number.

The multiplication unit 59 is an automatic gain adjustment unit (AGC).
5, the adjustment level (L) arriving from the automatic level adjustment unit (ALC) 4 is subtracted from the image signal (d-
To L), the register (REG) 58 in the storage already-adjusted gain (G = (M _V -ad × _{"2") / (d MAX -d MIN)} )
After being multiplied by, the result is transmitted to the corresponding adder 253 _i .

The adder 253 _i functions in the same manner as in the embodiment (fourth) of the present invention (claim 8), and the processed individual image signal transmitted from the automatic level / gain adjuster (ALC + AGC) 9 _Ai. (D _Pi ) and the additional data (a) transmitted from the average value order adjustment level generation unit (MNO) 254.
d _i ), and the addition result is transmitted to the combining unit (SEL) 222 as a new processed individual image signal (d _Pi ).

The automatic level / gain adjustment unit (ALC +
AGC) 9 _Ai by the processed individual image signal (d _Pi) [maximum value of the display gradation _{(m V) (M V -ad} i × "2")]
Has already been subtracted by twice the additional data (ad _i ), the additional data (ad _i ) in the corresponding adder 253 _{i
Even if i} ) is added, the processed individual image signal (d _Pi ) falls within the maximum display gradation value (M _V ) and is transmitted from the individual image signal processing unit 1064 _i to the synthesizing unit (SEL) 222. Saturation of the processed individual image signal (d _Pi ) is prevented.

The synthesizing unit (SEL) 222 is the same as in the embodiment (first) of the present invention (Claim 2), and the processed individual image signal (d _Pi) transmitted from each individual image signal processing unit 1064 _i. ) Are combined to edit the processed image signal (d _P ) for one frame, and the processed image signal (d _P ) is transmitted to the image display device 600 via the D / A conversion unit 500 to be visually displayed.

FIG. 64 (a) shows the detected gradation (m _D ) of the image signal (d) for one line transmitted from the A / D conversion unit 400 to the object recognition unit 1, and FIG. In (b), the display gradation (m _V ) of the processed image signal (d _P ) transmitted from the image signal processing unit 200 to the D / A conversion unit 500 is shown.

As is apparent from the above description, according to the embodiment (No. 5 to No. 7) of the present invention (Claim 8), the image signal processing unit 200 is the same as the embodiment (Claim 8) of the present invention. 1 to 4), the optimum histogram conversion processing result, histogram equalization processing result, or automatic level adjustment processing and automatic gain adjustment processing results [processed individual image signal (d _Pi )] are averaged respectively. Additional data (ad _i ) related to the order of magnitude (mn _Fi ).
Prior to adding, histogram conversion processing result, the maximum of the histogram equalization process result, or when an automatic level adjustment processing and automatic gain adjustment processing, displaying twice the additional data (ad _i) tone (m _V) values for placing in advance subtracted from (M _V), saturated embodiments possess the advantages according乍Ra of the present invention (claim 8), the addition by the processed individual image signals of the additional data (ad _i) (d _Pi) Can be surely deterred.

Next, an embodiment of the present invention (claim 9) will be described.
This will be described with reference to FIGS. 65 to 67. 65 is a diagram showing an object recognition unit according to an embodiment of the present invention (claim 9), FIG. 66 is a diagram illustrating an edge signal in FIG. 65, and FIG. 67 is a diagram illustrating an edge detection signal in FIG. It is a figure.

For example, as shown in FIG. 66 (a), an object (B
₁ ) the image signal is received, and the object recognition unit 1 shown in FIG.
66, depending on the output level of the edge signal (e) output from the Laplacian filter (EDF) 13,
As shown in (b), the comparison unit (CMP) 14 receiving the edge threshold value (e _TH1 ) cannot detect a part of the edge signal (e), and the output edge detection signal (ed) is as shown in FIG.
As (a), the object When (B ₁₎ a part of the contour of the missing object (B ₁₎ is not recognized as a separate object and background, the background and the same object number (N _B) Will be given.

The object recognizing section 1 _A shown in FIG. 65 relieves this kind of object non-recognition. The object recognition unit 1 _A shown in FIG. 65 is the same as the object recognition unit 1 shown in FIG.
Threshold setting unit of the plurality (N _A number) and (THR) 17 [individual threshold setting unit (THR) of 17 _na (where na is one of 1 to N _A) referred to], and a selector (SEL) 1A , Flip-flop (FF) 1B and comparison unit (CMP) 1C
AND section (AND) 1D and storage section (MEM) 1E
And a register (REG) 1F and a counting unit (CNT) 1G
And a decoding unit (DCR) 1H are added.

In the object recognition unit 1 shown in FIG. 3,
One kind of edge threshold value (e _TH ) is set in the single threshold value setting unit (THR) 17, but in the object recognition unit 1 _A shown in FIG. 65, each threshold value setting unit (THR) 17 ₁
To 17 _NA , different edge thresholds (e _TH1 ) to (e _THNA ) [where e _TH1 > e _TH2 ...> e _THNA ] are set.

The selection unit (SEL) 1A is provided in the decoding unit (DC
R) Select signal (s) transmitted from 1H _1H) Specified by
Threshold setting unit (THR) 17_naIs selected and set
Edge threshold (e_THna) To the comparison unit (CMP) 14
It can be transmitted.

In the initial state, the logical product part (AND)
The output signal (g _1D ) from _1D is set to logic “0”, the output signal (g _1D = logic “0”) is stored in the register (REG) 1F, and the counting unit (CNT) 1G.
Sets the _count value (n _1G ) to “0”, and the selection signal (s _1H1 ) output from the decoding unit (DCR) 1H is
Threshold setting unit (THR) 17 _{1 in} selector (SEL) 1A
, And the edge threshold value (e _TH1 ) set in the threshold value setting unit (THR) 17 ₁ is transmitted to the comparison unit (CMP) 14.

In this state, the object recognizing unit 1 _A is shown in FIG.
It is assumed that the image signal (d) of the object (B ₁ ) as shown in (a) arrives and is input to the frame memory (FM) 11 and the smoothing filter (SMF) 12.

_A smoothing filter (SM
F) 12, Laplacian filter (EDF) 13, comparing unit (CMP) 14, object number assigning unit (ONB) 15 and number substituting unit (NRA) 16 function in the same manner as in the object recognizing unit 1, and the Laplacian filter (EDF) 13
The edge signal (e) as shown in FIG. 66 (b) is output from the comparison section (C) which is compared with the edge threshold (e _TH1 ).
The edge detection signal (ed) output from MP) 14 is
As shown in FIG. 67 (a), assume that a part of the outline of the object (B ₁ ) is missing.

As a result, the object number assigning unit (ONB) 15
And the number underlaying unit (NRA) 16 gives the same object number (N _B ) to the background and the object (B ₁ ). Each object number (N _B ) output from the number packing unit (NRA) 16
Is output via a flip-flop (FF) 1B.

The object number (N _B ) assigned to the latest pixel is output from the output terminal of the number underlaying section (NRA) 16, and the output terminal of the flip-flop (FF) 1B is
The object number (N _B ) given to the immediately preceding pixel is output.

The comparison part (CMP) 1C is the same as the number bottom part (N
Two object numbers (N _B ) given to two adjacent pixels output from the RA) 16 and the flip-flop (FF) 1B are received.

The comparing unit (CMP) 1C determines that both object numbers (N
_B ) is collated, the comparison result signal (cr _1C ) is set to logic “1” when both match, and the comparison result signal (cr _1C ) is set to logic when both do not match. Set to "0".

On the other hand, the memory unit (MEM) 1E is provided with a comparison unit (C
The edge detection signal (ed) output from the MP) 14
The object number assigning unit (ONB) 15 receives and stores the data in parallel, and the number filling unit (NRA) 16 determines the object number (N _B ) and outputs it to the comparing unit (CMP) 1C, and the comparing unit (CM).
P) After delaying until the comparison result signal (cr _1C ) is set by _{1C, the} comparison result signal (cr _1C ) is transmitted to the AND section (AND) 1D.

The logical product part (AND) 1D includes a storage part (ME).
M) The edge signal (e) transmitted from 1E is logical "1".
When the comparison result signal (cr _1C ) transmitted from the comparison unit (CMP) 1C is set to logic “1”, the output signal (g _1D ) is set to logic “1”.

That is, although the object recognizing unit 1 _A detects the edge detection signal (ed), a part of the outline of the object (B ₁ ) is missing, so that an object independent of the background ( It is determined that it is not recognized as B ₁ ).

When the object recognizing unit 1 _A finishes executing the object recognizing process for the image signal (d) for one frame, the register (REG) 1F outputs the output from the logical product unit (AND) 1D. The signal (g _1D = logic “1”) is accumulated and held, and is transmitted to the counting unit (CNT) 1G.

The counting unit (CNT) 1G has a register (RE).
G) When it is detected that the output signal (g _1D ) transmitted from 1F is changed to the logic “1”, the count value (n
_1G ) takes a step from "0" to "1".

The decoding unit (DCR) 1H has a counting unit (CN
T) When the count value (n _1G ) of _1G advances one step, a selection signal (s _1H2 ) corresponding to the count value (n _1G = “1”) after stepping is transmitted to the selector (SEL) 1A.

The selector (SEL) 1A includes a decoding unit (DC
R) 1H to select signal (s_1H2) Is received, the threshold setting
Fixed part (THR) 17₂Select the threshold setting unit (THR)
17 ₂Edge threshold (e)_TH2) The comparison section
(CMP) 14 is transmitted.

The object recognizing unit 1 _A uses the newly selected edge threshold (e _TH2 ) to execute the object recognizing process in the same process as described above with the image signal (d) for the next one frame. To do.

As a result, the Laplacian filter (ED
F) From 13, the same edge signal (e) as in the previous frame
[See FIG. 66 (b)] is output, but the edge threshold (e
_The comparison unit (CMP) 14 using _TH2 ) changes to a direction in which it is easy to detect the edge detection signal (ed),
As shown in FIG. 67 (b), the contour of the object (B ₁ ) approaches the completion.

However, the newly selected edge threshold (e
_{Even if TH2} ) is used, the contour of the object (B ₁ ) is still shown in FIG.
If the object number (N _B ) of the background and the object (B ₁ ) is still set to be the same as shown in (b), the comparison unit (CMP) 1C, the logical product unit (AND) ) 1D,
The register (REG) 1F, the counting unit (CNT) 1G and the decoding unit (DCR) 1H function in the same manner as described above, and the comparison result signal (c) output from the comparison unit (CMP) 1C.
r _1C), logical product unit (AND) the output signal (g _1D output from 1D), and register (REG) output signal that is stored and held in 1F (g _1D) is again logical after being respectively initialized As a result of being set to "1", the counting unit (CN
T) The count value (n _1G ) of _1G advances from “1” to “2” again, and the decoding unit (DCR) 1H changes to the counting unit (CNT) 1
When the count value (n _1G ) of _{G advances} to “2”, the selection signal (s _1H3 ) is transmitted to the selector (SEL) 1A.

The selector (SEL) 1A has a decoding unit (DC
R) 1H to select signal (s_1H3) Is received, the threshold setting
Fixed part (THR) 17₃Select the threshold setting unit (THR)
17 ₃Edge threshold (e)_TH3) The comparison section
(CMP) 14 is transmitted.

The object recognizing unit 1 _A uses the newly selected edge threshold value (e _TH3 ) to execute the object recognizing process in the same process as described above with the image signal (d) for the next one frame. To do.

As a result, the edge detection signal (ed) by the comparison unit (CMP) 14 changes to a direction that is easier to detect, and the contour of the object (B ₁ ) approaches the completion.

The object recognition unit 1 _A repeats the above process until the contour of the object (B ₁ ) is completed and the background and the object (B ₁ ) are given different object numbers (N _B ), or the selector (SEL) 1A selects the last threshold value setting section (THR) 17 _NA , and compares the last edge threshold value (e _{TH NA} ) with the comparison section (CM
Even when supplied to P) 14, the above process is repeated until the contour of the object (B ₁ ) is partially missing.

As is clear from the above description, according to the embodiment of the present invention (Claim 9), the object recognizing unit 1 _A successively reduces the edge threshold value (e _TH ), thereby making it difficult to recognize an object ( It is also possible to recognize B), and the object recognition capability of the object recognition unit 1 _A is improved.

Next, an embodiment of the present invention (claim 10) will be described with reference to FIGS. 68 to 70. 68 is a diagram showing an object recognition unit according to an embodiment of the present invention (claim 10), FIG. 69 is a diagram showing an edge signal and an edge detection signal in FIG. 68, and FIG. 70 is a contour line in FIG. It is a figure which illustrates a signal.

The object recognition unit 1 _B according to the embodiment of the present invention (Claim 10) is the same as the object recognition unit 1 _A according to the embodiment of the present invention (Claim 9), and the object recognition unit 1 _B shown in FIG.
This is to relieve the object non-recognition caused by.

The object recognition unit 1 _B shown in FIG. 68 is the same as that shown in FIG.
The object recognition unit 1 shown in FIG.
1B, comparison unit (CMP) 1C, and logical product unit (AND)
1D, storage unit (MEM) 1E, register (REG)
1F, a counting unit (CNT) 1G, and a logical filter (LG
F) 1J is added.

The threshold value setting unit (THR) 17 has a single threshold value setting unit (THR) similar to the object recognition unit 1 shown in FIG.
One kind of edge threshold value (e _TH ) is set in (HR) 17.

The flip-flop (FF) 1B, the comparison unit (CMP) 1C, the logical product unit (AND) 1D, the register (REG) 1F, the counting unit (CNT) 1G and the storage unit (MEM) 1E are provided by the present invention (claim). Functions the same as in term M), but the count value of the counter (CNT) 165 is transmitted to the logic filter (LGF) 1J.

The logical filter (LGF) 1J has an edge detection signal (ed) output from the comparator (CMP) 14.
To generate a contour line signal (cl) of the object (B),
Although it is transmitted to the object number assigning unit (ONB) 15, it is composed of a plurality of logical stages and the number of logical stages (n _1J ) to be used can be arbitrarily set, and the number of logical stages (n _1J ) is at least [for example, one stage]. In the case of, the contour line signal (cl) is composed of one pixel in which the edge detection signal (ed) is set to logic "1", but the contour line signal (cl) increases as the number of logic stages increases. Has the function of increasing the number of pixels.

The count value (n _1G ) output from the counting unit (CNT) 1G is input to the logic filter (LGF) 1J for adjusting the number of used logic stages (n _1J ). Fig. 68
The object number assigning unit (ONB) 15 shown in FIG. 2 has an edge detection signal (ed) transmitted from the comparing unit (CMP) 14.
Instead of, the recognition processing of the object (B) is executed by the contour line signal (cl) transmitted from the logical filter (LGF) 1J.

In FIG. 68, in the initial state in which the object recognizing unit 1 _B starts receiving the image signal (d) for one frame, the output signal (g _1D ) from the logical product unit (AND) 1D
Is set to logic "0" and register (REG) 1
A logical "0" is stored in F, and the counting unit (CNT)
1G sets the count value (n _1G ) to “0”, and as a result, the logic filter (LGF) 1J sets the number of used logic stages (n _1J ) to the minimum [for example, n _1J = “1”]. It is assumed to be set.

In this state, the object recognizing section 1 _B has a structure shown in FIG.
It is assumed that the image signal (d) of the object (B ₁ ) as shown in 9 (a) arrives and is input to the frame memory (FM) 11 and the smoothing filter (SMF) 12.

[0379] smoothing filter in the object recognition unit 1 _B (SM
F) 12, the Laplacian filter (EDF) 13 and the comparison unit (CMP) 14 function in the same manner as in the object recognition unit 1, and the Laplacian filter (EDF) 13 sends an edge signal (e) as shown in FIG. 69 (b). ) Was output, but compared with the edge threshold (e _TH ), the comparison unit (CMP) 1
The edge detection signal (ed) output from FIG.
As shown in (c), it is assumed that a part of the contour of the object (B ₁ ) is missing.

The logical filter (LGF) 1J has an edge detection signal (ed) output from the comparator (CMP) 14.
, The number of used logical stages (n _1J ) is calculated based on the count value (n _1G = “0”) transmitted from the counting unit (CNT) 1G.
The contour line signal (cl ₁ ) is configured with a width of, for example, one pixel, with one stage (n _1J = “1”) as shown in FIG. 70 (a).
It is assumed that a part of the contour of the object (B ₁ ) is missing.

The object number assigning unit (ONB) 15 and the number underfilling unit (NRA) 16 use the contour line signal (cl ₁ ) instead of the edge detection signal (ed) in the same manner as in the object recognizing unit 1. Functioning, and as a result, the object numbering unit (O
NB) 15 and number under packed portion (NRA) 16 is to have assigned the same object number (N _B) in the background and the object (B _1).

Each object number (N _B ) output from the number bottom filling unit (NRA) 16 is a flip-flop (FF) 1B.
Is output via. The comparison unit (CMP) 1C, the logical product unit (AND) 1D, the storage unit (MEM) 1E and the register (REG) 1F function in the same manner as in the object recognition unit _1A according to the embodiment of the present invention (Claim 14). However, the edge signal (e) transmitted from the storage unit (MEM) 1E is set to logic “1”, and the comparison result signal (cr _1C ) transmitted from the comparison unit (CMP) 1C is set to logic “1”. If set, set output signal (g _1D ) to logic “1”.

That is, although the object recognizing unit 1 _B detects the edge detection signal (ed), a part of the outline of the object (B ₁ ) is missing, so that the object independent of the background ( It is determined that it is not recognized as B ₁ ).

When the object recognizing unit 1 _B finishes the object recognizing process for the image signal (d) for one frame, the register (REG) 1F outputs the output from the logical product unit (AND) 1D. The signal (g _1D = logic “1”) is accumulated and held, and is transmitted to the counting unit (CNT) 1G.

The counting unit (CNT) 1G has a register (RE).
G) When it is detected that the output signal (g _1D ) transmitted from 1F is changed to the logic “1”, the count value (n
_1G ) takes a step from "0" to "1".

The logical filter (LGF) 1J is (CN
T) When the count value of _1G (n _1G ) advances one step, the number of logical stages used (n _1J ) corresponding to the count value after stepping (n _1G = “1”)
_Is increased to two steps (n _1J = “2”) and the contour line signal (c
l ₂ ) is configured to have a width of two pixels, for example.

The object recognition unit 1 _B is. Logical filter (LGF) 1J with newly increased number of used logical stages (n _1J ) to 2 stages
The object recognition process is executed by using the image signal (d) for the next one frame in the same process as described above.

As a result, from the comparison unit (CMP) 14,
An edge detection signal (ed) similar to that in the previous frame (FIG. 69)
(see (c)] is output, but the logic filter (LGF) 1J having the number of used logic stages (n _1J ) as two stages changes in a direction in which the contour line signal (cl ₂ ) is less likely to be lost.
As shown in FIG. 70 (b), the contour of the object (B ₁ ) will be closer to completion.

However, the number of logic stages used (n_1J) Is increased in two steps
Even if I use the logical filter (LGF) 1J
Body (B₁) Is completed as shown in Fig. 70 (b).
First, the background and the object (B₁) And the object number (N_B) Is still the same
If it is set to 1, the comparison unit (CMP) 1C,
AND section (AND) 1D, register (REG) 1F and
And counting unit (CNT) 1G functions as described above, and comparison
Comparison result signal (c
r_1C), The output signal output from the logical product section (AND) 1D
No. (g_1D) And the register (REG) 1F
Output signal (g _1D) Were initialized respectively
As a result of being set to the logic "1" again later, the counting unit (CN
T) Count value of 1G (n_1G) Again from "1" to "2"
It advances and is transmitted to the logic filter (LGF) 1J.

The logical filter (LGF) 1J has a count value (n _1G = “2”) which is one step higher than the counting unit (CNT) 1G.
Is received, the number of logical stages used (n _1J ) is set to 3 (n _1J =
"3"), and the contour line signal (cl ₃ ) is formed with a width of, for example, 4 pixels.

The object recognition unit 1 _B determines the number of used logical stages (n _1J ).
The object recognition process is executed in the same process as described above by using the image signal (d) for the next one frame by using the logical filter (LGF) 1J with the increased.

As a result, as shown in FIG. 70 (c), the contour line signal (cl ₃ ) by the logical filter (LGF) 1J changes in the direction in which it is more difficult to drop, and the contour of the object (B ₁ ) is changed. Will be nearing completion.

The object recognizing unit 1 _B performs the above process until the contour of the object (B ₁ ) is completed and the background and the object (B ₁ ) are given different object numbers (N _B ) or logically. Even if the filter (LGF) 1J uses the maximum number of logic stages used (n _1J ) and the number of pixels forming the contour line signal (cl) is increased to the maximum number, the contour of the object (B ₁ ) is partially missing. The above process is repeated until the process ends.

As is apparent from the above description, according to the embodiment of the present invention (Claim 10), the object recognizing unit 1 _B sequentially increases the number of logical stages (n _1J ) used in the logical filter (LGF) 1J, By sequentially increasing the number of pixels forming the contour line signal (cl), it becomes possible to recognize an object (B) that is difficult to recognize, and the object recognition capability of the object recognition unit 1 _B is improved.

Next, an embodiment of the present invention (claims 9 and 10) will be described with reference to FIG. FIG. 71 is a diagram showing an object recognition unit according to an embodiment of the present invention (claims 9 and 10).

The object recognition unit 1 _C according to the embodiment of the present invention (Claims 9 and 10) is the object recognition unit 1 _A according to the embodiment of the present invention (Claim 9) and the embodiment of the present invention (Claim 10). By using the function provided with the object recognition unit 1 _B according to the form, it is possible to achieve the same purpose as both object recognition units 1 _A and 1 _B.

The object recognition section 1 _C shown in FIG.
The object recognition unit 1 _B [FIG accordance with an embodiment of the embodiment according to the object recognition unit 1 _A [see Figure 65], and the present invention (claim 10) of the object recognition unit 1, the present invention (Claim 9) shown in 68]], a plurality of threshold value setting units (THR) 1
7, a selection unit (SEL) 1A, and a logical filter (LG
F) 1J, flip-flop (FF) 1B, comparison unit (CMP) 1C, logical product unit (AND) 1D, storage unit (MEM) 1E, register (REG) 1F, and counting unit (CNT). 1G and a decoding unit (DCR) 1H are added, and a read-only storage unit (ROM) 1K is further added.

In the read-only storage unit (ROM) 1K, the comparison unit (CM) executed in the object recognition unit _1A is executed.
P) and a switching process of edge threshold (e _TH) in 14, a logical filter that performed in the object recognition unit 1 _B of the aforementioned (L
GF) 1J plays a role of pre-storing the execution order and the number of continuous executions with the process of increasing the number of used logical stages (n _1J ).

For example, the object recognition unit 1_CBut first the comparison section
The (CMP) 14 has a threshold value setting unit (THR) 17₁Set to
Edge threshold (e_TH1) Edge detection
Outgoing signal (ed₁) Based on the logical filter (LGF) 1
J is the number of logical stages used (n_1J) One step (n_1J= "1")
Fixed contour signal (cl₁) By an object (B₁) Recognition
If the processing is unsuccessful, then the comparison unit (CMP)
14 edge thresholds (e _TH) Only the edge threshold (e_TH2)
, And the logical filter (LGF) 1J is the number of used logical stages
(N_1J) Is an unchanging object (B₁) Recognition process
If unsuccessful, then the logical filter (LGF) 1
Number of logical stages used by J (n_1J) Only one step to two steps (n_1J=
"2"), and the edge threshold of the comparison unit (CMP) 14
(E_TH) Is the edge threshold (e_TH2) Is an unchanging object (B
₁) Of the comparison unit (CMP) 14
Edge threshold (e_TH) And the logical filter (LGF) 1J
Number of used logical stages (n_1J) And when switching to one step alternately
In the read-only storage unit (ROM), the counting unit (CN
T) Count value of 1G (n_1G) Takes you one step further
(SEL) Selection signal (s) transmitted to 1A_1K) Walk of
And the count value transmitted to the logic filter (LGF) 1J
(N_1K), And the mechanism to alternately execute
It is stored.

In this state, when the image signal (d) for one frame arrives at the object recognition unit 1 _C , the selector (SE
L) 1A is a threshold setting unit (THR) 1 according to a selection signal (s _1K ) transmitted from a read-only storage unit (ROM) 1K.
7 ₁ is selected, the set edge threshold value (e _TH1 ) is supplied to the comparison unit (CMP) 14 to execute the detection processing of the edge detection signal (ed), and the logical filter (LGF) 1J is
Based on the count value (n _1K ) transmitted from the read-only storage unit (ROM) 1K, the number of logical stages used (n _1J ) is set to one stage (n _1J =
"1") is set and the contour line signal (cl ₁ ) is detected.

As a result, the recognition of the object (B ₁ ) is unsuccessful, and the output signal (g _1D ) is output from the register (REG) 1F.
Is set to a logical "1", the count value (n _1G ) of the counting unit (CNT) 1G advances one step and is transmitted to the read-only storage unit (ROM) 1K via the decoding unit (DCR) 1H. Selector (SEL) 1 from read only memory (ROM) 1K
Only the selection signal (s _1K ) transmitted to A is switched so as to select the threshold value setting unit (THR) 17 ₂ .

As a result, when the image signal (d) for the next one frame arrives, the comparison unit (CMP) 14 supplies the edge threshold value (e) supplied from the threshold value setting unit (THR) 17 _2.
TH2 ), the detection processing of the edge detection signal (ed) is executed in a state in which the detectability of the edge detection signal (ed) is further improved, and the logical filter (LGF) 1J is a read-only storage unit (ROM). Based on the previous _count value (n _1K ) transmitted from 1K, the number of used logical stages (n _1J ) is increased by one stage (n _1J =
The contour line signal (cl ₁ ) is detected with the value set to “1”.

As a result, the recognition of the object (B ₁ ) is unsuccessful, and the output signal (g _1D ) is output from the register (REG) 1F.
Is set to a logic "1", the count value (n _1G ) of the counting unit (CNT) 1G goes one step further and the read-only storage unit (RO)
M) 1K, read-only storage (ROM) 1K
Only the _count value (n _1K ) transmitted from the logic filter (LGF) 1J to the logic filter (LGF) 1J is equal to the number of used logic steps (n _1J ) by 2 steps (n _1J =).
The setting is changed to "2").

[0404] As a result, the next one frame of the image signal (d) arrives, the comparator (CMP) 14, the threshold setting unit (THR) 17 ₂ same previous edge threshold supplied from (e _{TH 2} The edge detection signal (ed) is detected by the logic filter (LGF) 1J, and the logical filter (LGF) 1J uses the count value (n _1K ) transmitted from the read-only memory (ROM) 1K. _1J ) is changed to a two-stage setting (n _1J = “2”), and the contour line signal (cl ₁ ) is detected while the detectability of the contour line signal (cl ₂ ) is further improved.

[0405] The object recognition unit 1 _C is these processes, succeeded in recognition of the object (B _1), until it is granted the background and the object (B ₁₎ is different from the object number (N _B), or a selector (SEL) 1A selects the last threshold value setting unit (THR) 17 _NA , and compares the last edge threshold value (e _{TH J} ) with the comparison unit (CM
P) 14 or a logical filter (LGF)
1J uses the maximum number of logic stages used and the contour line signal (cl)
Even if the number of pixels forming the object is increased to the maximum number, the above process is repeated until the contour of the object (B ₁ ) is partially missing.

The switching order of the edge threshold value (e _TH ) and the number of used logical steps stored in the read-only storage unit (ROM) 1K is not limited to the illustrated one, and is adapted to the characteristics of the target imaging screen, for example. A number of other modifications such as preferentially executing the switching of the edge threshold (e _TH ) or the number of used logic stages are considered, but in any case, the effect of the present invention does not change.

As is clear from the above description, according to the embodiment of the present invention (claims 9 and 10), the object recognizing unit 1 _C sequentially decreases the edge threshold value (e _TH ) of the comparing unit (CMP) 14. At the same time, by sequentially increasing the number of used logic stages of the logic filter (LGF) 1J, it becomes possible to recognize the object (B) that is difficult to recognize, and the object recognition capability of the object recognition unit 1 _C is improved. .

Next, an embodiment of the present invention (claim 11) will be described with reference to FIGS. 72 and 73. 72 is a diagram showing an object recognition unit according to the embodiment of the present invention (Claim 11), and FIG. 73 is a diagram illustrating a large image area object selection unit in FIG. 72.

In order to improve the economical efficiency and convenience of the infrared imaging device 100, the number of objects that can be recognized in one screen is set as follows.
It is effective to limit to a predetermined value [for example, 5]. The object recognition unit 1 _D shown in FIG. 72 occupies a larger area in the object recognition unit 1 shown in FIG. 3 among the objects (B) that can be recognized from the image signal (d) for one frame. A large image area object selection unit (LNS) 1L is added to add a function of selecting five objects, and a frame memory (F
_A frame memory (FM) 11 _A is added to M) 11.

The large image area object selection unit (LNS) 1L is
As shown in FIG. 73, a decoding unit (DCR) 1L1, a plurality of counting units (CNT) 1L2, and a selector (SEL) 1L.
3, counting unit (CNT) 1LD, five comparison units (CMP)
1L4, three logical product parts (AND) 1L5, four logical sum parts (OR) 1L6, four selectors (SEL) 1L
7, five registers (REG) 1L8, five registers (REG) 1L9, five comparison units (CMP) 1LA, decoding unit (DCR) 1LB and frame memory (FM) 1
It is composed of LC.

The counting unit (CNT) 1L2 is provided in a number equal to or more than the number of objects (B) recognizable from the image signal (d) for one frame (for example, the same number as the individual image signal processing means 1000 (K in the previous example)). Has been.

Further, each counting unit (CNT) 1L2 is referred to as a counting unit (CNT) 1L2 _i (where i = “1” to “K”), and each comparing unit (CMP).
1L4 and 1LA, as well as individual registers (REG)
1L8 and 1L9 are respectively replaced by a comparison unit (CMP) 1L
4 _j and 1 LA _j , and 1L8 _j and 1L9
_j called (for j = any of "1" to "5"), also logical unit each logical unit (the AND) 1L5 respectively (AND) 1L5 _k (where k = "3" to "5" Of each of the ORs), and each of the OR units (OR) 1L6 and the selectors (SEL) 1L7 is respectively connected to the OR unit (OR).
1L6 _m and selector (SEL) 1L7 _m (m =
Any of "2" to "5").

Each counting unit (CNT) 1L2 is assigned a specific object number (N _B ). In the initial state, all the counting units (CNT) 1L2 have count values (n
_1L2 ) is set to "0" and the counter (CN
T) 1LD the count value to be output as the object number (N _B) and (n _1LD) is set to "1", and all the register (REG) 1L8 accumulation content [counter (CNT) 1
The _count value (n _1L2i ) of L2 _i and the object number (N _B )] are set to “0” (hereinafter, the count value (n) set to “ ₀ ” is referred to as the initial count value “n ₀ ”). In addition, all registers (REG) 1L9 store the stored contents [object number (N
_B )] is set to "0".

72 and 73, a frame memory (FM) 11, a smoothing filter (SMF) 12, and a Laplacian filter (EDF) 1 in the object recognizing unit 1 _D.
3, comparison unit (CMP) 14, object numbering unit (ONB)
15, number bottom-filling unit (NRA) 16 and threshold setting unit (T
The HR) 17 functions in the same manner as in FIG. 3, and the image signal (d) for one frame that arrives at the image signal processing unit 200.
Multiple objects (B) are recognized from each, and each recognized object (B)
The object number (N _B ) is added to each of the pixel numbers, and the large image area object selection unit synchronizes with the image signal (d) for each pixel transmitted from the frame memory (FM) 11 to the frame memory (FM) 11 _A. (LNS) Transmit to 1L.

In the large image area object selection unit (LNS) 1L, each object number (N _B ) transmitted from the number downfilling unit (NRA) 16 is stored in the frame memory (FM) 1LC in parallel. , Is also transmitted to the decoding unit (DCR) 1L1.

The decoding unit (DCR) 1L1 analyzes each received object number (N _B ) and the corresponding counting unit (CNT) 1
The count value (n _1L2i ) of L2 is incremented. Therefore, when the object number (N _B ) for one frame has been received,
In each counting unit (CNT) 1L2 _i , the number of arrivals of the assigned object number (N _Bi ) is accumulated as a _count value (n _1L2i ).

After receiving the object number (N _B ) for one frame, the counting unit (CNT) 1LD counts the count value (n _1LD
= “1”) is output as the object number (N _B ) and transmitted to the selector (SEL) 1L3.

The selector (SEL) 1L3 includes a counting unit (C
NT) Object number transmitted from 1LD (N_B= "1")
Allocated counting unit (CNT) 1L2₁Count value (n
_1L21) Is extracted and transmitted from the counting unit (CNT) 1LD.
Object number (N_B= “1”) and five comparison units (C
MP) 1L4₁Through 1L4_FiveEach input terminal (A), cash register
Star 1L8₁, And four selectors (SE
L) 1L7₂Through 1L7 _FiveTo the input terminal (B) of
It

Each comparison unit (CMP) 1L4_jInput terminal
(B) has a corresponding register (REG) 1L.
8_jFrom the accumulated contents [counting initial value "n₀And object number
Issue (N _B= “0”) has been transmitted.

Each comparing unit (CMP) 1L4 _j has a count value (n _1L21 ) of the counting unit (CNT) 1L2 ₁ and an object number (N _B = “1”) transmitted to the input terminal (A). a count value (n _1L21), in the storage contents of the corresponding registers (REG) 1L8 _j is transmitted to the input terminal (B) [count initial value "n _0" and object number (n _B = "0")] of the count initial value "n _0" and then compares the, count initial value "n _0" =
Since it is “0”, any comparison unit (CMP) 1L4 _j
It is determined that the _count value (n _1L21 ) transmitted to the input terminal (A) is large, and the comparison result signal (cr _1L4i ) is output respectively.
Is set to logic "1".

Comparison unit (CMP) 1L4₁Output from
Comparison result signal (cr_1L41= Logic "1") is a register
(REG) 1L8₁, Selector (SEL) 1L7₂, Theory
Riwa Department (OR) 1L6₂, And the logical product part (AND) 1
L5₃1L5_FourAnd 1L5 _FiveTransmitted to and also compared
Division (CMP) 1L4₂The comparison result signal (c
r_1L42= Logical “1”) is the logical sum part (OR) 1L6₂,
And AND section (AND) 1L5₃1L5_FourAnd 1
L5_FiveAnd transmitted to the comparison unit (CMP) 1L4 ₃From
The output comparison result signal (cr_1L43= Logic "1")
OR section (OR) 1L6₃, And the logical product part (AND)
1L5_FourAnd 1L5_FiveTo the comparator (CM
P) 1L4_FourThe comparison result signal (cr_1L44=
Logical "1") is the logical sum (OR) 1L6_Four, And
Laying department (AND) 1L5_FiveTo the comparator (C
MP) 1L4_FiveThe comparison result signal (cr_1L45
= Logical “1”) is the logical sum part (OR) 1L6_FiveTransmitted to
Be done.

Each logical product part (AND) 1L5₃1L5_Four
And 1L5_FiveAre all comparison result signals (c
r_j) Is set to logic "1", each output signal
(G _{1 Lk}) Is set to logic "1".

Each output signal (g _1Lk ) has a corresponding selector (SEL) 1L7 _m and a logical sum unit (OR).
It is transmitted to 1L6 _m . Also, each logical sum unit (OR) 1L6
₂ is the input comparison result signal (cr _1L41 ) or (c
r _1L42 ) is set to logic “1”, so the output signal (g
_1L62 ) is set to logical "1", and the other logical OR (O
R) 1L6 _m [m = "any one of" 3 "to" 5 "], since the input output signal (g _1L5m ) or comparison result signal (cr _{1L 4m} ) is set to logic" 1 ", _Set the output signal (g _1L6m ) to be output to logic “1”.

Each output signal (g _1L6m ) [m = "any one of" 2 "to" 5 "] is registered in the register (REG) 1L.
It is transmitted to 8 _m . When the input comparison result signal (cr _1L41 ) is set to logic "1", the selector (SEL) 1L7 ₂ receives the signal input from the input terminal (A) [the count value of the counting unit (CNT) 1L2 _i] . (N _1L2i ) and object number (N _B )] are selected and output, and a selector (SEL)
1L7 _m [m = 3, 4, or 5] is a signal input from the input terminal (A) when the input output signal (g _1L5m ) is set to logic “1” [counter ( CNT) 1L2
_{i count} value (n _1L2i ) and object number (N _B )] are selected and output.

Register (REG) 1L8₁Is the comparison section
(CMP) 1L4₁Comparison result signal (cr
_1L41) Is set to logic "1", the initial counting during accumulation
Value "n ₀] And the object number (N_B= “0”)
After that, the count value (n_1L21) And object number (N_B
= “1”) is accumulated and retained.

The counting initial value “n ₀ ” and the object number (N _B = “0”) output from the register (REG) 1L8 ₁ are
It is inputted from the input terminal (A) of the selector (SEL) 1L7 ₂ and inputted to the register (REG) 1L8 ₂ via the selector (SEL) 1L7 ₂ .

When the output signal (g _1L62 ) input from the logical sum unit (OR) 1L6 ₂ is set to logic "1", the register (REG) 1L8 ₂ has the initial count value "n ₀ " during accumulation. and after outputting the object number (n _B = "0"), the storage selector (SEL) 1L7 count initial value input from the ₂ "n _0" and object number (n _B = "0")
Hold.

[0428] register (REG) 1L8 count initial _{value 2} is output "n _0" and object number (N _B = "0"), the
It is input from the input terminal (A) of the selector (SEL) 1L7 ₃ and input to the register (REG) 1L8 ₃ via the selector (SEL) 1L7 ₃ .

Similarly, the register (REG) 1L8₃
Is the initial count value "n" during accumulation.₀] And the object number (N_B
= “0”), then register (REG) 1L8₂
The initial count value "n output from₀] And the object number (N
_B= "0") is stored and held, and a register (REG)
1L8_FourIs the initial count value "n" during accumulation.₀And object number
Issue (N_B= (0)), then register (REG)
1L8₃The initial count value "n output from₀] And the object
Number (N_B= “0”) is accumulated and held, and is further registered
(REG) 1L8_FiveIs the initial count value "n" during accumulation.₀"
And object number (N _B= “0”) is output, then the register
(REG) 1L8_FourThe initial count value "n output from₀"
And object number (N_B= “0”) is accumulated and held.

As described above, the count value (n _1L21 ) extracted from the counting unit (CNT) 1L2 ₁ and the counting unit (CNT) 1
The object number (N _B = “1”) output from the LD is stored in the register (REG) 1L8 ₁ , and the other registers (REG) 1L8 _{2 to} 1L8 ₅ are stored in the initial count value “n”.
₀ "and object number (N _B =" 0 ") are accumulated and held in the forward.

Next, the counting unit (CNT) 1LD sets the count value.
(N_1LD) One step further, the object number (N_B= “2”)
And transmits it to the selector (SEL) 1L3. selector
(SEL) 1L3 is transmitted from the counting unit (CNT) 1LD
Object number (N_B= “2”) is assigned to the counting unit (C
NT) 1L2₂Count value (n_1L22) Extractor and counting unit
Object number (N) transmitted from (CNT) 1LD_B=
"2") together with 5 comparison parts (CMP) 1L4₁Through
1L4_FiveEach input terminal (A), register (REG) 1L
8₁, And four selectors (SEL) 1L7₂Through 1
L7 _FiveTo the input terminal (B).

Comparison unit (CMP) 1L4₁Input terminal
(B) has a register (REG) 1L8 ₁Total accumulated in
Numerical value (n_1L21) And object number (N_B= "1") is transmitted
Other comparison part (CMP) 1L4₂Through 1
L4_FiveInput terminal (B) of the register (REG) 1L
8₂Through 1L8_FiveThe initial count value "n"₀"and
Object number (N_B= “0”) has been transmitted.

[0433] Here, the counting unit (CNT) 1L2₂Counting
Value (n_1L22) Is the counting unit (CNT) 1L2₁Count value of
(N_1L21) Is smaller than the comparison part (CMP)
1L4 ₁Is a counter (CN) transmitted to the input terminal (A).
T) 1L2₂Count value of (n_1L22) And the input terminal (B)
Transmitted counter (CNT) 1L2₁Count value of
(N_1L21) Is compared with the size and is transmitted to the input terminal (A).
Counting unit (CNT) 1L2₂Count value of (n_1L22) Is
Counting unit (CNT) 1L2 transmitted to the power terminal (B)₁of
Count value (n_1L21) Output ratio when it is determined to be smaller than
Comparison result signal (cr_1L41) Is set to logic "0",
Other comparison part (CMP) 1L4₂Through 1L4_FiveType
Counting unit (CNT) 1L2 transmitted to terminal (A)₂Total
Numerical value (n_1L22) And the counting first transmitted to the input terminal (B)
Term value "n₀Is compared to the input and output terminal (A).
Counting unit (CNT) 1L2₂Count value of (n_1L22)But,
The initial count value "n" transmitted to the input terminal (B)₀Greater than
Comparison result signal (cr_1L42) Or
(Cr_1L45) Is set to logic "1".

As a result, the register (REG) 1L8
₁ is the count value (n _1L22 ) and the object transmitted from the selector (SEL) 1L3 because the comparison result signal (cr _1L41 ) transmitted from the comparison unit (CMP) 1L4 ₁ is set to logic “0”. The number (N _B = “2”) is not stored, and the _count value (n _1L21 ) and the object number (N _B =) being stored are stored.
Retain "1").

Further, the selector (SEL) 1L7 ₂ has a comparison result signal (c) transmitted from the comparison unit (CMP) 1L4 _1.
Since r _1L41 ) is set to logic “0”, the count value (n _1L22 ) and the object number (N _B = “2”) transmitted from the selector (SEL) 1L3 to the input terminal (B) are _stored in the register ( REG) 1L8 ₂ .

Further, the logical sum unit (OR) 1L6 ₂ outputs the comparison result signal (cr) output from the comparison unit (CMP) 1L4 _2.
Since _{the 1L42)} it is set to a logic "1", set register (REG) 1L8 ₂ output signal for transmitting to (g _1L62) to logic "1".

As a result, the register (REG) 1L8
₂ is the initial count value “n ₀ ” and the object number (N
After outputting _B = "0"), the input _count value (n _1L22 ) and the object number (N _B = "2") are accumulated and held.

Comparison result signals (cr _{1L 42} ) to (c _{1 L 42} ) to (c _{1L 42} ) output from the comparison units (CMP) 1L 4 _{2 to} 1L 4 _5.
r _1L45 ) is set to logic “1”, the logical product parts (AND) 1L5 _{3 to} 1L5 ₅ are set to logic “1”, and the selectors (SEL) 1L7 _{3 to} 1L7 _{5 are set.}
Select the input terminal (A), the logical sum unit (O
R) 1L6 _{3 to} 1L6 ₅ to register (REG) 1L
8 _{3 to} 1L8 ₅ output signals (g
When _1L63) to (g _1L65) is set to a logic "1", the registers (REG) 1L8 ₃ to 1L8 _5, the count initial value in storage "n _0" and object number (N _B = "0" ) Is output, each register (REG) 1L8 _{2 to} 1L8
Output from ₄ , selector (SEL) 1L7 _{3 to} 1L
Selector (SEL) 1L7 from each input terminal (A) of 7 _5
3 or via 1L7 ₅ each register (REG) 1L8
₃ to 1L8 count initial value is transmitted to the ₅ 'n ₀ "and object number (N _B =" 0 ") is stored and held a.

As a result of the above, first the counting unit (CNT) 1L
Two₁Larger count value (n_1L21)and
Object number (N_B= “1”) is the register (REG) 1L
8₁Is stored and stored in the counter, then the counting unit (CNT) 1L2₂
Smaller count value (n_1L22) And objects
Number (N_B= “2”) is the register (REG) 1L8 ₂
Other registers (REG) 1L8
₃Through 1L8_FiveIs the initial count value "n₀And object number
Issue (N_B= “0”) is sequentially accumulated and held.

Subsequently, the counting unit (CNT) 1LD counts
Value (n_1LD) Are sequentially stepped, and the object number (N_B= "3"
Through (5)) to the selector (SEL) 1L3
Then, the selector (SEL) 1L3 turns into a counting unit (CNT).
The object number (N_B= “3” to
"5") is assigned to the counting unit (CNT) 1L2₃To 1L
Two _FiveCount value (n_1L23) To (n_1L25) Are sequentially extracted
And the object number transmitted from the counting unit (CNT) 1LD
(N_B= “3” to “5”) and five comparison units (C
MP) 1L4₁Through 1L4_FiveEach input terminal (A), cash register
Star 1L8_{1 (}, And four selectors (SE
L) 1L7₂Through 1L7_FiveTo the input terminal (B) of
It

Here, the count values (n _1L23 ) to (n _1L25 ) of the counting units (CNT) 1L2 _{3 to} 1L2 ₅ are (n
_1L21 > n _1L22 > n _1L23 > n _1L24 > n _1L25 ), each comparison section (CMP) 1L4, logical product section (AND) 1L5, logical sum section (OR) 1L6, selector (selector) SEL) 1L7 and register (REG) 1L
8 functions in the same manner as described above, and each extracted count value (n
_1L23 ), (n _1L24 ) and (n _1L25 ) together with the object numbers (N _B = “3”, “4” and “5”), respectively, in order to register (REG) 1L8 ₃ , 1L8 ₄ and 1L8 ₅
Accumulate and hold in.

As a result of the above, first the counting unit (CNT) 1L
Count values (n _1L21 ) sequentially extracted from 2 _{1 to} 1L2 ₅
To (n _1L25 ) are counting units (CNT) in descending order.
1LD output the object number (N _B = "1" to "5")
Together with this, they are sequentially accumulated and held in registers (REG) 1L8 _{1 to} 1L8 ₅ .

Next, when the counting unit (CNT) 1LD advances the counted value (n _1LD ) by one step and transmits it to the selector (SEL) 1L3 as the object number (N _B = “6”), the selector (SEL) 1L3 Is the counting unit (C) to which the object number (N _B = “6”) transmitted from the counting unit (CNT) 1LD has been assigned.
The count value (n _1L26 ) is extracted from the NT) 1L2 ₆ and the object number (N _B =) transmitted from the counting unit (CNT) _1LD.
"6") together with the input terminals (A) of the _five comparison units (CMP) 1L4 _{1 to} 1L4 ₅ and the register (REG) 1L
8 ₁ and four selectors (SEL) 1L7 _{2 to} 1
Transmitted to L7 ₅ of the input terminal (B).

Comparators (CMP) 1L4 _{1 to} 1L4 ₅
Input terminal (B) of each register (REG) 1
L8 ₁ to 1L8 ₅ accumulation already count value (n _1L21) to (n _{1L 25)} and object number (N _B = "1" to "5")
Are transmitted respectively.

Here, the counting unit (CNT) 1L2₆Counting
Value (n_1L26) Is the total count value (n _1L21) Or
(N_1L25) Is larger than the input terminal (A)
The transmitted count value (n_1L26) And that to the input terminal (B)
The transmitted count value (n_1L21) To (n_1L25) And
Comparing each comparison part (CMP) 1L4₁Through 1L4_FiveIs out
Force comparison result signal (cr_1L41) To (cr_1L45)
Set to logical "1" respectively.

In this state, each comparison unit (CMP) 1L
4, logical product part (AND) 1L5, logical sum part (OR) 1L
6, selector (SEL) 1L7 and register (RE
G) 1L8 functions as described above, resulting in
(REG) 1L8₁Is the count value (n_1L21) Oh
And object number (N_B= “1”) is extracted, then the selector
(SEL) Count value transmitted from 1L3 (n_1L26) And
And object number (N_B= “6”)
Register (REG) 1L8₂Through 1L8_FiveRespectively
Count value during accumulation (n_1L22) To (n_1L25) And object number
Issue (N_B= “2” to “5”) respectively,
Each register (REG) 1L8₁Through 1L8 _FourExtracted from
Selector (SEL) 1L7₂Through 1L7_Five
Of the selector (SE).
L) 1L7₂Through 1L7_FiveEach count transmitted via
Value (n_1L21) To (n_1L24) And object number (N_B=
"1" to "4") are received and accumulated.

Register (REG) 1L8_FiveExtracted from
Count value (n_1L25) And object number (N_B=
"5") is discarded. From the above, this time counting unit (C
NT) 1L2₆The maximum count value (n _1L26)
And the object number output from the counting unit (CNT) 1LD
(N_B= “6”) is register (REG) 1L8₁Stored in
They are stacked and held, and until then, register (REG) 1L8₁No
To 1L8_FourEach count value (n_1L21) Or
(N_1L24) And object number (N_B= "1" to "4")
Is each register (REG) 1L8₂Through 1L8_FiveForward to
Stored and held in the register (REG) 1L8_FiveStored in
The minimum count value (n_1L25) And objects
Number (N_B= “5”) will be discarded.

Next, when the counting unit (CNT) 1LD advances the counted value (n _1LD ) by one step and transmits it to the selector (SEL) 1L3 as the object number (N _B = “7”), the selector (SEL) 1L3 Is the counting unit (C) to which the object number (N _B = “7”) transmitted from the counting unit (CNT) 1LD has been assigned.
The count value (n _1L27 ) is extracted from the NT) 1L2 ₇ and the object number (N _B =) transmitted from the counting unit (CNT) _1LD.
"7") together with the input terminals (A) of the _five comparison units (CMP) 1L4 _{1 to} 1L4 ₅ and the register (REG) 1L
8 ₁ and four selectors (SEL) 1L7 _{2 to} 1
Transmitted to L7 ₅ of the input terminal (B).

Comparators (CMP) 1L4 _{1 to} 1L4 ₅
Input terminal (B) of each register (REG) 1
Count values (n _1L26 ) accumulated in L8 _{1 to} 1L8 ₅ , (n
_1L21 ) to (n _1L24 ) and the object number (N _B = “6”,
"1" to "4") are respectively transmitted.

[0450] Here, the counting unit (CNT) 1L2 ₇ count value (n _1L27) are all counts in the accumulation (n _1L26),
(N _1L21) to when the (n _1L24) smaller than, the count value is transmitted to the input terminal (A) (n _1L27), to input terminals (B) the transmitted count value (n _1L26), (n
_1L21 ) to (n _1L24 ) comparing parts (CMP)
1L4 _{1 to} 1L4 ₅ are the comparison result signals (cr
_1L41 ) to (cr _1L45 ) are set to logic "0", respectively.

In this case, each logical product part (AND) 1
L5_kOutput signal (g _1L5k), And discussions
Riwa Department (OR) 1L6_mOutput signal (g
_1L6m) Is set to logical "0", so each selection
(SEL) 1L7_mAnd each register (REG) 1L
8_jAre not activated at all, and count values (n
_1L26), (N_1L21) To (n_1L24) And object number (N
_B= “6”, “1”, or “4”)
Hold and register (REG) 1L2₇Counts extracted from
Value (n_1L27) And object number (N_B= “7”) is discarded
To be done.

As described above, the present counting unit (CNT) 1L2
₇Minimum count value (n _1L27) Is the counting unit
(CNT) 1LD output object number (N_B=
"7") and discarded until the register (REG)
1L8₁Through 1L8_FiveEach count value accumulated / held in
(N_1L26), (N_1L21) To (n_1L24) And object number
(N _B= “6”, “1”, or “4”) is the current status of each
Register (REG) 1L8₁Through 1L8_FiveHeld in
It will be.

Through the above process, the counting unit (CNT) 1L2 _i
When all the _count values (n _1L2k ) accumulated in are extracted,
The five sets of object numbers (N _Bj ) accumulated in each register (REG) 1L8 _j correspond to the corresponding register (REG).
It is transferred to 1L9 _j and stored / held.

The object number (N _Bj ) stored / held in each register (REG) 1L9 _j is transmitted to the corresponding input terminal (A) of the comparing section (CMP) 1LA _j . The five object numbers (N _Bj ) are registered in the register (REG) 1L9 _j.
Frame memory (FM) 1LC when stored and stored in
Sequentially extracts the object numbers (N _B ) that are being stored and held,
The signal is transmitted to each input terminal (B) of the five sets of comparators (CMP) 1LA _j .

Each comparing section (CMP) 1LA _j has an object number (N _B ) sequentially transmitted from the frame memory (FM) 1LC to the input terminal ( _B ) and a corresponding register (RE).
G) Collate each object number (N _Bj ) transmitted from 1L9 _j to the input terminal (A), and if both object numbers (N _B ) match, the object transmitted to the input terminal (B) The number (N _B ) is transmitted to the decoding unit (DCR) 1LB, but when both object numbers (N _B ) do not match, the output object number (N _B ) is set to a preset invalid number [[ For example, an object number (N _B = “0”, etc.) is generated, and the decoding unit (DCR)
Transfer to 1LB.

The decoding unit (DCR) 1LB includes the comparison units (C
MP) Valid object number (N _Bj ) transmitted from 1LA _j
As the output of the object recognition unit 1 _D.
M) 11 and 11 _A , which are transmitted to a distributor (MUL) 221, a combiner (SEL) 222, and the like (not shown) in synchronization with the image signal (d), but an invalid number [object number (N _B = “0”, etc.] is converted into a number that is not the target of the display quality processing by the image signal processing unit 200, and then is synchronized with the image signal (d) extracted from the frame memories (FM) 11 and 11 _A. , A distribution unit (MUL) 22 not shown
1 to the synthesizing unit (SEL) 222 and the like.

As is clear from the above description, according to the embodiment of the present invention (Claim 11), the large image area object selection unit (LNS) 1L is provided with each object number assigned to each pixel for one frame. In order to compare the sizes of the occupied areas of the respective objects (B) by counting (N _B ), and limit the predetermined number (five in the previous example) of the largest occupied areas of the objects (B) as recognition targets. It is possible to limit the number of objects (B) that occupy a large specific weight in the image pickup screen, and it is possible to significantly improve the economical efficiency and convenience of the infrared imaging device 100.

72 and 73 are merely one embodiment of the present invention (claim 11), and the limit number of objects (B) is not limited to five, for example. Many variations are considered, but in any case, the effect of the present invention does not change. The object number (N _B ) determined to be out of the limitation is not limited to the one to which an invalid number such as (N _B = “0”) is given, and the object number (N _B ) given to the background is not limited. There are many other modifications that can be taken into consideration, such as conversion to the above. However, the effect of the present invention does not change in any case.

Next, an embodiment of the present invention (claim 12) will be described with reference to FIG. FIG. 74 is a diagram showing an object recognition unit according to the embodiment of the present invention (claim 12).

The infrared image device 100 according to the embodiment of the present invention (Claim 12) also has the same number of objects that can be recognized in one screen for the same purpose as the infrared image device 100 according to the embodiment of the present invention (Claim 11). It has a function of limiting

The object recognition unit 1 _E shown in FIG.
In the object recognition unit 1 shown in FIG. 2, a plurality (N _E ) of threshold value setting units (THR) 17 [individual threshold value setting units (THR) 17
_ne (where ne is any one of 1 to N _E ), a selection unit (SEL) 1A, and comparison units (CMP) 1N and 1
Q, a register (REG) 1P, an object number upper limit setting unit (NBU) 1R, a counting unit (CNT) 1S, and a decoding unit (DCR) 1T are added.

Each threshold value setting unit (THR) 17, selector (SEL) 1A, counting unit (CNT) 1S and decoding unit (DCR) 1T is an object recognition unit 1 _A according to an embodiment of the present invention (claim 14). 65], a threshold value setting unit (THR) 17, a selector (SEL) 1A, a counting unit (C)
It has substantially the same functions as the NT) 1G and the decoding unit (DCR) 1H.

Also, the object number upper limit setting unit (NBU) 1R has an upper limit of the number of objects that can be recognized by the object recognizing unit 1 _E (for example, five, hereinafter referred to as the object upper limit number (n _BU )).
Is set in advance.

Further, each threshold value setting unit (THR) 17 _{1 to} 1
Different edge thresholds (e _TH1 ) to (e _TH1 ) to 7 _NEs
THNE ) [however, e _TH1 <e _TH2 ...... <e _THNE ] is set.

The selection unit (SEL) 1A is connected to the decoding unit (DC
R) Select signal (s) transmitted from 1T _1T) Specified by
Threshold setting unit (THR) 17_neSelect the threshold setting section
(THR) 17_neThe edge threshold (e
_THne) Can be transmitted to the comparison unit (CMP) 14.

In the initial state, the comparison unit (CMP) 1
Comparison result signal (cr_1Q) Is a logical "0"
The counting unit (CNT) 1S is set to
(N_1S) Is set to “0”, and the decoding unit (DCR) 1
Select signal output from T (s _1T) Is the selector (SE
L) Threshold setting unit (THR) 17 for 1A₁And let the threshold
Value setting unit (THR) 17₁Edge threshold set to
(E_TH1) Is transmitted to the comparison unit (CMP) 14.
And

It is assumed that no object number (N _B ) is stored in the register (REG) 1P in the initial state. In this state, the image signal (d) for one frame containing a plurality of objects (B) is built in the object recognition unit 1 _E.
Has arrived and is input to the frame memory (FM) 11 and the smoothing filter (SMF) 12.

[0468] smoothing filter (SM in the object recognition unit 1 _E
F) 12, the Laplacian filter (EDF) 13, the comparison unit (CMP) 14, the object number assigning unit (ONB) 15 and the number downfilling unit (NRA) 16 are the same as those in the object recognition unit 1 [see FIG. 3]. Functioning, Number Bottom Filling Unit (NRA) 1
From 6, the object number (N _B ) assigned to each object ( _B )
Are transmitted in synchronization with the image signal (d) transmitted from the frame memory (FM) 11.

The comparison part (CMP) 1N is the number bottom filling part (N
And object number (N _B) sent from RA) 16, a register (REG) object number in storing and (N _B) and compares the 1P, larger object number (N _BL) register (RE
G) Accumulate in 1P.

In the initial state, the register (REG)
Since the object number in 1P (N _B) is not stored, the number under packed portion (NRA) 16 sent by object numbers from (N _B) is stored in the register (REG) 1P.

When the above process is executed for all image signals (d) for one frame, the register (REG) 1
In P, the largest object number (N _B ) [N _B] among the object numbers (N _B ) given to each object (B) recognized in the image signal (d) for one frame that has been received is shown. Hereinafter, the maximum object number (N _BM ) will be stored.

Assuming that the object number (N _B ) is a continuous integer from the number “1”, the maximum object number (N _BM ) is recognized in the image signal (d) for one frame. It represents the total number of objects (B ₁ ) that have been created.

When the object recognizing unit 1 _E finishes executing the object recognizing process on the image signal (d) for one frame, the comparing unit (CMP) 1Q determines the maximum object number stored in the register (REG) 1P. (N _BM ), that is, the total number of recognized objects (B) and the object upper limit number (n _BU ) set in the object number upper limit setting unit (NBU) 1R are compared, and the object number (N _B ) is the object. not more than the upper limit number (n _BU), the total number of objects that have been recognized in the images of individual frames signal (d) (B) is, to verify that it is the object upper limit number (n _BU) or less, and outputs The comparison result signal (cr _1Q ) is set to logic “0”, and the counting unit (CNT)
1S and the decoding unit (DCR) 1T respectively count values (n
_1S ) and the selection signal (s _1T1 ) are held as they are, and the selector (SEL) 1A continues to have a threshold value setting unit (THR) 17
Select ₁ to transmit the previous edge threshold (e _TH1 ).

If the object number (N _B ) exceeds the object upper limit number (n _BU ) as a result of the size comparison, the total number of objects (B) recognized in the image signal (d) for one frame. However, it is determined that the number of objects exceeds the upper limit number (n _BU ) of the objects, and the output comparison result signal (cr _1Q ) is set to the logic “1”.

The comparison result signal (cr _1Q = logic “1”) output from the comparison unit (CMP) 1Q is the counting unit (CNT).
It is transmitted to 1S. The counting unit (CNT) 1S receives the comparison result signal (cr _1Q ) transmitted from the comparison unit (CMP) 1Q.
However, when it detects that the setting has been changed from the logic "0" to the logic "1", the count value ( _n1S ) is advanced from "0" to "1".

The decoding unit (DCR) 1T includes a counting unit (CN
T) When the count value (n _1S ) of 1G advances, a selection signal (s _1T2 ) corresponding to the count value (n _1S = “1”) after stepping is transmitted to the selector (SEL) 1A.

The selector (SEL) 1A has a decoding unit (DC
R) 1T to select signal (s_1T2) Is received, the threshold setting
Fixed part (THR) 17₂Select the threshold setting unit (THR)
17 ₂Edge threshold (e)_TH2) The comparison section
(CMP) 14 is transmitted.

In this state, when the image signal (d) for the next one frame arrives at the object recognition unit 1 _E , the object recognition unit 1 _E
E is a process similar to that described above, recognizes the object (B) within one frame of the image signal (d), after applying the object number (N _B), the maximum object number (N _B), i.e., recognition The total number of objects (B) that have been _processed is compared with the object upper limit number (n _BU ), but this time, the edge threshold value (e
_{Since TH2} ) is set to be larger than the previous edge threshold value (e _TH1 ), the comparison unit (CMP) 14 sends the edge signal (e) transmitted from the Laplacian filter (EDF) 13.
Therefore, it becomes difficult to detect the edge detection signal (ed) and the maximum object number (N _BM ) accumulated in the register (REG) 1P, that is, the total number of recognizable objects (B) may decrease.

Similarly, the object recognition unit 1_ERecognized
The total number of objects (B) is the upper limit number of objects (n_BU) Becomes
Repeat the above process until the edge threshold at that stage.
Value (e _TH) Is fixedly transmitted to the comparison unit (CMP) 14
Object recognition unit 1_ETo operate.

As is clear from the above description, according to the embodiment of the present invention (claim 12), the total number of objects (B) that can be recognized in one frame is less than or equal to the object upper limit number (n _BU ). As described above, by sequentially decreasing the edge threshold value (e _TH ) supplied to the comparison unit (CMP) 14, the number of objects that can be recognized by the object recognition unit 1 _E can be suppressed to the object upper limit number (n _BU ) or less. This makes it possible to significantly improve the economical efficiency and convenience of the infrared imaging device 100.

2 to 74 are merely one embodiment of the present invention, and include, for example, the image signal processing section 200, the object recognizing means 700, the distributing means 800, the synthesizing means 900 and the individual image signal processing means 1000. The configuration is not limited to that shown in the figure, and many other modifications may be considered, such as implementing each function implemented by the hardware configuration by causing a processor to execute a required program. In any case, the effect of the present invention does not change. Further, the image pickup screen targeted by the present invention is not limited to the illustrated one, and many other modifications may be considered, but in any case, the effect of the present invention does not change. Further, it goes without saying that the infrared image device 100 which is the object of the present invention is not limited to that shown in the drawings.

[0482]

As described above, the present invention (claims 1 to 8).
According to this, even when there are a plurality of target objects in one image pickup screen, the optimum display quality processing can be executed at once for each target object, and the present invention (claims 9 and 10) is provided. According to the present invention, the recognition accuracy of the target object existing in one imaging screen is improved, and further, according to the present invention (Claim 11 and Claim 12), it is possible to display the target objects among a plurality of objects existing in one imaging screen. It is possible to recognize only a predetermined number of target objects to be subjected to the quality processing, and the economical efficiency of the infrared imaging device is improved.

[Brief description of drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is an infrared imager according to an embodiment (first) of the present invention (claim 2).

3 is an object recognition unit in FIG.

4 is an object number assigning unit in FIG.

[Fig. 5] Fig. 5 is a bottom part of the number

6 is a histogram conversion unit in FIG.

FIG. 7: Object number assigning process on imaging screen

FIG. 8 is a histogram conversion process in FIG.

9 is an image signal in FIG.

FIG. 10 is an embodiment (No. 1) of the present invention (claim 3).
Image signal processing unit by

11 is a histogram equalization unit in FIG.

FIG. 12 is a histogram equalization process in FIG.

FIG. 13 is an image signal in FIG.

FIG. 14 is an embodiment (first) of the present invention (claim 4).
Image signal processing unit by

15 is an automatic level adjusting unit in FIG.

FIG. 16 is an image signal in FIG.

FIG. 17 is an embodiment (No. 1) of the present invention (Claim 5).
Image signal processing unit by

18 is an automatic gain adjustment unit in FIG.

FIG. 19 is the image signal in FIG.

FIG. 20 is an image signal processing section according to an embodiment of the present invention (claim 6);

FIG. 21 is an image signal in FIG.

FIG. 22 is an embodiment (No. 2) of the present invention (claim 2).
Image signal processing unit by

FIG. 23 is the image signal in FIG. 22.

FIG. 24 is a second embodiment of the present invention (claim 3).
Image signal processing unit by

FIG. 25 is the image signal in FIG. 24.

FIG. 26 is an embodiment (No. 2) of the present invention (Claim 4).
Image signal processing unit by

FIG. 27 is the image signal in FIG. 26.

FIG. 28 is an embodiment (No. 2) of the present invention (Claim 5).
Image signal processing unit by

FIG. 29 is the image signal in FIG. 28.

FIG. 30 Embodiment (third) of the present invention (claim 2)
Image signal processing unit by

FIG. 31 is the image signal in FIG. 30.

FIG. 32 is an embodiment (third) of the present invention (claim 3).
Image signal processing unit by

FIG. 33 is the image signal in FIG. 32.

FIG. 34 is an embodiment (first) of the present invention (claim 7).
Image signal processing unit by

FIG. 35 is the image signal in FIG. 34.

FIG. 36 is an embodiment (part 2) of the present invention (claim 7).
Image signal processing unit by

FIG. 37 is the image signal in FIG. 36.

FIG. 38 is an embodiment (third) of the present invention (claim 7).
Image signal processing unit by

FIG. 39 is the image signal in FIG.

FIG. 40 is an embodiment (No. 4) of the present invention (Claim 7).
Image signal processing unit by

FIG. 41 is the image signal in FIG. 40.

FIG. 42 is an embodiment (No. 5) of the present invention (Claim 7).
Image signal processing unit by

FIG. 43 is the image signal in FIG. 42.

FIG. 44 is an embodiment (No. 6) of the present invention (Claim 7).
Image signal processing unit by

FIG. 45 is the image signal in FIG. 44.

FIG. 46 is an embodiment (No. 7) of the present invention (Claim 7).
Image signal processing unit by

FIG. 47 is the image signal in FIG.

FIG. 48 is an embodiment (first) of the present invention (claim 8).
Image signal processing unit by

FIG. 49 is the image signal in FIG.

FIG. 50 is an embodiment (part 2) of the present invention (claim 8).
Image signal processing unit by

51 is an image signal in FIG.

FIG. 52 is an embodiment (third) of the present invention (claim 8).
Image signal processing unit by

53 is an image signal in FIG. 52.

FIG. 54 is an embodiment (fourth) of the present invention (claim 8).
Image signal processing unit by

FIG. 55 is the image signal in FIG. 54.

FIG. 56 is an embodiment (No. 5) of the present invention (Claim 8).
Image signal processing unit by

FIG. 57 is a histogram conversion unit in FIG.

FIG. 58 is the image signal in FIG. 56.

FIG. 59 is an embodiment (No. 6) of the present invention (claim 8).
Image signal processing unit by

FIG. 60 is a histogram equalization unit in FIG. 59.

FIG. 61 is the image signal in FIG. 59.

FIG. 62 is an embodiment (No. 7) of the present invention (Claim 8).
Image signal processing unit by

63 is an automatic gain adjustment unit in FIG. 62. FIG.

64] The image signal in FIG. 62

FIG. 65 is an object recognizing unit according to an embodiment of the present invention (claim 9);

66 is an edge signal shown in FIG.

67 is an edge detection signal in FIG. 65.

FIG. 68 is an object recognizing unit according to an embodiment of the present invention (claim 10);

69 is an edge signal and an edge detection signal in FIG. 68.

70] The contour line signal in FIG. 68

71. An object recognition unit according to an embodiment of the present invention (claims 9 and 10)

72. An object recognition unit according to an embodiment of the present invention (Claim 11)

73 is a large image area object selection unit in FIG. 72;

74] An object recognition unit according to an embodiment of the present invention (Claim 12).

[FIG. 75] A conventional infrared imaging device (first)

76] The image signal in FIG. 75

FIG. 77: Conventional infrared imaging device (2)

78] The image signal in FIG. 77

[Explanation of Codes] 1, 1 _A , 1 _B , 1 _C , 1 _D , 1 _E Object recognition unit 2, 2 _A histogram conversion unit (HP) 3, 3 _A histogram equalization unit (HE) 4 Automatic level adjustment unit (ALC) 5, 5 _A Automatic gain adjustment unit (AGC) 9 Automatic level / gain adjustment unit (ALC + AGC) 11, 11 _A , 21, 31, 15F, 15G, 15L,
161, 1LC, 212 Frame memory (FM) 12 Smoothing filter (SMF) 13 Laplacian filter (EDF) 14, 1C, 1N, 1Q, 27, 51, 52, 15I,
1L4, 1LA Comparing Unit (CMP) 15 Object Number Assigning Unit (ONB) 16 Number Downfilling Unit (NRA) 17 Threshold Setting Unit (THR) 1B, 152, 153, 154, 15B, 15C, 15
D, 15H, 15M Flip-flop (FF) 1D, 157, 15J, 1L5 Logical product part (AND) 1E Storage part (MEM) 1F, 1P, 29, 42, 43, 53, 54, 58, 1
5E, 1L8, 1L9, 233, 242, 245
Register (REG) 1G, 1S, 158, 165, 1L2, 1LD Counting unit (CNT) 1H, 1T, 155, 1L1, 1LB Decoding unit (DC
R) 1J Logical filter (LGF) 1K Read-only storage unit (ROM) 1L Large image area object selection unit (LNS) 1R Object number upper limit setting unit (NBU) 22, 26, 2F, 32, 36, 15K, 162, 16
7 dual port memory (DPM) 23, 2J, 33, 3F, 41, 46, 55, 5D, 1
63, 202, 217, 243, 253 Adder 24, 34, 164 Number "1" setting unit 25, 2E, 35, 166 Address generator (ADG) 28, 37 Accumulator (ACL) 2A, 2D, 2K, 38, 3C, 3D, 44, 57, 5
9, 5B, 205, 216, 246 Multipliers 2B, 2C, 3A, 45, 56 Inverse number generator (CVM) 2G Histogram threshold setting unit (HTH) 2L, 3E, 5C Numerical "2" setting unit 39, 47 All pixels Number setting unit (NF) 2H, 3B, 5A Display gradation setting unit (MV) 151, 15A Line memory (LM) 156, 15N Negative OR unit (NOR) 1A, 159, 1L3, 1L7, 232 Selector (S)
EL) 1L6 OR unit (OR) 201 Adjustment level setting unit 203, 206 Upper and lower limit limiting unit 204 Adjustment gain setting unit 211 DSC unit 213 Object identifying unit 214 Gain coefficient generating unit 215 Level control signal generating unit 221, 231, 234 , 241, 244 Distributor (M
UL) 222 Combiner (SEL) 230 Multi-function image signal processor 251 Average value calculator (MN) 252 Coefficient multiplier (CFC) 254 Average value order adjustment level generator (MNO) 100 Infrared image device 200 Image signal processor 300 infrared detector 400 A / D converter 500 D / A converter 600 image display device 700 object recognition means 800 distribution means 900 combining means 1000 individual image signal processing means 1011 to 1013, 1024, 1031, 103
2, 1041 to 1044, 1051 to 1054, 1
061, 1062, 1064 individual image signal processing unit

─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Tamotsu Hashiki 2-2-6 Jomi, Chuo-ku, Osaka City, Osaka Prefecture Fujitsu Kansai Digital Technology Co., Ltd. (72) Inventor Hironori Nakamura Central Osaka City, Osaka Prefecture 2-26, Jomi, Ward, Fujitsu Kansai Digital Technology Co., Ltd. (72) Inventor, Hoshi Matsumoto 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited (72) Inventor, Yuichi Matsuda 4-1-1 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Within Fujitsu Limited (72) Inventor Shinji Miyazaki 4-1-1 1-1, Kamiodanaka, Nakahara-ku, Kawasaki, Kanagawa Within Fujitsu Limited (72) Kentaro Nakamura 4-1-1 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa, Fujitsu Limited (56) Reference JP-A-8-223485 (J , A) JP 9-233461 (JP, A) JP 7-59754 (JP, A) JP 8-111816 (JP, A) JP 7-3202054 (JP, A) JP 10-63812 (JP, A) JP-A-8-111817 (JP, A) JP-A-4-187142 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G06T 1/00 280 H04N 5/262 H04N 5/33 H04N 7/18

Claims (12)

(57) [Claims] 1. An infrared imaging device for capturing the temperature of an image pickup screen as an image signal and displaying the temperature distribution on the screen, wherein a plurality of objects having a temperature difference of a predetermined value or more with respect to the background are individually and independently stored in the image pickup screen. Object recognizing means for recognizing using all the image signals of, the distributing means for separating the image signals corresponding to the respective objects recognized by the object recognizing means, and the image signal corresponding to the respective objects separated by the distributing means Are individually received, and a plurality of individual image signal processing means for processing the display quality of the object on the display screen, and an image signal corresponding to each object processed by each of the individual image signal processing means are synthesized. And a dynamic range expansion display system for each object, which comprises: a synthesizing means for assembling an image signal of the entire image pickup screen. 2. The individual image signal processing means obtains a frequency distribution for each temperature gradation for each pixel in one frame, and then extracts only the temperature gradation whose frequency is equal to or higher than a predetermined threshold value to display the display. 2. The dynamic range expansion display system for each object according to claim 1, wherein the display range is constituted by a histogram conversion processing unit for converting into a display gradation on the screen. 3. A histogram in which each of the individual image signal processing means obtains the frequency distribution for each temperature gradation for each pixel in one frame, and then correlates the frequencies for each display gradation on the display screen to associate them with each other. The dynamic range expansion display system for each object according to claim 1, characterized in that it is constituted by equalization processing means. 4. An automatic level in which each of the individual image signal processing means converts the temperature gradation of each pixel in one frame so that the average value of the temperature gradation of each pixel in the one frame is used as a reference value. The dynamic range expansion display system for each object according to claim 1, characterized in that it is constituted by an adjustment processing means. 5. The individual image signal processing means displays the automatic level adjustment processing means and the maximum temperature gradation and minimum temperature gradation after conversion by the automatic level adjustment processing means on the display screen. 2. The dynamic range expansion display system for each object according to claim 1, further comprising: an automatic level gain adjustment processing means constituted by an automatic gain adjustment processing means for converting the gradation into the highest value and the lowest value. 6. The individual image signal processing means selects a designated one from among the three conversion means, the histogram conversion processing means, the histogram equalization processing means, the automatic level gain adjustment processing means, respectively. 2. The dynamic range extension display system according to claim 1, wherein the display quality of the object is processed by an individual image signal processing means selected for each of the objects. 7. The individual image signal processing means calculates an average value of the image signals distributed by the distributing means,
5. The dynamic range expansion display system for each object according to claim 2, wherein a result obtained by multiplying the average value by a predetermined coefficient value can be added to each processing result. 8. The individual image signal processing means executes the display quality processing on the image signals distributed by the distributing means, and calculates the average value of the image signals distributed by the distributing means. After calculating and obtaining the magnitude order of the average value, a predetermined adjustment level having a certain difference is determined,
5. The object-based dynamic range extension display method according to claim 2, wherein the determined adjustment level is added to the display quality processing result. 9. The object recognizing means detects an object with a part of an edge missing and an edge of the missing part by adding means for sequentially detecting and easily changing a threshold value set for edge detection. The dynamic range expansion display system for each object according to claim 1, wherein the display range is extended to enable recognition. 10. The object recognizing means sequentially changes the number of logical stages of a logical filter adopted for edge detection, and adds means for enlarging an edge detection pixel region, whereby a part of the edges is lost. 2. The dynamic range extension display system according to claim 1, wherein both the object and the edge of the missing portion are detected and made recognizable. 11. The object recognizing means compares the occupied areas of all the objects recognized by using all the image signals in the imaging screen, and selects only a predetermined number of objects from the objects having a large area as target objects. 2. The dynamic range expansion display system for each object according to claim 1, further comprising means for selecting. 12. The object recognizing means, when the number of all objects recognized using all the image signals in the imaging screen exceeds a predetermined number, the number of recognized objects is the predetermined number. 2. The dynamic range expansion display system for each object according to claim 1, further comprising means for sequentially changing the threshold value set for the edge detection to be difficult to detect so as to decrease the number.