JP3480307B2 - Discharge lamp device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a discharge lamp device for lighting a high pressure discharge lamp, and is particularly suitable for use as a vehicle headlight.

[0002]

2. Description of the Related Art Conventionally, a high-pressure discharge lamp (hereinafter referred to as "lamp") has been applied to a vehicle headlight, and the voltage of an on-vehicle battery is increased by a transformer. The polarity of this high voltage is then converted by an inverter circuit. Various types have been proposed in which the lamp is switched on and the lamp is lit by alternating current (Japanese Patent Laid-Open No. 9-180).
888, JP-A-8-321389, etc.).

[0003]

In this type of lamp, the lamp is usually mounted in a reflector provided in the front part of the vehicle. However, if the electric wiring part of the lamp is grounded for some reason, an overcurrent will occur. However, there is a problem in that the fuse will be blown and the circuit elements in the discharge lamp device will be destroyed.

The present invention has been made in view of the above problems, and an object of the present invention is to perform fail-safe when an electric wiring portion of a lamp is in a ground fault state without causing a malfunction.

[0005]

In order to achieve the above object, in the invention described in claim 1, the transformer (4
The voltage between the inverter circuit (6) and the inverter circuit (6) is equal to or lower than a predetermined voltage, and the inverter circuit (6) supplies a DC voltage source (1).
When the current flowing to the negative electrode side of is less than a predetermined current, the ground fault condition is determined, and at this time, the inverter circuit (6) is temporarily
All the plurality of switching elements (61a to 61d) in the above are turned off to stop the power supply to the discharge lamp (2),
After that, power supply by the plurality of switching elements (61a to 61d) is started.

When the ground fault state is determined again by the start of the power supply, the stop and start of the power supply described above are repeated. Then, when the repetition continues for a predetermined period, all of the plurality of switching elements (61a to 61d) are held in the OFF state. As a result, the fail-safe operation at the time of ground fault can be performed. In this case, since the fail-safe operation is performed on condition that the power supply is stopped and started for a predetermined period, malfunction can be prevented.

It should be noted that a plurality of switching elements (6) in the inverter circuit (6) are temporarily determined by determining the ground fault state.
When turning off 1a to 61d), it is preferable to prohibit the lighting start operation of the starting circuit (7) as in the invention according to claim 2. Further, in the invention according to claim 3, when the plurality of switching elements (61a to 61d) are all held in the off state, the transformer (41)
Boosting switching element (42) connected to the temporary side of the
Is kept in the off state. This can reliably prevent an excessive current from flowing to the primary side of the transformer (41).

The determination period for stopping and starting the power supply in the ground fault state can be set to a predetermined time or a predetermined number of times as in the invention described in claim 4, or the invention described in claim 5. As described above, the predetermined time or the predetermined number of times, whichever is earlier, may be used .

[0009] Also, as in the invention of claim 6, the plurality of switching elements (61A～61 when start and stop of the power supply based on the ground determining lasted first predetermined time
d) is kept in the off state, and when the abnormality other than the ground fault continues for the second predetermined time longer than the first predetermined time, all the plurality of switching elements (61a to 61d) are turned off. If the above state is maintained, fail-safe can be immediately performed at the time of a ground fault, and the determination time can be lengthened for the determination of other abnormalities to prevent malfunction.

The above-mentioned reference numerals in parentheses indicate the correspondence with the concrete means described in the embodiments described later.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 shows the overall configuration of an embodiment in which a discharge lamp device according to the present invention is applied to a vehicle headlight. Reference numeral 1 is an on-vehicle battery as a DC power source, 2 is a lamp such as a metal halide lamp which is a vehicle headlight, and 3 is a lighting switch of the lamp 2.

The discharge lamp device is a DC power supply circuit (DC / DC
It has circuit functional parts such as a converter) 4, a takeover circuit 5, an inverter circuit 6, and a starting circuit 7. DC /
The DC converter 4 includes a flyback transformer 41 having a primary winding 41a arranged on the battery 1 side and a secondary winding 41b arranged on the lamp 2 side, a MOS transistor 42 connected to the primary winding 41a, It is composed of a rectifying diode 43 and a smoothing capacitor 44 connected to the secondary winding 41b, and outputs a boosted voltage obtained by boosting the battery voltage VB. That is, when the MOS transistor 42 is turned on, a primary current flows through the primary winding 41a, energy is stored in the primary winding 41a, and the MOS transistor 4
When 2 is turned off, the energy of the primary winding 41a is supplied to the secondary winding 41b. Then, by repeating such an operation, the diode 43 and the smoothing capacitor 4 are
A high voltage is output from the connection point of 4.

The flyback transformer 41 is constructed so that the primary winding 41a and the secondary winding 41b are electrically connected to each other as shown in the figure. The takeover circuit 5 is composed of a capacitor 51 and a resistor 52, and the capacitor 51 is charged after the lighting switch 3 is turned on, so that the lamp 2 quickly shifts from the dielectric breakdown between the electrodes to the arc discharge.

The inverter circuit 6 turns on the lamp 2 with an alternating current, and is composed of an H bridge circuit 61 and bridge drive circuits 62 and 63. H bridge circuit 61
Is composed of MOS transistors 61a to 61d that form a semiconductor switching element for a bridge and are arranged in an H-bridge shape. The bridge drive circuits 62 and 63 receive the MOS signals according to a control signal from an H-bridge control circuit 400 described later.
Transistors 61a and 61d and MOS transistor 61
b and 61c are alternately turned on and off. As a result, the direction of the discharge current of the lamp 2 is alternately switched, the polarity of the applied voltage (discharge voltage) of the lamp 2 is inverted, and the lamp 2 is lit by alternating current.

The capacitors 61e and 61f are capacitors for protection that protect the H-bridge circuit 61 from a high-voltage pulse generated at the start of lighting. The starting circuit 7 is H
A transformer 71 provided between the midpoint potential point of the bridge circuit 61 and the negative terminal of the battery 1 and having a primary winding 71a and a secondary winding 71b, diodes 72 and 73, and a resistor 7
4, a capacitor 75, and a thyristor 76, which is a unidirectional semiconductor element, are used to start lighting the lamp 2. That is, when the lighting switch 3 is turned on, the capacitor 75 starts charging, and thereafter, the thyristor 76.
When is turned on, the capacitor 75 starts discharging, and a high voltage is applied to the lamp 2 through the transformer 71. As a result, the lamp 2 is lit by dielectric breakdown between the electrodes.

The MOS transistor 42, the bridge circuits 62 and 63, and the thyristor 76 described above are controlled by the control circuit 10. This control circuit 10 has a DC-DC
A lamp voltage VL between the converter 4 and the inverter circuit 6 (that is, a voltage applied to the inverter circuit 6) and a lamp current IL flowing from the inverter circuit 6 to the negative side of the battery 1 are input. The lamp current I
L is detected as a voltage by the current detecting resistor 8.

FIG. 2 shows a block configuration of the control circuit 10. The control circuit 10 controls the PWM of the MOS transistor 42.
A PWM control circuit 100 for turning on and off by a signal,
A sample and hold circuit 200 that samples and holds the lamp voltage VL, and a sampled and held lamp voltage V
A lamp power control circuit 300 that controls the lamp power to a desired value based on L and the lamp current IL, an H bridge control circuit 400 that controls the H bridge circuit 61, and a thyristor 76 are turned on to generate a high voltage in the lamp 2. The high voltage generation control circuit 500 for controlling and the electric wiring section 2 on both sides of the lamp 2
It is composed of a fail-safe circuit 600 that detects an abnormal state such as when 0 is grounded and takes corrective action.

The lighting operation of the discharge lamp device having the above structure will be described. When the lighting switch 3 is turned on, power is supplied to each unit shown in FIG. Then, the PWM control circuit 10
0 controls the MOS transistor 42 by PWM. As a result, the flyback transformer 41 operates to output a voltage obtained by boosting the battery voltage VB from the DC-DC converter 4. In addition, the H bridge control circuit 400
MOS transistors 61a to 61a in the bridge circuit 61
61d are alternately turned on and off in a diagonal relationship. As a result, the high voltage output from the DC-DC converter 4 is supplied to the capacitor 75 of the starting circuit 7 via the H bridge circuit 61, and the capacitor 75 is charged.

After this, the high voltage generation control circuit 500 turns the H
A gate drive signal is output to the thyristor 76 and the thyristor 76 is turned on based on the signal output from the bridge control circuit 400 that indicates the switching timing of the MOS transistors 61a to 61d. Then, when the thyristor 76 is turned on, the capacitor 75 is discharged, and a high voltage is applied to the lamp 2 through the transformer 71. As a result, the lamp 2 causes a dielectric breakdown between the electrodes and starts lighting.

After that, the H bridge circuit 61 alternately switches the polarity of the discharge voltage to the lamp 2 (direction of discharge current), whereby the lamp 2 is lit by AC. Further, the lamp power control circuit 300 controls the lamp power to a desired value based on the lamp current IL and the lamp voltage VL (sampled and held by the sample and hold circuit 200), and the lamp 2 is stably lit. Let

The sample and hold circuit 200 has an H
In synchronization with the switching timing of the bridge circuit 61, the transient voltage generated at the time of switching is masked, and the lamp voltage VL other than when the transient voltage is generated is sampled and held. Next, the bridge drive circuits 62 and 63 described above will be described. FIG. 3 shows its specific configuration.

The bridge drive circuits 62 and 63 have the same structure, and have a high and low driver circuit (Inter).
IR21 manufactured by national Rectifier
01) is used. Then, the bridge drive circuit 62
Of the H-bridge control circuit 400 and the low-voltage side input terminal Lin of the bridge drive circuit 63.
Signal from the terminal 400a of the bridge driving circuit 6 and the low voltage side input terminal Lin of the bridge driving circuit 62 and the bridge driving circuit 6
A signal from the terminal 400b of the H-bridge control circuit 400 is input to the high-voltage side input terminal Hin of No. 3. Then, the terminals 400a and 400 of the H-bridge control circuit 400
The high level and low level of the signal from b are mutually inverted.

In such a configuration, when a high level signal is output from the terminal 400a of the H bridge control circuit 400 and a low level signal is output from the terminal 400b,
By the output signals from the bridge drive circuits 62 and 63,
The MOS transistors 61a and 61d are turned on, and the MOS transistors 61b and 61c are turned off. When a low level signal is output from the terminal 400a of the H-bridge control circuit 400 and a high level signal is output from the terminal 400b, the output signals from the bridge drive circuits 62 and 63 turn on the MOS transistors 61b and 61c. MO
The S transistors 61a and 61d are turned off.

The bridge drive circuits 62 and 63 include
The voltage is supplied from the secondary side of the flyback transformer 41. That is, the resistor 64a and the Zener diode 6 are provided on the secondary side of the flyback transformer 29.
A first power supply circuit 64 composed of 4b is provided.
The predetermined voltage V2 (for example, 15
V) is supplied to the bridge drive circuits 62 and 63. In addition to the voltage on the secondary side of the transformer 41, the voltage can be supplied to the bridge drive circuits 62, 63 by the voltage on the primary side (battery voltage VB) via the diode 65, the resistor 66, and the noise removing capacitor 67. It is like this.

A fail-safe circuit 600 described later is also provided.
A low level signal is applied to all of the input terminals Hin and Lin of the bridge drive circuits 62 and 63 by the signal from to turn off all the four MOS transistors 61a to 61d in the H bridge circuit 61 (hereinafter, this state is H
An H-bridge off circuit 401 for turning off the bridge circuit 61) is provided.

Next, the lamp power control circuit 30 described above.
0 will be described. FIG. 4 shows its specific configuration.
The lamp power control circuit 300 includes an error amplification circuit 301 that generates an output according to the lamp voltage VL, which is a signal indicating the lighting state of the lamp 2, the lamp current IL, and the like.
The output of the error amplification circuit 301 is the PWM control circuit 100.
It is designed to be input to. PWM control circuit 100
Is, as the output voltage of the error amplification circuit 301 increases,
The duty ratio for turning on / off the MOS transistor 42 is increased to increase the lamp power.

The reference voltage Vr1 is input to the non-inverting input terminal of the error amplifying circuit 301, and the voltage V1 serving as a parameter for controlling the lamp power is input to the inverting input terminal of the error amplifying circuit 301. Is the reference voltage Vr1
And a voltage corresponding to the difference between the voltage V1 and the voltage V1 is output. This voltage V1
Is determined based on the lamp current IL, the constant current i1, the current i2 set by the first current setting circuit 302, and the current i3 set by the second current setting circuit 303. The sum of the current i1, the current i2, and the current i3 is set to be sufficiently smaller than the lamp current IL.

Here, the first current setting circuit 302 sets the current i2 larger as the lamp voltage VL increases as shown in the figure, and the second current setting circuit 303 turns on the lighting switch 3 as shown in the figure. The current i3 is set larger as the subsequent time T becomes longer. Then, the lamp power control circuit 300 controls the lamp power by outputting a voltage according to the time T after the lighting switch 3 is turned on, the lamp voltage VL, the lamp current IL, and the like, and when the lighting is started, the lamp power has a large value. (For example, 75W) to quickly raise the electrode temperature,
When the electrode temperature gradually rises, the lamp power is gradually reduced, and when the lamp 2 is in a stable state, the lamp power is controlled to a predetermined value (for example, 35 W).

Next, the PWM control circuit 100 will be described. FIG. 5 shows its specific configuration. The PWM control circuit 100 compares a threshold level setting circuit 101 for setting a threshold level, a sawtooth wave forming circuit 102 for forming a sawtooth wave, a sawtooth wave with a threshold level, and a duty corresponding to the threshold level. Comparator 103 that outputs a ratio gate signal, the output from the comparator 13, and the fail-safe circuit 600
From the inverter to the output via the inverter 104
It is composed of a gate 105.

The threshold level setting circuit 101 is
According to the output voltage (command signal) from the error amplification circuit 301 described above, a lower threshold level is set as the output voltage increases. Therefore, when the output voltage of the error amplification circuit 301 increases to increase the lamp power, the threshold level decreases and the duty ratio increases. Further, when the output voltage of the error amplification circuit 301 decreases to reduce the lamp power, the threshold level increases and the duty ratio decreases.

Further, when the fail-safe circuit 600 outputs a high level signal indicating the detection of the ground fault state of the lamp 2, the inverter 104 outputs a low level signal, and therefore the output of the AND gate 105 becomes low level. , The MOS transistor 42 is turned off. Therefore, when the lamp 2 is in the ground fault state, the operation of the DC-DC converter 4 is stopped.

Next, the fail safe circuit 600 will be described. FIG. 6 shows the specific configuration. The fail-safe circuit 600 includes a lamp voltage detection circuit 601, a lamp current detection circuit 602, an AND gate 603, a filter 604, a monostable circuit 605, and a NOR gate 606.
A filter 607, an OR gate 608, a timer circuit 609, and a D flip-flop 610.

The ramp voltage detection circuit 601 has a ramp voltage VL from the sample and hold circuit 200 and a predetermined voltage Vr.
Comparator 601a for comparing with 2 (for example, 20V)
And outputs a high level signal (voltage drop signal) when the lamp voltage VL is equal to or lower than the predetermined voltage Vr2. The lamp current detection circuit 602 includes a comparator 602a, a capacitor 602b, and a resistor 602c. The comparator 602a compares the voltage VIL corresponding to the lamp current IL with the predetermined voltage Vr3, and when the voltage VIL is the predetermined voltage Vr3 or less, that is, when the lamp current IL is the predetermined current (for example, 0.2 A) or less, the high voltage is output. A level signal (current drop signal) is output.

Here, when the lamp 2 is under power control, the lamp voltage VL is, for example, in the range of 20 V to 400 V, and the lamp current IL is, for example, 0.35 to 2.
Since it is in the range of 6 A, both the lamp voltage detection circuit 601 and the lamp current detection circuit 602 output a low level signal. However, if the electric wiring portion at both ends of the lamp 2, that is, the electric wiring portion 20 between the inverter circuit 6 and the lamp 2 is grounded, an overcurrent flows to the secondary side of the flyback transformer 41, and the lamp voltage VL is It will be lower than 20V. Further, the overcurrent from the side of the secondary winding 41b drops from the electric wiring portion 20 to the ground, and the lamp current IL becomes 0.2 A or less. As a result, the lamp voltage detection circuit 601 and the lamp current detection circuit 602 both output a high level signal,
The output of the ND gate 603 becomes a high level signal indicating a ground fault condition.

When both ends of the lamp 2 are short-circuited, the lamp voltage VL becomes equal to or lower than the predetermined voltage Vr2, but the lamp current IL becomes higher than the predetermined current. Further, when the lamp 2 is broken, the lamp current IL becomes smaller than the predetermined current, but the lamp voltage VL is the predetermined voltage Vr.
Greater than 2. Therefore, by comparing both the lamp voltage VL and the lamp current IL with respective predetermined values,
The ground fault state of the electric wiring portion 20 can be distinguished from the short-circuited or broken state of the lamp 2.

Next, the operation after the above-mentioned ground fault condition is described. FIG. 7 shows the signal waveform of each part in FIG. 6 in this case. Output signal a of AND gate 603
Is a high level signal indicating a ground fault condition, the filter 6
The output signal b of 04 also becomes high level. Then, the output signal c of the monostable circuit 605 remains constant for a certain period of time (for example, 10 msec).
It becomes high level, and the high level signal is output to the H bridge off circuit 401 and the high voltage control circuit 500.

The H-bridge off circuit 401 receives the high-level signal from the monostable circuit 605, and the H-bridge circuit 6
Turn off 1. As a result, the overcurrent due to the ground fault of the electric wiring portion 20 causes the MOS transistors 61a and 61c to be prevented.
Will be blocked by. Further, the high voltage control circuit 500 operates so as not to output the gate drive signal to the thyristor 76 by the high level signal from the monostable circuit 605. FIG. 8 shows the configuration of the high voltage control circuit 500. The high voltage control circuit 500 includes the H bridge control circuit 40.
A signal generation circuit 501 that outputs a gate drive signal to the thyristor 76 based on the output signal from 0 is provided. Then, when a high level signal is output from the monostable circuit 605, the output of the inverter 502 becomes low level and A
Since the ND gate 503 is closed, turning on of the thyristor 76 is prohibited. That is, generation of a high voltage for lighting the lamp 2 is prohibited.

When the lamp voltage VL rises due to the H-bridge circuit 61 being turned off, the lamp voltage detecting circuit 6
Since the output signal of 01 becomes low level, the output signal a of the AND gate 603 becomes low level. After that, when the output signal c of the monostable circuit 605 becomes low level, the H-bridge control circuit 400 causes the MOS transistors 61a to 6a.
The on / off drive of 1d is started, and the power supply to the lamp 2 is started. At this time, if the grounding state of the electrical wiring section 20 continues, the output signal of the lamp voltage detection circuit 601 becomes high level again, and the output signal a of the AND gate 603 is output.
Becomes high level again. As a result, the monostable circuit 605
Outputs a high level signal for a fixed time, the H bridge circuit 61 is turned off, and the thyristor 76 is prohibited from being turned on.

Thereafter, the above operation is repeated while the grounding state of the electric wiring portion 20 continues. Further, since the lamp current detection circuit 602 outputs a high level signal, the output signal of the NOR gate 606 becomes low level and the output signal e of the filter 607 also becomes low level. Then, since the output signal of the OR gate 608 becomes low level, the reset of the timer circuit 609 is released and the time counting operation is started. After that, when a predetermined time (for example, 0.2 seconds) elapses and the output signal f of the timer circuit 609 becomes high level, the Q terminal output signal g of the D flip-flop 610 becomes high level by using it as a clock.

The high-level signal from the D flip-flop 610 causes the H-bridge off circuit 401 to go high.
The bridge circuit 61 is turned off, and the PWM control circuit 100
The MOS transistor 42 is turned off. That is, PWM
In the control circuit 100, when the high level signal is output from the D flip-flop 610, the output of the inverter 104 shown in FIG.
Since the output of 5 becomes low level, the MOS transistor 42 is turned off. Therefore, the operation of the DC-DC converter 4 is stopped.

This makes it possible to prevent the primary current from becoming excessive. That is, when the MOS transistor 42 is not turned off, for example, when the electric wiring portion 20 is ground-faulted and there is a predetermined contact resistance in that portion, the contact resistance causes large power consumption on the secondary side of the flyback transformer 41. Then, the operation of the lamp power control circuit 300 controls ON / OFF of the MOS transistor 42 so as to increase the energy stored in the primary winding 41a.
Therefore, the primary winding 41a of the flyback transformer 41
However, as described above, the MOS transistor 42 is turned off and the DC-D
By stopping the operation of the C converter 4, it is possible to prevent an excessive current from flowing through the primary winding 41a of the flyback transformer 41.

As described above, in this embodiment, when the lamp voltage VL is equal to or lower than the predetermined voltage and the lamp current IL is equal to or lower than the predetermined current, it is determined that the ground fault occurs.
Based on this determination, the H bridge circuit 61 is temporarily turned off and the high voltage for relighting is not generated, and after a certain period of time elapses,
The H-bridge circuit 61 is operated again and the relighting operation is performed. When the ground fault state is determined again in this operation, the above operation is repeated, and when this repeated state continues for a predetermined time, the operation of the DC-DC converter 4 is stopped and this state is maintained.

Thus, the lamp voltage VL and the lamp current I
When the ground fault state is determined based on L, the H bridge circuit 61 is repeatedly stopped and started, and failsafe is performed when the repetition continues for a predetermined time. It is possible to prevent malfunctions as compared with the case where the fail-safe is immediately performed based on the judgment of.

In the fail-safe circuit 600, not only the fail-safe at the time of the ground fault described above, but also the fail-safe for the other abnormality detection (for example, detection of disconnection of the connector of the lamp 2 not shown) is performed. I am trying to do it. In this case, the abnormality detection signal (a signal that goes high when abnormality is detected) is input to the NOR gate 606. When the abnormality detection signal continues to be generated while the timer circuit 609 counts for a predetermined time, a high level signal is output from the D flip-flop 610.
The bridge circuit 61 is turned off and the MOS transistor 42 is turned off. (Second Embodiment) In the first embodiment, the time counted by the timer circuit 609, that is, the abnormality determination time is
It is set to be the same when a ground fault is detected and when another abnormality is detected. This abnormality determination time is preferably long from the viewpoint of preventing malfunctions due to abnormality detection, but it is preferable to perform failsafe as soon as possible during a ground fault.

Therefore, in this embodiment, the abnormality determination time at the time of detecting the ground fault is set shorter than that at the time of detecting other abnormality. FIG. 9 shows the configuration of the fail-safe circuit 600 in this embodiment, and FIG. 10 shows the signal waveform of each part in FIG. OR by ground fault detection or other abnormality detection
When the signal from the circuit 608 becomes low level, the timer circuit 609 is released from reset and starts the time counting operation. The timer circuit 609 sets the output signal h to the high level when counting the first predetermined time (for example, 0.2 seconds), and sets the output signal i to the high level when counting the second predetermined time (for example, 0.4 seconds). To

In the case of ground fault detection, the timer circuit 60
When both output signals become high level due to the output signal h from 9 and the output signal c from the monostable circuit 605, the output signal j of the AND gate 611 becomes high level, and the D flip-flop 610 via the OR gate 612. Since the high-level signal is input to the clock terminal of, the Q terminal output signal 1 of the D flip-flop 610 becomes the high level.
Therefore, in the case of ground fault detection, the fail-safe operation is performed with the abnormality determination time as the first predetermined time.

In the case of another abnormality detection, when the output signal i from the timer circuit 609 becomes high level, the Q terminal output signal 1 of the D flip-flop 610 becomes high level. Therefore, in the case of other abnormality detection, the fail-safe operation is performed using the second abnormality determination time longer than that in the case of ground fault detection. (Third Embodiment) In the first and second embodiments,
The fail-safe operation is shown when the stop and start of the H-bridge circuit 61 continues for a predetermined time. However, the fail-safe operation is performed by using the number of times of stopping and starting the H-bridge circuit 61. Good.

FIG. 11 shows the configuration of the fail-safe circuit 600 in this embodiment, and FIG. 12 shows the signal waveform of each part in FIG. In this embodiment, the H bridge circuit 61 is based on the output signal c of the monostable circuit 605.
Circuit 613 for counting the number of times of stopping and starting
Is provided. Then, the counter 613 sets the output signal m to the high level when the count value reaches a predetermined number (for example, 5 times). As a result, a high-level signal is input to the clock terminal of the D flip-flop 610 via the OR gate 614, so that fail-safe operation is performed as in the first and second embodiments.

Further, in this embodiment, similarly to the first embodiment, the fail-safe operation is performed also by the signal o when the predetermined time has passed from the timer circuit 609. Therefore, in this embodiment, the fail-safe operation is performed at the timing when the number of times the H bridge circuit 61 is stopped and started reaches a predetermined number or when the counting time of the timer circuit 609 reaches a predetermined time, whichever comes first. .

In this embodiment, the fail-safe operation may be performed only when the H bridge circuit 61 is stopped and started a predetermined number of times.

[Brief description of drawings]

FIG. 1 is an overall configuration diagram of a discharge lamp device showing an embodiment of the present invention.

FIG. 2 is a block configuration diagram showing a control circuit 10 in FIG.

FIG. 3 is a diagram showing a specific configuration of bridge drive circuits 62 and 63 in FIG.

FIG. 4 is a diagram showing a specific configuration of a lamp power control circuit 300 in FIG.

5 is a diagram showing a specific configuration of a PWM control circuit 100 in FIG.

FIG. 6 is a diagram showing a specific configuration of a fail-safe circuit 600 in FIG.

FIG. 7 is a diagram showing signal waveforms of respective parts in FIG.

8 is a diagram showing a configuration of a high voltage generation circuit 500 in FIG.

FIG. 9 is a diagram showing a specific configuration of a fail-safe circuit 600 according to the second embodiment of the present invention.

10 is a diagram showing a signal waveform of each part in FIG.

FIG. 11 is a diagram showing a specific configuration of a fail-safe circuit 600 according to the third embodiment of the present invention.

12 is a diagram showing a signal waveform of each part in FIG.

[Explanation of symbols]

1 ... In-vehicle battery, 2 ... Lamp, 3 ... Lamp, 4 ... DC
-DC converter, 5 ... Takeover circuit, 6 ... Inverter circuit, 7 ... Starting circuit, 41 ... Flyback transformer, 42 ... MOS transistor, 61 ... H bridge circuit, 100 ... PWM control circuit, 200 ... Sample hold circuit, 300 ... PWM control circuit, 400 ... H bridge control circuit, 500 ... High voltage generation control circuit, 600 ... Fail safe circuit.

Front Page Continuation (72) Inventor Satoru Oda City 500 Kitawaki Shimizu City, Shizuoka Prefecture Koito Manufacturing Co., Ltd. Shizuoka Factory (72) Inventor Tomoyuki Funayama 1 Toyota Town, Toyota City, Aichi Prefecture Toyota Motor Co., Ltd. (56 ) Reference JP-A-8-275543 (JP, A) JP-A-6-22553 (JP, A) JP-A-7-122386 (JP, A) JP-A-9-223587 (JP, A) 2-72679 (JP, U) Actual Kaihei 6-33399 (JP, U) (58) Fields investigated (Int.Cl. ⁷ , DB name) H05B 41/18 H05B 41/24

Claims (6)

(57) [Claims] 1. A transformer (41) for boosting the voltage of a DC voltage source (1) and a plurality of switching elements (61a to 61d) for converting the boosted voltage into an AC voltage to supply power to a discharge lamp (2). And a voltage between the transformer (41) and the inverter circuit (6) is equal to or lower than a predetermined voltage, and the inverter circuit (6) has a negative electrode side of the DC voltage source (1). When a ground fault is determined because the current flowing in the current is less than or equal to a predetermined current, the plurality of switching elements (61a to 61d) are temporarily
After turning off all to stop the power supply, the power supply by the plurality of switching elements (61a to 61d) is started, and the stop and start of the power supply based on the determination of the ground fault continued for a predetermined period. when the discharge lamp device is characterized in that a fail-safe circuit (600) for holding the plurality of switching elements (61a-61d) in a state of being all turned off. 2. The fail safe circuit (600) comprises:
When all of the plurality of switching elements (61a to 61d) are turned off, the lighting start operation of the starting circuit (7) for starting the lighting of the discharge lamp (2) is prohibited, and the plurality of switching elements (61a to 61d). The discharge lamp device according to claim 1, wherein the prohibition of the lighting start operation of the starting circuit (7) is released when the electric power supply by the device is started. 3. The transformer (41) is provided on the DC power supply (1) side and is connected to a primary side to which a boosting switching element (42) for performing the boosting is connected and the discharge lamp (2) side. The fail-safe circuit (600) is configured to be electrically connected to a provided secondary side, and the fail-safe circuit (600) holds all of the plurality of switching elements (61a to 61d) in an off state. , The step-up switching element (4
The discharge lamp device according to claim 1 or 2, wherein the discharge lamp device (2) is held in an off state. 4. The fail safe circuit (600) comprises:
Wherein the starting and stopping of the power supply based on the determination of the earth fault when followed predetermined time or a predetermined number of times, all of the plurality of switching elements (61a-61d) is intended to hold the state of being turned off The discharge lamp device according to any one of claims 1 to 3. 5. The fail safe circuit (600) comprises:
The <br/> when the start and stop of the power supply based on the determination of the ground fault lasted until whichever comes predetermined time and a predetermined number of times, all turns off the plurality of switching elements (61a-61d) The discharge lamp device according to claim 1, wherein the discharge lamp device is held in a state. 6. The fail safe circuit (600) comprises:
When starting and stopping of the power supply based on the determination of the ground fault lasted first predetermined time, to hold the plurality of switching elements (61a-61d) in a state of being all turned off,
When other abnormalities outside the ground絡以lasted long second predetermined time than the first predetermined time, that all the plurality of switching elements (61a-61d) is intended to hold the state of being turned off Any of claims 1 to 5 characterized by
The discharge lamp device according to one or.