JP3475589B2 - Signal reading device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal reading device most suitable for reading information setting switches used in photographic camera systems and the like.

[0002]

2. Description of the Related Art Japanese Patent Publication No. 2-20966 and Japanese Patent Publication No. 2966
-34368, there is a phase difference of 2
An apparatus that detects the rotation direction and rotation amount of a dial operation member from one signal pattern and uses the detected rotation direction and setting amount for a camera or the like is known.

A mechanical click is provided on the dial operation member, and movement of the click causes the setting information to be 1
The units correspond to each other, and it is required that, for example, one click correctly changes the setting for one aperture. Further, since this type of switch is difficult to read because there is a lot of chattering, the inventions of Japanese Patent Publication No. 2-20966 and Japanese Patent Publication No. 2-34368 disclose that at least three states have passed in a predetermined order. It was considered as a movement for a click.

[0004]

However, the inventions disclosed in Japanese Patent Publication No. 2-20966 and Japanese Patent Publication No. 2-34368 follow the state transition as shown in FIG. However, the processing is complicated, and it does not end with a simple processing. In particular, in a product having a plurality of dial operation members, the load on the microcomputer increases, so that further simplification of processing is required.

The present invention has been made in view of the above problems, and an object of the present invention is to accurately and easily read information from two states, old and new, without following past state transitions.

[0006]

In order to achieve this object, a signal reading device according to a first aspect of the present invention comprises a signal input means (2) for inputting a plurality of signals having phase differences, and a signal input means (2). State signal change detection means (3) for detecting changes in the states of a plurality of signals input to the input terminal, and sampling means (steps S22, S23) for repeatedly sampling the plurality of signals input to the signal input means (2). ,
Reading means (step S27, which reads the sampling result of the sampling means (steps S22, S23)
S29), the state signal change detection means (3) is a signal reading device including
And a prohibiting means (step S21) for prohibiting the sampling of the sampling means (steps S22 and S23) when it is detected that only one of the plurality of signals has changed. Is characterized by.

The signal reading device according to the second invention comprises a signal input means (2) for inputting a plurality of signals having phase differences,
A state signal change detection means (3) for detecting changes in the states of a plurality of signals input to the signal input means (2), and a sampling means (sampling means for repeatedly sampling the plurality of signals input to the signal input means (2) ( (Steps S22 and S23)
And a reading means (step S2) for reading the sampling result of the sampling means (steps S22 and S23).
7 and S29),
The state signal change detecting means (3) inputs a plurality of signals.
Prohibition means constituted by an exclusive OR circuit, and prohibiting the reading of the reading means when it detects that only one of the plurality of signals has changed (step S21).
It is characterized by having.

A signal reading device according to a third aspect of the present invention comprises a signal input means (2) for inputting N-bit (N is a natural number) signals having a phase difference, and an N-bit signal for input by the signal input means (2). A state change detection means (3) for detecting a change in state and a sampling means (steps S22, S2) for repeatedly sampling a plurality of signals input to the signal input means (2) and outputting the read results.
3), the state change detecting means (3) is an exclusive OR for inputting a plurality of signals.
When the change of the state of the N-bit signal is detected, the sampling means (step S2
2, S23) is provided with a prohibiting means (step S21) for prohibiting the sampling.

[0009]

In the signal reading device having the above structure, when the state signal change detecting means detects that only one of the plurality of signals has changed, the sampling of the sampling means is prohibited or the reading means of the reading means is operated. Since reading is prohibited, it is possible to accurately and easily read information from two states, new and old, without following past state transitions.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block connection diagram showing an embodiment of a signal reading apparatus according to the present invention.

FIG. 1 shows a connection relationship between a microcomputer 1 and an encoder pattern 2 as a dial operating member. The potential of the encoder pattern 2 provided on the dial operating member is at the GND level. 2 around
The contacts 2a and 2b, which form a phase pattern and slide with the two-phase pattern, are connected to the port P of the microcomputer 1.
It is connected to A and PB respectively. The contacts 2a and 2b are arranged on the A-phase and B-phase patterns. The reason for using a plurality of contacts 2a and 2b is to improve contact and reduce chattering. Ports PA and PB of the microcomputer 1
Is pulled up internally. Therefore, the microcomputer 1 reads "1" when the contactor 2a or 2b is not in contact with the encoder pattern 2 and "0" when it is in contact. The signals of A phase and B phase are X
It is also supplied to the OR gate 3. The output of the XOR gate 3 is the external interrupt terminal INT of the microcomputer 1.
It is connected to the.

The signal when the encoder pattern 2 is rotated is shown in the timing chart of FIG. In the example of FIG. 2, there is a mechanical click in the section where A phase = 0 and B phase = 0. The increment and decrement positions of the setting information are determined by the positions indicated by ∇ in the figure. The increment is performed when (A phase, B phase) changes from (1,0) to (1,1), and crosses ∇ in the drawing from left to right. Conversely, decrementing is (A
Phase, B phase) changes from (1,1) to (1,0). The time axis of Figure 2 is reversed from the increment,
This is the case of crossing ∇ in the figure from right to left.

By the way, if an attempt is made to detect the amount of rotation from only two data, old and new, as shown in FIG. 2, the conventional problem as shown in FIG. 3 has occurred. That is, encoder pattern 2
3 is rotating clockwise (clockwise) at the position shown in FIG. 1, the change from time a to time d occurs in FIG. Chattering cannot be avoided when the dial operation member is slowly turned by hand, and the B-phase signal from time a to time d should have one edge even though it should originally have one edge, but multiple signals may occur. Edges appear. Table 1 shows the results when this was sampled from time a to time d.

[Table 1]

[0015]   Sampling time Previous data Current data Result

[0016]                        (A, B) (A, B)          a (1,1) (1,1) +0          b (1,1) (1,0) -1          c (1,0) (1,1) +1          d (1,1) (1,0) -1

As is clear from Table 1, -1 count is finally obtained, but decrement and increment are repeated in this process, which causes flickering of the display. Therefore, in the present invention, the XOR gate 3 in FIG.
The changes in phase and phase B were detected as follows.

That is, as shown in FIG. 4, when either the A phase or the B phase changes, the output of the XOR gate 3 is inverted. It is in an error state that the A phase and the B phase change at the same time, and in this case, counting is not necessary, or the dial operation member is rotating too fast, and this also does not make sense. Therefore, in the actual use state, the changes in the A phase and the B phase appear as an inversion of the output of the XOR gate 3, as shown in FIG. The microcomputer 1 receives the output of the XOR gate 3 at the external interrupt terminal INT.

The processing of the interrupt INT is as shown in FIG. When the interrupt is started in step S10, the polarity of the trigger of the interrupt terminal INT is reversed in step S11. This is a preparation for the next interrupt, which will be the opposite edge. Since only one bit of the control register of the microcomputer 1 is actually inverted, the processing time is short. Note that this processing is not necessary in a microcomputer having a double edge trigger function. Step S1
In 2, the variable SMP_W that stores the change in the A phase or the B phase is set to 1, and the interrupt processing ends in step S13. In this way, the interrupt processing has a very simple processing content and does not interfere with the execution of the main routine.

On the other hand, FIG. 6 is a flow chart showing the sampling process repeatedly called for setting information.
When step S20 is called, the variable SMP_W is checked in step S21. If the variable SMP_W is 1,
It can be seen that the phase A or the phase B changed immediately before. A feature of the present invention is that if the A-phase or the B-phase has changed immediately before, it is expected that chattering will occur, so that sampling is not executed. That is, the variable SMP_W is 1
In case of, jump to step S32, SMP_W
Is set to 0 and the process returns in step S33. By doing this, if there is no interrupt until the next sampling, S
Since MP_W remains 0, sampling is executed next time. As described above, when chattering is possible, sampling is not performed, and sampling can be performed based on a highly reliable signal after the signal becomes stable.

When the variable SMP_W is 1 in step S21, steps S22 and thereafter are executed and sampling is performed. First, in step S22, ports PA and P
RAM data that stores the B sampling data is set to 1
Bit shift. In step S23, the values of the ports PA and PB are bit-loaded into the vacant bits. In step S24, it is checked whether or not the latest two shifted bits have the same value. If the values of the ports PA and PB do not match, chattering has not been removed yet, and the process jumps to step S32.

If it is determined in step S24 that the sampling values of the plurality of times match, the process proceeds to step S25. After step S25, the RAM corresponding to the work shown in Table 1 is shifted by 2 bits in the RAM for storing the fixed state, and the ports PA and PB are set to the 2 bits left in step S26.
Load the confirmed data of. By doing so, for example, the lower 4 bits of the RAM storing the fixed state are configured as follows. A'B'A B

Here, A'is the previous PA sampling confirmation data, B'is the previous PB sampling confirmation data, A is the current PA sampling confirmation data, and B is the current PB sampling confirmation data.

The pattern of the confirmed data is determined in step S27.
Alternatively, it is detected in S29. For example, if A'B'A B = 1011 in step S27, + in step S28
One process (increment) is performed. Step S29
If A'B'A B = 1110, the -1 process (decrement) in step S30 is performed. Otherwise, the +0 process of step S31 is performed, and the counting ends. At the end of counting, the variable S is set in step S32.
Set MP_W = 0 and return. Note that step S27
Therefore, in step S31, since there are only 16 combinations of A'B'A B, the result may be obtained by referring to a table using A'B'A B as a parameter, and the result may be added to the count.

Although the external interrupt terminal is prepared separately in the embodiment, if the ports PA and PB each have an interrupt function, the interrupt processing after step S10 may be performed. In addition, the variable SMP_
W can be set to an arbitrary number of sampling cancellations, and the variable SMP_W is set to 1 in step S32.
In the above case, the value may be decremented by 1, and in the case of 1 or more in step S21, the process may jump to step S32.

As described above, even from the two states of old and new, accurate information can be set while avoiding the chattering period. Further, since the processing method is simple, it can be executed in parallel with other processing and does not require a read-only microcomputer or the like. Since the size of the software is also small, it is possible to read the rotation amount of the dial operating member at a minimum cost without burdening the ROM capacity.

In the present invention, the prohibiting means prohibits the sampling of the sampling means by the output of the detecting means. The ban extends to one sampling or multiple times. The most different point from the conventional technique is that the signal itself has not changed and therefore the sampling is not performed immediately. This is also different from conventional Chatterkiller.

By applying the present invention, it is possible to construct a chatter killer for reading a general switch. By prohibiting sampling a predetermined number of times after detecting a change not only in the two-phase signal but also in one signal, it is possible to avoid the harm of reading during the chattering period and obtain more reliable information.

[0029]

As described above, according to the signal reading apparatus of the present invention, when the status signal change detecting means detects that only one of the plurality of signals has changed, the sampling means performs sampling. Since it is prohibited or the reading by the reading means is prohibited, it is possible to accurately and easily read information from the two states, old and new, without following the state transition in the past.

[Brief description of drawings]

FIG. 1 is a block connection diagram showing an embodiment of a signal reading device according to the present invention.

FIG. 2 is a timing chart showing an embodiment of a signal reading device according to the present invention.

FIG. 3 is a timing chart showing an operation of a conventional signal reading device.

FIG. 4 is a timing chart showing an embodiment of a signal reading device according to the present invention.

FIG. 5 is a flowchart showing an embodiment of a signal reading device according to the present invention.

FIG. 6 is a flowchart showing an embodiment of a signal reading device according to the present invention.

[Explanation of symbols]

1 microcomputer 2 encoder pattern 2a Contact 2b Contact 3 XOR gate

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) G06F 3/023 340 H03K 17/00

Claims (4)

(57) [Claims] 1. A signal input means for inputting a plurality of signals having a phase difference, a state signal change detection means for detecting a change in a state of the plurality of signals input to the signal input means, and the signal input means. In a signal reading device comprising: a sampling unit that repeatedly samples the plurality of signals input to the reading unit; and a reading unit that reads the sampling result of the sampling unit, the state signal change detection unit inputs the plurality of signals. You
And a prohibition unit that prohibits the sampling of the sampling unit when it is detected that only one of the plurality of signals has changed. apparatus. 2. A signal input means for inputting a plurality of signals having a phase difference, a state signal change detecting means for detecting a state change of the plurality of signals input to the signal input means, and the signal input means. In a signal reading device comprising: a sampling unit that repeatedly samples the plurality of signals input to the reading unit; and a reading unit that reads the sampling result of the sampling unit, the state signal change detection unit inputs the plurality of signals. You
And a prohibition unit that prohibits reading by the reading unit when it is detected that only one of the plurality of signals has changed. apparatus. 3. The signal reading device according to claim 1 or 2, wherein the reading unit reads the plurality of signals based on two results sampled by the sampling unit. apparatus. 4. A signal input means for inputting an N-bit (N is a natural number) signal having a phase difference, and a state change detection for detecting a change in the state of the N-bit signal input by the signal input means. A signal reading apparatus comprising: a sampling unit configured to repeatedly sample the plurality of signals input to the signal input unit and output a reading result as a reading result, wherein the state change detection unit inputs the plurality of signals. To eliminate
A signal reading apparatus comprising an other logical sum circuit , and further comprising a prohibiting unit for prohibiting sampling of the sampling unit when a change in the state of the N-bit signal is detected.