JP3474914B2 - Automatic balancing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic balancing device used in an impedance meter, and more particularly to an automatic balancing device which has a small error and enables high-accuracy and high-speed impedance measurement. . 2. Description of the Related Art In an impedance meter for measuring the impedance of a sample to be measured, a signal source is connected to the sample, and the impedance Z of the sample is measured based on a voltage V applied to the sample and a current I flowing through the sample. It is determined as Z = V / I. As shown in FIG. 5, this current I is obtained by connecting a reference element (resistance) 13 having a known resistance value Rr in series between the sample 11 supplied with the signal source 12 and the ground, The voltage Vi at the connection point No. 13 is measured, and I = Vi / R
r can be obtained. At this time, if there is a floating admittance 14 having an admittance Yp including a stray capacitance Cp and an insulation resistance Rp between the ground and the connection point P between the sample 11 and the reference resistor 13, a part of the current flowing through the sample 11 Is diverted to the floating admittance Yp, and a current detection error occurs, making it difficult to measure impedance with high accuracy. In order to solve such a problem, a configuration is adopted in which a signal source 15 is added as shown in FIG. 6 so that the potential at the connection point between the sample 11 and the reference resistor 13 is substantially equal to the ground potential. A half-bridge type automatic balancer has been put to practical use. [0004] The above half-bridge type automatic balancer comprises:
Although the signal source 15 is configured using an inexpensive operational amplifier, in a high frequency region, the gain of the operational amplifier decreases in inverse proportion to the frequency, and the floating admittance mainly composed of the floating capacitance increases in proportion to the frequency. Therefore, there is a problem in that a current detection error caused by a shunt current to the ground increases in proportion to the square of the frequency. Therefore, the inventor of the present application has proposed an automatic balancing device as shown in FIG. 7 in which such a problem is reduced (Japanese Patent Laid-Open No. 4-204267). In this automatic balancing apparatus, a sample 21 and a reference element 23 for converting a current flowing through the sample 21 into a voltage are connected in series, and a terminal of the sample 21 not connected to the reference element 23 is connected to a signal source 22. Driving, the sample 21 and the reference element 23
An automatic amplifier for amplifying a signal at a connection point between the sample 21 and the reference element 23, and an output signal of the operation amplifier 24, After that, a compensation signal generator 25 generated as a compensation signal, a compensation signal generated from the compensation signal generator 25, and an output signal from the operational amplifier 24 are added and connected to the sample 21 of the reference element 23. An adder 27 is provided which feeds back from a non-terminal side to a connection point between the sample 21 and the reference element 23. [0007] As described above,
In the automatic balancing device proposed in Japanese Patent Application Laid-Open No. 4-204267, a sample 21 and a reference element (reference resistance) are used by using a compensation signal generator that generates the same signal as the output of the operational amplifier.
The equilibrium degree is improved by keeping the potential at the connection point with the reference 23 at the reference potential. However, in recent years, the frequency range used has been expanding to a higher and higher frequency range, and an impedance measuring apparatus capable of high-precision and high-speed measurement has been desired. It is difficult to measure impedance with sufficient accuracy and at high speed with an automatic balancing device such as the one described above. For example, as the frequency increases, the gain of the amplifier decreases, and the rate of improvement in the degree of balance obtained by one compensation operation decreases. Further, if there is a shift in the gain or phase between the input and output of the compensator, the rate of improvement in the degree of balance obtained by one compensation operation is reduced. Further, when the rate of improvement of the degree of balance per one compensation operation is reduced, a sufficient balance state cannot be reached unless the compensation operation is repeated many times, and high-speed impedance measurement cannot be performed. In the above-described automatic balancing apparatus, when a circuit for storing and outputting the output waveform of the operational amplifier (amplifier circuit) 24 in almost the same form as the compensation signal generator 25 is used, such a compensation signal generator is used. The device can be completely configured in hardware and the compensation operation can be performed repeatedly fast enough so that a large number of repetitions of the compensation operation do not take much time to reach a sufficient degree of equilibrium. However, since such a hardware configuration is complicated and large, there is a disadvantage in that a small production model that cannot be integrated is expensive. On the other hand, a compensation signal generator for measuring an output signal from an operational amplifier (amplifier circuit) with a vector voltmeter and controlling an oscillator capable of arbitrarily setting a phase and an amplitude to generate a compensation signal. If you use, there are many parts that can be processed by software, including adjustment of gain and phase,
The hardware configuration is simple and can be created at low cost. Also, it is relatively easy to adjust the transfer function from the input to the output of the compensation circuit to "1" at the time of manufacturing the device to improve the balance improvement rate obtained by one compensation operation. However, in this method, at a high frequency at which the gain of the amplifying means extremely decreases, the rate of improvement of the degree of balance obtained by one compensation operation decreases, and it is not sufficient unless the compensation operation is repeated many times. Does not reach equilibrium. In this case, this method, which requires time for the measurement of the vector voltage, has a disadvantage that it takes time to reach a sufficient degree of equilibrium. SUMMARY OF THE INVENTION It is an object of the present invention to provide an automatic balancing device that can achieve a sufficient balance with a small number of repetitions of the compensation operation under any conditions. That is, an object of the present invention is to provide an automatic balancing device that enables high-accuracy and high-speed impedance measurement. In order to solve the above-mentioned problems, an automatic balancing apparatus according to the present invention comprises: a reference element having a predetermined impedance connected in series to a first terminal of a sample;
An automatic balancing device that has a signal source that supplies power to a second terminal of the sample that is not connected to the reference element and that balances a potential at a connection point between the sample and the reference element to a predetermined reference potential; Amplifying means for amplifying a signal from the first terminal, a compensating means connected to the output side of the amplifying means for generating and outputting a compensation signal, a compensating signal from the compensating means and a signal from the amplifying means. An adding circuit that adds an output signal and supplies the obtained added signal to a terminal of the reference element that is not connected to the sample, wherein the compensating means includes an external circuit from an output to an input of the compensating means. Communication
A function is obtained, and the obtained transfer function and the output signal of the compensation means are obtained.
And generating and outputting a new compensation signal required to make the output signal of the amplifying means zero based on the signal and the output signal of the amplifying means. According to the present invention, a reference element is connected in series to a first terminal of a sample whose power is supplied from a signal source to a second terminal, and a signal from the first terminal is amplified. A compensating means for generating a compensation signal is connected to the amplifying means, and a sum signal of the compensation signal and the output signal of the amplifying means is fed back to the amplifying means via the reference element, Is the output from the output of the compensation means to the input.
The transfer function of the partial circuit is obtained, and the obtained transfer function and the compensation
Based on the output signal of the means and the output signal of the amplifying means.
Te, by generating a new compensation signal required for the output signal of the amplifying means to zero, thereby balancing the potential of the connection point of the sample and the reference element to a predetermined reference potential. Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of the automatic balancing apparatus according to the present invention. In this embodiment, one end of the sample 1 is connected to the signal source 2, the other end is connected to the reference element (resistance) 3, and the sample 1 and the reference element 3 are connected.
Is connected to the inverting input terminal of the operational amplifier 5, and the non-inverting input terminal is connected to the reference potential (ground potential). The output of the operational amplifier 5 is supplied to an adder 4 and a compensating circuit 6. The output signal of the operational amplifier 5 and the output signal of the compensating circuit 6 are supplied to the adder 4, and the added signal is calculated via the reference element 3. The signal is fed back to the inverting input terminal of the amplifier 5. Here, the signal source 2 is represented by a signal generating circuit for generating an output E and an output impedance Zs. The impedance of the reference element 3 is Zr, and the gain of the operational amplifier 5 is A.
And The compensating circuit 6 generates a compensating signal necessary to make the output signal of the operational amplifier 5 zero based on the output signal from the operational amplifier 5 and outputs the signal to the adder 4. The generation of the compensation signal in the compensation circuit 6 is performed as follows. First, an arbitrary initially set signal V1 is output from the compensation circuit 6. At this time, the input signal to the compensation circuit 6, that is, the output signal X1 of the operational amplifier 5 is measured. In FIG. 1, Vn and Xn are generalized. Next, the output of the compensation circuit 6 is set to a signal V2 different from the signal V1, and the input (output of the operational amplifier 5) X2 to the compensation circuit 6 at this time is measured. The transfer function G from the output to the input of the compensating circuit 6 is defined as the following equation (1) as the ratio of the output change to the input change. G = (X2-X1) / (V2-V1) (1) Subsequently, from the transfer function G, the current output signal X2 of the operational amplifier 5, and the current output signal V2 of the compensation circuit,
An output signal V that makes the output signal of the operational amplifier 5 zero.
3 is obtained by equation (2). V3 = V2- (X2 / G) (2) Here, when X1 is smaller than X2, the following equation (3) can be used. V3 = V1- (X1 / G) (3) As described above, by generating and feeding back a compensation signal, a balanced state is easily achieved. On the other hand, in an actual device, if the resolution when measuring the input signal of the compensating circuit 6 or the output setting resolution of the compensating circuit is not sufficient, or if a part of the circuit has a non-linear characteristic, the above-described one-time operation is performed. In some cases, the degree of equilibrium may not be reached in the operation and processing described above. In such a case, the operation of measuring the output of the operational amplifier until the output signal of the amplifier circuit (operational amplifier) is sufficiently close to zero and generating a compensation signal based on the equation (2) or (3) is performed. The process may be repeated. Since a sufficient degree of balance is reached by the above operation and processing, thereafter, at an appropriate time interval, the output measurement of the amplifier circuit and the processing of generating a compensation signal based on the equation (2) or (3) are repeated. Thereby, the required degree of equilibrium can be maintained. If the degree of equilibrium is significantly deteriorated due to the exchange of a sample or the like, if there is a possibility that the transfer function G is also largely changed by this, a new initial setting from the compensation circuit 6 described above is newly performed. Setting of signal V1, measurement of input to compensation circuit 6, generation output of V2 (生成 V1) from compensation circuit 6, calculation of transfer function G based on equation (1), and equation (2) or (3) Is performed on the basis of the compensation signal. The processing according to the present embodiment will be described with reference to the vector diagram of each signal in FIG. If the input vector signal X1 obtained by the measurement and the input vector signal X2 obtained from the compensation vector signal V2 have the relationship shown in the drawing with respect to the initial setting compensation vector signal V1 output from the compensation circuit 6, the signal is transmitted. The function G is based on the equation (1), and the difference vector between the vector signals X1 and X2 and the vector signal V
It is determined by the ratio of the difference vector between 1 and V2. The input to the compensation circuit 6, that is, the compensation vector signal V3 such that the output vector signal X3 of the operational amplifier 5 becomes zero is a vector obtained by subtracting X2 / G from the vector signal V2 based on the equation (2). It will be obtained as signal V3. In the above embodiment, it is easy to set the signal V1 to the previous compensation signal itself or to zero, but any value may be used as long as the characteristics of the circuit and the sample do not change. If the voltage E of the signal source 2 can be made zero, V1
When X = 0, X1 = 0, so that the measurement for the signal V1 does not need to be performed. However, when the transfer function is obtained not at the time of manufacturing the device but at the time of measuring the impedance, the signal applied to the sample greatly changes. It is not desirable because impedance may be changed. Here, the signal V2 may be an arbitrary value in principle if it is not equal to the signal V1, but if | V2-V1 | and | X2-X1 | are too small, the measurement accuracy is sufficient. Therefore, the signal V2 is set to a value as far as possible from the value of the signal V1 as far as these accuracy, and hence the accuracy of the transfer function, can be sufficiently ensured. Since the lower limit value XL of | X2-X1 | and the lower limit value VL of | V2-V1 | and the approximate value G0 of G are determined at the time of design, the values of the signals V1 and V2 are determined so as to satisfy the following equation. | V2-V1 | ≧ VL (4) | V2-V1 | ≧ XL / | G0 | (5) However, if | V2-V1 | is too large, the operational amplifier may be saturated or the transfer function G may be non-linear. Has become stronger,
Sufficient equilibrium may not be obtained. Also, if | V2−V1 | is increased when the gain of the amplifier circuit is not sufficient, the voltage applied to the sample may fluctuate at a large rate, and the reproducibility of the measured value is deteriorated in the measurement of a sample having hysteresis. Therefore, it is desirable to make | V2−V1 | the minimum necessary especially when calculating the transfer function G during the measurement of the impedance. The output of the compensation circuit is set to some values around the value of the signal V1, the output of the amplifier circuit is measured, and the transfer function from V1 in each direction is determined, thereby confirming the nonlinearity of the transfer function. You can also. By the way, from the point P in the configuration of FIG.
The transfer function Gqp up to the point is given by the following equation (6). It is not necessary to consider the output voltage E of the signal source because only the change is considered. In fact, E may be any value. Gqp = −A · Zx / {(1 + A) Zx + Zr} (6) Here, Zx: impedance of sample Zdut + output impedance of signal source Zs Zr: impedance of reference element A: gain of operational amplifier as amplifier | Zx | ≧ If | Zr | and | A | >> 1, Gq
p is constant at about -1. As described above, when the conditions are good, the transfer function G may be obtained by the above-described operation once at the time of manufacture, and only the operation of generating a compensation signal based on the equations (2) and (3) is performed at the time of impedance measurement. Just do it. When the frequency becomes higher and the condition of | A | >> 1 is no longer satisfied, the transfer function greatly changes due to the change of the value of Zx or A, and therefore the balance operation was performed by obtaining the transfer function G for each impedance measurement. FIG. 3 shows the compensation circuit 6 in the above embodiment.
Is shown in FIG. From the output signal from the operational amplifier 5, a signal in a desired band is extracted by the band-pass filter 611, the level is adjusted by the gain adjuster 612, and then the A / D converter 613 converts the output signal to the clock from the clock generator 621. It is converted into digital data based on it. The digital data from the A / D converter 613 is written and read by an address signal generated from an address generator 620, and is written into a memory, for example, a dual port memory 614 that can execute writing and reading independently. . For example, waveform information for a plurality of cycles is written in the dual port memory 614. The digital data read from the dual port memory 614 is stored in a digital signal processing circuit (DS).
P) 615, and generates a signal corresponding to the sine wave digital compensation signal V3 having the required amplitude and phase by the above-described operation processing (detection of the output signal of the operational amplifier 5, derivation of the transfer function G, etc.). The data is stored in the dual port memory 616. That is, the digital signal processing circuit 615 calculates a new value of the output signal of the compensating circuit 6 necessary for making the output of the operational amplifier 5 zero from the output signal of the compensating circuit 6 and the output signal of the operational amplifier 5. It is calculated and output as an output signal. The processing in the digital signal processing circuit 615 is processing by a known method such as Fourier integration and the like.
Can be obtained as a vector. The data read from the dual port memory 616 is converted into an analog signal by a D / A converter 617, only a predetermined band component is extracted by a band pass filter 618, and the level is adjusted by a gain adjuster 619. The compensation signal V3 is supplied to the adder 4. The compensation signal V3 is added to the output signal from the operational amplifier 5 by the adder 4, and drives one end of the reference element 3. Here, if the processing of the digital signal processing circuit 615 is sufficiently fast, the dual port memory 614 can be omitted. The transfer function obtained by the above procedure corresponds to the transfer function from the output to the input of the DSP in this embodiment, and the characteristics of all the components such as the band-pass filter and the gain adjuster existing on the intermediate path are determined. Including. This transfer function is different from the transfer function from the output to the input of the compensation circuit 6, but when the output signal of the operational amplifier 5 is zero, DS
Since the input signal of P becomes zero, it is clear that the above-described procedure can also improve the rate of improvement of the degree of balance in this embodiment. Further, even if the characteristics of the band-pass filter and the gain adjuster are not known in advance or change, the measurement is included in the entire transfer function, so that the improvement rate of the degree of balance does not deteriorate. In the configuration shown in FIG. 3, the band-pass filters 611 and 618 are used to reduce unnecessary noise by passing only signals near the measurement signal frequency, but are not always necessary. The gain adjuster 612 includes the A / D converter 6
13 so as to compensate for the resolution of the A / D converter 613. The gain of the A / D converter 613 is adjusted according to the output signal of the amplifier circuit so that the input signal does not exceed the conversion range and changes as much as possible. Is adjusted, but not necessary. The gain adjuster 619 includes the D / A converter 6
It is used for compensating for the lack of the resolution of 17 or the range of the output signal, and adjusts the gain according to the output of the compensation circuit 6 so as to drive the D / A converter 617 with data as much as possible in the conversion range. However, it is not always necessary. The clock generator 621 generates a clock signal for determining an A / D conversion speed and a D / A conversion speed. The clock signal is supplied to A / D converters 613 and D
/ A converter 617 and an address generator 620. The address generator 620 generates addresses of the dual port memories 614 and 616 as memories. When the measurement frequency is 1 MHz, the clock frequency is
For example, it is set to 16 MHz. The address generator 620 sequentially generates 16 types of addresses in synchronization with this clock, and supplies them to the dual port memories 614 and 616. If the same addresses are used in these two memories, the phase relationship between signals in input detection and output setting of the compensation circuit 6 can be always kept constant. If addresses for a plurality of cycles are generated and the number of samples taken into the dual port memory 614 is increased, the equivalent noise level is lowered by averaging, and the operational amplifier 5
, The detection sensitivity of the output signal can be increased. If a pure binary address is used, the change frequency of the most significant bit of the address may coincide with the frequency of the measurement signal and interfere with the measurement, so that the address may be a pseudo-random signal. In addition, the clock frequency is shifted from 16 MHz which is an integral multiple of the measurement frequency, for example, to 15.5 MHz or 15.2 MHz, and each is 2 MHz.
Even if signals for five periods are stored in the storage means, interference with the measurement signal can be reduced. In this case, the number of types of sampling phases increases. Therefore, when the fundamental component of the signal is obtained by Fourier integration or the like, the harmonic component of the output signal of the amplifying means can be eliminated up to a higher order, and noise and A / A There is also an effect that the influence of the quantization error of the D conversion circuit can be reduced by the averaging operation. FIG. 4 shows an example of addresses and data when the clock frequency is 15.5 times the measurement frequency and the address is a pseudo random signal. In the above-mentioned Japanese Patent Application Laid-Open No. 4-204267, A /
A method for compensating for the lack of resolution of the D-conversion circuit and the D / A conversion circuit, a method for reducing the output noise of the operational amplifier, a method for compensating for the lack of the conversion speed of the A / D conversion circuit, Although the method of increasing the gain and the like are described with reference to FIGS. 1 to 11, it is obvious that these auxiliary methods can be used in combination with the present invention. In the above embodiment, even at a high frequency at which the gain of the amplifying means is low, a sufficient degree of balance can be obtained with a small number of repetitions of the compensation operation, so that the impedance can be measured in a short time. Also, filters and the like are provided at the input and output of the compensation circuit, and even if their transfer functions change, the rate of improvement of the degree of balance per compensation operation does not deteriorate. As described above, according to the automatic balancing apparatus of the present invention, a sufficient degree of balance can be obtained with a minimum compensation operation, and impedance measurement can be performed with high accuracy and at high speed. .

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a configuration block diagram showing one embodiment of an automatic balancing device according to the present invention. FIG. 2 is a vector diagram of signals of respective parts showing processing according to the embodiment. FIG. 3 is a specific configuration block diagram of a compensation circuit 6 in the present embodiment. FIG. 4 is a dual port memory 614 according to the present embodiment.
FIG. 4 is a diagram showing an example of addresses and data when the clock frequency is set to 15.5 times the measurement frequency and the address is converted into a pseudo random signal. FIG. 5 is a configuration block diagram showing an example of a conventional automatic balancing device. FIG. 6 is a configuration block diagram showing another example of the conventional automatic balancing device. FIG. 7 is a configuration block diagram showing still another example of the conventional automatic balancing device. [Description of Signs] 1 Sample 2 Signal source 3 Reference element 4 Adder 5 Operational amplifier 6 Compensation circuit

Claims (1)

(57) Claims: 1. A reference element having a predetermined impedance connected in series to a first terminal of a sample, and a power supply connected to a second terminal of the sample not connected to the reference element. An automatic balancing device that has a signal source that supplies a signal and supplies a potential at a connection point between the sample and the reference element to a predetermined reference potential. A compensating means connected to the output side of the amplifying means for generating and outputting a compensation signal; adding the compensation signal from the compensating means and the output signal from the amplifying means; Adding means for supplying a terminal of the element not connected to the sample, wherein the compensating means receives an input from an output of the compensating means.
The transfer function of the external circuit that leads to
The output signal of the compensation means and the output signal of the amplification means
An automatic balancing device for generating and outputting a new compensation signal required to make the output signal of the amplifying means zero based on the output signal.