JP3473571B2 - Matrix display device, electronic device including the same, and driving method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a matrix display device, an electronic device including the same, and a driving method, and more particularly, to a matrix display device capable of displaying characters and icons, an electronic device including the same, and a driving method.

[0002]

BACKGROUND ART Conventionally, as a simple matrix type display device, a matrix type display device with a built-in RAM is known. In this RAM built-in matrix type device, C
The display data for one screen is transferred to the built-in RAM by the PU or the like, the display data for one scanning line is sequentially read from the built-in RAM, and the display operation is performed. Therefore, when there is no change in the display of the screen like a still screen, it is not necessary to transfer the display data from the CPU side,
Since the display operation can be performed by the display data from the built-in RAM, the low power consumption operation can be performed.

Further, a matrix type display device with a character pattern generator is known as one of the RAM type matrix display devices. In this matrix type display device, a character code for one screen is transferred to a built-in RAM by a CPU or the like, the character code is converted into display data of a dot image by a character pattern generator, and thereby a display operation is performed. This matrix type display device is capable of low power consumption operation and easy to control the display operation, and thus is often used as a display device in a portable electronic device such as a mobile phone and an electronic notebook.

By the way, such a matrix type display device with a character pattern generator is required to have a function of displaying other than characters, that is, displaying icons such as indicators and symbols. This is because, if such an icon can be displayed, for example, in a mobile phone, it is possible to display an indicator indicating the remaining battery level or radio field intensity, or display a symbol such as a mark indicating a telephone.

FIG. 13 shows an example of the configuration of a conventional matrix type display device with a character pattern generator capable of displaying icons. This matrix type display device includes a matrix panel 116, a scan electrode drive circuit 110, a signal electrode drive circuit 111, a display signal transfer circuit 126, and a display signal generation circuit 140. Here, in the matrix panel 116, the display pixels are arranged in a matrix and a plurality of signal electrodes and scanning electrodes are arranged so as to cross each other, and the number of dots is n × (m + 1) dots. Then, on the matrix panel 116, the character display area 142 (the signal electrodes S1 to Sn and the scan electrodes C1 to Cm) is formed.
And the icon display area 144 (signal electrode S)
Crossing regions between 1 to Sn and the scan electrode CS) are provided.
Thereby, for example, when one character is 5 × 7 dots, (n / 5) × (m / 7) characters and n icons can be displayed. Display signal generation circuit 14
0 is a display code memory 114 for storing display codes for one screen, and a character pattern generation circuit 113 for generating a character pattern of a dot image corresponding to this display code.
And an icon display memory 115 for storing an icon pattern of a dot image, and a character pattern generation circuit 113.
And a multiplexer 112 that multiplexes the output of the icon display memory 115 and outputs a display signal 123. The display signal transfer circuit 126 transfers the display signal 123 to the signal electrode drive circuit 111, and the signal electrode drive circuit 111 and the scan electrode drive circuit 110.
Generate signals for driving the signal electrodes and the scanning electrodes, respectively.

Next, the operation of this conventional example will be described.
The characters are displayed by the following operations. First, the CPU or the like writes the character code of the character to be displayed in the display code memory 114 at a desired address arrangement. The written display code memory 114 is not rewritten unless there is a change in the display of the screen, and thus power consumption can be reduced. Next, read signal 1
The character code signal 120 is read from the display code memory 114 by 18 and sent to the character pattern generation circuit 113. The character pattern generation circuit 113 generates a character pattern display signal 121 based on the character code signal 120, and the character pattern display signal 121 is sent to the signal electrode drive circuit 111 via the multiplexer 112 and the display signal transfer circuit 126. . On the other hand, icons such as indicators and symbols are displayed by the following operations. First, the pattern of the dot image of the icon to be displayed is displayed in the icon display memory 11 by the CPU or the like.
Written to 5. Next, the icon pattern display signal 122 is read from the icon display memory 115 by the read signal 118, and the icon pattern display signal 1
22 is a multiplexer 112 and the display signal transfer circuit 1
It is sent to the signal electrode drive circuit 111 via 26.

Here, the multiplexer 112 selects either the character pattern display signal 121 or the icon pattern display signal 122 based on the select signal 119. As a result, the display signal 123 becomes the character pattern display signal 121 and the icon pattern display signal 122.
Becomes the multiplexed signal. That is, the character pattern display signal 121 and the icon pattern display signal 122 via the multiplexer 112 are displayed as the display signal 123 in a time-series display signal transfer circuit 126 within one horizontal period.
Sent to. The display signal transfer circuit 126 uses the display signal 12
3 is accumulated, and the data for one pixel row is transferred to the signal electrode drive circuit 111 all at once. This transfer is performed every horizontal period. The signal electrode drive circuit 111 outputs a liquid crystal drive voltage according to the transferred display signal to the signal electrodes S1 to Sn. On the other hand, the scan electrode drive circuit 110 outputs the scan control signal 1
17 sequentially scan electrodes C1 to Cm, C every horizontal period.
Scan S. That is, before the scan electrode C1 is scanned, the display signal transfer circuit 126 inputs and stores the display signal 123 for the scan electrode C1. Next, when the scan electrode C1 is scanned, a liquid crystal drive voltage corresponding to the accumulated display signal is output to the signal electrodes S1 to Sn to display one pixel row. During this one horizontal period, the display signal 123 for C2, which is the scan electrode next to the scan electrode C1, is transferred to the display signal transfer circuit 12.
Has been sent to 6. Since the scan electrode CS is used only for displaying the icon, the display signal 123 for the scan electrode CS includes only the display signal 122 for the icon and does not include the display signal 121 for the character pattern. The display operation of the matrix type display device is performed by the scan electrodes sequentially scanned in this manner and the signal electrodes to which the drive voltage corresponding to the display signal is applied.

[0008]

However, the conventional example described above has the following problems.

First, in the above-mentioned conventional example, there is a problem that the processing in the display signal generating circuit 140 becomes complicated and the processing time is long. That is, in the conventional example, an external CPU or the like needs to write data to the display code memory 114 as a character code for a character and write data to the icon display memory 115 as a dot image for an icon. Therefore,
The CPU has to handle the data in which the character code and the dot image data are mixed, so that the processing becomes complicated and the burden on the CPU increases. Furthermore, consider the case where the data bus from the CPU is an 8-bit data bus, for example. In this case, since one character can be designated by an 8-bit character code, only one data transfer from the CPU is required to display one character (for example, 5 × 7 dots). On the other hand, since the icon has to transfer data in the form of a dot image, for example, when an icon of 5 × 7 dots is displayed, the data transfer must be performed 4 to 5 times. Therefore, there is a problem that it takes a long processing time.

Secondly, in the above-mentioned conventional example, there is a problem that the icon display area cannot be freely arranged on the matrix panel 116 due to the restriction of the arrangement of the scanning electrodes and the signal electrodes. That is, in the conventional example, for example, the character display area 1
When an icon display area is to be provided on the right side of 42, it is necessary to draw the scan electrode CS for the icon and display the icon in the intersection area of the drawn scan electrode CS and the signal electrode Sn (see FIG. 12). In this case, since the signal electrode and the scanning electrode are formed on the same substrate, these electrodes cannot cross each other. Therefore, there is a problem that the leading pattern of the scan electrode CS becomes very complicated and the leading distance becomes long. When the routing pattern becomes complicated, it becomes difficult to design the matrix panel 116, and when the routing distance becomes long, the parasitic resistance becomes large and the display quality deteriorates. Furthermore, in this conventional example, it was almost impossible to display an icon in the character display area 142.

In this case, for example, the matrix panel 1
A method in which a signal electrode SS for displaying an icon is separately provided on 16 is also considered. According to this method, the signal electrode S
It is possible to display an icon in the intersection area of S and the scan electrodes C1 to Cm and Cs. However, when the signal electrode SS is provided in this way, there arises a problem that the data transfer process from the multiplexer 112 to the display signal transfer circuit 124 becomes complicated. That is, normally, the character pattern generation circuit 113 outputs the display signal (5 bits) for one character at the same time. However, when the signal electrode SS for icon display is newly provided, when the display signal is sent to the dots on the scan electrodes C1 to Cm, the multiplexer 112 outputs the 5-bit character display signal within one horizontal period ( Multiplexing must be performed such that a 1-bit icon display signal is output once after repeatedly outputting n / 5) times. On the other hand, when the display signal is sent to the dots on the scan electrodes CS, the multiplexer 112 has to perform the multiplexer processing such that the 1-bit icon display signal is output (n + 1) times. As described above, when the configuration is such that the signal electrode SS for icon display is newly added to the configuration of the conventional example, the multiplexer process in the multiplexer 112 is different for each scanning line, and the process becomes very complicated. Occurs.

Further, in the above-mentioned conventional example, the arrangement of the character display area and the icon display area is fixed, and a user designing a mobile phone or the like using this matrix type display device can freely set the character display area and the icon. There is also a problem that the arrangement of the display area cannot be changed.

Thirdly, the above-mentioned conventional example has a problem that the display quality is deteriorated depending on the lighting rate of the character pattern, that is, a shadow phenomenon (crosstalk) occurs. This problem is not limited to the configuration of the above-mentioned conventional example, but is a problem that generally occurs in a matrix type display device with a character display generator.

The present invention has been made in order to solve the above-mentioned problems, and an object thereof is the deterioration of display quality depending on the lighting rate, that is, the problem of shadow phenomenon (crosstalk). To solve.

Another object of the present invention is to simplify the processing in the display signal generating circuit and reduce the processing load of the CPU or the like for writing data from the outside.

Another object of the present invention is to provide a matrix type display device in which a character display area and an icon display area can be freely arranged on a matrix panel.

[0017]

In order to achieve the above object, the present invention provides a matrix panel in which display pixels are arranged in a matrix and a plurality of signal electrodes and scanning electrodes are crossed, and the matrix panel. Signal electrode drive means for applying a drive voltage to the signal electrodes of the panel, scan electrode drive means for applying a drive voltage to the scan electrodes of the matrix panel, and means for generating display signals for displaying character patterns and icon patterns And a means for transferring the display signal to the signal electrode driving means, wherein the display signal generating means is means for storing a display code for at least one screen,
Corresponding to a display code storage means for storing a display code for a character designating a character pattern and a display code for an icon designating an icon pattern in a desired address arrangement, and a display code stored in the display code storage means It is characterized by including means for generating an image pattern of the dot image and means for outputting the image pattern as a display signal for each dot line.

According to the present invention, the display code for characters and the display code for icons can be stored at a desired address arrangement, an image pattern is generated according to the stored display code, and is displayed on the matrix panel. The display operation can be performed. As a result, the memory dedicated to the icon, which is required in the conventional example, becomes unnecessary. Also,
According to the present invention, both the character and the icon can be displayed in a desired area on the matrix panel only by writing the display codes for the character and the icon in the display code memory. Further, according to the present invention, since character and icon data are treated as the same type of data and managed in the same memory space, it is possible to make the format of output display data the same. Furthermore, according to the present invention, not only characters but also icons can be displayed in a blinking manner.

Further, according to the present invention, a matrix panel in which display pixels are arranged in a matrix and a plurality of signal electrodes and scan electrodes are arranged to intersect, and a signal for applying a driving voltage to the signal electrodes of the matrix panel is provided. Electrode drive means, scan electrode drive means for applying a drive voltage to the scan electrodes of the matrix panel, means for generating display signals for character pattern display and icon pattern display, and the display signal for the signal electrode drive means. And a means for transferring the display signal output from the display signal generating means for each dot line. Display signal storage means for storing in a time division manner during one horizontal period by a signal, and the display signal storage means connected to the display signal storage means. Signal memory driving means for fetching the display signal stored in the signal storing means every horizontal period and transferring the fetched display signal to the signal electrode driving means, the display signal storing means for displaying a character pattern. And a second display signal storage means for loading a display signal for displaying an icon pattern, the fetch signal generating means comprising:
It is characterized in that it includes means for controlling the generation timing of the fetch signal.

According to the present invention, by storing a display signal for characters in the first display signal storage means, it is possible to display characters on the signal electrodes connected to the first display signal storage means. By storing the display signal for the icon in the second display signal storage means, it becomes possible to display the icon on the signal electrode connected to the second display signal storage means. Then, in this case, by controlling the generation timing of the capture signal, it is possible to arbitrarily control the type of the display signal stored in the display signal storage means, and to display the characters and the icon in the arbitrary area on the matrix panel. It becomes possible to display.

In this case, according to the present invention, under the control of the generation timing control means, the second display signal storage means arranged at at least two different positions are simultaneously operated in a predetermined period within one horizontal period. A capture signal may be generated.

By doing so, it becomes possible to display the same icon at different positions on the matrix panel, or to display different icons at the same timing.

Further, in the present invention, the generation timing control means is arranged corresponding to each of the first and second display signal storage means, and a signal for fetching the display signal is displayed for the first and second display. A plurality of decoder means for sequentially outputting to the signal storage means, a selection signal is output to the decoder means, and the plurality of decoder means are selected based on the selection signal, whereby the generation timing of the fetch signal is determined. It may include a decoder selecting unit for controlling.

By doing so, the decoder means is selected based on the selection signal output from the decoder selection means, and the generation timing of the fetch signal can be arbitrarily controlled by this selection. Then, for example, when the decoder selecting means is constituted by ROM, RAM, EEPROM or the like, the generation timing of the fetch signal can be controlled by changing the program data stored in these ROM, RAM or the like. As a result, it becomes possible to display characters and icons in any area on the matrix panel.

Further, according to the present invention, a matrix panel in which display pixels are arranged in a matrix and a plurality of signal electrodes and scanning electrodes intersect each other, and a signal for applying a driving voltage to the signal electrodes of the matrix panel are provided. Electrode drive means, scan electrode drive means for applying a drive voltage to the scan electrodes of the matrix panel, means for generating display signals for character pattern display and icon pattern display, and the display signal for the signal electrode drive means. And a signal electrode having a low lighting rate when characters are displayed in the character display area on the matrix panel and an icon display area on the matrix panel. It is characterized in that it includes means for displaying an icon in an area intersecting with the scanning electrodes.

According to the present invention, the icon is displayed in the intersection area between the signal electrode having a low lighting rate and the scanning electrode arranged in the icon display area. This makes it possible to increase the lighting rate of the signal electrode having a low lighting rate and increase the parasitic capacitance added to the signal electrode.

Further, according to the present invention, a matrix panel in which display pixels are arranged in a matrix and a plurality of signal electrodes and scan electrodes intersect each other, and a signal for applying a driving voltage to the signal electrodes of the matrix panel are provided. Electrode drive means, scan electrode drive means for applying a drive voltage to the scan electrodes of the matrix panel, means for generating display signals for character pattern display and icon pattern display, and the display signal for the signal electrode drive means. And a scan electrode having a low lighting probability when a character is displayed in a character display area on the matrix panel and an icon display area on the matrix panel. It is characterized in that it includes means for displaying an icon in an area intersecting with the signal electrode.

According to the present invention, icon display is performed in the intersection area of the scan electrodes having a low lighting rate and the signal electrodes arranged in the icon display area. This makes it possible to increase the lighting rate of the scan electrode having a low lighting rate and increase the parasitic capacitance added to the scan electrode.

[0029]

Embodiments of the present invention will be described in order below.

(First Embodiment) FIG. 1 is a diagram showing an example of the configuration of the first embodiment of the present invention. The matrix type display device according to the first embodiment includes a display signal generating circuit 74,
A display signal transfer circuit 76, a signal electrode drive circuit 78, a scan electrode drive circuit 80, and a matrix panel 82 are included.
Here, the signal electrode drive circuit 78 and the scan electrode drive circuit 8
0 applies a drive voltage to the signal electrodes and the scan electrodes on the matrix panel 82, respectively. In this embodiment, not only the scan electrodes CS for icons but also the signal electrodes SS1 to SS5 for icons are provided on the matrix panel 82 as electrodes for icons. Also,
The display signal transfer circuit 76 transfers the display signal 2 output from the display signal generation circuit 74 to the signal electrode drive circuit 78.

The display signal generation circuit 74 includes a display code memory 30, a pattern generation circuit 28, and a multiplexer 27. The pattern generation circuit 28 is a CGROM (Characte).
r Generator ROM) 22, CGRAM (Character Gener)
ator RAM) 23 and a decoder circuit 26. The display code memory 30 stores a display code for one screen in a desired address arrangement. The display code includes a display code for characters and a display code for icons, which is different from the conventional display code memory in which only the display code for characters is stored. The display code memory 30 may be configured to store display codes for two or more screens and alternately display the plurality of screens. The pattern generation circuit 28 uses the display code memory 3
An image pattern of a dot image corresponding to the display code stored in 0 is generated, and this is output as a display signal 2 for each dot line to the display signal transfer circuit 76 via the multiplexer 27. As described above, the display signal generating circuit 74 of the present embodiment handles icons in the same manner as characters, and therefore the icon display memory existing in the conventional example is not provided in this embodiment.

Next, the operation of the first embodiment will be described. First, an external CPU or the like writes display codes of characters and icons to be displayed in the display code memory 30. In this case, the arrangement of displaying characters or icons is arbitrary for the user. Next, the display code signal 20 is output from the display code memory 30 by the read signal 21. This display code signal 20
Is a common read address signal for the CGROM 22 and the CGRAM 23 that form the pattern generation circuit 28. That is, the CGROM 22 and the CGRAM 23 are in a common memory space. Also, the display data is these CGRO
Bit images are stored in the M22 and CGRAM 23. The CGROM 22 stores character font data, and the CGRAM 23 stores character font data and icon display data as bit images. In the present embodiment, the external CP is also used for the CGRAM 23.
Data can be written from U or the like, whereby character font data and icon display data desired by the user can be written. CGROM22 and CG
The RAM 23 outputs display pattern signals 24 and 25 based on the designation of the display code signal 20, and the output is input to the multiplexer 27. The multiplexer 27 selects one of the display pattern signals 24 and 25 by the select signal 29 output from the decoder circuit 26,
This is output as the display signal 2.

In this case, the select signal 29 is generated by the decoder circuit 26 decoding the display code signal 20. For example, the pattern generation circuit 28
The total number of patterns that can occur is 256, of which C
The numbers of character display patterns stored in the GROM 22 and the CGRAM 23 are 240 types and 8 types, respectively. Also, CGR
The number of icon display patterns stored in the AM 23 is eight. That is, in this case, the address space of the pattern generation circuit 28 is, for example, in hexadecimal representation from (00) H address to
(EF) H address becomes CGROM, and (F0) H address ~
(F7) Address H becomes CGRAM for character display, and (F7)
8) Addresses H to (FE) H is the icon display CGRA
It becomes M. Then, the decoder circuit 26, if the address is from (00) H to (EF) H, is CGROM.
22. In other cases, the select signal 29 is generated so as to select the CGRAM 23.

The difference between this embodiment and the conventional example will be described in more detail as follows. First, in the present embodiment, the icon display memory 115, which is a memory (or register) dedicated to the icon, which has been used in the conventional example, can be omitted. In this embodiment, this is the pattern generation circuit 2
This is because the CGRAM 23 in 8 manages icon display. Therefore, in the conventional example, the character pattern and the icon pattern are managed in different memory spaces, and these are treated as different data, but in the present embodiment, these can be treated as the same.

Secondly, in the conventional example, the external CPU etc.
It is necessary to write the data in the display code memory 114 by the character code and write the data in the icon display memory 115 by the dot image. On the other hand, in this embodiment, the display operation of both characters and icons can be performed only by writing the data in the display code memory 30 using the display code. Therefore, CP
U does not need to perform complicated write operation, CPU
Burden is reduced. Further, for the icon, for example, data of 5 × 7 dots can be written all at once by one writing operation, so that the time required for writing can be shortened.

Thirdly, in the present embodiment, the pattern generating circuit 28 handles character and icon data as the same type of data and manages them in the same memory space.
The format of the display pattern signals for characters and icons output from the pattern generation circuit 28 is the same.
This simplifies the multiplexer processing in the multiplexer 27, and the display signal 2 output from the multiplexer 27 always has the same format regardless of whether the display signal is for characters or for icons. Become. As a result, as the configuration of the display signal transfer circuit 76, for example, it becomes easy to adopt the configuration of the second embodiment described later.

Fourthly, in the conventional example, when an icon is to be displayed in a blinking manner, the icon pattern of the dot image when turned on and the icon pattern of the dot image when turned off must be alternately rewritten by the CPU or the like. . On the other hand, in the present embodiment, the blinking display of the icon and the like can be performed only by alternately exchanging the display code designating the icon pattern when turned on and the display code designating the icon pattern when turned off.

FIG. 2 shows an arrangement example of display codes in the display code memory 30 of this embodiment. Display code memory 3
Reference numeral 0 is a frame memory corresponding to one screen of the matrix panel, and its address space corresponds to the display position of the matrix panel on a one-to-one basis. A display code for one character or one icon is stored at each address position. For example, in FIG. 2, first, the display code for (n / 5) characters and the display code for one icon are stored in the first line, and the second line,
The same applies to the third line (m / 7) line. Only the display code for the icon is stored in the last line. In this embodiment, by simply arranging the display code in this way, it is possible to display characters and icons on the matrix panel in the same image as this arrangement. The arrangement of the characters and icons can be set arbitrarily according to the user's selection.

(Second Embodiment) FIG. 3 is a diagram showing the configuration of the second embodiment of the present invention. The second embodiment is an embodiment showing an example of a specific configuration of the display signal transfer circuit 72, and the configuration of the display signal generating circuit 70 and other circuits is the same as that of the first embodiment. .

The display signal transfer circuit 72 is the line memory 1
A line memory 16 including 6-1 to 16-n / 5, 16-a, and 16-b, a first latch circuit 17-1 to 17-n / 5, and a second latch circuit 17-a and 17-b. And a decoder circuit 10-1 to 10-n / 5, 10-a and 10-b, and a decoder selecting means 31. Note that FIG. 3 shows a case where one character is 5 × 7 dots, and the scan electrode drive circuit is omitted.

Signal electrode drive circuits 15-1 to 15-n / 5, 15
-A and 15-b are connected to the signal electrode drive circuit 15 connected to the signal electrodes S1 to Sn for character patterns and the signal electrodes SS1 to SS5 for icon display. Signal electrode groups S1 to S5, S6 to S10, ...
To Sn have a 5-bit configuration, and the signal electrode groups SS1 to SS5 for displaying icons also have a 5-bit configuration as in the case of displaying character patterns. Further, the signal electrodes for displaying icons are arranged on both sides of the signal electrodes for displaying character patterns. Here, one group such as S1 to S5 is defined as one character group.

A line memory 16 is connected to the signal electrode drive circuit 15, and the line memory 16 includes a latch circuit 17.
The display signal taken in from is transferred to the signal electrode drive circuit 15 every horizontal period. The display signal 2 is input to each of the latch circuits 17 in time series for each character group. In this case, the display signal for displaying the character pattern is input to the first latch circuits 17-1 to 17-n / 5, and the second latch circuits 17-a and 17-b are used for displaying the icon pattern. The display signal of is input. Further, these latch circuits 17 have latch signals 5-1 to 5 output from the decoder circuit 10.
-n / 5, 5-a, 5-b (These are referred to as latch signal 5 below)
Is entered. Then, by these latch signals 5,
The latch circuit 17 will take in the display signal 2 input in time series. In this case, the generation timing of the latch signal 5 from the decoder circuit 10 is the decoder selection means 3
It is determined by the decoder selection signal 3 and the decoder enable signal 4, which are the outputs of 1.

FIG. 4 shows a circuit (corresponding to the signal electrodes SS1 to SS5) including the signal electrode drive circuit 15-a, the line memory 16-a, the second latch circuit 17-a, and the decoder circuit 10-a. An example of a detailed circuit configuration is shown. Signal electrode drive circuit 15, line memory 16, latch circuit 1
7. The circuits corresponding to other signal electrodes in the decoder circuit 10 have the same circuit configuration. As shown in FIG. 4, the signal electrode drive circuit 15-a includes a plurality of driving power selection circuits 200 (for 5 dots), a logic circuit 202, and a level shift circuit 2.
04 is included. Then, the output of the line memory 16-a, the FRS signal, and the driving power supplies V0, V2, V3, V5
And are input, and drive signals to the signal electrodes SS1 to SS5 are output. The line memory 16-a includes a plurality of latch circuits 2
06, the output of the second latch circuit 17-a is latched by the line latch signal 1. Second latch circuit 17-a
Includes a plurality of latch circuits 208, and the decoder circuit 10-a
The display signal 2 of 5 bits (for one character) is fetched by the latch signal 5 from.

To the decoder circuit 10-a, a 4-bit (8-bit if an inverted signal is included) decoder selection signal 3 and a decoder enable signal 4 are input from the decoder selection means 31, whereby a latch signal 5-a is generated. Timing is decided. In this case, the decoder selection signal 3 is incremented, for example, (0000), (0001) ... (1111), and the decoder circuit 10-a decodes this decoder selection signal 3. Then, when the decoder selection signal 3 reaches a predetermined value, the decoder circuit 10
-a is selected, and the decoder circuit 10-a generates the latch signal 5-a. In this case, which value is used to generate the latch signal is determined by the circuit configuration of the decoder circuit 10-a.
Therefore, the decoder circuit 10-a and the decoder circuits 10-1 to 10-1
If the circuit configurations of 0-n / 5 and 10-b are made different, the generation timing of the latch signal can be made different. For example, the decoder circuit 10-a outputs the latch signal 5-a which is selected when the decoder selection signal 3 is (0000),
The decoder circuit 10-1 is selected when (0001) and outputs the latch signal 5-1. In this way, the decoder circuits are sequentially selected and the latch signal is generated, whereby the display signal 2 input in time series is taken in by the latch circuit 17. The decoder circuit 10 of the present embodiment has a programmable circuit configuration in which transistors are connected in series, and the decoder selection signal 3 can be changed by changing the mask or the like.
You can change which value is selected.

Next, the operation of this embodiment will be described.
First, the display code in the first digit of the first line is read from the display code memory 30 (see FIG. 2). Next, the data is read such as the first digit, the second digit, the third digit, ... (N / 5) digit, and the last digit for icon display. As a result, data for one pixel row (one dot line) has been read. By repeating this operation seven times, the data of one character line (seven lines) is read.
Then, the second character line, the third character line, ... (M / 7) character line, the last line for displaying the icon, and the like are sequentially read out and output to the pattern generation circuit 28. The operation for the screen is completed.

On the other hand, for the display signal transfer circuit 72,
The display signal 2 is input from the CGROM 22 and the CGRAM 23 via the multiplexer 27. The display signal 2 for displaying characters is latched in the first latch circuit 17-1 corresponding to the signal electrodes S1 to S5 by the latch signal 5-1 which is the output of the decoder circuit 10-1. Similarly, the display signal 2 for displaying characters is the signal electrodes S6 to S10 to Sn-4 to S.
It is latched by the first latch circuits 17-2 to 17-n / 5 corresponding to n. On the other hand, the display signal 2 for displaying the icon is the latch signal 5-a which is the output of the decoder circuits 10-a and 10-b,
It is latched by the second latch circuits 17-a and 17-b by 5-b.

The above operation is performed within one horizontal period, and thereafter, the data is transferred from the latch circuit 17 to the line memory 16 all at once by the line latch signal 1, and the line memory 16 accumulates this data for one horizontal period. The signal electrode drive circuit 15 outputs a liquid crystal drive voltage corresponding to the data of the line memory 16 to the signal electrodes S1 to Sn and SS1 to SS5 for one horizontal period. The display operation for one screen is completed by sequentially repeating such an operation for the number of scanning electrodes.

According to this embodiment, the decoder selecting means 31
By selecting the decoder circuit 10 on the basis of the decoder selection signal 3 and the decoder enable signal 4 which are the outputs of, the arbitrary signal can be transferred to the arbitrary signal electrode group. As a result, the character display area and the icon display area can be provided on the matrix panel 18 in an arbitrary arrangement. For example, the decoder selection means 3 of this embodiment
1 can be composed of a ROM, a RAM, an EEPROM or the like. Then, by changing the program data stored in these ROM, RAM, etc., the contents of the decoder selection signal 3 which is the output of the decoder selecting means 31 can be changed. As a result, the latch signal 5 output from the decoder circuit 10
It is possible to control the timing of occurrence of. For example, if the output content of the decoder selection signal 3 is changed so that the latch signals 5-a and 5-b are generated at the same timing,
The same display signal can be latched in the second latch circuits 17-a and 17-b. As a result, the same icon can be displayed, or different icons can be displayed at the same timing. Further, for example, it is possible to display an icon in the character display area. In this case, the output content of the decoder selection signal 3 may be changed so that any of the latch signals 5-1 to 5-n / 5 is generated at the timing when the display signal 2 for displaying the icon is output. As a result, it is possible to change the place that was the character display area until now to the icon display area, and it is possible to display a more complex and sophisticated image on the matrix panel. Furthermore, according to the present embodiment, it is possible to move a character or an icon. This movement of characters and the like is also possible by controlling the generation timing of the latch signal 5. When such characters can be moved, for example, in a mobile phone, it is possible to perform processing such as moving the character of the previously pressed number to the left side on the display panel each time the dial button is pressed.

Further, the matrix type display device of this embodiment has a particularly excellent structure as a standard device product. That is, in the conventional example shown in FIG. 13, the arrangement of the character display area and the icon display area is fixed, and the user cannot change them. On the other hand, in the present embodiment, as described above, the arrangement of the character display area and the icon display area can be changed only by rewriting the program data in the decoder selecting means 31. Therefore, according to the present embodiment, it is possible to provide a large number of users having different desired layouts of display areas with a matrix type display device capable of arbitrarily arranging the display areas without changing the circuit configuration of the device.

In the second embodiment, the display signal generating circuit having the same structure as that of the first embodiment is used, but the present invention is not limited to this, and the display signal generating circuit having a structure different from this is used. You can use. In this case, the data format of the display signal 2 (bit number, output timing, etc.)
However, it is desired that the display signal for characters and the display signal for icons be the same. This is because in the second embodiment, it is possible to freely arrange the character display area and the icon display area, etc., on the assumption that these formats are the same. In this sense, the configuration of the display signal generating circuit 70 having the same format is the optimal configuration for combining with the display signal transfer circuit 72.

Now, FIG. 5 shows an application example of the second embodiment. The basic structure is similar to that of the second embodiment.
The configuration from the reading of the display signal to the output of the signal electrode drive circuit is the same as that of the second embodiment, and is therefore omitted. The difference is that the signal electrode for displaying an icon that constitutes one character is the signal electrode S for displaying a character pattern.
1 to Sn, SS1 to SS3 on the left side, SS3 to
The point is that SS5 is divided and arranged on the right side. The signal control is controlled with SS1 to SS5 as one character group. As a result, the icon display areas 8 on the left and right of the character display area 84 are displayed.
5 and 86, the same icon can be displayed by SS3, or different icons can be displayed at the same timing. In this case, the second latch circuits 17-a and 17-b (see FIG. 3) arranged at different positions display the icons based on the latch signals 5-a and 5-b output at the same timing. It is sufficient to latch the display signal 2 of.

FIG. 6 shows an example of the display screen formed by this embodiment. On this display screen, the characters 22
0 and icons 222 to 230 are displayed. The call mark icon 2 is displayed in the icon display area on the upper side.
22 and a telephone mark icon 224 are displayed, and indicator icons 226 and 228 indicating the remaining battery level of the battery are displayed in the left and right icon display areas. In addition, the battery mark icon 2 is displayed in the icon display area on the lower side.
30 is displayed. As described above, according to this embodiment, it is possible to display icons on the upper and lower sides and the left and right sides of the display screen. It is also possible to display an icon in the center of the display screen. Further, in this embodiment, the indicator icons 226, 228 and the battery mark icon 23 are used.
It becomes possible to display 0 at the same time,
This makes it possible to increase the variety of display.

In the second embodiment and the application example, the case where the icon is displayed in the unit of one character group (for example, 5 bits) has been described. Good. Also, the icon display area is
It may be arranged not only on the left and right of the character display area but also on the top and bottom or in the middle. If they are placed one above the other, for example, 2
A set of scan electrodes CS1 to CS5 is provided above and below the matrix panel, and these scan electrodes and signal electrodes S1 and S2 to S5 are provided.
An icon display area may be provided in an area intersecting with n.

(Third Embodiment) FIG. 7 is a block diagram showing an example of the third embodiment of the present invention, and FIG. 8 is a character font diagram for explaining the third embodiment. . In addition, FIG.
FIGS. 9A and 9B are diagrams showing lighting rates. FIG. 9A shows the lighting rate on the signal electrode side, and FIG. 9B shows the lighting rate on the scanning electrode side. Further, FIG. 10 is a diagram showing a configuration example of the multiplexer in the present embodiment. The configurations of the display signal generation circuit and the display signal transfer circuit are the same as those in the first or second embodiment, and the description thereof will be omitted.

The characters are displayed in the character display area 88, as shown in FIG.
Then, the letter "A" indicates the scanning electrodes C1 to C7 and the signal electrode S.
It is lit and displayed in the intersection area with 1 to S5. On the other hand, the icon is displayed in the icon display area 89. At this time,
In this embodiment, the icon is displayed in the intersection area of the scan electrode CS and the signal electrodes S2 and S4 arranged in the icon display area, and the scan electrode CS and the signal electrodes S1 and S3,
It is not displayed in the intersection area with S5. Here, the scan electrodes CS may be plural. Further, the scanning electrodes may be divided and arranged above and below the matrix panel.

FIG. 8 shows a typical example of a character font. Character fonts have some unique characteristics in the display of character patterns. For example, the letter "A" indicates that the signal electrodes S1 and S5 are illuminated by 6 dots out of 7 dots, and S2, S3,
Two dots are lit in S4. FIG. 9A shows the lighting rates of the signal electrodes S1 to S5 for the arithmetic numerals 0 to 9, the uppercase letters A to Z, and the lowercase letters a to z which are often used as characters. In addition, in FIG. 9B, the scan electrodes C1 to
The lighting rate for C7 is shown. Note that FIG.
An average of these lighting rates is shown in the column of "general" in (B).

Here, the lighting rate for each character such as arithmetic numerals, uppercase letters, lowercase letters, etc. is expressed as [(number of lit dots) / (number of dots forming one character)]. In the present embodiment, the average lighting rate of each of these characters is used as the lighting rate (the value described in the comprehensive column in FIGS. 9A and 9B). Of course, the lighting rate in the present invention is not limited to this, and the lighting rate of only a part of these arithmetic numerals, uppercase letters, and lowercase letters may be averaged, and each of these characters may be averaged. The lighting rate may be multiplied by a predetermined count, and the multiplication results may be averaged. Furthermore, the lighting rate when the panel is actually used may be measured, and the measured lighting rate may be used. As is clear from FIG. 9A, in this embodiment, the signal electrodes S1, S3,
It is understood that S5 has a relatively high lighting rate, and the signal electrodes S2 and S4 have a low lighting rate.

Now, the larger the difference in lighting rate between the signal electrodes or between the scanning electrodes, the more the phenomenon of shadowing, which is a phenomenon that deteriorates the display quality, mainly occurs in the non-lighting area. The main cause of the shadow phenomenon is briefly described below. That is, the dielectric constant of the liquid crystal which is the display element increases as the potential difference applied to the liquid crystal increases (the effective value of the signal increases). In the illuminated dots, the potential difference applied to the liquid crystal is large, and therefore the dielectric constant of the liquid crystal is also high, and the illuminated dots have a larger parasitic capacitance value than the unlit dots. As a result, a capacitance difference occurs between the electrode with many illuminated dots and the electrode with few illuminated dots. On the other hand, the output of the scan electrode drive circuit and the signal electrode drive circuit has an output impedance, and the scan electrode and the signal electrode have a parasitic resistance. Therefore, when these resistance values are R and the parasitic capacitance generated in the electrodes is C, the driving voltage for driving the scan electrodes and the signal electrodes is distorted by the time constant T = CR as compared with the ideal value, and Its effective value becomes smaller. As described above, an electrode with many lit dots, that is, an electrode with a high lighting rate has a larger parasitic capacitance value C than an electrode with few lit dots, that is, an electrode with a low lighting rate (the load is Heavier). As a result, the effective value of the voltage for driving the electrode with a high lighting rate decreases, and a phenomenon called a shadow phenomenon occurs.

For example, in the case of the letter "A", the signal electrodes S1 and S5 have a heavy load and the signal electrodes S2, S3 and S4 have a light load.
3, smaller than S4. Consider a case where the illuminated area is displayed in black and the non-illuminated area is displayed in white. Then, the non-lighted dot 9 at the intersection of S1 and C1
0 or non-lighted dot 91 at the intersection of S5 and C1
And non-illuminated dots on S2, S3, and S4, for example, 92 and 9
Comparing Nos. 3 and 94, the former is relatively whiter than the white display when it is not lit. Further, comparing the lighting dots on S1 and S5, for example 95 and 96, with the lighting dots on S2, S3 and S4, such as 97, 98 and 99, the former becomes relatively whiter than the black display at the time of lighting. Will end up. That is, this is called "unevenness" of the matrix panel, that is, a shadow phenomenon.

In the present embodiment, the above problem is solved by displaying an icon as a load in the intersection area between the scan electrode CS and the electrode having a low lighting rate, for example, the signal electrodes S2 and S4 in FIG. There is. By thus making the loads on the electrodes as equal as possible, the quality of the displayed image can be improved. Here, in the above explanation,
The case of single-character display has been described, but in practice, the lighting rate is considered for a plurality of characters commonly connected to the signal electrodes or the scanning electrodes, and for example, the column of “general” in FIGS. 9A and 9B. The position where the icon is displayed will be determined based on the lighting rate described in.

In the third embodiment, the signal electrode S1
Although the present invention is not limited to this, the present invention can be applied to the scan electrodes C1 to C7 by providing at least one signal electrode SS for displaying an icon. In this case, as is apparent from FIG. 9B, the lighting rate of the scan electrodes C2 and C6 is low. Therefore, the display quality can be improved by providing the icon display area in the intersection area between the scan electrodes C2 and C6 and the signal electrode SS.

Here, the structure of the multiplexer 27 in the display signal generating circuit 74 will be described with reference to FIG. The multiplexer 27 includes the selection circuits 32, 33, 34.
including. Then, the display pattern signal 24 from the CGROM is input to the selection circuit 32. In addition, the selection circuit 3
The display pattern signal 25 from the CGRAM is input to 3, and the output of the selection circuit 33 is input to the selection circuit 34. The select signal 29 includes a CGROM selection signal 35, a character pattern display CGRAM selection signal 36, and an icon display CGRAM selection signal 37, and these signals are input to the selection circuits 32, 33, 34, respectively. And
The signals selected by the selection circuits 32, 33, and 34 are output from the multiplexer 27 as the display signal 2.

In the present embodiment, in the selection circuit 34, when the icon display CGRAM selection signal 37 becomes active and the switches 251 to 255 are closed, S
The display signals 262, 264 corresponding to 2, S4 are data-through, while the display signals 261, 263, 265 corresponding to S1, S3, S5 are fixed to the GND potential. The icon display CGRAM selection signal 37 is activated, for example, when the icon scan electrode CS is selected in FIG. 7. Therefore, at this time, S
If 1, S3, S5 are fixed to GND potential, S1, S
3. It is guaranteed that no icon is displayed in the intersection area of S5 and CS. On the other hand, the icon is displayed as usual in the intersection area of S2, S4 and CS. This makes it possible to fix these display signals to the GND level without writing data by the CPU or the like so that the display signals corresponding to S1, S3, and S5 become the GND level. .

FIG. 11 shows an example of the layout of the character display and the icon display according to the present invention. In FIG. 11, the ∘ mark represents the icon display, and the □ mark represents the character display. Then, as a scanning electrode, a scanning electrode 27 for characters is used.
0, 272 and scan electrodes 274, 276 for icons,
278 is provided. Further, as signal electrodes, signal electrodes 280, 281, 282, 283 for characters and signal electrodes 284, 286, 288 for icons are provided. As a result, it becomes possible to display the icons on the top, bottom, left and right of the matrix panel and in the character display area. Further, the icon is displayed on the scan electrode and the signal electrode having a low lighting rate and a light load, which can improve the display quality.

On the other hand, FIG. 12 shows an example of the arrangement of character display and icon display according to the conventional example. As shown in FIG. 12, in this conventional example, the position where the icon is arranged is irrelevant to the lighting rate of the electrode. Therefore, the display quality deteriorates due to the shadow phenomenon. Further, in this conventional example, the scanning electrode is a scanning electrode 2 for characters.
90, 292 and scan electrodes 294, 29 for icons
6, 298 are provided, but as the signal electrodes, only the signal electrodes 300, 301, 302, 303 for characters are provided, and the signal electrodes for icons are not provided. Therefore, it is difficult to display the icon on the left and right, and it is almost impossible to display the icon in the character display area. That is, with respect to the regions 310 and 312, icon display can be performed by intersecting the scanning electrodes 294 and the signal electrodes 314 or intersecting the scanning electrodes 294 and the signal electrodes 316. However, in the area 318, the scanning electrode 290 for characters interferes and the scanning electrode and the signal electrode cannot be crossed, so that the icon cannot be displayed. Also, regions 320, 3
No. 22 cannot be displayed as an icon because the parasitic resistance value becomes too large due to the wiring of the electrodes. Further, in the area 324, it is almost impossible to display the icon because the scanning electrode for the icon and the signal electrode cannot intersect. As described above, according to the present invention, it is possible to improve the display quality and display an icon which is difficult or impossible in the conventional example.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the gist of the present invention.

For example, the structures of the pattern generating circuit, the signal electrode driving circuit, the line memory, the latch circuit, the decoder circuit, the decoder selecting means, etc. are not limited to those described in the above embodiment, and various structures can be adopted.

The types of icons to be displayed and the layout of the character display area and the icon display area are not limited to those shown in the above embodiment, and various types can be adopted.

[0069]

According to the present invention, it is possible to handle a character pattern and an icon pattern as the same data, and it is possible to reduce the load of the writing operation of an external CPU or the like. Further, the format of the output display data can be made the same, and further, the icon can be displayed in a blinking manner.

Further, according to the present invention, characters and icons can be displayed in an arbitrary area on the matrix panel, characters can be moved, icons can be displayed in the character display area, and the like.

Further, according to the present invention, the same icon can be displayed at different positions on the matrix panel, or different icons can be displayed at the same timing, and the variety of display can be increased.

Further, according to the present invention, by changing the program data stored in the ROM, RAM, etc. constituting the decoder selecting means, it is possible to display characters and icons in any area on the matrix panel. Become. As a result, the arrangement of the character display area and the icon display area can be arbitrarily changed by the user, so that the present invention has an optimal configuration as a standard device product.

Further, according to the present invention, the parasitic capacitance added to the signal electrode having a low lighting rate can be increased, whereby the shadow phenomenon can be prevented and the display quality can be improved.

Further, according to the present invention, it is possible to increase the parasitic capacitance added to the scan electrode having a low lighting rate, thereby preventing the shadow phenomenon and improving the display quality.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a matrix type display device according to a first embodiment of the present invention.

FIG. 2 is a diagram for explaining a configuration of a display code memory.

FIG. 3 is a diagram showing a configuration of a matrix type display device of a second embodiment.

FIG. 4 is a diagram showing an example of configurations of a signal electrode drive circuit, a line memory, a latch circuit, and a decoder circuit.

FIG. 5 is a diagram showing an application example of the second embodiment.

FIG. 6 is an example of a display screen formed by the second embodiment.

FIG. 7 is a diagram showing a configuration of a matrix type display device of a third embodiment.

FIG. 8 is a character font diagram for explaining a third embodiment.

9A is a diagram showing a lighting rate on a signal electrode side, and FIG. 9B is a diagram showing a lighting rate on a scanning electrode side.

FIG. 10 is a diagram showing an example of a configuration of a multiplexer.

FIG. 11 is a diagram showing an example of arrangement of character display and icon display according to the present invention.

FIG. 12 is a diagram showing an example of a layout of character display and icon display according to a conventional example.

FIG. 13 is a diagram showing a configuration of a conventional matrix type display device.

[Explanation of symbols]

1 line latch signal 2 Display signal 3 Decoder selection signal 4 Decoder enable signal 5 Latch signal 10 Decoder circuit 15, 42, 52, 78 Signal electrode drive circuit 16 line memory 17 Latch circuit (first and second latch circuits) 18, 43, 53, 82 Matrix panel 20 Display code signal 21 Read signal 22 CGROM 23 CGRAM 24, 25 display pattern signal 26 Decoder circuit 27 multiplexer 28 pattern generation circuit 29 Select signal 30 Display code memory 31 decoder selection means 40, 50, 80 scan electrode drive circuit 70, 74 Display signal generation circuit 72, 76 display signal transfer circuit

Front page continuation (51) Int.Cl. ⁷ Identification code FI G09G 3/20 670 G09G 3/20 670J G02F 1/133 505 G02F 1/133 505 G09G 3/36 G09G 3/36 (56) Reference 62-108280 (JP, A) JP 56-30180 (JP, A) JP 4-230773 (JP, A) Actually open 57-108281 (JP, U) Actually open 5-17679 (JP , U) (58) Fields surveyed (Int.Cl. ⁷ , DB name) G09G 3/20 612 G09G 3/20 611 G09G 3/20 623 G09G 3/20 631 G09G 3/20 642 G09G 3/20 670 G02F 1/133 505 G09G 3/36

Claims (11)

(57) [Claims] 1. A matrix panel in which display pixels are arranged in a matrix and a plurality of signal electrodes and scanning electrodes are crossed, and signal electrode driving means for applying a driving voltage to the signal electrodes of the matrix panel. Scanning electrode driving means for applying a driving voltage to the scanning electrodes of the matrix panel, means for generating display signals for displaying character patterns and icon patterns, and means for transferring the display signals to the signal electrode driving means In the matrix type display device, the matrix panel includes one character for each signal electrode group.
For character pattern display provided to display turns
A plurality of signal electrode groups , each of the signal electrode driving means includes a plurality of signal electrode driving circuits.
Has multiple signal electrode drive circuits provided for each signal electrode group.
And, wherein each of the signal electrode group, and the lower signal electrode lighting rate in a case where characters in the character display area on the matrix panel is displayed, the lighting rate
A signal electrode with a high signal electrode and a high lighting rate , and on the matrix panel
In the intersection area with the scan electrodes arranged in the icon display area
Is a signal electrode with a low lighting rate without displaying an icon ,
A matrix type display device comprising means for displaying an icon in an area intersecting with a scanning electrode arranged in an icon display area on the matrix panel. 2. The display signal generating means according to claim 1, wherein when the scanning electrode for icon display arranged in the icon display area is selected,
Of each bit of the display signal having a bit width for one character, a matrix type display characterized by including means for fixing the potential of a bit corresponding to a signal electrode other than the signal electrode having a low lighting rate to the GND potential. apparatus. 3. The matrix type display device according to claim 1, wherein the lighting rate is determined by a lighting rate of arithmetic numerals, uppercase letters, lowercase letters, or an average of these lighting rates. 4. A matrix panel in which display pixels are arranged in a matrix and a plurality of signal electrodes and scanning electrodes are arranged to intersect, and signal electrode driving means for applying a driving voltage to the signal electrodes of the matrix panel. Scanning electrode driving means for applying a driving voltage to the scanning electrodes of the matrix panel, means for generating display signals for character pattern display and icon pattern display, and means for transferring the display signals to the signal electrode driving means In the matrix type display device, the matrix panel includes one character for each signal electrode group.
For character pattern display provided to display turns
A plurality of signal electrode groups , each of the signal electrode driving means includes a plurality of signal electrode driving circuits.
Has multiple signal electrode drive circuits provided for each signal electrode group.
Then, each of the signal electrode groups includes a leftmost first signal electrode, a second signal electrode on the right side thereof, and a second signal electrode on the right side thereof, which are used for displaying each character in the character display area on the matrix panel. A third signal electrode, a fourth signal electrode to the right of the third signal electrode, and a rightmost fifth signal electrode , wherein the first, third, and fifth signal electrodes are the matrix
Only when characters are displayed in the character display area on the panel.
Signal electrode having a high lighting rate, and the second and fourth signals
In the case where the electrode is a signal electrode with a low lighting rate,
Arranged in the icon display area with the first, third and fifth signal electrodes
No icon is displayed in the area where the scan electrodes intersect.
And a means for displaying an icon in an intersection area of the second and fourth signal electrodes and a scanning electrode arranged in the icon display area. 5. The display signal generating means according to claim 4, wherein when the scan electrode for icon display arranged in the icon display area is selected,
Of each bit of the display signal having a bit width for one character, a matrix including means for fixing the potential of the bit corresponding to the first, third and fifth signal electrodes to the GND potential. Type display device. 6. An electronic device comprising the matrix type display device according to claim 1 and performing desired image display including character display and icon display on the matrix panel. 7. A display signal for displaying a character pattern and an icon pattern is generated, the display signal is transferred to a signal electrode driving means, and the plurality of signal electrodes of a matrix panel in which display pixels are arranged in a matrix form. A driving method for driving the display pixels by applying a driving voltage by the signal electrode driving means to the plurality of scanning electrodes of the matrix panel and applying a driving voltage by the scanning electrode driving means to the plurality of scanning electrodes of the matrix panel. The matrix panel has one character pattern for each signal electrode group.
For character pattern display provided to display turns
A plurality of signal electrode groups , each of the signal electrode driving means includes a plurality of signal electrode driving circuits.
Has multiple signal electrode drive circuits provided for each signal electrode group.
And, wherein each of the signal electrode group, and the lower signal electrode lighting rate in a case where characters in the character display area on the matrix panel is displayed, the lighting rate
A signal electrode with a high signal electrode and a high lighting rate , and on the matrix panel
In the intersection area with the scan electrodes arranged in the icon display area
Is a signal electrode with a low lighting rate without displaying an icon ,
A driving method, characterized in that an icon is displayed in a region intersecting with a scanning electrode arranged in an icon display region on the matrix panel to drive the display pixel. 8. The lighting rate of each of the bits of the display signal having a bit width of one character when the scan electrode for icon display arranged in the icon display area is selected according to claim 7. A driving method characterized in that the potentials of the bits corresponding to the signal electrodes other than the low signal electrode are fixed to the GND potential. 9. The driving method according to claim 7, wherein the lighting rate is determined by a lighting rate of arithmetic numerals, uppercase letters, lowercase letters, or an average of these lighting rates. 10. A display signal for displaying a character pattern and an icon pattern is generated, the display signal is transferred to a signal electrode driving means, and the plurality of signal electrodes of a matrix panel in which display pixels are arranged in a matrix form. A driving method for driving the display pixels by applying a driving voltage to the plurality of scanning electrodes of the matrix panel by applying a driving voltage to the plurality of scanning electrodes of the matrix panel, The matrix panel has one character pattern for each signal electrode group.
For character pattern display provided to display turns
A plurality of signal electrode groups , each of the signal electrode driving means includes a plurality of signal electrode driving circuits.
Has multiple signal electrode drive circuits provided for each signal electrode group.
Then, each of the signal electrode groups includes a leftmost first signal electrode, a second signal electrode on the right side thereof, and a second signal electrode on the right side thereof, which are used for displaying each character in the character display area on the matrix panel. A third signal electrode, a fourth signal electrode to the right of the third signal electrode, and a rightmost fifth signal electrode , wherein the first, third, and fifth signal electrodes are the matrix
Only when characters are displayed in the character display area on the panel.
Signal electrode having a high lighting rate, and the second and fourth signals
In the case where the electrode is a signal electrode with a low lighting rate,
Arranged in the icon display area with the first, third and fifth signal electrodes
No icon is displayed in the area where the scan electrodes intersect.
And driving the display pixel by displaying an icon in an intersection area of the second and fourth signal electrodes and a scanning electrode arranged in the icon display area. 11. The method according to claim 10, wherein, when the scan electrode for icon display arranged in the icon display area is selected, among the bits of the display signal having a bit width of one character, A driving method characterized in that the potentials of the bits corresponding to the first, third, and fifth signal electrodes are fixed to the GND potential.