JP3421511B2 - Clock delay control device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to clock delay control, and more particularly to a clock signal for a digital circuit group which constitutes a data processing system by collecting a plurality of digital circuits having respective roles and operating in synchronization. The present invention relates to a clock delay information control device for correcting variations in a clock signal when the clock signal is distributed from an oscillating circuit for generating clocks to each digital circuit.

[0002]

2. Description of the Related Art As shown in FIG. 5, a normal data processing system 100 includes a plurality of substrates A having respective functions,
The oscillator 10 is composed of B, C, etc.
1, distributor 102, corrector 103, digital circuit 11
0, the board B is provided with a digital circuit 111, and the board C is provided with a distributor 104, a corrector 105, and digital circuits 112 and 113. The substrate A constitutes a CPU and the substrate B constitutes a memory control device, for example.

Digital circuits 110, 111, 112,
Reference numeral 113 is synchronously operating, and a clock signal for synchronization is generated by the oscillator 101, sent to the digital circuits 110 and 111 and the distributor 104 via the distributor 102 and the compensator 103, and distributed. It is sent from the device 104 to the digital circuits 112 and 113 via the corrector 105.

The correctors 103 and 105 are provided to correct the phase shift of the clock signal caused by an error in the accuracy of the elements forming the distribution circuits 102 and 104, for example, when distributing the clock. And these correctors 103, 1
Reference numeral 05 receives the delay correction information D ₁ and D ₂ which is information necessary for correcting the delayed phase from the external storage medium, and supplies the clock signal supplied based on the delay correction information D ₁ and D ₂ . The phase is corrected. Therefore, the correctors 102 and 105 and the delay correction information must be in one-to-one correspondence. The delay correction information given to the corrector was the board serial number, the phase delay information, and the delay information version number.

The board serial number is a serial number added to each board even if the board has the same function. For example, a board B newly inserted when a failure occurs in the board B and the board B is replaced. The delay correction information is slightly different for each serial number of the board, and the delay correction information is prepared for each serial number by measuring its characteristics during manufacturing. Also, the delay correction information is
It may be corrected when actually used, and the version number is also entered.

As described above, the plurality of digital circuits 11
In order to operate 0, 111, 112, and 113 in synchronization, the oscillator 101, the distributors 102 and 104, and the corrector 10
3 and 105 are required, and the correctors 103 and 105 need delay correction information for correcting the delayed phase. This delay correction information has a different value for each corrector.

By the way, in the conventional data processing apparatus, the following two methods have been adopted as means for supplying delay correction information. The first method is, as shown in FIG.
The delay correction information is stored in a read-only storage device (hereinafter referred to as ROM) 126 mounted on the same substrate 120 as that of No. 3 and the correction circuit 123-1 itself uses the delay correction information in the ROM 126 as described later. The self-loading is triggered by the reset. Note that FIG.
In (A), 121 is an oscillator, 122 is a distributor, 1
24 and 125 are digital circuits, respectively, and 127 is a service processor.

In this case, as shown in FIG. 6B, the software processing unit of the service processor 127 first issues a reset request for resetting the contents of the correction circuit 123-1 at the start of starting the data processing system. Corrector 1
23 to the correction circuit 123-1.

As a result, the correction circuit 123-1 executes a hard reset for resetting the contents, and then the correction circuit 123-1 carries out self-loading and the ROM 126.
The delay correction information stored in is read and the self-loading process ends. Then, the reset end signal is sent to the SVP 127. The SVP 127 receives this reset end signal and ends the rising process.

In the second method, as shown in FIG. 7A, the delay correction information is written as file data in an external storage device 128 connected to a service processor 127 provided to control the data processing system. Then, the service processor 127 corrects the delay correction information.
1 is to be supplied. Note that in FIG. 7A, 1
29 is a floppy.

In this case, the process is divided into two, as shown in FIG. First, an operator performs a process of reading the delay correction information stored in the floppy 129 at the beginning of the process of registering the delay correction information, registers the delay correction information in the external storage device 128 under the service processor 127, and performs the registration process. To finish. Next, after the registration process is completed, the operator replaces the substrate and starts up the work, whereby the service processor 127 reads the delay correction information from the external storage device 128 and writes it in the correction circuit 123-1. , The startup process ends.

[0012]

However, each of the above methods has the following problems. In the first method, that is, the ROM supply method, when the power of the system is turned on, the hardware, that is, the correction circuit 123-1 performs R
Since the delay correction information is self-loaded from the OM,
There was no means to notify the external service processor 127 of which information was read when. For this reason, there is no means for knowing when the delay correction information has been changed or for notifying an external maintenance device such as a service processor.

Therefore, for example, a board having a new serial number that has been replaced for repairing a failure may have a new function that is not present in the board so far. When a new function exists, a trouble based on the new function may occur. Therefore, in order to avoid the trouble, it was desired to notify the service processor 127 when the board was replaced.

Further, in the ROM supply method, there is a preventive process when a ROM in the initial state or a ROM in which the delay correction information has been written is mistakenly mounted on the board, or a means for detecting that the ROM itself is wrong. Absent.

Further, in the ROM supply method, even if it is desired to rewrite the delay correction information during development of the data processing device, since the delay correction information exists in the ROM, the delay correction is performed from the service processor at the time of development. Even if you can not get information and want to tune, that is, finely adjust the delay correction information when testing hardware,
It was not possible to make a slight correction by obtaining this delay correction information.

In the second method, that is, the file supply method, since the storage medium storing the delay correction information, such as the floppy disk, and the board on which the correction circuit is mounted are separately provided, the external storage device 128 is provided when the board is replaced. It is necessary for the operator to change the delay correction information of.

In addition, in the file supply system, the correction circuit and the delay correction information must correspond to each other on a one-to-one basis. Therefore, when converting a plurality of boards at once, information different from the delay correction information corresponding to the boards is used. There is a risk of accidentally registering.

Therefore, the present invention is to provide a clock delay correction information control which solves the above problems.

[0019]

In order to achieve the above object, in the present invention, as shown in FIG. 1, an oscillator 10, a distributor 11, a corrector 12, and digital circuits 13 and 14 are provided.
ROM for holding the delay correction information stored in the correction circuit 12-1 of the corrector 12 on the substrate 1 constituting the data processing device
Equipped with 15.

In this ROM 15, not only the delay correction data but also management information such as serial number and correction information version number is written. In the ROM 15, only the service processor 2 has a read function. Further, the delay correction data correction circuit 12-1 of the delay correction information read from the ROM 15
Can be filled in only by the service processor 2.

The service processor 2 reads out from the ROM 15 and makes a file in the external storage device 20 under the control of the service processor 2. And the correction circuit 12-
1, the delay correction data of the contents of this file is provided.

In addition to the delay correction information, a predetermined character string, that is, a fixed symbol string is written in the ROM 15. Since the delay correction information is one-to-one with the correction circuit,
The value is different for each substrate. Therefore, when the version number information entered in the ROM 15 is different from the version number information entered in the external storage device 20, it is determined that the board has been replaced.

The operation of FIG. 1 will be described. When the system power is turned on or the system is reset after the board of the data processing device is replaced, the service processor 2
The version number information of the delay correction information is read from the ROM 15 mounted on the substrate 1. If the board is not replaced, when the service processor 2 compares the correction information version number registered in the external storage device 20 with the correction information version number read from the ROM 15, the comparison section 22 matches them.

However, when the correction information version number read from the ROM 15 and the correction information version number registered in the external storage device 20 are different, it is recognized that the board has been replaced, and RO
The service processor 2 determines that the delay correction information read from M15 is the latest.

Then, the service processor 2 reads the delay correction information held in the memory 21 from the ROM 15 which is judged to be the latest and writes it in the external storage device 20,
The remote maintenance device 3 is notified that the board has been replaced. Further, the service processor 2 uses the external storage device 2
The correction data of the delay correction information written in 0 is supplied to the correction circuit 12-1, and the corrector 12 is controlled based on this.

The service processor 2 is the RO first.
After reading the delay correction information from M15, the service processor 2 checks whether or not the fixed symbol string existing therein is the expected character string. If the fixed symbol string read from the ROM 15 is not the expected character string, it is determined that the contents of the ROM 15 are incorrect, for example, the ROM in which the writing of the delay correction information has failed is erroneously mounted, and the RO
It is possible to detect that the correct delay correction information is not written in M15.

Moreover, since the correction data stored in the external storage device 20 is supplied to the correction circuit 12-1 of the corrector 12, the correction data written in the external storage device 20 can be easily read from the service processor 2. Can be modified to Therefore, the fine adjustment of the correction data necessary for the hardware test at the time of developing the board can be easily performed by rewriting from the service processor 2, and the correction data can be easily edited from the service processor 2.

[0028]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention is shown in FIGS.
It will be explained based on. 2 is a block diagram of an embodiment of the present invention, FIG. 3 is an explanatory diagram of a ROM content correctness determination process for determining whether the content of the ROM is correct, and FIG. 4 is an operation explanatory diagram of the present invention.

In the figure, 1 is a substrate, 2 is a service processor, 3 is a remote maintenance device, 10 is an oscillator, 11 is a distributor, 12 is a corrector, 12-1 is a correction circuit, 13 and 14 are digital circuits, respectively. Reference numeral 15 is a ROM, 20 is an external storage device, 21 is a memory, 22 is a comparison unit, and 23 is a console.

The substrate 1 is mounted with a digital circuit which constitutes a data processing system. The oscillator 10 outputs a clock signal for driving the digital circuit and the digital circuit 1 outputs the clock signal output from the oscillator 10.
A distributor 11 for distributing to the distributors 3 and 14, a corrector 12 for correcting a phase shift of a clock signal caused by an error in the element accuracy of the distributor 11, and a correction circuit 12-1 for holding correction data for the corrector 12. There are provided digital circuits 13 and 14 constituting the data processing device, a ROM 15 in which management information, a fixed symbol string, delay correction information and the like are written.

The service processor 2 controls the start-up and reset of the data processing system, reads the data written in the ROM 15 and temporarily holds the data in the memory 21, or one of them. The data stored in the external storage device 20 is compared with the data stored in the external storage device 20, the data read from the ROM 15 is stored in the external storage device 20, and the correction data stored in the external storage device 20 is corrected by the correction circuit 12. -1 is input, and a comparison unit 22, a console 23 for inputting correction data for correcting the correction data stored in the external storage device 20 under the control unit, and the like are provided.

The remote maintenance device 3 manages the maintenance status of the data processing system, and manages the maintenance status such as when and what serial number of the board forming the data processing apparatus was replaced by. It is a thing.

First, A. which is a characteristic operation in the present invention. Control of delay correction information and B. The contents check of the ROM will be described.

A. Control of Delay Correction Information (1) As shown in FIG. 2, when the service processor detects a reset signal input by the operator when the power is turned on or a board having a corrector, the service processor 2 determines the target board. ROM1 installed in 1
The management information, the correction data, etc. stored in 5 are read out and temporarily stored in the memory 21. Further, the service processor 2 reads the delay correction information including management information (for example, serial number, version number information of correction information) and correction data stored in the target board from the external storage device 20 under the service processor 2, and retrieves these. This is also temporarily held in the memory 21. Then, the comparing unit 22 compares the management information read from the ROM 15 with the management information read from the external storage device 20, for example, version number information of the correction information.

(2) If the compared results match, the service processor 2 reads from the external storage device 20,
The correction data stored in the memory 21 is written in the correction circuit 12-1 of the corrector 12. If the compared results do not match, the service processor 2 determines that the information stored in the ROM 15 is the latest information, and the management information and correction data are stored in the external storage device 20 in the new management related to the target board 1. Register information and correction data.

(3) The service processor 2 notifies the remote maintenance device 3 of the fact that the substrate 1 has been replaced, when triggered by being registered in the external storage device 20. At this time, the serial number is also notified. After that, the service processor 2 reads this latest correction data from the external storage device 20 and writes it in the correction circuit 12-1 of the corrector 12.

B. ROM contents check (1) As shown in FIG. 3, the ROM 15 mounted on the substrate 1
A fixed symbol string (for example, ABCD) is written in. In addition, the external storage device 2 under the service processor 2
In 0, the fixed symbol string which is the same as the fixed symbol string written in the ROM 15 is registered as the initial value of various variables.

(2) When the system power-on after the replacement of the substrate 1 or the reset signal for the service processor 2 is detected, the service processor 2 itself stores the SVP program and various variables (or constants). The initial value of is self-loaded into the area 21-A of the memory 21. By this self-loading process, the fixed symbol string is developed in the area 21-A of the memory 21.

(3) Further, the service processor 2 loads the contents of the ROM 15 mounted on the substrate 1 into the area 2 of the memory 21.
When read to 1-B, the comparison unit 22 compares the fixed symbol string developed in the area 21-B with the fixed symbol string expanded in the area 21-A. If the comparison results match, the service processor 2 determines that the ROM 1 installed
5 is correct, and it is judged that the delay correction information read from the ROM 15 is correctly read.

(4) However, if the comparison results do not match, the ROM 15 installed is judged to be invalid, and the service processor 2 notifies the remote maintenance device 3 of an error.
In addition, the digital circuit formed by the board 1 is separated from the system.

The operation of the embodiment of the present invention shown in FIG. 2 will now be described with reference to the operation explanatory diagram of FIG. (1) For example, after replacing the substrate 1 in FIG. 2, the system power is turned on. As a result, the service processor 2
Reads out the delay correction information such as the management information, the fixed symbol string, and the correction data from the ROM 15 mounted on the substrate 1 and writes it in the area 21-B of the memory 21.

(2) The service processor 2 stores the read fixed symbol string and the fixed symbol string stored in the area 21-A of the memory 21 in advance in the external storage device 20 as shown in FIG. The comparison unit 22 checks whether these match. When the fixed symbol string read from the ROM 15 by this collation does not match the fixed symbol string previously stored in the area 21-A of the memory which is held in the external storage device 20, it is determined that an error exists in the content of the ROM 15 and the service is performed. The processor 2 performs error handling and displays it on the console 23 to inform the operator.

(3) If these fixed symbol strings match,
The service processor 2 reads the correction information version number from the management information of the substrate 1 which is stored in the external storage device 20 in advance, and stores the correction information version number in the area 21-A of the memory 21.
In step 2, the correction information version number of the management information read from the ROM 15 is collated.

(4) If there is a mismatch by comparing the version numbers, the service processor 2 determines that the board 1 has been replaced, and reads it from the ROM 15 in (1) above.
The correction data stored in the area 21-B is stored in the external storage device 20.
Register with.

(5) The service processor 2 notifies the remote maintenance device 3 that the substrate 1 has been replaced. (6) Then, the service processor 2 reads the correction data registered in the external storage device 20, and stores it in the memory 21.
It is once held in the area 21-A.

(7) The service processor 2 corrects the correction data stored in the area 21-A of the memory 21 from the external storage device 20 as described above, and the correction circuit 1 of the corrector 12 of the substrate 1
Write in 2-1. As a result, the corrector 12 can accurately correct the phase variation when distributing the clock signal based on the correction data. In this way, the correction data entry process is completed.

In the above (3), when the collation of the version numbers is the same, the service processor 2 determines that the substrate 1 has not been replaced, and the above processes (6) and (7) are performed. . That is, the service processor 2 reads the correction data registered in the external storage device 20 and writes it in the correction circuit 12-1. Even if the substrate 1 is not replaced in this way, correct correction data can be obtained with correct correction data.
2-1 can be written.

The processes (1) to (7) are performed not only when the power is turned on at the start-up of the system, but also when the system is reset.

When the data stored in the external storage device 20 is to be corrected, the data to be corrected is input from the console 23 so that the service processor 2 can receive the data stored in the external storage device 20. Can be corrected. Therefore, when the correction data for the correction circuit is slightly changed and the test is performed at the time of designing the board, the correction data for the correction circuit can be easily corrected by inputting the correction data from the console 23. Therefore, an accurate design can be performed.

In the above description of the present invention, an example in which one substrate is used has been described. However, the present invention is not limited to this, and the same applies when a plurality of substrates are used. Is.

As described above, according to the present invention, since the delay correction information is supplied from the ROM on the board, the latest delay correction information can be automatically fetched, and the system failure due to the registration error occurs. Can be prevented, and the management of maintenance parts can be facilitated.

Further, by comparing the contents of the delay correction information in the ROM with the contents of the filed delay correction information, it becomes possible to know the trigger for the replacement of the board, and the automatic notification to the remote maintenance mechanism becomes possible. The efficiency of maintenance can be improved, and the situation of adaptive parts can be easily grasped.

Moreover, it is possible to confirm whether or not the delay correction information is accurately written in the ROM by reading the fixed symbol string, and it is possible to prevent the system from being down due to the failure of the delay correction information.

Further, since the delay correction information supplied to the correction circuit uses information filed in the external storage device under the service processor, the delay correction information can be edited, that is, the delay correction information can be corrected by the service processor. Since it can be easily performed, slight correction of correction data can be facilitated, and efficiency can be improved during hard debugging.

[0055]

According to the present invention described in claim 1,
By comparing the version number information, it is judged whether the correction data to be sent to the board correction circuit is from the ROM or stored in the external storage device under the service processor, and the correct data is sent. can do. Further, the delay correction information held in the external storage device under the service processor can be automatically updated to the latest delay correction information in the ROM mounted on the board.

According to the present invention as set forth in claim 2, based on the comparison of the version number information, when they do not match, it is judged that the board has been replaced, and the fact that the board has been replaced is remotely detected. The maintenance device can be notified immediately. Then, the remote maintenance device can grasp what kind of function the board has been replaced by the version number or serial information, and can perform appropriate maintenance management according to the function.

[0057]

According to the present invention described in claim 3 , R
It is possible to check whether or not the delay correction information read from the OM has been correctly read, and it is possible to prevent incorrect correction data from being erroneously sent to the correction circuit.

[Brief description of drawings]

FIG. 1 shows a principle configuration diagram of the present invention.

FIG. 2 shows an embodiment of the present invention.

FIG. 3 is an explanatory diagram of ROM content correctness determination processing according to the present invention.

FIG. 4 is an explanatory diagram of the operation of the present invention.

FIG. 5 is an explanatory diagram of a data processing system.

FIG. 6 is a diagram (part 1) for explaining conventional supply of delay correction information.

FIG. 7 is an explanatory diagram of a conventional delay correction information supply (No. 2).

[Explanation of symbols]

1 Substrate 2 Service Processor 3 Remote Maintenance Device 10 Oscillator 11 Distributor 12 Corrector 12-1 Corrector Circuits 13, 14 Digital Circuit 15 ROM 20 External Storage Device 21 Memory 22 Comparing Section 23 Console 100 Data Processing System 101 Oscillator 102 Distributor 103 Corrector 104 Distributor 105 Corrector D ₁ , D ₂ Delay correction information

Continuation of front page (56) Reference JP-A-4-256114 (JP, A) JP-A-4-35425 (JP, A) JP-A-6-324913 (JP, A) JP-A-6-83476 (JP , A) JP 5-324120 (JP, A) JP 2-126311 (JP, A) JP 1-276324 (JP, A) JP 61-70831 (JP, A) (58) Fields surveyed (Int.Cl. ⁷ , DB name) G06F 1/04-1/10 G06F 11/30

Claims (3)

(57) [Claims] 1. A clock signal generating means for generating a clock signal for synchronizing a plurality of digital circuits constituting a data processing system to operate, and a distributing means for distributing the clock signal to each digital circuit. In a clock delay control device comprising a correction means for correcting a phase shift of a clock signal and a first storage means for holding correction information supplied to the correction means, the clock delay control device is provided on a substrate on which a digital circuit is mounted. , ROM
And a service processor for reading delay correction information including version number information stored in the first storage means, and a delay read by the service processor from the first storage means. The correction information is stored and the service
A rewritable second storage unit is provided under the control of the processor, and the service processor stores the version number information and the version number information stored in the second storage unit when the data processing system starts up or when the system is reset. The version number information read from the first storage means is compared, and the comparison result is in agreement.
Sometimes the information stored in the second storage means is sent out.
However, when they do not match, the information stored in the first storage means
Is stored in the second storage means . 2. When the version number information is compared and they do not match, the service processor determines that the board whose version number does not match has been replaced and notifies the remote maintenance device of this. The clock delay control device according to claim 1, wherein 3. A fixed symbol is held on the service processor side.
A fixed symbol held by the first storage means.
, And before sending the correction data to the correction means,
When these fixed symbols are compared and matched, this first
It can be judged that the data stored in the storage means is accurate.
The clock delay control device according to claim 1, wherein: