JP3412700B2 - Neural network type pattern learning method and pattern processing device - Google Patents
Neural network type pattern learning method and pattern processing deviceInfo
- Publication number
- JP3412700B2 JP3412700B2 JP15760393A JP15760393A JP3412700B2 JP 3412700 B2 JP3412700 B2 JP 3412700B2 JP 15760393 A JP15760393 A JP 15760393A JP 15760393 A JP15760393 A JP 15760393A JP 3412700 B2 JP3412700 B2 JP 3412700B2
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- learning
- neural network
- differential value
- network type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Image Analysis (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、入力パターンに対応し
た望ましい出力パターンを与えるだけで自動的に学習す
る神経回路網型パターン学習方法およびパターン処理装
置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a neural network type pattern learning method and a pattern processing device for automatically learning by giving a desired output pattern corresponding to an input pattern.
【0002】[0002]
【従来の技術】従来のバックプロパゲーション学習法
は、図3に示すような多層の神経回路網において、以下
のように行なわれる。なお、図3は3層の神経回路網を
示し、丸印は非線形しきいユニットを示し、直線はユニ
ット間の重みを示す。2. Description of the Related Art A conventional back propagation learning method is carried out as follows in a multilayer neural network as shown in FIG. It should be noted that FIG. 3 shows a three-layer neural network, in which circles represent non-linear threshold units, and straight lines represent weights between units.
【0003】m層の多層神経回路網を考え、k層の第i
番目のユニットへの入力の総和をI、Considering an m-layer multilayer neural network, the k-th i-th layer
The sum of the inputs to the th unit is I,
【外1】 これらの変数の関係は以下のようになる。[Outer 1] The relationship between these variables is as follows.
【0004】[0004]
【数1】 ここでコスト関数として次のようなものを考える。[Equation 1] Consider the following as a cost function.
【0005】[0005]
【数2】
但し、jについての和は最終層mに存在するユニットの
数だけとる。すると、重みの変更は次のようになる。[Equation 2] However, the sum for j is the number of units existing in the final layer m. Then, the weight change is as follows.
【0006】[0006]
【数3】 [Equation 3]
【数4】 このように重みを変化させ、学習を行なう。[Equation 4] In this way, the weight is changed and learning is performed.
【0007】[0007]
【発明が解決しようとする課題】学習パターンが例えば
図4に示すように変化していたとき、上述した学習法の
コスト関数では、与えた学習パターンの点を通れば学習
したことになるのだが、学習が進むにつれて、図5に示
すように過学習の状態が発生するという問題がある。When the learning pattern changes as shown in FIG. 4, for example, the cost function of the learning method described above has learned if it passes through the points of the given learning pattern. As the learning progresses, there is a problem that an over-learning state occurs as shown in FIG.
【0008】本発明は、上記に鑑みてなされたもので、
その目的とするところは、学習が進むにつれて発生する
過学習を抑制し、学習パターンが急峻に変化しても学習
可能な神経回路網型パターン学習方法およびパターン処
理装置を提供することにある。The present invention has been made in view of the above,
An object of the invention is to provide a neural network type pattern learning method and a pattern processing device capable of suppressing over-learning that occurs as learning progresses and capable of learning even when a learning pattern sharply changes.
【0009】[0009]
【課題を解決するための手段】上記目的を達成するた
め、請求項1に係る発明は、非線形しきいユニットから
なる多層の神経回路網を用いた神経回路網型パターン学
習方法であって、学習パターンの入力パターンに対する
学習パターンの出力パターンの微分値を計算し、前記微
分値の2乗に滑らかさのペナルティを掛けた値を学習コ
スト関数に加え、前記滑らかさのペナルティは、前記微
分値が大きい場合に小さく、前記微分値が小さい場合に
大きくし、前記学習コスト関数を変化させることにより
過学習を抑制することを特徴とする神経回路網型パター
ン学習方法である。In order to achieve the above object, the invention according to claim 1 is a neural network type pattern learning method using a multilayer neural network composed of nonlinear threshold units, comprising: The differential value of the output pattern of the learning pattern with respect to the input pattern of the pattern is calculated, and the value obtained by multiplying the square of the differential value by the penalty of smoothness is added to the learning cost function, and the penalty of the smoothness is that the differential value is The neural network pattern learning method is characterized in that it is small when it is large, and it is large when the differential value is small, and overlearning is suppressed by changing the learning cost function.
【0010】また、請求項2に係る発明は、非線形しき
いユニットからなる多層の神経回路網を用いた神経回路
網型パターン処理装置であって、学習パターンの入力パ
ターンに対する学習パターンの出力パターンの微分値を
計算する手段と、前記微分値が大きい場合に小さく、前
記微分値が小さい場合に大きくなる滑らかさのペナルテ
ィを該微分値の2乗値に掛けた値を学習コスト関数に加
える手段とを有することを特徴とする神経回路網型パタ
ーン処理装置である。According to a second aspect of the present invention, there is provided a neural network type pattern processing device using a multilayer neural network composed of non-linear threshold units, wherein the learning pattern output pattern corresponds to the learning pattern input pattern. A means for calculating a differential value, and means for adding to the learning cost function a value obtained by multiplying the square value of the differential value by a smoothness penalty that is small when the differential value is large and increases when the differential value is small. It is a neural network type pattern processing device characterized by having.
【0011】[0011]
【作用】本発明の神経回路網型パターン学習方法では、
学習パターンの入力パターンに対する出力パターンの微
分値を計算し、微分値の2乗に滑らかさのペナルティを
掛けた値を学習コスト関数に加え、滑らかさのペナルテ
ィは、前記微分値が大きい場合に小さく、前記微分値が
小さい場合に大きくし、学習コスト関数を変化させるこ
とにより過学習を抑制させる。In the neural network pattern learning method of the present invention,
The differential value of the output pattern with respect to the input pattern of the learning pattern is calculated, and the value obtained by multiplying the square of the differential value by the smoothness penalty is added to the learning cost function. The smoothness penalty is small when the differential value is large. When the differential value is small, it is increased and the learning cost function is changed to suppress overlearning.
【0012】また、本発明の神経回路網型パターン処理
装置では、学習パターンの入力パターンに対する出力パ
ターンの微分値を計算し、微分値が大きい場合に小さ
く、微分値が小さい場合に大きくなる滑らかさのペナル
ティを微分値の2乗値に掛けた値を学習コスト関数に加
える。Further, in the neural network type pattern processing apparatus of the present invention, the differential value of the output pattern with respect to the input pattern of the learning pattern is calculated, and the smoothness becomes small when the differential value is large and becomes large when the differential value is small. A value obtained by multiplying the square value of the differential value by the penalty of is added to the learning cost function.
【0013】[0013]
【実施例】以下、図面を用いて本発明の実施例を説明す
る。Embodiments of the present invention will be described below with reference to the drawings.
【0014】図1は、本発明の一実施例に係わる神経回
路網型パターン処理装置の構成を示すブロック図であ
る。同図に示す神経回路網型パターン処理装置は、パタ
ーンを入力するパターン入力回路1、2乗誤差を計算す
る2乗誤差計算回路2、入力パターンに対する出力パタ
ーンの微分値を計算する微分計算回路3、係数を計算す
る係数計算回路4、結合係数を修正する結合係数修正回
路5を有する。FIG. 1 is a block diagram showing the arrangement of a neural network type pattern processing apparatus according to an embodiment of the present invention. The neural network type pattern processing apparatus shown in the figure includes a pattern input circuit 1 for inputting a pattern, a square error calculation circuit 2 for calculating a squared error, and a differential calculation circuit 3 for calculating a differential value of an output pattern with respect to an input pattern. , A coefficient calculation circuit 4 for calculating coefficients, and a coupling coefficient correction circuit 5 for correcting coupling coefficients.
【0015】今、m層の多層神経回路網を考え、k層の
第i番目のユニットへの入力の総和Now, considering a multilayer neural network of m layers, the sum of inputs to the i-th unit of k layers is summed up.
【外2】 ると、これらの変数の関係は以下のようになる。[Outside 2] Then, the relation of these variables is as follows.
【0016】[0016]
【数5】
ここでコスト関数として次のような2乗誤差コスト関数
を考える。[Equation 5] Consider the following squared error cost function as the cost function.
【0017】[0017]
【数6】
但し、ε2 は定数で、jについての和は最終層mに存在
するユニットの数だけ[Equation 6] However, ε 2 is a constant, and the sum for j is the number of units existing in the final layer m.
【外3】
する微分であり、回路が実現する関数を滑らかにし、過
学習を押えるためのペナルティであるが、このペナルテ
ィを入れたままのコスト関数では、学習パターンが急峻
に変化するところでは滑らかさを押えることができな
い。そこで、(1−ρj )という滑らかさのペナルティ
を掛けた項でE2でペナルティにどの程度効果を持たせ
るかということを決める。ρj =1の場合は学習パター
ンが急峻に変化するところであり、滑らかさのペナルテ
ィをコスト関数に含めない。また、ρj =0のときは、
滑らかさのペナルティをコスト関数に含める。[Outside 3] It is a differentiation that makes the function realized by the circuit smooth and suppresses over-learning, but with the cost function with this penalty put, smoothness should be suppressed where the learning pattern changes sharply. I can't. Therefore, E 2 determines how effective the penalty is with the term multiplied by the smoothness penalty of (1-ρ j ). When ρ j = 1, the learning pattern changes abruptly, and the penalty of smoothness is not included in the cost function. When ρ j = 0,
Include a smoothness penalty in the cost function.
【0018】学習である重みの変更は、次のようにな
る。The change of weight, which is learning, is as follows.
【0019】[0019]
【数7】 [Equation 7]
【数8】 [Equation 8]
【数9】 ρj を決めるには、例えば、次のような方法がある。[Equation 9] For example, the following method can be used to determine ρ j .
【0020】ある拘束条件を最適化するのに一般的によ
く用いられるホップフィールド型神経回路網を考え、そ
のコスト関数としてE’を考える。Consider a Hopfield neural network that is commonly used to optimize certain constraints, and consider E'as its cost function.
【0021】[0021]
【数10】
V(ρj )は、ρj =1になった場合のペナルティで、
次のように与える。[Equation 10] V (ρ j ) is the penalty when ρ j = 1 and
Give as follows.
【0022】[0022]
【数11】
但し、C1 ,B1 ,B2 ,B3 ,B4 は定数とする。第
1,2項はρj =1となることに対するペナルティで、
第3項はρが0か1に収束するための項である。ここ
で、Gは次のような関数とする。[Equation 11] However, C 1 , B 1 , B 2 , B 3 , and B 4 are constants. The first and second terms are the penalties for ρ j = 1 and
The third term is a term for ρ to converge to 0 or 1. Here, G is the following function.
【0023】[0023]
【数12】 但し、λは定数である。[Equation 12] However, λ is a constant.
【0024】ここで、ρj を決める方程式として、次の
式を考える。Here, the following equation is considered as an equation for determining ρ j .
【0025】[0025]
【数13】 但し、ε3 は定数とする。[Equation 13] However, ε 3 is a constant.
【0026】また、E’の時間微分は次の式より、必ず
0以下になる。The time derivative of E'is always 0 or less according to the following equation.
【0027】[0027]
【数14】
E’の時間微分が0になれば、すべてのρj について次
のようになり、ρj は必ず収束する。[Equation 14] When the time derivative of E ′ becomes 0, the following holds for all ρ j , and ρ j always converges.
【0028】
dρj /dt=0 (27)
次に、図2に示すフローチャートを参照して、パターン
学習方法について説明する。上述したように、入力に対
する出力の微分値を微分計算回路3で計算し(ステップ
110)、この計算した微分値よりコスト関数の中にど
の程度効かせるかを別のホップフィールド型神経回路網
を用いて計算する。すなわち、ホップフィールド型神経
回路網による係数を決定する(ステップ120)。それ
から、このコスト関数で多層の神経回路網を学習させる
(ステップ130)。以上の手順を繰り返すことによ
り、過学習を抑えつつ、学習パターンが急峻に変化して
いるところでも学習が可能となる。Dρ j / dt = 0 (27) Next, the pattern learning method will be described with reference to the flowchart shown in FIG. As described above, the differential value of the output with respect to the input is calculated by the differential calculation circuit 3 (step 110), and another Hopfield neural network is used to determine how effective the calculated differential value is in the cost function. Calculate using. That is, the coefficient by the Hopfield neural network is determined (step 120). Then, a multilayer neural network is trained with this cost function (step 130). By repeating the above procedure, it is possible to learn even while the learning pattern is changing sharply while suppressing over-learning.
【0029】[0029]
【発明の効果】以上説明したように、本発明によれば、
学習パターンの入力パターンに対する学習パターンの出
力パターンの微分値を計算し、上記微分値の2乗に滑ら
かさのペナルティを掛けた値を学習コスト関数に加え、
上記滑らかさのペナルティは、前記微分値が大きい場合
に小さく、前記微分値が小さい場合に大きくし、上記学
習コスト関数を変化させることにより過学習を抑制する
ことが可能になり、従来の方法では実現できなかったパ
ターン認識、分類等の処理が可能となる。As described above, according to the present invention,
The differential value of the output pattern of the learning pattern with respect to the input pattern of the learning pattern is calculated, and the value obtained by multiplying the square of the differential value by the smoothness penalty is added to the learning cost function,
The smoothness penalty is small when the differential value is large, and is large when the differential value is small, and it is possible to suppress overlearning by changing the learning cost function. It becomes possible to perform pattern recognition, classification, and other processing that could not be realized.
【図1】本発明の一実施例に係わる神経回路網型パター
ン処理装置の構成を示すブロック図である。FIG. 1 is a block diagram showing a configuration of a neural network type pattern processing apparatus according to an embodiment of the present invention.
【図2】本発明の一実施例に係わる神経回路網型パター
ン学習方法の手順を示すフローチャートである。FIG. 2 is a flowchart showing a procedure of a neural network pattern learning method according to an embodiment of the present invention.
【図3】多層神経回路網の一例である3層神経回路網を
示す図である。FIG. 3 is a diagram showing a three-layer neural network which is an example of a multilayer neural network.
【図4】学習パターンの点(入力、出力とも1次元)と
神経回路網が実現した関数を示す図である。FIG. 4 is a diagram showing points (both input and output are one-dimensional) of a learning pattern and a function realized by a neural network.
【図5】学習パターンの点(入力、出力とも1次元)と
過学習した神経回路網が実現した関数を示す図である。FIG. 5 is a diagram showing points (both input and output are one-dimensional) of a learning pattern and a function realized by an overlearned neural network.
1 パターン入力回路 2 2乗誤差計算回路 3 微分計算回路 4 係数計算回路 5 結合係数修正回路 1 pattern input circuit 2 Square error calculation circuit 3 differential calculation circuit 4 coefficient calculation circuit 5 Coupling coefficient correction circuit
───────────────────────────────────────────────────── フロントページの続き (72)発明者 曽根原 登 東京都千代田区内幸町1丁目1番6号 日本電信電話株式会社内 (56)参考文献 特開 平2−158860(JP,A) (58)調査した分野(Int.Cl.7,DB名) G06N 1/00 - 7/08 JICSTファイル(JOIS)─────────────────────────────────────────────────── ─── Continuation of front page (72) Noboru Sonehara 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (56) Reference JP-A-2-158860 (JP, A) (58) Fields surveyed (Int.Cl. 7 , DB name) G06N 1/00-7/08 JISST file (JOIS)
Claims (2)
経回路網を用いた神経回路網型パターン学習方法であっ
て、 学習パターンの入力パターンに対する学習パターンの出
力パターンの微分値を計算し、 前記微分値の2乗に滑らかさのペナルティを掛けた値を
学習コスト関数に加え、 前記滑らかさのペナルティは、前記微分値が大きい場合
に小さく、前記微分値が小さい場合に大きくし、前記学
習コスト関数を変化させることにより過学習を抑制する
ことを特徴とする神経回路網型パターン学習方法。1. A neural network type pattern learning method using a multilayer neural network composed of non-linear threshold units, wherein a differential value of an output pattern of a learning pattern with respect to an input pattern of the learning pattern is calculated, A value obtained by multiplying the square of the value by a smoothness penalty is added to the learning cost function, and the smoothness penalty is small when the differential value is large, and is large when the differential value is small. A neural network type pattern learning method characterized by suppressing over-learning by changing the.
経回路網を用いた神経回路網型パターン処理装置であっ
て、 学習パターンの入力パターンに対する学習パターンの出
力パターンの微分値を計算する手段と、 前記微分値が大きい場合に小さく、前記微分値が小さい
場合に大きくなる滑らかさのペナルティを該微分値の2
乗値に掛けた値を学習コスト関数に加える手段とを有す
ることを特徴とする神経回路網型パターン処理装置。2. A neural network type pattern processor using a multilayer neural network composed of non-linear threshold units, said means for calculating a differential value of an output pattern of a learning pattern with respect to an input pattern of a learning pattern, The smoothness penalty that is small when the differential value is large and is large when the differential value is small is 2 of the differential value.
And a means for adding a value multiplied by a multiplication value to a learning cost function.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15760393A JP3412700B2 (en) | 1993-06-28 | 1993-06-28 | Neural network type pattern learning method and pattern processing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15760393A JP3412700B2 (en) | 1993-06-28 | 1993-06-28 | Neural network type pattern learning method and pattern processing device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0713745A JPH0713745A (en) | 1995-01-17 |
JP3412700B2 true JP3412700B2 (en) | 2003-06-03 |
Family
ID=15653338
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15760393A Expired - Fee Related JP3412700B2 (en) | 1993-06-28 | 1993-06-28 | Neural network type pattern learning method and pattern processing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3412700B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102063640A (en) * | 2010-11-29 | 2011-05-18 | 北京航空航天大学 | Robot behavior learning model based on utility differential network |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020241009A1 (en) * | 2019-05-31 | 2020-12-03 | 株式会社エヌ・ティ・ティ・データ | Prediction device, learning device, prediction method, and program |
-
1993
- 1993-06-28 JP JP15760393A patent/JP3412700B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102063640A (en) * | 2010-11-29 | 2011-05-18 | 北京航空航天大学 | Robot behavior learning model based on utility differential network |
CN102063640B (en) * | 2010-11-29 | 2013-01-30 | 北京航空航天大学 | Robot behavior learning model based on utility differential network |
Also Published As
Publication number | Publication date |
---|---|
JPH0713745A (en) | 1995-01-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH07121495A (en) | Construction method of expert system by using one or more neural networks | |
EP0384709B1 (en) | Learning Machine | |
JP3374476B2 (en) | Neural network construction method | |
JP3412700B2 (en) | Neural network type pattern learning method and pattern processing device | |
JP2862337B2 (en) | How to build a neural network | |
JP3168204B2 (en) | Network configuration data processing device | |
JP2897220B2 (en) | Signal processing device | |
JP2699447B2 (en) | Signal processing device | |
JPH0713768A (en) | Continuous logic computation system and its usage method | |
JP3208084B2 (en) | Method and apparatus for estimating radio wave propagation loss | |
JP3276035B2 (en) | A sequential accelerated learning method for neural network models | |
JPH0981535A (en) | Learning method for neural network | |
JP3262340B2 (en) | Information processing device | |
JPH05324598A (en) | Learning system in neural network learning device | |
JPH06175998A (en) | Time series prediction method | |
Patyra et al. | Processing of incomplete fuzzy data using artificial neural networks | |
JP2813567B2 (en) | Inference rule determination apparatus and inference rule determination method | |
JPH03201160A (en) | Learning processor | |
Vai | A massively parallel reverse modeling approach for semiconductor devices and circuits | |
JPH0233655A (en) | Nerve circuit network type pattern processor | |
JPH05151373A (en) | Fuzzy reverse diagnostic method using neural network | |
JP3236635B2 (en) | Learning method of neural network | |
Tzouvaras et al. | Knowledge refinement using fuzzy compositional neural networks | |
JPH03201158A (en) | Learning processor | |
JPH0367358A (en) | Learning machine |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090328 Year of fee payment: 6 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090328 Year of fee payment: 6 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100328 Year of fee payment: 7 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110328 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110328 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120328 Year of fee payment: 9 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130328 Year of fee payment: 10 |
|
LAPS | Cancellation because of no payment of annual fees |