JP3409718B2 - IGBT with built-in circuit and power converter using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mainly applied to an inverter or the like, and more particularly to prevention of malfunction of IGBT with a built-in circuit.

[0002]

2. Description of the Related Art Insulated gate bipolar transistors (In
A simulated gate bipolar transistor (hereinafter abbreviated as IGBT) is a voltage-controlled switching element capable of controlling the current at the main terminal with the voltage at the control terminal. BACKGROUND ART IGBTs are currently widely used for household air conditioners, inverters for electric trains, etc. because they can switch at high frequencies with high current.

Up to now, the IGBT has been designed to have low loss and high speed. In recent years, not only low loss and high speed but also high functionality have been advanced. As the high-performance IGBT, there is, for example, an IGBT in which a protection circuit is integrated with the IGBT to provide a protection function in one chip. A problem in integrating a circuit in the IGBT is a malfunction of the circuit due to a carrier current, that is, a hall current, which is peculiar to the IGBT. When the hole current injected from the collector layer of the IGBT flows into the circuit region, the circuit malfunctions. Therefore, in order to prevent the hole current from flowing into the circuit area, a structure in which a layer for discharging holes is provided is disclosed. Fig. 11 shows the cross-sectional structure of a circuit built-in IGBT having a hole discharging layer.

In FIG. 11, 101 is a collector layer and 1 is a collector layer.
02 is a buffer layer, 103 is a drift layer, 104 is a channel layer, 105 is an emitter layer, 106 is a hole discharging layer,
110 is an emitter electrode, 111 is a gate electrode, 112 is a gate oxide film, 114 is a source electrode, 115 is a MOSFET gate electrode, 116 is a drain electrode, 117 is a collector electrode, 131 is a source layer, 132 is a base layer, and 133 is a drain. Layer, 150 is IGBT area, 151 is circuit area, 15
2 is a lateral MOSFET. Although not shown in FIG. 11, a resistor, a diode, and the like are formed in the circuit region 151 as an element that constitutes a circuit in addition to the MOSFET. Similarly, although not shown, the source electrode 114 of the MOSFET
The gate electrode 115 and the drain electrode 116 are connected to other elements formed in the circuit region and the emitter electrode 110 and the gate electrode 111 of the IGBT. As indicated by the arrow in FIG. 11, a hole current flows from the collector layer to the emitter layer when the IGBT is on. In order to prevent the hole current from flowing into the circuit region, the hole discharge layer 106 is formed to prevent the hole current from flowing into the circuit region from the IGBT region.

[0005]

However, in recent years, I
There is a problem that a circuit integrated in the GBT is highly functional and highly accurate, and a malfunction of the circuit occurs even with a small leak current of a hole. This is because even if the hole discharging layer 106 is provided, a small amount of holes leak to the circuit region. Such a malfunction is remarkable when the source follower circuit using the MOSFET is integrated in the IGBT.

12 and 13 show a cross section and an equivalent circuit of an IGBT in which a source follower circuit is integrated. 12,
In FIG. 13, the same components as those in FIG. 11 are given the same numbers. In FIGS. 12 and 13, 140 is a source follower resistor, 201 is an n-channel MOSFET corresponding to the channel part of the IGBT, 202 is an npn transistor composed of a drift layer, a channel layer and an emitter layer, 203 is a collector layer, a buffer layer. A pnp transistor composed of a drift layer and a channel layer, 204
Is composed of drift layer, base layer and emitter layer
The npn transistor of the MOSFET and 205 are lateral MOSFETs.

In the conventional structure, the leak current of the hole current flows into the source electrode 114 of the MOSFET through the base layer 132. When the hole current flows into the source electrode, the voltage generated in the source follower resistor 140 becomes higher than the desired voltage, causing malfunction of the circuit.

The present invention has been made in consideration of the above problems, and a circuit built-in IG capable of preventing a malfunction of the circuit.
Provide BT.

[0009]

A circuit built-in I according to the present invention
The GBT includes a semiconductor substrate having an IGBT region and a circuit region which are adjacent to each other. In the one-conductivity-type semiconductor layer in which the circuit element is formed in the circuit region, another one-conductivity-type semiconductor layer adjacent to the circuit element and having a higher impurity concentration than the semiconductor layer is provided. An electrode is in contact with such another semiconductor layer, and this electrode is connected to the electrode of the IGBT.

According to the invention, the IGB from the other semiconductor layers
Since the carrier is discharged to the T electrode, malfunction of the circuit can be prevented.

On the other hand, the conductivity type is p-type or n-type. The electrode of the IGBT is, for example, an emitter electrode.
The carriers are holes or electrons.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment 1) FIG. 1 shows a sectional structure of a first embodiment according to the present invention, and FIG. 2 shows an equivalent circuit. In the present embodiment, a circuit built-in IGB including a source follower circuit is built.
It is an example of T.

11 and 13 in FIGS. 1 and 2.
The same components as those in FIG. In FIGS. 1 and 2, 113 is a ground electrode and 130 is a ground layer. In the following description, the symbols p ⁻ , p, p ⁺
Indicates that the conductivity type of the semiconductor layer is p-type (one-side conductivity type), and that the impurity concentration is relatively high in this order of description. Further, the symbols n ⁻ , n, and n ⁺ indicate that the conductivity type of the semiconductor layer is n.
Type (the other conductivity type), and the impurity concentration is relatively high in this order of description.

As shown in FIG. 1, one semiconductor substrate has an I
The GBT area 150 and the circuit area 151 are provided adjacent to each other. The IGBT region 150 includes a p ⁺ -type collector layer 101 (first layer) adjacent to one main surface of the semiconductor substrate,
N ⁺ type buffer layer 102 adjacent to the collector layer 101
(The first portion of the second layer) and the n ⁻ type drift layer 1 adjacent to the buffer layer 102 and the other main surface of the semiconductor substrate.
03 (second portion of second layer) and a plurality of p-type channel layers 104 (third layer) selectively formed in the drift layer 103 adjacent to the other main surface of the semiconductor substrate. And an n ⁺ -type emitter layer 105 (fourth layer) selectively formed in the channel layer 104 adjacent to the other main surface of the semiconductor substrate.
And a p-type hole discharging layer 106 that is in contact with the channel layer 104 adjacent to the other main surface of the semiconductor substrate and adjacent to the circuit region 151 and has a junction depth deeper than the channel layer 104. Have. Further, IGBT region 150 includes channel layer 104 between drift layer 103 and emitter layer 105 on the other main surface of the semiconductor substrate.
The exposed portion of the surface of the gate oxide film 112, which is an insulating film.
A gate electrode 111 (first electrode) formed through
An emitter electrode 110 (second electrode) formed in contact with the channel layer 104 and the emitter layer 105, and a collector electrode 117 (third electrode) formed in contact with the collector layer 101 on one main surface of the semiconductor substrate. And
The circuit region 151 includes a collector layer 101 extending from the IGBT region, a buffer layer 102, a drift layer 103, and a collector electrode 117. Furthermore, the circuit area 151
Is the drift layer 1 adjacent to the other main surface of the semiconductor substrate.
03, a p-type base layer 132 (fifth layer) selectively formed, and an n ⁺ -type source selectively formed in the base layer 132 adjacent to the other main surface of the semiconductor substrate. Layer 1
31 (seventh layer) and drain layer 133 (eighth layer)
And the source layer 131 on the other main surface of the semiconductor substrate.
Gate electrode 1 formed on the exposed portion of the surface of the base layer 132 between the drain layer 133 and the drain layer 133 via a gate oxide film 1
15 (fifth electrode), the source electrode 114 (sixth electrode) formed in contact with the source layer 131, and the drain electrode 116 (seventh electrode) formed in contact with the drain layer 133.
Electrode). Base layer 132, source layer 13
1, the drain layer 133, the gate electrode 115, the source electrode 114, and the drain electrode 116 form a lateral MOSFET. The lateral MOSFET is formed in the circuit region 151 and has an IG
It is one circuit element in a circuit such as a BT protection circuit. A resistor 140, that is, a source follower resistor is connected as another circuit element between the source electrode 114 of the lateral MOSFET and the emitter electrode of the IGBT. That is, the source follower circuit is configured. Furthermore, the circuit area 15
1 is a base layer 1 adjacent to the other main surface of the semiconductor substrate.
P ^{+ with a} higher impurity concentration than that of the base layer 132.
Type ground layer 130 (sixth layer) and a ground electrode 113 (fourth layer) formed in ohmic contact with the ground layer 130.
Electrode). The ground electrode 113 is electrically connected to the emitter electrode 110 by electrode wiring. Note that circuit elements other than the lateral MOSFET may be formed in the base layer 132.

The feature of this embodiment is that a lateral MOSFET is provided with a ground layer 130, and this ground layer is connected to the IG via a ground electrode.
This is the point connected to the emitter electrode 110 of the BT. By providing the ground layer 130, the hole current flowing from the collector layer 117 to the base layer 132 can be discharged from the ground layer 130 to the emitter electrode 110 without passing through the source follower circuit, that is, without passing through the source layer 131. Therefore, the current flowing through the source follower circuit and the hole current can be separated. As a result, the source follower resistor 140
The fluctuation of the voltage generated at the time is suppressed, and the malfunction can be prevented.

Another feature of this embodiment is the lateral MOSFET.
The unit cell structure of is arranged symmetrically and the earth layer 13 is periodically arranged.
It is at the point where 0 is placed. As shown in FIG. 1, the structure in which the ground layer 130 is periodically arranged causes the hole current leaking into the circuit region to be discharged to the ground layer 130 and the source layer 131.
It is possible to prevent the hole current from flowing into. Further, since the ground layers 130 are periodically arranged, the potential of the base layer can be fixed to the ground potential, and the substrate bias effect and the like due to the fluctuation of the potential of the base layer can be prevented to improve the accuracy of the circuit.

The configuration of the present embodiment is based on the lateral MOSF as described above.
It can be applied to circuits other than the source follower circuit using ET and a resistor. That is, the structure of the present embodiment is based on the base layer 132.
A circuit element is formed inside the circuit element and the emitter electrode 11
This is effective when 0 is connected through another circuit element such as a resistor. In this case, the ground layer 130 is provided adjacent to the circuit element in the base layer 132, and the ground layer 130 and the emitter electrode 110 are electrically connected. As a result, similar to the embodiment of FIG. 1, it is possible to prevent malfunction due to the hole current flowing into the circuit area.

FIG. 3 shows a plane layout of the first embodiment. AB in the figure corresponds to the AB cross section in FIG. In this embodiment, in order to realize a structure having a ground electrode,
As shown in FIG. 3, the electrodes of the lateral MOSFET are arranged so as to be folded back at the end portion. The drain electrode 116 and the ground electrode 113 are substantially comb-shaped like the conventional one. Between the comb-shaped patterns of the drain electrode 116 and the ground electrode 113 which are formed so as to mesh with each other, the gate electrode 115 and the source electrode 114 are formed along these comb-shaped patterns. Since the gate electrode 115 and the source electrode 114 are folded back at the ends of the teeth of the comb-shaped pattern of the drain electrode 116 and the ground electrode 113, they meander on the surface of the semiconductor substrate. For comparison, FIG. 4 shows a planar layout of a conventional MOSFET. In FIG. 4, the gate electrode is shown by a dotted line because it is arranged in a layer below the drain electrode 116 and the source electrode 114 with an insulating film interposed therebetween. In the conventional MOSFET, the electrodes have a comb-like shape shown in FIG. Therefore, in order to realize the configuration in which the ground electrodes are periodically arranged, the wirings cross each other. Since these wirings are formed of a metal film, a multi-layered structure is required to cross them. Actually conventional MO
In SFET, the gate electrode is multi-layered. The multi-layer structure causes problems such as an increase in cost due to an increase in manufacturing steps and enlargement of irregularities on the element surface.

As can be seen from the electrode pattern of FIG. 3, in this embodiment, the plane pattern of the ground layer 130 is
Adjacent to the plane pattern of the source layer 131 and the source layer
It extends along the plane pattern of 131. Therefore, the hole current hardly flows into the source layer. Moreover, since the plane pattern of the ground layer 130 extends along the entire plane pattern of the source layer 131, the effect of preventing the flow of the hole current into the source layer 131 is great. Moreover,
Since the ground electrode 113 contacts the ground layer along the plane pattern of the ground layer 130, the hole current is sufficiently discharged to the emitter electrode.

According to this embodiment, as shown in FIG.
By making the electrode of the fold-back structure at the terminal end, the ground electrode, the gate electrode, the source electrode, and the drain electrode
Electrodes can be laid out without using multi-layer wiring or crossing wiring. Further, in this embodiment, the folded portion of the electrode has a rounded shape as shown in FIG. 3, so that the breakdown voltage of the base layer-drift layer junction can be prevented from lowering.

(Embodiment 2) FIG. 5 shows a second embodiment according to the present invention. 5, the same components as those in FIGS. 1 to 4 are designated by the same reference numerals. In this figure, 50
0 is a barrier layer.

The feature of this embodiment is that a blocking region is provided between the IGBT and the MOSFET, and the width L of the blocking region is set to the drift layer 1.
This is the point that the thickness of the sample No. 03 is not less than d. The distance L is the distance between the end of the IGBT channel closest to the circuit region, that is, the end of the gate electrode 111, and the end of the lateral MOSFET source layer 131 closest to the IGBT region on the IGBT region side.

The hole current injected from the collector layer 101 proceeds in the drift layer 103 by the drift electric field. At this time, due to the scattering of crystals of the drift layer 103, the electric field in the lateral direction inside the drift layer 103, etc., the traveling direction of the holes is scattered up to 45 degrees from the traveling direction.
Therefore, in this embodiment, in consideration of this scattering, the IGBT is
The distance L of the MOSFET is set to at least the thickness d of the drift layer. According to this, since the blocking region is wider than the lateral scattering distance of the hole current, it is possible to prevent the hole current from reaching the MOSFET. At this time, the collector layer 10
The holes injected from No. 1 are discharged from the ground layer 130 to the emitter electrode 110 as in the previous embodiment.

It should be noted that the wider the distance L of the cutoff region is, the more effective the suppression of the inflow of the hole current is, but there is a problem that the breakdown voltage is lowered. Therefore, L must be set within the range where the breakdown voltage does not decrease. Alternatively, a structure in which the blocking layer 500 is formed as shown in FIG. 5 to prevent a decrease in breakdown voltage is also preferable.

(Embodiment 3) FIG. 6 shows a third embodiment of the present invention.

In the structure shown in FIG. 5, the distance between the interrupting regions is set to be equal to or larger than the drift layer, but this causes a problem that the area of the circuit region increases and the chip size increases. Therefore, in the present embodiment of FIG. 6, a circuit element such as a resistor or a diode is arranged in this region to effectively utilize the space of the circuit region and suppress the increase of the chip area. At this time,
The element arranged in the blocking region must be an element that is not affected by the hole current. For example, a resistor or a diode formed on the oxide film is preferable. In this embodiment, on the oxide film 801, a resistance element including a resistor 120 made of a polycrystalline semiconductor and electrode terminals 121 contacting both ends of the resistor 120 is provided. Further, in the drift layer in the blocking region below the oxide film 801,
The hole discharging layer 106 of the same conductivity type as the ground layer and the blocking layer 600 are provided. By providing the blocking layer, it is possible to further suppress the inflow of the hole current from the IGBT and prevent the breakdown voltage from decreasing. Furthermore, the blocking layer 60 is formed not only in the blocking region but also in the region between the MOSFET and other elements in the circuit region.
It is also preferable to form 0. Since the blocking layer is connected to the ground potential, the potential of the circuit region is stabilized and it is effective in improving the reliability of circuit operation.

FIG. 7 shows a plane layout of the third embodiment. In FIG. 7, the same components as those in FIGS. 1 to 6 are given the same numbers. In FIG. 7, reference numeral 700 denotes a gate pad which is electrically connected to the gate electrode 111 and serves as a connection point for connecting an external circuit to the gate electrode 111, 701 denotes a MOSFET formation region, 702 denotes a cutoff region, and 703.
Is an emitter pad that is electrically connected to the emitter electrode 110 and is a connection point for connecting an external circuit to the emitter electrode 110, 704 is an IGBT region, and 705 is a termination region.

In the present embodiment, the MOSFET formation region is arranged at the center of the circuit region in order to suppress the inflow of holes from the IGBT region, and the periphery is surrounded by the cutoff region. As described above, resistors, diodes, and the like are arranged in the cutoff region via an insulating film in order to effectively use the space. Although not shown, the blocking layer 600 is arranged in a region of the circuit region where the MOSFET is not formed,
We are trying to stabilize the potential of the circuit. In this embodiment, the circuit region is arranged beside the gate pad in order to minimize the delay of the circuit operation with respect to the control signal of the IGBT input to the gate. (Embodiment 4) FIG. 8 shows a sectional structure of a fourth embodiment according to the present invention.

The feature of this embodiment is that the emitter pad 703 and the ground electrode 113 or the ground layer 130 are connected by the wiring electrode 800 on the surface of the semiconductor substrate. The emitter electrode of the IGBT has a resistance component Re as shown in FIG.

In the equivalent circuit of FIG. 2, the resistance component Re is indicated by the resistance 900. Since the reference potential of the circuit is taken from the emitter electrode of the IGBT, a current flows through the IGBT and the voltage generated in the resistor Re900 of the emitter electrode causes the reference potential of the circuit to fluctuate, causing malfunction of the circuit. According to the present embodiment, the ground layer 130 serving as the reference potential of the circuit is connected to the emitter pad 703 by the wiring electrode 800 independent of the emitter electrode 110 of the IGBT, so that the variation of the ground potential due to the resistance Re is prevented. can do.

FIG. 9 shows an equivalent circuit. Since the ground layer of the circuit is directly connected to the emitter pad 703, the hole current can be discharged without passing through the resistor Re and the malfunction of the circuit can be prevented.

FIG. 10 shows a modification of the fourth embodiment. Figure 10
1 to 9, the same components as those in FIGS. 1 to 9 are denoted by the same reference numerals. In FIG. 10, 1000 is a ground pad.

The feature of this embodiment is that a ground pad is provided,
It is at the point where the ground layer is connected to the ground pad. Example 4
With this configuration, it is not possible to prevent the fluctuation of the ground potential due to the resistance of the wire wiring that connects the external circuit of the chip and the emitter pad. Therefore, a wire wiring dedicated to grounding is provided on the grounding pad and is directly connected to the ground potential point of the external circuit, whereby the circuit operation can be stabilized.

(Embodiment 5) FIG. 14 shows a sectional structure of a fifth embodiment of the present invention. 14, the same components as those in FIGS. 1 to 13 are designated by the same reference numerals. In this embodiment, the base layer 132 in the circuit area in the previous embodiment is used.
A diode is formed as a circuit element in the semiconductor layer corresponding to. In the p-type diode base layer 1003, adjacent to the other main surface of the semiconductor substrate, an n ⁺ -type cathode layer 1 having a higher impurity concentration than the diode base layer 1003 is provided.
002, and the p ⁺ type anode layer 1004 having a higher impurity concentration than the diode base layer 1003 is provided. The cathode electrode 1000 is in ohmic contact with the cathode layer 1002, and the anode electrode 100 is in contact with the anode layer 1004.
1 makes ohmic contact. These, cathode layer 100
2, diode base layer 1003, anode layer 100
4, cathode electrode 1000, and anode electrode 1001
A diode is constituted by Cathode electrode 10
00 and the emitter electrode 110 of the IGBT are
Electrically connected via. Further, in diode base layer 1003, ap ⁺ type ground layer 130 having a higher impurity concentration than diode base layer 1003 is formed adjacent to the other main surface of the semiconductor substrate. Ground layer 13
0 is provided adjacent to the cathode layer 1002. The earth electrode 113 is in ohmic contact with the earth layer 130. The ground electrode 113 and the emitter electrode 110 are electrically connected by wiring.

According to this embodiment, the hole current injected from the collector layer 101 is discharged from the ground layer 130 to the emitter electrode 110. Therefore, since the hole current does not flow into the cathode layer 1002 of the diode, malfunction of the circuit can be prevented.

(Embodiment 6) FIG. 15 shows a planar structure of a sixth embodiment according to the present invention. This figure shows a planar pattern of a lateral MOSFET formed in the circuit area of the circuit built-in IGBT. However, although the electrodes are omitted, an example of the electrode pattern is shown in FIG. In FIG. 15, an elongated striped drain layer 133 is arranged in the center of the ring-shaped source layer 131. The source layer 131 is surrounded by the ground layer 130. Therefore, the holes that try to flow into the source layer can be effectively discharged from the ground layer. Moreover, in this embodiment, since the entire periphery of the source layer 131 is surrounded by the ground layer 131, malfunction does not occur.

(Embodiment 7) FIG. 16 shows a seventh embodiment of the present invention.
FIG. 3 is an equivalent circuit diagram of a power conversion device that is an embodiment of This embodiment shows a three-phase inverter device.

In FIG. 16, 1400 and 1401 are DC input terminals connected to a DC power source, and 1405 is a circuit built-in IG according to the present invention in which two DC input terminals are connected in series between the DC input terminals.
BTs 1402 to 1404 are two circuit built-in IGBTs
AC output terminal connected to each of the series connection points of
Reference numeral 6 is a free wheeling diode connected in antiparallel to each of the circuit built-in IGBTs. The circuit built-in IGBT 1405 can use the circuit built-in IGBT according to any one of the above-described embodiments. The circuit built-in IGBT 1405 is driven to perform on / off switching, and by this on / off switching, the DC power input from the DC input terminals 1400 and 1401 is converted into AC power. This AC power is supplied to the AC output terminal 140.
It drives an AC load such as a three-phase induction motor which is output from 2 to 1404 and connected to these AC output terminals.

In this embodiment, a protection circuit for protecting the IGBT from overcurrent is formed in the circuit area of the circuit built-in IGBT 1405. According to this embodiment, since the hole current flowing into the circuit area is discharged from the ground layer during the overcurrent protection operation, the effect of the hole current on the circuit element in the circuit area can be suppressed. For this reason, the circuit built-in IGBT is less likely to malfunction, and high-precision overcurrent protection operation becomes possible. Therefore, it is possible to realize an inverter device having a highly reliable overcurrent protection function.

The circuit built-in IGBT according to the present invention is
Not limited to the inverter device, the present invention can be applied to various power conversion devices such as a converter device, a chopper device, and various switching power supplies that switch input power by switching IGBTs and output the converted power.

As described above, the present invention can be applied to an n-channel IGBT.
Although the case where the emitter follower circuit of the channel type MOSFET is integrated has been described, in addition to this, the p channel type IG
The same effect can be obtained with a combination of BT and MOSFET. That is, the present invention, in the above embodiment,
Even when the conductivity type of each semiconductor layer is reversed, the same effect can be obtained.

Further, the circuit configuration is not limited to the emitter follower circuit, and the same effect can be obtained if the circuit is an integrated MOSFET.

Further, the present invention is not limited to the IGBT, and similar effects can be obtained when the circuit is integrated in a bipolar element such as a MOS control type thyristor.

[0044]

As described above, according to the present invention, the IGBT
It is possible to prevent the malfunction of the circuit integrated in.

[Brief description of drawings]

FIG. 1 is a sectional view of a first embodiment according to the present invention.

FIG. 2 is an equivalent circuit diagram of the first embodiment according to the present invention.

FIG. 3 is a plan view of a second embodiment according to the present invention.

FIG. 4 is a plan view of a conventional MOSFET.

FIG. 5 is a sectional view of a third embodiment according to the present invention.

FIG. 6 is a sectional view of a modification of the third embodiment according to the present invention.

FIG. 7 is a plan view of a modification of the third embodiment according to the present invention.

FIG. 8 is a plan view of a fourth embodiment according to the present invention.

FIG. 9 is a plan view of the fourth embodiment according to the present invention.

FIG. 10 is a plan view of a modification of the fourth embodiment according to the present invention.

FIG. 11 is a conventional cross-sectional view.

FIG. 12 is a conventional equivalent circuit diagram.

FIG. 13 is a conventional sectional structural view.

FIG. 14 is a sectional view of a fifth embodiment according to the present invention.

FIG. 15 is a plan view of a sixth embodiment according to the present invention.

FIG. 16 is an equivalent circuit diagram of a power conversion device according to a seventh embodiment of the present invention.

[Explanation of symbols]

101 ... Collector layer, 102 ... Buffer layer, 103 ... Drift layer, 104 ... Channel layer, 105 ... Emitter layer,
106 ... hole discharge layer, 110 ... emitter electrode, 11
1, 115 ... Gate electrode, 113 ... Ground electrode, 114
... Source electrode, 116 ... Drain electrode, 117 ... Collector electrode, 130 ... Ground layer, 131 ... Source layer, 132
... Base layer, 133 ... Drain layer.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ identification code FI H01L 27/088 H01L 27/08 102E (56) References JP-A-7-321321 (JP, A) JP-A-7-263641 ( JP, A) JP 5-267672 (JP, A) JP 6-104675 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29/78 H01L 21/8234 H01L 27/088 H01L 27/04

Claims (9)

(57) [Claims] 1. A semiconductor substrate having an IGBT region and a circuit region adjacent to each other, wherein the IGBT region is adjacent to the first layer and has a first conductivity type first layer extending to the circuit region. A second layer of the other conductivity type extending to the circuit region, a third layer of the one conductivity type formed in the second layer, and a fourth layer of the other conductivity type formed in the third layer. Layer, a first electrode formed on the surface of the third layer between the second layer and the fourth layer via an insulating film, the third layer and the fourth layer. A second electrode in contact with the first layer, and a third electrode in contact with the first layer, wherein the circuit region is formed in a portion of the second layer extending from the IGBT region. And a circuit element formed in the fifth layer, adjacent to the circuit element. A sixth layer having a conductivity type higher than that of the fifth layer and having one conductivity type; and a fourth electrode in contact with the sixth layer, the circuit element and the second electrode Is electrically connected via another circuit element, and the second electrode and the fourth electrode are electrically connected to each other.
GBT. 2. The source follower circuit according to claim 1, wherein the circuit element formed in the fifth layer is a MOSFET, the other circuit element is a resistor, and the MOSFET and the resistor form a source follower circuit. IGB with built-in circuit characterized by
T. 3. The circuit element according to claim 1, wherein the circuit element formed in the fifth layer includes a seventh layer and an eighth layer of the other conductivity type formed in the fifth layer. A fifth electrode formed on the surface of the fifth layer between the seventh layer and the eighth layer via an insulating film, and a sixth electrode in contact with the seventh layer And a seventh electrode in contact with the eighth layer, the other circuit element is a resistor, and the second electrode and the sixth electrode are electrically connected via the resistor. A circuit built-in IGBT, wherein the sixth layer is adjacent to the seventh layer. 4. The plane pattern of the sixth layer is adjacent to the plane pattern of the seventh layer and extends along the plane pattern of the seventh layer. IGBT with built-in circuit. 5. The IGBT with a built-in circuit according to claim 4, wherein the fourth electrode is in contact with the sixth layer along a plane pattern of the sixth layer. 6. The third layer according to claim 3, wherein the second layer is adjacent to the first layer, is adjacent to the first section, and has a lower impurity concentration than the first section. And a second portion of the first electrode between the end portion of the first electrode closest to the circuit region and the end portion of the seventh layer closest to the IGBT region on the IGBT region side. A circuit built-in IGBT, wherein the distance is equal to or greater than the thickness of the second portion of the second layer.
T. 7. The IGBT with a built-in circuit according to claim 1, wherein another circuit element is further formed on the surface of the semiconductor substrate between the IGBT region and the circuit region via an insulating film. 8. The connection portion for connecting the second electrode to an external circuit and the fourth electrode are connected by a wiring electrode on the surface of the semiconductor substrate. IGBT with built-in circuit. 9. An input terminal, an IGBT that is ON / OFF switching driven, and performs an electric power conversion on the electric power input to the input terminal by the ON / OFF switching, and an output terminal that outputs the electric power subjected to the electric power conversion. And the IGBT is the circuit-embedded IGBT according to claim 1.