JP3407892B2 - Input signal identification device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver having a television tuner and a video signal input jack.
The present invention relates to an input signal identification device provided in a video device such as a video tape recorder for identifying a video signal supplied to an input line of a video processing circuit from a television tuner signal and an input jack signal. 2. Description of the Related Art Conventionally, a video tape recorder (hereinafter, referred to as VTR), which is an example of this kind of video equipment, is configured as shown in FIG. 1) Based on the channel selection control of 1, the TV tuner 2 receives the selected channel and converts the received signal of this channel to a video intermediate frequency amplifier (hereinafter referred to as V
(Referred to as an IF circuit) 3. A video signal of the received signal is reproduced by the intermediate frequency amplification and detection of the VIF circuit 3, and this signal is supplied as a received video signal of the tuner 2 to the base of a transistor Q1 having an emitter follower structure. A video signal biased to a predetermined DC level is supplied to the break contact terminal 6 of the input jack 5 from the emitter of the output line 4 through the 75Ω coupling resistor R1 of the output line 4. R2 is the emitter resistance of the transistor Q1. [0004] The input jack 5 is a one-circuit, one-contact jack having a three-wire disconnection jack structure, and has a ground terminal 7 and a movable terminal 8 together with a contact terminal 6. Connected to line 10. Further, the input line 10 has a matching resistor R of 75Ω.
3, and a decoupling capacitor C1 is provided immediately before the video processing circuit 9. When the plug of the input jack 5 is not inserted, the received video signal of the output line 4 is supplied to the input jack 5,
After being supplied to the processing circuit 9 through the input line 10 and processed by the processing circuit 9, the driver amplifier 11, 75Ω
Resistor R4 for coupling, capacitor C for decoupling
For example, the television program is supplied to an external television receiver 12 connected via a cable via the cable 2, and the television program of the reception channel is displayed on the television receiver 12. At this time, the channel selection microcomputer 1 executes channel display control together with channel selection control, and based on this display control, the channel selection microcomputer 1 sends a display of a reception channel to a display 13 having an FL tube configuration for displaying a two-digit number. The display signal is supplied, and the display 13 displays the current reception channel. In addition,
R5 is a terminating resistor of 75Ω of the receiver 12, 14 is a normal power supply terminal of the VTR supplied to the channel selection microcomputer 1, and 15 is a main power supply terminal of the VTR which turns on and off in conjunction with turning on and off of the power switch. . Next, a plug for video output of another video equipment is inserted into the input jack 5, and when the plug of the input jack 5 is inserted, the movable terminal 8 separates from the contact terminal 6 and the line 4 and the line 5 are connected. Be released. Then, the external video signal of the plug is supplied to the processing circuit 9 via the input line 10, and the screen of the external video signal is displayed on the receiver 12. At this time, the DC component of the external video signal is cut by the decoupling capacitor similarly to the signal supplied to the receiver 12, and the average video level (APL) excluding the synchronization signal portion becomes 0V. . By the way, even when the plug is inserted, the channel selection microcomputer 1 executes the channel display control, and the display 13 displays the current reception channel. [0009] Therefore, in the case of the VTR of FIG. 10, there is a possibility that the display screen of the external video signal of the receiver 12 when the plug is inserted is erroneously displayed as the television program of the reception channel of the display 13. The channel change of the tuner 2 is also effective when the plug is inserted. If the channel is selected when the plug is inserted, the channel of the display 13 changes according to the selection, but the display screen of the receiver 12 does not change and the channel is not changed. It is natural and can be mistaken for a failure. On the other hand, in Japanese Patent Application Laid-Open No. 63-31697 (H04N 5/445), a 5-wire jack (AV input terminal section) having two contacts and two contacts is provided in place of the input jack 5, and one jack of this jack is provided. To switch the video signal in the same manner as the input jack 5, and supply DC power to the base of the switching transistor for plug insertion detection through the remaining one circuit, thereby switching the transistor based on whether the plug is inserted or not. This document describes that the presence or absence of plug insertion is detected, and based on the result of this detection, when the plug is inserted, the channel selection operation is stopped and the display of the reception channel is turned off. When the input jack 5 in FIG. 10 is changed to a two-circuit, two-contact jack described in the above publication, the presence or absence of plug insertion is automatically detected also in FIG. On the basis of this result, for example, the channel display of the display unit 13 at the time of plug insertion when an external video signal is supplied to the input line 10 is erased can be eliminated,
In this case, the input jack 5 must be changed to a large, expensive jack with two circuits and two contacts, and the VTR and the like are large and expensive.
There is a problem that becomes expensive. If the input jack 5 cannot be changed to a two-circuit, two-contact jack due to restrictions on the jack space, the video signal supplied to the input line 10 is switched based on whether or not a plug is inserted. There is a problem that it cannot be detected and the inconvenience cannot be resolved. According to the present invention, a received video signal of a video signal supplied to an input line of a video processing circuit as an input jack of an external video signal as an input jack 5 of one contact per circuit,
An object is to enable identification of an external video signal. [0014] In order to achieve the above object, an input signal identification device according to the present invention uses a microcomputer H ( A clamp circuit that clamps to a level higher than the threshold level of (High) to raise the overall level of the received video signal, one end of which is connected to ground, and the other end of which connects the output line of the clamp circuit when the plug is not inserted. One circuit 1 having a three-wire disconnection jack structure which is connected to an input line of a video processing circuit, opens the two lines when a plug is inserted, and supplies an external video signal of the plug to the input line
An input jack of a contact, a level identification circuit that compares a signal level of the input line with a threshold level of H of the microcomputer to identify when the received video signal is supplied and when the external video signal is supplied, And a display circuit for displaying a signal indicating an external input or displaying a reception channel on a display based on the identification result of the level detection circuit. In the input signal identification device of the present invention configured as described above, the minimum sync tip level of the received video signal is reduced in terms of DC by the clamp of the clamp circuit. Because it is raised, the overall level is raised. For this reason, the signal level of the input line is higher when the plug to which the received video signal is supplied is not inserted than when the plug to which the external video signal is supplied is inserted. And
The maximum signal level of the input line can be
The minimum value is compared with the H / L threshold level of the channel selection microcomputer, and the time when the received video signal is supplied and the time when the external video signal is supplied are identified without detecting the DC level. An embodiment will be described with reference to FIGS. 1 to 9. First Embodiment A first embodiment will be described with reference to FIGS. 1, the same reference numerals as those in FIG. 10 denote the same or corresponding elements, and 16 denotes a transistor Q1 and a resistor R2.
Is a buffer amplifier, 17 is an integrating circuit having a CR time constant circuit configuration formed by a resistor R6 and a capacitor C3, 18
Is a transistor Q2 having a common emitter and resistors R7 and R7.
8, a level identification circuit formed by R9. The received video signal of the tuner 2 output from the VIF circuit 3 is DC-amplified by the transistor Q1 and output from the emitter. At this time, the incoming video signal supplied to the input jack 5 via the output line 4 from the emitter of transistor Q1, 1/2 bias correction emitter voltage V _E of the transistor Q1 its DC level is based on the setting of the resistor R2 As a result, the APL becomes V _E / 2 as shown in FIG. On the other hand, the DC component of the external video signal supplied from the plug to the input jack 5 is cut, and the DC level becomes 0 V corresponding to the ground level.
APL becomes 0V as shown in FIG. When the plug is not inserted, the received video signal on the output line 4 is
Is supplied to the processing circuit 9 via the
The received video signal is integrated and average detected by the integration circuit 17, the DC level (= V _E / 2) of the received video signal is detected, and the capacitor C3 is connected to V _E / 2.
Is charged. Further, the charging voltage of the capacitor C3 is divided by the resistors R8 and R9 and applied to the base of the transistor Q2 as a detection level signal. At this time, the detection level becomes higher than the on level between the base and the emitter of the transistor Q2 as the threshold level, the transistor Q2 turns on and its collector level becomes low level (hereinafter referred to as L), and the L identification signal Is output from the level identification circuit 18. Next, when the plug is inserted, the signal supplied to the processing circuit 9 and the integration circuit 17 becomes an external video signal, and the charged voltage of the capacitor C3 becomes 0 V by the average detection of this video signal. At this time, the detection level of the base of the transistor Q2 becomes lower than the threshold level, the transistor Q2 is turned off, the collector level of the transistor Q2 becomes high (hereinafter referred to as H), and the identification signal of H is sent to the identification circuit 18
Output from That is, the detection level of the integration circuit 17 changes between high and low in response to the received video signal and the external video signal supplied to the input line 10. Based on the comparison between the detection level and the threshold level, the level is identified. The circuit 18 outputs an identification signal that changes to L and H. Therefore, 1
With the configuration using the input jack 5 at the contact of the circuit 1, the received video signal supplied to the input line 10 of the processing circuit 9,
An external video signal can be identified. Then, the identification signal of the level identification circuit 18 is supplied to the channel selection microcomputer 1, and this microcomputer 1 executes the channel display control of FIG. 3 using the identification signal instead of the conventional channel display control. Therefore, when the plug whose identification signal is L is not inserted, the display 1
3 shows the number "12" of the reception channel shown in FIG. 4, and when the identification signal is H, when the plug is inserted, the display of the reception channel is prohibited, and the display 13 shows the symbol "External input" shown in FIG. AV ”is displayed. Therefore, the conventional inconvenience based on the display on the display unit 13 is eliminated, and the display performance of the VTR is improved. It should be noted that a light-emitting diode for notifying an external input that lights up when the plug is inserted is provided separately from the display 13, and the channel selection microcomputer 1
Thus, the external input notification control of FIG. 6 may be executed together with the conventional channel display control. (Second Embodiment) Next, a second embodiment will be described with reference to FIG. 7, the same reference numerals as those in FIG. 1 denote the same or corresponding elements, and the difference from FIG.
6 and a drive power source for the integration circuit 17 and the level discrimination circuit 18 are used as a normal power supply drive power source for the normal power supply terminal 14, and the base of the transistor Q1 is connected to the VIF circuit 3 via a decoupling capacitor C4 and bias resistors R10 and R11. Is the point where When the power supply of the VTR is turned on in the configuration shown in FIG. 1, the transistor Q is turned on after the power supply switch is turned on and the main power supply terminal 15 is supplied with drive power for main power supply.
1 and Q2 are biased. Further, based on this bias, the DC level of the input line 10 rises to V _E / 2 after the power is turned on, and the detection level of the integration circuit 17 gradually increases according to the characteristic based on the time constant. The transistor Q2 is turned on with a delay, and the identification signal is inverted from H to L when the power is turned on and becomes normal. On the other hand, the channel selection microcomputer 1 is always driven by the drive power supply of the normal power supply terminal 14 irrespective of whether the power supply of the VTR is turned on or not, and executes channel selection control and channel display control. Since the time constant of the integrating circuit 17 is set relatively large so as to ensure the stability of the detection level, etc., in the case of the first embodiment shown in FIG. Even if the tuner 2 or the like is driven by the driving power supply of the power supply terminal 15 and the received video signal is output from the VIF circuit 3 and starts to be supplied to the processing circuit 9, the identification signal becomes H for a short time during the closing transition, and is indicated by H. The symbol “AV” is erroneously displayed on the display 13. Therefore, in FIG. 7, the drive power supply for the buffer amplifier 16, the integration circuit 17, and the level identification circuit 18 is changed to the drive power supply for the normal power supply terminal 14, and the buffer amplifier 16, the integration circuit 17, and the level identification circuit 18 are changed. Is always powered. Further, the base voltage of the transistor Q1 before the power supply of the VTR is secured by the voltage division of the resistors R10 and R11. Therefore, in the case of the configuration shown in FIG. 7, the DC level of the signal on the output line 4 is maintained at V _E / 2 even before the power supply of the VTR is turned on. 4 is supplied to the input line 10 via the input plug 5, the capacitor C3 is charged and held at V _E / 2, the transistor Q2 is turned on, and the identification signal is held at L. Therefore, in the case of this embodiment, when the power of the VTR is turned on, the number of the receiving channel is displayed on the display 13 without delay of the turning on by the channel display control of the tuning microcomputer 1 based on the identification signal. The display performance is further improved. (Embodiment 3) Next, a third embodiment will be described with reference to FIG. 8, the same reference numerals as those in FIG. 7 denote the same or corresponding elements, and the difference from FIG. 7 is that the VIF circuit 3 is also supplied with a drive power for normal power supply of the normal power supply terminal 14, The point is that the base of the transistor Q1 is directly connected. That is, in the case of the configuration of FIG. 8, the capacitor C4 and the resistors R10 and R10 of FIG.
Before powering on the VTR, the DC level of the signal on the output line 4 is held at V _E / 2 based on the output signal of the VIF circuit 3 which is normally driven.
Further, the integration circuit 17 and the level identification circuit 18 are connected to the terminal 1
4 operates in the same manner as in FIG. Therefore, in this embodiment, the same effects as in the second embodiment can be obtained. (Fourth Embodiment) Next, a fourth embodiment corresponding to the present invention will be described with reference to FIG.
This will be described with reference to FIG. 9, the same reference numerals as those in FIG. 1 denote the same or corresponding elements, and the points different from FIG. A transistor Q3 and a resistor R1 are connected between the VIF circuit 3 and the contact terminal 6 of the input jack 5.
2, a clamp circuit formed by a sink tip clamp unit 20 of R13, R14, and a capacitor C5, and an output buffer unit 21 of a transistor Q4, a resistor R15, a transistor Q5 corresponding to the transistors Q1, R1 and R2, and resistors R16 and R17. 22 and an output line 23 thereof. An identification input terminal i of a channel selection microcomputer 19 is connected to a connection point A between the movable terminal 8 of the input jack 5 and the output line 10 via a coupling resistor 18. 1. Buffer amplifier 16 and integrating circuit 17 of FIG.
8 is omitted. D1 and D2 are input protection diodes provided between the normal power supply terminal 14 and the identification input terminal i and between the terminal i and the ground. The voltage of the drive power supply of the normal power supply terminal 14 is set to the VDD voltage of the tuning microcomputer 19, for example, 5V, and the voltage of the drive power supply of the main power supply terminal 15 is set to, for example, 12V. The received video signal (baseband signal) of the tuner 2 output from the VIF circuit 3 based on the channel selection control of the channel selection microcomputer 19 is subjected to sync tip clamp by the transistor Q3 and the capacitor C5, and the minimum signal Level sync tip level is potential Vs (> 0)
Is clamped to. With this clamp, the whole level of the received video signal is raised from the original peak-to-peak 1V level, and is supplied to the input jack 5 via the transistors Q3 and Q5 and the output line 23 in this state. When the plug is not inserted, the output line 23
Is supplied to the processing circuit 9 via the input jack 5 and the input line 10, and at the same time, to the identification input terminal i via the resistor R18. At this time, since the voltage at the point A of the input line 10 is divided by the resistors R7 and R16, the resistors R7 and R16
Assuming that the resistance values of R.16 and R.16 are Rb and Ra, B immediately before the identification input terminal i based on the sync tip level of the received video signal
The voltage at the point is (Vs × Rb) / (Ra + Rb),
Further, since Ra = Rb = 75Ω, Vs / 2 is obtained. Further, since the input impedance of the identification input terminal i is extremely large, the voltage at the point B is directly taken into the tuning microcomputer 19 from the identification input terminal i. Then, the level of the identification input terminal i is constantly compared with the preset two threshold levels of H and L by the level identification circuit of the channel selection microcomputer 19. At this time, Vs / 2 is, for example, 0.7 VDD.
(= 3.5V) is clamped so as to be higher than the H threshold level, so that the level of the identification input terminal i when the plug is not inserted is always higher than the H threshold level. Identifies the supply of the received video signal to the processing circuit 9. Next, when the plug is inserted, an external video signal is supplied from the input jack 5 through the input line 10 to the processing circuit 9.
, And at the same time, to the identification input terminal i via the resistor R18. At this time, the external video signal is a peak-to-peak 1 V signal at which the APL becomes 0 V, and the signal level at point B based on the maximum white peak level also becomes 1 V or less. The channel selection microcomputer 19 having the CMOS configuration
Is set such that the threshold level of L is set to about 0.3 VDD (= 1.5 V), the level of the identification input terminal i when the plug is inserted is always lower than the threshold level of L, The supply of the signal to the processing circuit 9 is identified. Further, based on the identification result of the level identification circuit, the channel selection microcomputer 19 executes the same control as the channel display control of FIG. 3 or the external input notification control of FIG. When the plug is not inserted, the number of the receiving channel is displayed on the display unit 13. When an external video signal is supplied to the input line 10, the display on the display unit 13 is changed to the symbol "AV" or the external input notification is made. Or turn on the light emitting diode for Note that FIG.
The determination of “identification signal is L” in FIG.
"Is it higher than the threshold level of H?" In this embodiment, since the detection loop does not include a delay element as in the integration circuit 17 of the first to third embodiments, the power supply as in the second and third embodiments is performed. The video signal on the input line 10 can be immediately identified by the level identification circuit of the channel selection microcomputer 19 when the power of the VTR is turned on without devising the above. In each of the above embodiments, the present invention is applied to a VTR. However, it goes without saying that the present invention can be applied to various video equipment such as a television receiver. The structure described above has the following effects. First, in the configuration of the first embodiment, the DC level of the received video signal is adjusted to a predetermined level by the buffer amplifier 16 so that the received video signal of the input line 10 when the plug is not inserted and the input video signal of the input line 10 when the plug is inserted. The DC level of the external video signal is given a difference, the signal of the input line 10 is integrated by the integration circuit 17 to detect the DC level, and the level detection circuit 18 compares the detection level of the integration circuit 17 with the threshold level. The supply of the received video signal and the supply of the external video signal, the video signal on the input line 10 based on the presence or absence of the plug insertion into the input jack 5 of one contact per circuit, which was conventionally impossible. Can be identified, and for example, the reception channel display control of video equipment such as a video tape recorder and a television receiver can be improved with a small and inexpensive configuration. Kill. Then, as in the configuration of the second embodiment, the buffer amplifier 16, the integrator 17, and the level discriminator 18 are provided.
If the drive power supply is a power supply of a constant power supply, the presence or absence of plug insertion of the input jack 5 is always detected. Without receiving the information, a correct identification result can be obtained immediately, and the reception channel display control is further improved. Further, in the configuration of the present invention shown in the fourth embodiment, the sync tip level of the received video signal is clamped by the clamp circuit 23, and the clamp level is made higher than the detection level by the channel selection microcomputer. A time constant circuit such as an integrating circuit 17 is provided in the detection loop because the level discrimination circuit by the channel selection microcomputer has distinguished the supply of the received video signal and the supply of the external video signal from the signal level of the input line 10. Thus, the video signal on the input line 10 can be identified based on whether or not a plug is inserted into the input jack 5 having one contact and one contact.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a connection diagram of one embodiment of an input identification device of the present invention. FIGS. 2A and 2B are waveform diagrams of a received video signal of an output line and an external video signal of a plug of FIG. 1; FIG. 3 is a flowchart of the display control of FIG. 1; FIG. 4 is an explanatory diagram of a display of the display device of FIG. 1 when a plug is not inserted. FIG. 5 is an explanatory diagram of a display of the display device of FIG. 1 when a plug is inserted. FIG. 6 is a flowchart of another example of the display control of FIG. 1; FIG. 7 is a connection diagram of a second embodiment of the present invention. FIG. 8 is a connection diagram of a third embodiment of the present invention. FIG. 9 is a connection diagram of a fourth embodiment of the present invention. FIG. 10 is a connection diagram of a conventional device. [Description of Signs] 1,19 Tuning microcomputer 2 TV tuner 4,23 Output line 5 Input jack 9 Video processing circuit 10,23 Output line 14 Normal power supply terminal 16 Buffer amplifier 17 Integrating circuit 18 Level discriminating circuit 22 Clamp circuit

Claims (1)

(57) [Claims 1] The level of the leading end of the synchronization signal of the received video signal of the built-in TV tuner is set to H (Hig
h) a clamp circuit which clamps to a level higher than the threshold level to raise the overall level of the received video signal; one end is connected to the ground, and the other end is connected to the output line of the clamp circuit when the plug is not inserted. An input jack having one circuit and one contact having a three-wire disconnection jack structure, which is connected to an input line of a video processing circuit, opens the two lines when a plug is inserted, and supplies an external video signal of the plug to the input line; A level identification circuit that compares a signal level of a line with a threshold level of H of the microcomputer to identify when the received video signal is supplied and when the external video signal is supplied, and an identification result of the level detection circuit. And a display circuit for displaying a signal indicating an external input or displaying a reception channel on a display device based on the input signal identification device. Place.