JP3405423B2 - Plasma display device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device, and more particularly to prevention of screen deterioration in a device having an automatic power control function.

[0002]

2. Description of the Related Art A plasma display device has an automatic power control function for reducing the brightness per pixel as the average brightness rate of a video signal increases. For this reason, when a video signal with a low average luminance ratio is displayed, the luminance per pixel is increased on the contrary. Therefore, if it is displayed for a long time, the pixels in the lighting portion may deteriorate, and a burn-in phenomenon may occur. There is. In the conventional plasma display device, in order to prevent such burn-in of pixels, a so-called DPMS function is generally used which automatically turns off the power when a state in which no video signal is input continues for about 5 minutes. . However, in recent years, plasma display devices have been used not only for TVs,
It has come to be used as a display device for terminals such as office automation equipment, and when it is not used, the usage of displaying a message such as "you can use it" or "please set a floppy" on a part of the screen has increased, and the average. Opportunities for displaying low luminance signals are increasing. As described above, when a signal having a low average luminance ratio is displayed, the conventional DPMS function does not work, and the pixel of the specific character portion deteriorates to cause a burn-in phenomenon.

[0003]

SUMMARY OF THE INVENTION The present invention solves the problems described above, and a plasma having a screen saver function for preventing burn-in of a specific pixel when a signal having a low average luminance ratio as described above is input. An object is to provide a display device.

[0004]

In order to solve the above problems, the present invention solves the above-mentioned problems by an A / D converter for converting an input video signal into a digital signal, a storage unit for storing the digital video signal, and the digital signal. A digital brightness integration circuit that integrates a brightness (Y) signal of a video signal to calculate an average brightness rate within one screen, a lookup table that stores a threshold value of the average brightness rate in advance, a timer, and the average brightness rate. A control unit that outputs a display position control signal at fixed time intervals based on a lookup table based on the above, and a digital video signal that sets a display start position by the display position control signal from the control unit and stores it in the storage unit. And a display position setting section for reading and outputting, and when the average luminance rate is lower than the threshold value, the display start position is changed at constant time intervals. Further, a display data detection circuit is provided in the display position setting unit, and the presence or absence of display data from the set display start position to the display end position is detected to change the display start position.

[0005]

With the above construction, according to the plasma display device of the present invention, the digital brightness integration circuit converts the digital brightness signal converted from the input video signal into 1
The average luminance rate in the screen is calculated, and when the average luminance rate is lower than a threshold value stored in advance, the display start position is shifted by a predetermined amount at a predetermined time interval and displayed.
Further, since the display position is shifted, when there is no display data, the display position is returned to the original display position.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A plasma display device according to the present invention will be described in detail below with reference to the drawings. FIG. 1 is a block diagram of essential parts showing an embodiment of a plasma display device according to the present invention. In the figure, reference numeral 1 is an A / D converter for converting a video signal into a digital signal. 2 is a video storage unit,
The converted digital video signal is stored. Reference numeral 3 denotes a digital luminance integration circuit section, which calculates an average luminance rate in one screen of the luminance signal of the converted digital video signal.
Reference numeral 4 is a look-up table in which the threshold value of the average luminance rate is stored in advance. A suitable setting value for this threshold value is about 10%. Reference numeral 5 denotes a timer, which is set by the control unit 6 when the calculation result in the digital luminance integration circuit unit 3 is lower than the threshold value (10%) stored in the look-up table 4, and sets a time-up signal every predetermined time. Is being output. About 3 minutes is appropriate for this predetermined time. Reference numeral 6 denotes the control unit, which compares the calculation result of the digital luminance integration circuit unit 3 with a threshold value stored in the lookup table 4,
If it is lower than the threshold, set timer 5
In response to the time-up signal, a display position control signal is output to the display position setting unit 7, and when the signal is higher than the threshold value, the timer 5 is reset. The display position setting unit 7 sets a display start position by a control signal from the control unit 6, generates a read timing signal of the video storage unit 2 from the set display start position, and outputs the video storage unit 2 The stored digital video signal is read out and output. Reference numeral 8 denotes a sync separation unit, which separates the sync signal from the input video signal. Reference numeral 9 denotes a PLL, which is based on the horizontal sync signal from the sync separation unit 8 and is a dot clock signal, an H clock signal (Hw). The read H clock signal (Hr) and the like are generated.

FIG. 2 is a detailed block diagram of the display 1 setting section. In the figure, 71 is a delay device for controlling the phase of the read H clock signal (Hr) from the PLL 9 in dot units. Reference numeral 72 denotes a display data detection unit, which is the P
H clock signal (Hw) for writing from LL9. SR flip-flop (SRF) that generates a display position gate signal (Sgd) from a read H clock signal (Hr)
F) An AND circuit 72b for extracting the digital video signal (Sdv) from the A / D converter 1 by the circuit 72a and the display position gate signal (Sgd) of the SRFF 72a and outputting the extracted digital video signal (Sgdv).
And a data latch circuit 7 for inputting a signal from the AND circuit to a clock input terminal, resetting with a horizontal synchronizing signal from the synchronizing separation circuit 8, and outputting a detection signal (Scc).
2c and.

The operation of the above arrangement will be described below. The input video signal is converted into a digital signal (Sdv) by the A / D conversion unit 1 and stored in the storage unit 2. On the other hand, the digital brightness integration circuit unit 3 integrates the digital brightness signals for one screen, divides by the number of samples (the number of pixels in one screen) to calculate the average value, and calculates the ratio to the maximum brightness to calculate the average. The brightness rate is calculated. When the luminance ratio is smaller than the threshold value 10 (%) stored in the lookup table 4, the control unit 6 sets the timer 5, the timer 5 outputs a time-up signal at intervals of 3 minutes, and the control unit 6 displays the display position. The control signal is changed at intervals of 3 minutes and input to the display position setting unit 7. In the display position setting unit 7, the PLL is set by the display position control signal input from the control unit 6 at intervals of 3 minutes.
The H clock signal for reading (Hr) from 8 is delayed by one dot (Hdr) to output the storage unit 2
The read start position is delayed by 1 dot at intervals of 3 minutes. On the other hand, the display data detection unit 72 detects the presence or absence of display data from the set display start position,
This is fed back to the control unit 6, and when there is no display data, the control unit 6 controls the display start position to return to the original position.

FIG. 3 is a diagram showing movement of the display position when a screen having a low average luminance rate is displayed. FIG. 3A shows screen data stored in the storage unit 2. In the figure, a broken line shows a read start position from the storage unit, and the read position is shifted to the right by one dot at intervals of 3 minutes. . FIG. 3B shows a display screen in which screen data is read from the storage unit 2 and displayed. As the read position from the storage unit 2 is delayed, the display position moves to the left of the screen. Although the screen is moved by 1 dot at a time, the same effect can be obtained by moving by N dots.

FIG. 4 is a timing chart showing signals at various parts of the display data detection circuit. In the SRFF circuit 72a, H
Clock signal (Hw). H clock signal for reading (H
The display position gate signal (Sgd) is generated from r). Further, the AND circuit 72b extracts and outputs the digital video signal (Sdv) from the A / D converter 1 by the display position gate signal (Sgd). In the data latch circuit 72c, the signal (Sgdv) from the AND circuit 72b is input to the clock input terminal and reset by the vertical synchronization signal (V) from the synchronization separation circuit 8 to detect the detection signal (Sdd) within one screen. Is being output.

[0011]

As described above, according to the plasma display device of the present invention, the digital brightness signal converted from the input video signal is calculated by the digital brightness integration circuit to calculate the average brightness rate within one screen. When the average luminance rate is lower than a threshold value stored in advance, the display start position is shifted by a predetermined amount at a predetermined time interval for display. In addition, when the display position is shifted and the display data disappears, the display position is returned to the original display position, so a signal with a low average display ratio such as a message indicating the standby state from a personal computer is input. Even in this case, it is possible to prevent burn-in of a specific pixel.

[Brief description of drawings]

FIG. 1 is a block diagram of essential parts showing an embodiment of a plasma display device according to the present invention.

FIG. 2 is a detailed block diagram of a display position setting unit.

FIG. 3 is a diagram illustrating movement of display characters.

FIG. 4 is a timing chart showing signals of respective parts of the display data detection circuit.

[Explanation of symbols]

1 A / D converter 2 video storage 3 Digital brightness integration circuit 4 Look-up table 5 timer 6 control unit 7 Display position setting section 8 sync separator 9 PLL 71 Delay device 72 Display data detector 72a SRFF circuit 72b AND circuit 72c DFF circuit

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Claims (4)

(57) [Claims] 1. An A / D conversion unit for converting an input video signal into a digital signal, a storage unit for storing the digital video signal, and a luminance (Y) signal of the digital video signal are integrated into one screen. A digital brightness integrating circuit for calculating the average brightness rate, a look-up table for storing the threshold value of the average brightness rate in advance, a timer, and a look-up table based on the average brightness rate are referred to, and display positions are set at fixed time intervals. A control unit that outputs a control signal and a display position setting unit that sets a display start position by a display position control signal from the control unit and reads and outputs a digital video signal stored in the storage unit. A plasma display device characterized in that when the rate is lower than a threshold value, the display start position is changed at fixed time intervals. 2. The plasma according to claim 1, wherein the display position setting unit is a delay device which controls a delay amount of a read horizontal synchronizing signal input by a display position control signal from the control unit. Display device. 3. A display data detection circuit is provided in the display position setting unit, and the presence or absence of display data from the set display start position to the display end position is detected to change the display start position. The plasma display device according to claim 1. 4. The display data detection circuit includes a gate signal generation circuit from a horizontal display start position to a display end position, a gate circuit that gates the digital video signal by the gate signal, and a vertical synchronization signal to reset the display signal. 4. The plasma display device according to claim 3, further comprising a D latch circuit that latches an H level using a signal from the gate circuit as a clock signal.