JP3405079B2 - Memory allocation method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a memory allocating method used in a decoding device for highly efficient video coding. 2. Description of the Related Art In recent years, in the field of digital signal processing such as video discs and the field of digital broadcasting, video software and apparatuses have been reduced in scale by encoding video signals with high efficiency. MPEG (Moving
Picture Experts Group) / ISO 11172 standard. A memory allocation method used in a decoding system of the MPEG standard as a conventional example will be described below. A DRAM (dynamic random access memo) is used as a memory means.
ry). The term used below is M
PEG (Moving Picture Experts Group) / ISO11
See the 172 standard. FIG. 6 is a schematic diagram of a memory map showing how block information is stored in a DRAM by a conventional memory allocation method. FIG. 7 is a schematic diagram when block information is referred to by a conventional memory allocation method. FIG. 8 is a timing chart of DRAM access when block information is referred to by a conventional memory allocation method. The operation of the conventional memory allocation method will be described below with reference to FIGS. First, for the sake of simplicity, it is assumed that a luminance block in a macroblock is decoded and stored in a DRAM. As shown in FIG. 6, the image information of a block of eight vertical lines of eight pixels is sequentially stored in a DRAM (memory).
Are stored in the increasing direction of the column address. Subsequent luminance blocks are similarly stored sequentially. The storage of the block information as is that it the memory allocation to increase the address in the order in which they are decoded input linearly. On the other hand, at the time of decoding of inter-frame predictive coding, it is necessary to refer to image information already stored, and a motion vector is used. The size of the block of the image information to be referred to may be cut out from a position different from the block boundary at the time of storage. FIG. 7 schematically shows the reference order when the motion vector has one pixel in the horizontal direction. For each horizontal one of the blocks, reference is made to seven pixels from a predetermined block and eight to one pixel from the block immediately after (the left adjacent block). Repeat for the line. Numerals 1 to 16 shown in FIG. 7 indicate the order of reference from the memory, and indicate that it is necessary to make discrete access in the memory space. FIG. 8 shows a state of the DRAM access for one horizontal (eight pixels) of the block at this time, and shows that the access for each horizontal of the block is divided into two. The RAS in FIG. 8 is a row address strobe,
CAS is a column address strobe. However, in the above-described conventional memory allocation method, when image information is referred to, and when the image information is referenced from a position different from the block boundary at the time of storage, the memory access is divided and the DRAM is divided. However, there is a problem in that the access efficiency is reduced. Also, the generation of memory addresses is complicated. An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a memory allocating method capable of simplifying address generation and improving access efficiency. [0011] In order to achieve this object, a memory allocation method according to the present invention uses an image allocating method in an encoding process.
Decoding of image coding method that divides information into rectangular blocks
The system uses address and row addresses to address
When storing decoded image information in the memory means
And the 2D image of the block obtained by decoding
The direction is based on the column address, and the vertical direction is based on the row address.
Perform dressing and decode the inter-frame prediction code.
For storing the reference frame data, one horizontal pixel can be stored.
Use a rectangular area with column addresses and row addresses for the number of lines.
The remaining column addresses less than one horizontal pixel in the memory means
Frame data other than the referenced frame in the
What to store. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention provides a decoding system of an image encoding method for dividing image information into rectangular blocks in an encoding process. When storing the decoded image information in the memory means addressed by the above, the two-dimensional image of the decoded block is addressed and stored using the column address in the horizontal direction and the row address in the vertical direction. is there. According to the present invention, as described above, horizontal block boundaries are connected by a continuous column address, and memory access is not divided even by reference from a position different from the block boundary. Further, the address for each line is simple and high speed only by increasing the row address by one. Hereinafter, embodiments of the present invention will be described with reference to the drawings. (Embodiment 1) FIG. 4 is a schematic diagram of a memory map in a memory allocation method according to Embodiment 1 of the present invention. FIG. 1 is a schematic diagram of a memory map showing how block information is stored in a DRAM. FIG. 2 is a schematic diagram when block information is referred to. FIG. 3 shows a timing chart of the DRAM access when the block information is referred to. The memory allocating method according to the present embodiment will be described as a memory allocating method used in a decoding system conforming to the MPEG standard. The terms used below are similar to those of the conventional example, and are similar to those of the MPEG (Moving Picture Experts Group).
p) / See ISO 11172 standard. First, to simplify the description, it is assumed that a luminance block in a macroblock is decoded and stored in a DRAM. As shown in FIG. 1, the image information of eight vertical lines of eight horizontal pixels is sequentially stored in the increasing direction of the column address of the DRAM while increasing the row address for each line. The four luminance blocks in the macroblock which are subsequently decoded and input are also stored sequentially while maintaining the positional relationship of the memory map shown in FIG. That is, as shown in FIG. 4, the data is sequentially stored in the memory while maintaining the macroblock state. On the other hand, at the time of decoding of the inter-frame predictive coding, it is necessary to refer to the image information already stored, and a motion vector is used. The size of the block of the image information to be referred to may be cut out from a position different from the block boundary at the time of storage. FIG. 2 schematically shows the reference order when the motion vector has one pixel in the horizontal direction. For each horizontal one of the blocks, reference is made to seven pixels from a predetermined block and eight to one pixel from the block immediately after (the left adjacent block). Repeat for the line. That is, as shown in FIG. 2, even when referring from a position different from the block boundary at the time of storage, one horizontal portion is continuously read. FIG. 3 shows a state of the DRAM access for one horizontal (eight pixels) of the block at this time, and shows that the access for each horizontal of the block is performed in the page mode in one RAS access. Show. Therefore, it can be seen that the access efficiency is greatly improved with respect to the access to the conventional DRAM shown in FIG. As described above, according to the present embodiment, due to the characteristics of the memory map described above, the horizontal block boundaries are connected by continuous column addresses, and memory access can be performed even when reference is made from a position different from the block boundaries. In most cases, it is not divided , and the memory access efficiency is high. (Embodiment 2) FIG. 5 is a schematic diagram of a memory map of a memory allocation method according to Embodiment 2 of the present invention. The difference from the first embodiment is that the address of each line can be addressed only by incrementing the row address by one, even for reference from a position different from the vertical block boundary. Thus, the reference from another macroblock can be simply and quickly addressed by the vertical motion vector. The feature of this embodiment is that the reference frame (I
Or P picture), a rectangular area having column addresses for horizontal pixels and row addresses for the number of lines with high access efficiency is used, and the remaining memory area for a frame (B picture) that is not referred to is used. The point is that it is assigned. With this feature, the memory capacity is not wasted while giving priority to the memory access efficiency. Although the description of the chrominance blocks in the macro blocks has been omitted in the first and second embodiments, it goes without saying that a memory allocation method similar to the luminance block can be applied. As described above, according to the present invention, a two-dimensional image of a block obtained by decoding is addressed and stored using a column address in the horizontal direction and a row address in the vertical direction. . Also, the end of the column address of each row,
Addressing is performed so that the head of the column address separated from the row by the vertical width of the block is connected. Further, the storage of the referenced frame when decoding the inter-frame prediction code uses a rectangular area of a column address for horizontal pixels and a row address for the number of lines, and stores the rectangular area outside the rectangular area allocated in the memory means. The area is used for storing frames other than the referenced frame. With the above features, the memory access efficiency can be increased. Further, since the pixel information in the horizontal direction has a continuous column address, the efficiency of continuous horizontal memory access for display in the decoding system is very high.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a memory map showing how block information is stored in a DRAM according to the first and second embodiments of the present invention. FIG. 3 is a schematic diagram when block information is referred to in FIG. 3 FIG. 3 is a diagram showing a timing chart of DRAM access when block information is referred to in the first and second embodiments FIG. 4 is a first embodiment of the present invention FIG. 5 is a schematic diagram of a memory map according to a memory allocation method according to the present invention. FIG. 5 is a schematic diagram of a memory map according to a memory allocation method according to a second embodiment of the present invention. FIG. 7 is a schematic diagram of a rumor memory map. FIG. 7 is a schematic diagram of a case where block information of a conventional example is referred to.
The figure which shows the timing chart of AM access

Claims (1)

(57) [Claims] [Claim 1] In the encoding process, image information is blocked in a rectangular shape.
In the decoding system of the image coding method for dividing the
Memory address addressed by address and column address
When storing the decoded image information in the stage,
Column address of 2D image of block
Addressing using the row address in the vertical direction.
Of the referenced frame data in the decoding of the inter-frame prediction code.
For storage, the column address that can store one horizontal pixel and the row
The remaining column addresses less than one horizontal pixel of the memory means using a rectangular area of the dress.
Frame data other than the referenced frame in the
Memory allocation method to store.