JP3398141B2 - Digital camera and image processing device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital camera such as an electronic still camera and an image processing apparatus, and, for example, uses MPEG (Moving Picture Expert Gr.
oup) and JPEG (Joint Photographic Coding Exp)
ert Group) related to those having a function of encoding / decoding in accordance with the standard.

[0002]

2. Description of the Related Art In recent years, the demand for electronic still cameras has increased more and more in place of cameras using silver salt photographic technology since the 19th century. In an electronic still camera, when transmitting and storing image data, the “JPEG” method is used as a data compression / decompression technique in order to compress the image data and reduce the data amount for efficient processing. ing. This JPEG system is based on ISO (Intern
ational Organization for Standardization) / IEC
It is standardized by the JPEG committee (ISO / IEC 10918-1) under the umbrella of (International Electrotechnical Commission).

The JPEG system is also called a JPEG algorithm, and the core of the technique is the discrete cosine transform (D
CT; Discrete Cosine Transform). And
The JPEG system is not only for electronic still cameras, but also for CD-
It is also widely used for image data processing in ROM (CD-Read Only Memory) systems and the like. Since the JPEG method can also compress and decompress moving image data, some electronic still cameras using the JPEG method have a moving image shooting function. JP like this
A technique for compressing / decompressing moving image data using the EG method is called M-JPEG (Motion-JPEG).

By the way, the information handled by multimedia is vast and diverse, and it is necessary to process such information at high speed in order to put multimedia into practical use. In order to process information at high speed, data compression / decompression technology is essential. The "MPEG" method is an example of such data compression / decompression technology. This MPEG system is a MP under the ISO / IEC umbrella.
It is standardized by the EG committee (ISO / IEC JTC1 / SC29 / WG11).

The core of the technology used in the MPEG video part is motion compensation prediction (MC).
ated prediction) and DCT. A coding technique that uses MC and DCT together is called a hybrid coding technique. That is, it can be said that the MPEG system is a technique in which MC is combined with the JPEG system. The MPEG system is based on various storage media (video CD (Compact Disc), CD-R).
OM, DVD, video tape, memory card using non-volatile semiconductor memory, etc.), LAN (Local Area Network)
rk), various communication media, various broadcasting media (terrestrial broadcasting, satellite broadcasting, CATV (Community Antenna Televi)
sion)) is compatible with all transmission media including.

In a digital camera such as an electronic still camera using the MPEG system, a still image corresponding to one frame of a moving image can be recorded as a snapshot while the moving image is being captured. Has been demanded, and for example, a similar technique is disclosed in Japanese Patent Laid-Open No. 11-75148. It is also known to provide a dedicated storage area for saving / saving still image data as a snapshot in a digital camera capable of recording a still image as a snapshot while capturing such a moving image.

[0007]

In the case of providing a dedicated storage area for saving / saving still image data as a snapshot as in the conventional example, still image shooting for the snapshot is instructed. Until then, this dedicated storage area is not used. That is, it is necessary to provide a storage area only for snapshot recording,
The area of the memory section becomes large and the cost becomes high. In addition, when the memory area is kept small and a storage area for snapshot recording is secured in that area, the storage area for moving image recording is reduced so much that moving image recording cannot be performed smoothly. Occurs.

An object of the present invention is to solve such a problem in a digital camera or an image processing device.

[0009]

A digital camera according to claim 1
Is a still image that corresponds to a part of the moving image while shooting the moving image.
On a digital camera capable of recording an image, the input data
Storage having a plurality of storage areas for sequentially storing data
Means and so that the storage area is used cyclically
A control means for controlling the input / output of the storage means,
The control means controls an arbitrary storage area among the plurality of storage areas.
Area is saved when the data is saved
Control the input and output of the storage means to be used
A memory control device for
Sequentially storing moving image data in the plurality of storage areas,
The control means controls the still image in the plurality of storage areas.
When importing data at the timing of the save instruction,
To the remaining storage area excluding the storage area that stores the
In / out of the storage means so that the moving image data can be taken in.
The point is to control force .

A second aspect of the present invention is the digital camera according to the first aspect , wherein the moving image data is stored for each screen in the individual storage areas. According to a third aspect of the present invention, in the digital camera according to the first or second aspect , when the control unit captures data at the timing of the instruction to save the still image again,
The gist of the invention is to cancel the previously stored data and control the input / output of the storage means so that the moving image data is captured in the remaining storage area excluding the storage area for storing the newly captured data. Digital of claim 4
In the invention according to claim 1 or 2, the camera newly captures a storage area for storing previously stored data when the control unit captures data at the timing of the instruction to store the still image again. The gist of the invention is to control the input / output of the storage means so that the moving image data is taken into the remaining storage area excluding the storage area for storing data.

According to a fifth aspect of the invention, there is provided a digital camera according to the first aspect.
In the invention described in any one of Items 4 to 4 , further comprising: a moving image coding means for coding the moving image data, and a still image coding means for coding the still image, wherein the control means comprises: The gist of the invention is to send the image data stored in the storage means to the still image coding means after the coding processing by the moving picture coding means is completed. According to a sixth aspect of the present invention, in an image processing apparatus including a memory control device that performs control for storing image data in a memory, the memory subjects the moving image data and the still image data to predetermined image processing. In order to store still image data, the memory control device has a common area for temporarily storing them in order to store an area in which data of moving images that have already been processed exists in the common area. On the other hand, when storing the moving image data, the gist is to sequentially use the areas other than the area in which the unprocessed still image data is stored in the common area. According to a seventh aspect of the present invention, in a digital camera equipped with a memory control device that performs control for storing image data in a memory, the memory is a moving image if a still image is instructed while capturing a moving image. The memory control device has a common area for temporarily storing image data and still image data in order to subject them to predetermined image processing, and the memory control device stores still image data.
While using the area in which the moving image data that has already been processed exists in the common area, when storing the moving image data, the area in which unprocessed still image data is stored in the common area The point is to use the areas other than the above one by one.

According to the digital camera of claim 8, in the invention of claim 7 , when the second photographing of the still image is instructed during the photographing of the moving image, the memory control device is
The gist of storing the still image data for the first time is to use an area other than the area in which the still image data captured for the first time is stored. Digitizer of claim 9
In the invention according to claim 8 , in accordance with a user's instruction, the video camera selects one of the still image data taken at the first time and the still image data taken at the second time, and finally selects the final image. The gist of the present invention is to further include a control unit for storing in the. The digital camera according to claim 10 is a contract
In the invention according to claim 7 , when the second still image shooting is instructed during the moving image shooting, the memory control device sets the first still image data to 1 when storing the second still image data.
The gist is to overwrite and use the area where the still image data captured the second time is stored.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described with reference to the drawings. Figure 1 shows JPEG and MP
It is a block circuit diagram of the electronic still camera 1 using the EG method. The electronic still camera 1 includes an imaging device 2, a signal processing circuit 3, an image data correction circuit 4, a JPEG core circuit 5, an MPEG core circuit 6, a frame buffer 7, a display circuit 8, a display 9, a memory card 10, and an input / output circuit 11. , Data buses 12 and 13, a control core circuit 14, and an operation button group 15.

The control core circuit 14 controls the respective constituent elements 2 to 13 of the electronic still camera 1 according to the ON / OFF signal of the operation button group 15. The operation button group 15 has a still image recording button 15a, a moving image recording button 15b, and other operation buttons 15c. The imaging device 2 is composed of a CCD (Charge Coupled Device) or the like, and photographs a subject image to generate an output signal. The signal processing circuit 3 includes an A / D conversion circuit, performs A / D conversion of the output signal of the image pickup device 2, and then performs white balance adjustment, gamma correction, and the like, and for example, the number of pixels is 120 in vertical.
The original image data of 0 × horizontal 1600 is generated. The digital original image data generated by the signal processing circuit 3 is transferred to at least one of the frame buffer 7 and the display circuit 8 via the data bus 12.

The display circuit 8 generates an image signal from the image data for each screen transferred via the data bus 12. The display 9 displays the image signal generated by the display circuit 8 as a subject image. Frame buffer 7
Is a rewritable semiconductor memory (for example, SDRAM
(Synchronous Dynamic RAM), DRAM, Rambus D
The image data, which is composed of a RAM, etc.) and is transferred via the data bus 12, that is, image data is stored in frame units, and the stored image data is read out one screen at a time. In addition, in the frame buffer 7, a storage area 7a (hereinafter, referred to as a storage area 7a for temporarily saving and storing corresponding one frame of still image data in response to an ON signal of the still image recording button 15a during recording of a moving image. It also has a save area 7a). The storage area 7a is an example of the "storage means" in the present invention.

The image data for each screen read from the frame buffer 7 is transferred to the image data correction circuit 4 via the data bus 12. Image data correction circuit 4
For the image data input from the signal processing circuit 3,
A correction process described below is performed. The image data for each screen after the correction processing generated by the image data correction circuit 4 is transferred to the JPEG core circuit 5 or the MPEG core circuit 6 via the data bus 12.

The memory card 10 is detachably attached to the electronic still camera 1, and a flash memory 10a is provided in the memory card 10. The flash memory 10a writes and stores the compressed image data for each screen transferred via the data bus 13, and reads the stored compressed image data for each screen and transfers them to the data bus 13.

The input / output circuit 11 externally connects image data for each screen transferred via the data bus 13 to the electronic still camera 1 (for example, external display, personal computer, printer, etc.). And the image data input from the external device is transferred to the data bus 13. The image data read from the memory card 10 or the image data input via the input / output circuit 11 is transmitted to the JPE via the data bus 13.
It is transferred to the G core circuit 5 or the MPEG core circuit 6.

As shown in FIG. 2, the JPEG core circuit 5 includes a DCT circuit 16, a quantization circuit 17, a Huffman coding circuit 18, a Huffman decoding circuit 19, an inverse quantization circuit 20,
It is composed of an inverse DCT (IDCT) circuit 21. In the JPEG core circuit 5, one screen of image data is divided into a plurality of macroblocks defined by the JPEG standard, and compression / expansion processing is performed for each block. Here, the DCT circuit 16, the quantization circuit 17, and the Huffman encoding circuit 18 constitute a JPEG encoder, which performs compression / encoding processing of still image data, and a Huffman decoding circuit 19, an inverse quantization circuit 20, and an inverse D.
The CT circuit 21 constitutes a JPEG decoder. Incidentally, JP
The EG core circuit 5 (JPEG encoder) is an example of the "still image encoding means" in the present invention.

The DCT circuit 16 takes in the image data of one screen for each block of the image data read out from the frame buffer 7, and performs a two-dimensional discrete cosine transform on the image data. (DCT: Di
screte cosine transform) to generate DCT coefficients. The quantization circuit 17 quantizes the DCT coefficient supplied from the DCT circuit 16 with reference to the quantization threshold value stored in the quantization table stored in the RAM (not shown).

The Huffman coding circuit 18 is a quantizer circuit 1.
The DCT coefficient quantized in 7 is variable-length coded with reference to the Huffman code stored in the Huffman table stored in the RAM (not shown) to generate compressed image data for each screen. . The compressed image data generated by the Huffman coding circuit 18 is transferred to at least one of the memory card 10 and the input / output circuit 11 via the data bus 13.

The MPEG core circuit 6 includes a first and second MC (motion-compensated prediction) circuit 22 in addition to the JPEG core circuit 5.
a and 22b are added. Therefore, DCT
A circuit 16, a quantization circuit 17, a Huffman coding circuit 18,
Whether the Huffman decoding circuit 19, the inverse quantization circuit 20, and the inverse DCT circuit 21 are shared by the JPEG core circuit 5 and the MPEG core circuit 6, and whether the JPEG core circuit 5 is used by the switching signal from the control core circuit 14. Also, an MP in which the first and second MC circuits 22a and 22b are added thereto
Whether to use the EG core circuit 6 is selected. However, J
In PEG and MPEG, the above quantization table and Huffman table are separately provided.

In the MPEG core circuit 6, one screen of image data is divided into a plurality of macroblocks defined by the MPEG standard, and compression / expansion processing is performed for each block. Here, the DCT circuit 16, the quantization circuit 17, the Huffman coding circuit 18, the MC circuit 22
a constitutes an MPEG encoder, performs compression encoding processing of moving image data, and the Huffman decoding circuit 19, the inverse quantization circuit 20, the inverse DCT circuit 21, and the MC circuit 22b are MPEG.
Configure the decoder. The MPEG core circuit 6 (MPE
G encoder) is the "moving image encoding means" in the present invention.
Is an example.

The compressed image data generated by the MPEG encoder is also transferred to at least one of the memory card 10 and the input / output circuit 11 via the data bus 13. JPEG core circuit 5 or MPEG core circuit 6
In the Huffman decoding circuit 19, the compressed image data for each screen transferred via the data bus 13 is
By performing variable length decoding with reference to the Huffman code, decompressed image data is generated one screen at a time.

The inverse quantization circuit 20 is the Huffman decoding circuit 1
The DCT coefficient is generated by dequantizing the generated decompressed image data for each screen of 9 by referring to the quantization threshold value. The inverse DCT circuit 21 performs a two-dimensional inverse inverse cosine transform (IDCT: Inverse DCT) on the DCT coefficient generated by the inverse quantization circuit 20. Where MPE
In the G core circuit 6, the second MC circuit 22b performs MC processing on the expanded image data for each screen, which has been subjected to the inverse discrete cosine transform in the inverse DCT circuit 21.

The decompressed image data from the JPEG core circuit 5 or the MPEG core circuit 6 is transferred to the frame buffer 7 via the data bus 12. Then, the frame buffer 7 includes the JPEG core circuit 5 or the MPEG core circuit 6
The image data for each screen transferred from the device via the data bus 12 is written and stored. In addition, the display circuit 8
Generates an image signal from image data for each screen transferred from the frame buffer 7 via the data bus 12, and the image signal is displayed as a subject image on the display 9.

As shown in FIG. 3, the image data correction circuit 4 comprises a digital filter section 23, a ROM 24 and a timing control section 25. The digital filter unit 23 includes a spatial filter that is an acyclic digital filter, for example, a FIR (Finite Impulse Response) filter, and as shown in FIG. 4, the n-bit input signal input from the signal processing circuit 3 is sampled at every sampling cycle. .. for delaying the signal from the multiplier 27, n + 1 multipliers 27, ..., And an adder 28 for convolving the signals from the multipliers 27. The coefficients an, an-1 ... A2, a1 of the multiplier 27 are coefficients that determine the characteristics of the filter, and are coefficients for filtering the moving image data and for filtering the still image data. Are written in the ROM 24 in advance. RO
The coefficient stored in M24 is preset to an appropriate value by simulation in the manufacturing stage.

For example, when filtering moving image data, a good low pixel density image is obtained by changing the value of each coefficient for each sampling period using a concept such as linear interpolation. As an example, the number of pixels in the horizontal direction is 2
Consider the case of setting to / 3. Now, suppose that the original image is 3
Pixels p1 to p3 are arranged sideways, and these pixels are converted into two pixels q1 and q2 by filtering the moving image data. For this purpose, q1 and q2 are expressed by first-order linear sums of p1, p2, and p3, respectively.
In other words, the filtering process for reducing the amount of data is realized by determining how much the number of pixels should be reduced and the ratio thereof and then determining each coefficient of the linear sum through experiments or the like. As an example, the number of pixels may be reduced to, for example, 480 vertical × 720 horizontal. On the other hand, in the case of filtering still image data, the value of each coefficient may be set so as to emphasize a high frequency region and a high pass filter may be formed. By doing so, it is possible to obtain a sharpened image without deterioration of the edge portion while keeping the number of pixels constant.

Although n = 8 is set in the present embodiment, this naturally has a degree of freedom in design. The timing control unit 25 follows the control of the control core circuit 14.
The timing of reading coefficients from the ROM 24, the timing of latching input / output data, the timing of filter calculation, and the like are controlled. Based on such a configuration, the image data recording operation will be described with reference to the flowcharts shown in FIGS.

In FIG. 5, when the still image recording button 15a is turned on, the still image processing shown in FIG. 6 is performed, and when the moving image recording button 15b is turned on, the moving image processing shown in FIG. 7 is performed. (Still image recording) In FIG. 6, the original image signal taken in from the imaging device 2 is the O of the still image recording button 15a.
It is input to the signal processing circuit 3 at a timing corresponding to the N signal, converted into digital original image data of one screen here, and taken into the frame buffer 7 (S1). Then, one frame of original image data from the frame buffer 7
The still image is displayed on the display 9 by being sent to the image data correction circuit 4 and the display circuit 8 (S2).

The data taken into the image data correction circuit 4 is subjected to the above-mentioned correction processing corresponding to the still image in the image data correction circuit 4 (S3), and the corrected data is input to the JPEG core circuit 5, After a predetermined compression / encoding process is performed (S4), it is recorded in the flash memory 10a (S5). (Motion image recording) In FIG. 7, the original image signal taken in from the imaging device 2 is input to the signal processing circuit 3 at a timing corresponding to the ON signal of the moving image recording button 15b,
Here, it is converted into digital original image data for each screen, and is sequentially loaded into the frame buffer 7 (S1).
1). Then, the original image data for each screen is sent from the frame buffer 7 to the image data correction circuit 4 and the display circuit 8 to display a moving image on the display 9 (S12).

The data sequentially captured by the image data correction circuit 4 is subjected to the above-described correction processing corresponding to the moving image in the image data correction circuit 4 (S13), and the corrected data is input to the MPEG core circuit 6. After the predetermined compression / encoding processing is performed (S14), the flash memory 10
It is recorded in a (S15). This operation is continued until the ON signal is sent again from the moving image recording button 15b (S16). (Snapshot recording) In FIG. 7, when the ON signal is sent from the still image recording button 15a during the moving image recording period, the control core circuit 14 indicates that the still image capturing for the snapshot is instructed from the outside. A determination is made and the snapshot processing shown in FIG. 8 is executed (S17).

In FIG. 8, when the ON signal is sent from the still image recording button 15a during the recording period of the moving image, 1
The image data for the frame is temporarily saved and stored in the save storage area 7a of the frame buffer 7 (S21).
During this retracting operation, the moving image recording operation is continued. That is, the original image signal taken in from the image pickup device 2 is inputted to the signal processing circuit 3, where it is converted into digital original image data for each screen and sequentially taken in to the frame buffer 7 (S22). Then, the original image data for each screen is sent from the frame buffer 7 to the image data correction circuit 4 and the display circuit 8.

The data sequentially fetched by the image data correction circuit 4 is subjected to the above-described correction processing for moving images in the image data correction circuit 4 (S23), and the corrected data is input to the MPEG core circuit 6. After the predetermined compression / encoding processing (S24), the flash memory 10
It is recorded in a (S25). Here, in the present embodiment,
The frame buffer 7 sends the original image data for each screen to the display circuit, and also sends the image data for one frame saved in the save memory area 7a. By doing so, the moving image currently being photographed and the still image to be recorded as a snapshot are displayed in parallel on the display 9 (S26). FIG. 9 shows an example of displaying a moving image and a still image on the display 9 in parallel,
The still image 100 is used as the main screen, and 1 /
The moving image 200 is displayed in a size of 16.

The still image is displayed for a predetermined time (for example, 5 seconds), and after 5 seconds, the display is switched to the display of only the moving image (S27) and the process returns to the normal moving image processing shown in FIG. 7 (S28). The user can see that the still images are displayed in parallel.
In seconds, it is possible to confirm on the display 9 whether or not the desired snapshot can be taken.

When the ON signal is sent again from the still image recording button 15a before the elapse of 5 seconds, the processes of S21 to S27 are performed based on the data taken in at the timing corresponding to the ON signal ( S29). in this case,
The contents of the save storage area 7a are replaced with new data. FIG. 10 is a diagram for explaining the usage status of the frame buffer 7 in the moving image processing and the snapshot processing. In the figure, the frame buffer 7 is provided with four normal storage areas A to D, and data of one screen (one frame) is stored in each of the storage areas A to D. Of course, the number of storage areas is appropriately changed according to the specifications of the camera 1.

10, in the normal moving image processing shown in FIG. 7, as shown in FIG. 10A, the digital original image data for each screen from the signal processing circuit 3 is A → B → C.
The data is sequentially stored in the order of → D, and the data stored first is output to the data bus 12 (First-In First-Out). Then, when data is stored in the last storage area D, the storage area A is used again. That is, the storage areas A to D are used cyclically. For cyclic use of the frame buffer 7, an LRU (Least Recently Used) algorithm or other page memory control method may be adopted.

When an ON signal is transmitted from the still image recording button 15a for snapshot during the processing of a moving image, the data taken in at the timing corresponding to the ON signal is stored in a certain storage area, The area is used as it is as a storage area 7a for saving still image data. For example, when the data captured at the timing of snapshot recording is stored in the third storage area C, that storage area C is used as the save storage area 7a as shown in FIG. In the subsequent moving image processing, the storage areas A, B and D are used cyclically. After that, when the data captured at the timing of snapshot recording is stored in the second storage area B this time, the data in the third storage area C is canceled, that is, protected, as shown in FIG. 10C. The second storage area B is used as the save storage area 7a, and the other storage areas A, C, and D are cyclically used in the subsequent moving image processing.

In the present invention, although it is desirable to use the storage areas A to D in order, for example, ACD
BAC ... Or ACDABC ... may be used. In short, when there are a plurality of storage areas, control may be performed so that different storage areas are used for the previous data and the next data. Such a form is included in the concept of “used cyclically” in the present invention. Also,
When only two storage areas are initially prepared, the recorded data of the snapshot is saved, and the moving image data after that is captured in one storage area and then sequentially output. However, even in this form,
It is included in the concept of “used cyclically” in the present invention.

When the moving image recording is completed, in FIG.
The control core circuit 14 determines whether or not the above-described still image saving operation is performed during the moving image recording operation (S1).
8), if the save operation is being performed, the save storage area 7
The data for one frame stored in a is transferred to the image data correction circuit 4 via the data bus 12, and the same processing as the above-described still image recording is performed (S19).

The electronic still camera 1 of the present embodiment described above has the following operational effects. (1) Since a still image can be extracted as a snapshot while capturing a moving image, the function as an electronic still camera is improved. (2) Since a still image taken as a snapshot is displayed on the display 9, the user can easily check the shooting condition of the snapshot, and if he / she does not like it, it is sufficient to retake it immediately. It is possible to reduce the degree of error. Therefore, the commercial value of the electronic still camera can be increased.

(3) In addition to the above (2), since the moving image currently being shot is displayed in parallel, the shooting state of the moving image can be confirmed in real time. (4) In addition to the above (2) and (3), the still image to be recorded as a snapshot is used as the main screen on the display 9, and the moving image is displayed in a small size, for example, 1/16 of the screen. The shooting condition of can be confirmed very easily.

(5) In addition to the above (2), the still image to be recorded as a snapshot is only temporarily displayed on the display 9, so that the confirmation work on the display 9 for moving image recording can be performed for a long time. It does not interfere. (6) As shown in FIG. 10, the save storage area 7a is not provided until the still shooting for the snapshot is instructed, and the save storage area 7a is used as a normal storage area. Therefore, the utilization efficiency of the frame buffer 7 is improved.

(7) Data correction circuit 4 for still image data
Can be used to correct a more optimal image. (8) Since not only moving image data but also still image data is configured to pass through the data correction circuit 4, even if it is desired to perform correction processing on a still image separately, it suffices to store the coefficient in the ROM 24. The function can be improved at cost.

Moreover, since it is not necessary to separately provide a correction circuit dedicated to the still image, it is possible to prevent the device from becoming large and the power consumption from increasing. (9) In the JPEG core circuit 5 and the MPEG core circuit 6, the DCT circuit 16, the quantization circuit 17, the Huffman coding circuit 18, the Huffman decoding circuit 19, and the inverse quantization circuit 2
0, the inverse DCT (IDCT; Inverse DCT) circuit 21 is shared, so that the configuration of the electronic still camera 1 and the arithmetic processing algorithm can be simplified.

(10) Since the evacuation storage area 7a is provided for the snapshot, the division and retrieval of the still image and the moving image are facilitated, and more rapid reproduction is possible. (11) When still shooting for snapshot is instructed, the image data for one frame before being input to the image data correction circuit 4 is temporarily saved in the storage area 7a.
Since the data is stored, the filtering process in the image data correction circuit 4 thereafter can be easily performed in the vertical direction and the zoom process can be performed, and the moving image recording can be performed without interruption.

The present invention is not limited to the above embodiment, but may be modified as follows, and even in that case, the same or higher action and effect can be obtained. (A) In S26 of FIG. 8, only the still image is displayed on the display 9. (B) In S26 of FIG. 8, the sizes of the still image and the moving image to be displayed in parallel on the display 9 are reversed (the moving image is the main screen). In addition, the user can specify whether or not to display the still image with a button or the like.

(C) In S29 of FIG. 8, the image data for the newly taken snapshot is stored in parallel without replacing the old data. That is, as shown in FIG. 11, in the normal moving image processing, the storage areas A to D of the frame buffer 7 are cyclically used (FIG. 11A). Next, when the data captured at the timing of the first snapshot recording is stored in the third storage area C, that storage area C is used as the save storage area 7a (see FIG. )), In the subsequent moving image processing, the other three storage areas A, B,
Use D cyclically. Then, the data captured at the timing of the second snapshot recording is
When stored in the second storage area B, the second and third storage areas B and C are used as the save storage area 7a (FIG. 11C), and in the subsequent moving image processing,
The two storage areas A and D are used cyclically (alternately).

By doing so, a plurality of snapshots can be recorded. Note that as the number of snapshots that can be recorded increases, the area in which the frame buffer 7 can be used in moving image processing decreases, so that the frame buffer 7 does not overflow during moving image processing. Must be set. Further, in this case, the control core circuit 14 may select any one of the plurality of recorded snapshots and finally save the snapshot according to the operation of the selection button 15c by the user. Good. (D) In S29 of FIG. 8, the area for storing the image data for the newly captured snapshot is used by overwriting the area in which the old data is stored.

(E) Instead of the memory card 10, a magneto-optical disk, an optical disk, a magnetic disk or the like is used. (F) When the still image shooting for the snapshot is instructed, the image data after the processing is completed by the image data correction circuit 4 is temporarily saved / stored in the save area 7a. By doing so, the data extraction process can be easily performed when the JPEG core circuit 5 subsequently performs a predetermined compression process.

(G) Still image data is not passed through the image data correction circuit 4. (H) M-JPEG technology is used for compression / decompression of moving image data. (I) In addition to JPEG for compression / decompression of still image data, differential YUV based on differential processing, block-based Hadamard transform, slant (Slant)
Conversion, compression / expansion technology using Haar conversion method is used. (N) Although it has been described that one of the snapshot and the moving image is displayed on the main screen, the user may be allowed to select which one is set on the main screen. The control core circuit 14 is
Which one is displayed on the main screen may be switched according to the operation of the selection button 15c or the like by the user. Further, according to the instruction of the user, the control core circuit 14 may have a mode in which the display of the snapshot is prohibited, or may be displayed only for the time when the user instructs the display.

[0052]

According to the present invention , it is possible to provide a digital camera and an image processing apparatus capable of realizing area saving and cost reduction while maintaining a smooth moving image recording operation.

[Brief description of drawings]

FIG. 1 is a block circuit diagram of an electronic still camera according to an embodiment of the present invention.

FIG. 2 illustrates a JPEG core circuit and M according to the present embodiment.
It is a block diagram which shows the outline of a PEG core circuit.

FIG. 3 is a block diagram showing an outline of an image data correction circuit in the present embodiment.

FIG. 4 is a circuit diagram showing a filter unit of an image data correction circuit according to the present embodiment.

FIG. 5 is a flowchart showing an operation of the electronic still camera according to the present embodiment.

FIG. 6 is a flowchart showing the operation of the electronic still camera according to this embodiment.

FIG. 7 is a flowchart showing the operation of the electronic still camera according to this embodiment.

FIG. 8 is a flowchart showing an operation of the electronic still camera according to the present embodiment.

FIG. 9 is a diagram showing a display screen during snapshot recording of the electronic still camera according to the present embodiment.

FIG. 10 is a diagram for explaining a usage pattern of a frame buffer in the present embodiment.

FIG. 11 is a diagram for explaining another example of usage of the frame buffer in the present embodiment.

[Explanation of symbols]

1 Electronic still camera 2 Imaging device 3 Signal processing circuit 4 Image data correction circuit 5 JPEG core circuit 6 MPEG core circuit 7 frame buffer 8 Display circuit 9 display 10 memory card 10a flash memory 11 I / O circuit 12, 13 data bus 14 Control core circuit 15a Still image recording button 15b Video recording button 15c selection button 16 DCT circuit 17 Quantization circuit 18 Huffman Coding Circuit 19 Huffman decoding circuit 20 Dequantization circuit 21 Inverse DCT circuit 22a, 22b MC circuit 23 Digital filter section 24 ROM 25 Timing control unit 26 Delay device 27 multiplier 28 adder

Front page continuation (58) Fields surveyed (Int.Cl. ⁷ , DB name) H04N 5/76-5/956 H04N ^7/ 24-7/68 H04N 101: 00 G11B 20/10-20/12

Claims (10)

(57) [Claims] 1. A digital camera capable of recording a still image corresponding to a part of a moving image while capturing the moving image, and a plurality of storage areas for sequentially storing input data.
Storage means and a storage area used cyclically.
Control means for controlling the input / output of the storage means so that it is used
And the control means, among the plurality of storage areas,
When data is saved in any storage area, the remaining memory
Enter the storage means so that the area is used cyclically.
A memory control device for controlling output , wherein the storage means sequentially stores the input moving image data in the plurality of storage areas, and the control means stores the still image in the plurality of storage areas. A digital camera characterized in that, when data is fetched at an instruction timing, the input / output of the storage means is controlled so that the moving image data is fetched in the remaining storage area excluding the storage area storing the data. Wherein the individual storage areas, claims the moving image data is characterized in that it is stored in each screen
The digital camera according to 1 . 3. When the control means fetches data at the timing of the instruction to save the still image again, the previously stored data is canceled, and the remaining storage except the storage area for storing the newly fetched data. 3. The digital camera according to claim 1, wherein the input / output of the storage unit is controlled so that the moving image data is captured in an area. 4. When the control means fetches data again at the timing of instructing to save the still image, the rest except the storage area for storing the previously stored data and the storage area for storing the newly captured data 3. The digital camera according to claim 1, wherein the input / output of the storage unit is controlled so that the moving image data is captured in the storage area. 5. A moving image coding means for coding the moving image data, and a still image coding means for coding the still image, further comprising: the control means coding by the moving image coding means. 5. The digital camera according to claim 1 , wherein the image data stored in the storage unit is sent to the still image encoding unit after completion of the encoding process. 6. An image processing apparatus comprising a memory control device for performing control for storing image data in a memory, wherein the memory is for subjecting moving image data and still image data to predetermined image processing. The memory control device has a common area for temporarily storing them, and in storing the still image data, the memory control device uses an area in which the moving image data already processed exists in the common area. On the other hand, in storing the moving image data, the image processing apparatus is characterized by sequentially using an area other than the area in which the unprocessed still image data is stored in the common area. 7. A digital camera provided with a memory control device for performing control for storing image data in a memory, wherein the memory is configured to display a moving image and a moving image when a still image is instructed during shooting of the moving image. Each of the still image data has a common area for temporarily storing them so as to be subjected to predetermined image processing, and the memory control device stores the still image data already in the common area. While the area where the processed moving image data exists is used, the area other than the area where the unprocessed still image data is stored is sequentially used when storing the moving image data. A digital camera characterized by that. 8. The memory control device, when storing a second still image data while instructing a moving image, stores the first still image data when storing the second still image data. The digital camera according to claim 7 , wherein an area other than an area in which is stored is used. 9. A control unit for selecting and finally saving one of the still image data photographed the first time and the still image data photographed the second time according to a user's instruction. The digital camera according to claim 8 , further comprising: 10. When the second still image shooting is instructed during the moving image shooting, the memory control device stores the first still image data when storing the second still image data. The digital camera according to claim 7 , wherein the area in which is stored is overwritten and used.