JP3391084B2 - Image reading device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reading device using an optical sensor or the like, and more particularly to an image reading device having an improved reading circuit for the optical sensor.

[0002]

2. Description of the Related Art Optical sensors are excellent in high speed, reliability, and economical efficiency, and various systems have been developed by combining photoelectric conversion materials and scanning circuit configurations.

FIG. 3 is a diagram showing a structure of a conventional two-dimensional discharge type optical sensor, and FIG. 4 is a timing chart of each part of the discharge type optical sensor of FIG.

In FIG. 3, a two-dimensional discharge type optical sensor has a switching transistor 3 and a photoelectric conversion element 4 (eg, a photoelectric conversion element 4) at each intersection of a gate selection line 1 and a data line 2.
Photodiodes) are arranged in a matrix form, each gate line G1, G2 is connected to the gate line selection circuit 5, and each data line 2 is connected via the switch 6 to the high potential side power supply VDD.
And the data latch circuit 7, respectively.

Here, the data line 2 is connected to the drain of the switching transistor 3 of each pixel, the photoelectric conversion element 4 is connected to the source, and the gate selection line 1 is connected to the gate.

The gate line selection circuit 5 is composed of a shift register or the like, and the gate line selection circuit 5 is
Gate signals G1 and G2 are sequentially output to each gate line 1 via a buffer (not shown), and the gate signals G1 and G2 are output.
2 sequentially turns to the high level at the timing shown in FIG. 4, thereby turning on the switching transistor 3 connected to each gate line 1 and sequentially turning on the photoelectric conversion elements 4 connected to the gate line 1. Selective drive.

The switch 6 has a precharge signal φ
P is input and the switch 6 is turned on according to the precharge signal φP shown in FIG.
The D is supplied to the data line 2 to precharge the data line 2. And this precharge signal φ
The high-potential-side power supply VDD supplied according to P is applied to the photoelectric conversion element 4 connected to the gate line 1 via the switching transistor 3 connected to the gate line 1 selected at that time. .

Further, the data latch circuit 7 has a configuration shown in FIG.
, The data latch circuit 7 latches the signal level on each data line 2 at the time when the latch pulse φL is input.

In the above configuration, first, when the precharge signal φP supplied to the switch 6 becomes H level,
All the switches 6 are closed and the data lines 2 are all precharged to H level.

Next, when the gate line G1 becomes H level by the gate line selection circuit 5, this gate line G1
All the switching transistors 3 connected to 1 are turned on.

At this time, each switching transistor 3
Assuming that the characteristics of the light conversion element 4 connected to the source are ON (that is, both terminals are short-circuited) when there is light irradiation, and OFF (that is, both terminals are open) when there is no light irradiation, Depending on the presence or absence of data, the data line 2 is in the following state. That is, the data line 2 is discharged to the L level (for example, 0V) by the switching transistor 3 and the photoelectric conversion element 4 depending on the presence or absence of light irradiation.
Alternatively, it remains either precharged to the H level. The data latch circuit 7 latches one of these signal levels by a latch pulse φL.

Further, in the timing chart of FIG. 4, the signal due to the discharge of the pixel which is irradiated with light is latched at time t1, and the signal due to the discharge of the pixel which is not irradiated with light is latched and output at time t2. There is.

Here, the potential after the precharge of the pixel which has not been irradiated with light is slightly decreased because of the reaction to light due to diffused reflection, multiple reflection, etc. and other switching transistor groups connected to the data line 2. This is due to the leakage current due to.

[0014]

However, in such a conventional discharge type sensor, when the signal of the data line is latched at the same timing, the intensity of the emitted light, the leakage current of the switching transistor 3, and the light There is a problem that the "H" and "L" levels cannot be correctly detected due to wraparound or the like.

That is, as shown in FIG. 4, since the signal due to the discharge of the pixel is latched at the timing of time t1 regardless of the intensity of the irradiation light, for example, the external light whose light amount is not constant (for example, sunlight or fluorescence). If the light is weak when a lamp is used, there is a drawback that a current does not flow so much at the timing of time t1 and it may be mistaken for the H level in some cases.

Therefore, an object of the present invention is to provide an image reading device capable of correctly detecting the level of the output signal of the optical sensor at the H level and the L level.

[0017]

The invention according to claim 1 is
To achieve the above object, a sensor array in which a plurality of first photocells are arranged and a latch circuit for latching an output signal level of the sensor array at the time when a latch pulse is input are provided, and light irradiation is performed at a predetermined timing. In an image reading device that latches and outputs the signal generated by the discharge of the pixel,
A second photocell and connected to the second photocell,
A data line supplied with the output signal of the second photocell
And a down, the formed on the sensor array on the same substrate provided with a dummy pixel portion where light Ru is irradiated, the latch pulse, the data line voltage is the second photocell
Is generated by binarizing the output signal from the dummy pixel section at a timing when a predetermined value is reached by the discharge by
Switch pulse is supplied to the latch circuit.
It

The dummy pixel sectionThe second fo
Cell and the first photocell of the sensor array
Is, for example, as described in claim 2,Photoda
Consisting of iodoIt may be one.

[0019] The dummy pixel unit, for example as described in claim 3, provided between said second photocell said data <br/> Tarain, precharging of the data line
After that, the second photocell is connected to the data line.
The switching element only contains that, photo cell of said second light irradiation
The discharge rate may be changed according to the amount of radiation .

According to another aspect of the present invention, the image reading device is arranged so that the data of the dummy pixel section is obtained.
Inverter connected to the line and having a certain threshold
The dummy pixel portion, the data line
After being precharged to a high potential, the second photocell
Charge of the data line according to the light irradiation amount
Is discharged, the voltage of the data line is
When the threshold value is reached,
The voltage of the data line is binarized and an inverted signal is generated.
Alternatively, the signal may be used as the latch pulse.

[0021]

According to the present invention, the dummy pixel portion is formed on the same substrate as the sensor array portion in which a plurality of photocells are arranged. In this state, when the pixel is detected by the sensor array, the dummy pixel portion is also irradiated with light, and the output signal from the dummy pixel portion is supplied to the latch circuit as a latch pulse.

Therefore, the threshold voltage for reading the sensor output can be automatically changed, and correct data can be read regardless of the intensity of incident light without performing complicated signal processing.

[0023]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIGS. 1 and 2 are views showing an embodiment of the image reading apparatus according to the present invention. This embodiment is an example applied to an image reading apparatus having an image sensor using a photodiode array. is there.

FIG. 1 is a circuit diagram of a drive circuit of a two-dimensional discharge type photosensor to which the image reading device of the present invention is applied.
The same components as those of the drive circuit of the two-dimensional discharge type photosensor shown in FIG. 3 are designated by the same reference numerals.

In FIG. 1, the two-dimensional discharge type photosensor is composed of a photosensor array section 10 for reading pixel data, and a dummy pixel section 20 formed on the same substrate as the photosensor array section 10. .

The optical sensor array section 10 corresponds to the optical sensor section of the conventional discharge type optical sensor shown in FIG. 3, and the switching transistor 3 and photoelectric conversion are provided at each intersection of the gate selection line 1 and the data line 2. Element 4 (eg,
Photodiodes) are arranged in a matrix form, each gate line G1, G2 is connected to the gate line selection circuit 5, and each data line 2 is connected via the switch 6 to the high potential side power supply VDD.
And the data latch circuit 7, respectively.

Here, the data line 2 is connected to the drain of the switching transistor 3 of each pixel, the photoelectric conversion element 4 is connected to the source, and the gate selection line 1 is connected to the gate.

The gate line selection circuit 5 is composed of a shift register or the like, and the gate line selection circuit 5 is
Gate signals G1 and G2 are sequentially output to each gate line 1 via a buffer (not shown), and the gate signals G1 and G2 are output.
2 sequentially turns to a high level at the timing shown in FIG. 2 to turn on the switching transistor 3 connected to each gate line 1 to sequentially turn on the photoelectric conversion elements 4 connected to the gate line 1. Selective drive.

The switch 6 has a precharge signal φ
P is input, and the switch 6 is turned on according to the precharge signal φP shown in FIG.
The D is supplied to the data line 2 to precharge the data line 2. And this precharge signal φ
The high-potential-side power supply VDD supplied according to P is applied to the photoelectric conversion element 4 connected to the gate line 1 via the switching transistor 3 connected to the gate line 1 selected at that time. .

The data latch circuit 7 is supplied with a latch pulse φL 'whose rising time and pulse width are changed by data D3 on the data line 23, which will be described later, and at each time when the latch pulse φL' is input. Latch the signal level on data line 2.

On the other hand, as shown by the broken line in FIG. 1, the dummy pixel section 20 formed on the same substrate is composed of a dummy switching transistor 21 and a photoelectric conversion element 22 (for example, a photodiode), and the drain of the switching transistor 21. Is connected to the data line 23, the source is connected to the photoelectric conversion element 22, and the gate is supplied with an inversion signal * φP (* indicates an inversion signal. The same applies hereinafter) of the precharge signal φP.

The dummy data line 23 is connected to the high potential side power source VDD through the switch 24 and also connected to the data latch circuit 7 through the inverter 25.

The precharge signal φP is input to the switch 24, and the switch 24 is turned on in accordance with the precharge signal φP shown in FIG. 2 to supply the high potential side power source VDD to the data line 23, and the data line 23. 23
To precharge. The high-potential-side power supply VDD supplied according to the precharge signal φP is connected to the gate line 1 via the switching transistor 21 driven by the inverted signal * φP of the precharge signal φP. 4 is applied.

The inverted signal * φP of the precharge signal φP applied to the gate of the switching transistor 21 is an inverted signal of the precharge signal φP which becomes L level only during the precharge period as shown in FIG.

Further, the data latch circuit 7 is inputted with a latch pulse φL 'whose rising time and pulse width are changed by the data D3 on the data line 23, and the data latch circuit 7 is inputted with the latch pulse φL'. Latches the signal level on each data line 2 at the point of time. That is, the data latch circuit 7 of the present embodiment replaces the data latch with the latch pulse φL, which has a constant timing in the conventional example, and replaces the data latch circuit with the latch pulse φL ′ according to the light irradiation by the output signal from the dummy pixel section 20. Latch.

Next, the operation of this embodiment will be described.

Operation in Photosensor Array Section 10 First, when the precharge signal φP supplied to the switch 6 becomes H level, all the switches 6 are closed and the data lines 2 are all precharged to H level.

Next, when the gate line G1 becomes H level by the gate line selection circuit 5, this gate line G1
All the switching transistors 3 connected to 1 are turned on.

At this time, each switching transistor 3
Assuming that the characteristics of the light conversion element 4 connected to the source are ON (that is, both terminals are short-circuited) when there is light irradiation, and OFF (that is, both terminals are open) when there is no light irradiation, the data line 2 is discharged to the L level (for example, 0V) by the switching transistor 3 and the photoelectric conversion element 4 depending on the presence or absence of light irradiation, or remains precharged to the H level. The data latch circuit 7 outputs a latch pulse φL 'for any of these signal levels.
Latch by.

The dummy pixel section 20 is formed on the same substrate as the optical sensor array section 10 for reading the operation pixel data in the dummy pixel section 20.
It is assumed that the dummy pixel section 20 is always illuminated with light when 0 is illuminated.

Unlike the switching transistor 3 of the photosensor array section 10, an inverted signal * φP of the precharge signal φP which is at the L level only during the precharge period is applied to the gate of the switching transistor 21 of the dummy pixel section 20.

Since the dummy pixel section 20 is also irradiated with light, the data line 23 is always discharged toward the L level regardless of the intensity of light, as shown in the timing chart of FIG. Data line 23 during this discharge period
Signal level exceeds the logic threshold voltage of the inverter 25 (for example, at times t1 and t2 in FIG. 2), the latch pulse φL 'changes to H level, and the signal from the photosensor array section 10 rises at this rise. D1 and D2 are latched by the data latch circuit 7.

Here, when the irradiation light is strong, the speed of discharging the data line 2 is high, and as shown in FIG.
Then, the logical threshold voltage of the inverter 25 is reached, and the signal from the photosensor array unit 10 is quickly latched. At this time,
Since the pixels without light irradiation are also strong light, the amount of drop in the precharge potential is larger than that when the irradiation light is weak due to leakage current due to light of the switching transistor 3 and light wraparound.

Therefore, the "H" and "L" levels can be easily detected by the data latch at a fast timing.

On the other hand, when the irradiation light is weak, the data line 2
Discharges slowly, and finally reaches the logical threshold voltage of the inverter 25 at time t2 as shown in FIG.
As a result, the signal of the pixel irradiated with light can be correctly recognized as the L level. Further, since the pixel without light irradiation has weak irradiation light, the drop of the precharge potential due to the leakage current is small, and it is possible to detect the H level even if the latch timing is delayed.

As described above, in the two-dimensional discharge type photosensor of this embodiment, the photosensor array section 10 for reading pixel data and the dummy pixel section formed on the same substrate as the photosensor array section 10 are arranged. And the dummy pixel section 20 includes a dummy switching transistor 21.
And a photoelectric conversion element 22, the data line 23 is connected to the drain of the switching transistor 21, the photoelectric conversion element 22 is connected to the source, the inverted signal * φP of the precharge signal φP is supplied to the gate, and the dummy transistor is used. The data line 23 of is connected to the high potential side power supply VDD through the switch 24, and is also connected to the data latch circuit 7 through the inverter 25.
Is configured to latch the signal level on each data line 2 at the time when the latch pulse φL 'based on the output signal of the dummy pixel section 20 is input, the sensor output read threshold voltage is automatically set. Therefore, correct data can be read out regardless of the intensity of incident light without performing complicated signal processing.

Needless to say, the circuits and matrixes of the image reading device, the number of gates, their types, etc. are not limited to those in the above-described embodiment.

[0049]

According to the invention of claims 1 to 4, a dummy pixel portion is formed on the same substrate as the sensor array, and the dummy pixel portion is irradiated with light to output an output signal from the dummy pixel portion.
Since the value is converted into a value to generate a latch pulse and supplied to the latch circuit, the threshold voltage for reading the sensor output can be automatically changed according to the intensity of the irradiation light , and complicated signal processing is possible. It is possible to read correct data regardless of the intensity of incident light without performing the above. In particular, it is possible to realize an image reading apparatus that can correctly detect the output signal level of the optical sensor at the H level and the L level, and can correctly read the binary output voltage with a small margin.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of an image reading apparatus according to the present invention.

FIG. 2 is a timing chart of the image reading apparatus of the same embodiment.

FIG. 3 is a configuration diagram of a conventional image reading device.

FIG. 4 is a timing chart of a conventional image reading device.

[Explanation of symbols]

1 Gate selection line 2,23 data lines 3,21 switching transistor 4,22 Photoelectric conversion element 5 Gate line selection circuit 6,24 switch 7 Data latch circuit 10 Optical sensor array section 20 Dummy pixel section 25 inverter

Claims (4)

(57) [Claims] 1. A sensor array in which a plurality of first photocells are arranged, and a latch circuit for latching an output signal level of the sensor array at a time point when a latch pulse is input,
In an image reading device that latches and outputs a signal due to discharge of a pixel irradiated with light at a predetermined timing, a second photocell and a second photocell connected to the second photocell,
A data line supplied with the output signal of the second photocell
And a down, the formed on the sensor array on the same substrate provided with a dummy pixel portion where light Ru is irradiated, the latch pulse, the voltage of the data line is the first
By the discharge according to the irradiation of the light by the two photocells
When the predetermined value is reached, the output signal from the dummy pixel unit is binarized and generated, and the latch pulse is generated.
An image reading device characterized by supplying to a latch circuit . 2. The first photocell and the second photocell.
2. The image reading device according to claim 1 , wherein the photocell comprises a photodiode . 3. The dummy pixel portion is provided between the second photocell and the data line,
After the precharge of the second photocell and the data line,
Look including a switching element for connecting the in, the second full
The image reading apparatus according to claim 1, wherein the photocell has a discharge rate that changes in accordance with a light irradiation amount . 4. The image reading device comprises the dummy pixels.
Connected to the data line of the
In the dummy pixel portion, the data line has a high potential.
Through the second photocell after being precharged to
The data line is discharged according to the light irradiation amount.
And the voltage of the data line is the threshold of the inverter.
When the voltage reaches the voltage, the voltage of the data line is binarized by the inverter, an inverted signal is generated, and
Image reading apparatus according to claim 1, characterized in that the signal and the latch pulse.