JP3381282B2 - Photoelectric switch - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric switch, and more particularly to a photoelectric switch characterized by processing received light signals thereof.

[0002]

2. Description of the Related Art FIG. 14 is a block diagram showing an example of a conventional photoelectric switch. In the figure, the photoelectric switch has an oscillating circuit 1 for generating a clock signal, and its output is given to a frequency dividing circuit 2. The frequency dividing circuit 2 divides this signal to generate a light emitting pulse, and its output is given to the current amplifying circuit 3. The current amplification circuit 3 is a light projecting element 4
Is a driving circuit for pulse lighting. Now, the light receiving element 5 is provided at a position facing the light projecting element 4 or at a position for receiving the reflected light from the object, and the waveform of the signal is shaped through the amplifier circuit 6 and the comparator 7. Then, the output is given to the gate circuit 8, and the light emitting pulse of the frequency dividing circuit 2 is synchronized with the light emitting pulse as a gate signal. Then, the signal processing circuit 9 integrates the output and outputs an object detection signal.

[0003]

However, since the output obtained by the light receiving element 5 is gated by the light projecting pulse as shown in FIG. 15A, the output shown in FIGS. 15B and 15C is obtained.
Impulsive noise is removed as shown in FIG. However, when burst noise such that light is continuously applied is applied to the light receiving element 5, the light receiving signal is the same as that for which a light receiving signal is continuously obtained for several periods. Therefore, FIG.
As shown in (c), there is a drawback that it malfunctions and outputs an incorrect object detection signal.

The inventions of claims 1 to 12 of the present application have been made in view of such problems of the conventional photoelectric switch, and are before and after the projection of the projection pulse and when the influence of the projection is eliminated. It is a technical subject to make it possible to accurately detect the presence or absence of an object based on the light receiving level of.

[0005]

According to the invention of claim 1 of the present application, an oscillation circuit for periodically oscillating a light emitting pulse, a light emitting element, and a drive circuit for driving the light emitting element by the light emitting pulse, A light receiving element that receives the light emitted from the light emitting element,
The first light reception output immediately before light projection by the light projection element, the second light reception output during light projection, and the third light reception output after light projection are detected, and the second and first light reception outputs of the light reception output are detected. The difference between the second and
A detection circuit for calculating and adding a difference between the third light reception outputs, a frequency dividing circuit for generating a timing for holding the light reception output based on the output of the oscillation circuit, and providing the detection circuit with the predetermined frequency of the output of the detection circuit. And a comparison means for discriminating based on a threshold value.

According to a second aspect of the present invention, an oscillation circuit that periodically oscillates a light projecting pulse, a light projecting element, a drive circuit that drives the light projecting element by the light projecting pulse, and light is emitted from the light projecting element. A light receiving element that receives the received light, a first light receiving output immediately before the light is projected by the light projecting element, a second light receiving output when the light is projected, and a third light receiving output after the light is projected, and a light receiving output Of the light receiving element, and a detection circuit for calculating and adding the difference between the second and first light receiving outputs and the difference between the second and third light receiving outputs, and comparing means for discriminating the output of the detection circuit with a predetermined threshold value. A clock detection circuit that extracts a clock signal based on a periodic output; and a timing signal generation circuit that generates a timing signal to be applied to a detection circuit based on the clock signal obtained from the clock detection circuit. To do.

[0007]

[0008]

According to the invention of claim 1 of the present application having such a characteristic, the output of the light receiving element is detected at the timing immediately before the light projection, at the time of the light projection, and at the timing after the light projection pulse is emitted. , The output is held as the first to third light receiving outputs, and the difference between the second and first light receiving outputs and the difference between the third and second light receiving outputs are calculated and added to obtain the light receiving signal level. There is.

According to the second aspect of the present invention, a periodic clock signal is extracted based on the output of the light receiving element and a timing signal is generated from this clock signal.

[0010]

[0011]

1 is a block diagram showing the overall construction of a photoelectric switch according to a first embodiment of the present invention. In this figure, the same parts as those of the conventional example described above are designated by the same reference numerals, and detailed description thereof will be omitted. In this embodiment, the output of the oscillator circuit 1 is given to the frequency dividing circuit 11. The frequency dividing circuit 11 frequency-divides the output of the oscillation circuit 1 to generate a light emitting pulse and also generates timing signals before and after the light emitting pulse. The light projection pulse is given to the current amplification circuit 3, and the light projection element 4 is driven.
And, via the position or the object detection area facing this,
The light receiving element 5 is arranged at a position for receiving the reflected light. The light receiving element 5 converts an optical signal into an electric signal, and its output is given to the amplifier circuit 6. The amplifier circuit 6 amplifies this signal and supplies it to the detection circuit 12 as an input signal Vi via the capacitor C1. A timing signal is given to the detection circuit 12 from the frequency dividing circuit 11 as will be described later, and the light reception signal is detected in synchronization with the light projection pulse. The output is given to the comparator 14 via the low pass filter (LPF) 13. Comparator 14
Is a comparing means for discriminating an input signal having a predetermined threshold value Vth or less and outputting it as an object detection signal.

Next, a detailed configuration example of the detection circuit 12 will be described. FIG. 2 is a circuit diagram showing the configuration of the detection circuit 12A according to the first embodiment. As shown in the figure, the detection circuit 12A has first to third sample-hold circuits 21, 22, 23 for holding the input signal Vi. The sample and hold circuits 21 to 23 have capacitors C2 to C4, respectively.
And switches SW1 to SW3 for connecting and disconnecting the input. The outputs of the sample and hold circuits 21 and 22 are supplied to the differential amplifier circuit 24 and the sample and hold circuit 2 respectively.
The outputs of 2 and 23 are given to the differential amplifier circuit 25. These differential amplifier circuits 24 and 25 calculate the difference between the first and the first
The second subtraction circuit, the output of which is given to the addition circuit 26. The adder circuit 26 adds these outputs, and the output is given to the fourth sample hold circuit 27. The sample hold circuit 27 is also a capacitor C
5 and a switch SW4, the output of which is given to the low-pass filter 13 described above as the output of the detection circuit 12. Timing signals of these switches SW1 to SW4 are supplied from the frequency dividing circuit 11.

FIG. 3 shows switches SW1 to SW3 of the detection circuit.
It is a figure which shows the timing of the sample hold of this. Figure 3
(A) shows a light projection pulse given from the frequency dividing circuit 11 to the current amplifying circuit 3. Assuming that light is received by the light emitting element 5 by this light emitting pulse, the light receiving signal Vi given from the amplifier circuit 6 is, for example, as shown in FIG.
It becomes what is shown in (b). Here, the holding time of the sample hold circuit is set to the timing immediately before the projection of the light projection pulse as shown in FIG. 3, and the hold point of the sample hold circuit 22 is set to the timing immediately before the end of the projection pulse. Then, these time differences are matched with the pulse width τ of the projection pulse. The hold point of the sample hold circuit 23 is set to be a point delayed by a time τ from the sample hold point of the switch SW2. Although not explicitly shown here, the switch SW4 of the sample hold circuit 27 is also the switch SW3.
Same timing as. This timing is called timing A.

Next, the operation of this embodiment will be described with reference to the time charts of FIGS. FIG. 4 is a time chart showing the waveform of each part when there is no disturbance noise. In this figure, FIG. 4A shows a light projecting pulse given from the frequency dividing circuit 11 to the current amplifying circuit 3, and the light projecting element 4 is driven by this pulse. Further, FIG. 4B shows a light reception signal Vi input to the detection circuit 12 via the amplifier circuit 6 and the capacitor C1, and a signal synchronized with the light projection pulse is obtained. As described above, the sample hold circuit 21 of the detection circuit 12 immediately before the rising edge of the light projection pulse,
The switch SW2 of the sample hold circuit 22 holds the signal immediately before the fall of the light projection pulse, respectively, and the hold signals V1 and V2 thereof are as shown in FIGS. 4 (f) and 4 (g), respectively. The switches SW3 and SW4 of the sample and hold circuits 23 and 27 are synchronized with each other, and the timing thereof is delayed from the timing of the switch SW2 by the pulse width τ of the light projection pulse. Therefore, the hold signal V3 of the sample hold circuit 23 becomes as shown in FIG. Therefore, the outputs Va (= V) of the difference circuits 24 and 25, respectively.
2-V1) and Vb (= V2-V3) are shown in FIG.
It becomes what is shown in (j). Therefore, the output V of the adder circuit 26
o is the sum of these outputs, and a high level signal is obtained. This is because the voltages V1, V2 and V3 are sampled at intervals of the period .tau. Of the light projection pulse and V2-V1 and V2-V3 are added, as shown in FIG. Becomes higher.

FIG. 5 is a diagram showing the waveform of each part when noise is superimposed on the received light signal Vi. As shown in the figure, when a low frequency signal such as a commercial AC signal is superimposed on Vi, the sample hold circuit 22 ...
By sampling the value at 24, the influence of the superimposed low frequency can be removed, and the output Vo of the detection circuit 12 has a constant value.

Next, the pulse width of the projection pulse is τ and the period is T
Then, the spectrum of the light projection pulse has a discrete spectral distribution having a spectral component for each 1 / T with a cycle of n / τ (n is a positive integer). When sampling is performed at the rising and falling points of a pulse having the same width as this pulse, the detection circuit 12 is considered to be a cascade connection of two digital comb filters as shown in FIG. 6A. The comb filter has the one-stage transmittance shown in FIG. 6B, and therefore has the two-stage transmittance shown in FIG. 6C. The transmittance is low on the low frequency side and around the integral multiple of 1 / τ. Such a detection circuit shows a frequency characteristic as shown in FIG. 6C for white noise, and is completely transparent for all frequencies of the synchronizing signal. Here, assuming that the noise is white noise when considering the S / N ratio of the signal processing circuit, the bandwidth is obtained by integration of a sine curve in a one-stage comb filter, and the bandwidth of this embodiment is obtained by integration of the square of a sine. Therefore, the bandwidth ratio is 2: π / 2, that is, 0.785 times, as compared with the one-stage comb filter shown in FIG. 6B.
Therefore, the voltage S / N ratio is improved to √ (1 / 0.785), about 1.13 times. Further, the S / N ratio with respect to the burst noise with many low frequencies and the ambient light such as fluorescent light is greatly improved.

In the above-described first embodiment, the sampling timings before and after the light projection pulse are different from each other by the time difference .tau., But as shown in FIG. 3C, the timings of the switches SW1 and SW2 are continued. The timing of SW3 may be set to τ1 by making it longer than τ. Further, as shown in FIG. 3D, the timing of each switch may be set to τ ₂ which is larger than τ. Also in this case, the same effect as in the first embodiment can be obtained.

FIG. 7 shows a second detection circuit 12B according to the present invention.
It is a figure which shows an Example. In this figure, the same parts as those in FIG. 2 are designated by the same reference numerals. In the detection circuit 12B of this embodiment, the output of the amplification circuit 6 is given to the sample hold circuits 21 to 23 via the capacitor C1. The outputs V1 and V3 of the sample hold circuits 21 and 23 are given to the adder circuit 31. The adder circuit 31 adds these inputs, and gives the addition output to the subtractor circuit 33 via the coefficient unit 32. The subtraction circuit 33 outputs the output V2 of the sample hold circuit 22 to the output (V1 + V) of the coefficient unit 32.
3) / 2 is subtracted. By doing so, the calculation result becomes 1/2 of the output of the detection circuit 12A of the first embodiment, and becomes substantially the same. This output is given to the sample hold circuit 27, and the calculation output is held at the timing when the switch SW4 is turned off.

Switches SW1 to SW4 of the detection circuit 12B
The timing may be matched with the pulse width τ of the light projection pulse as shown in FIG. 3B, and the switches SW3 and SW4 may be matched. Further, as shown in another example of timing B in FIG. 3C, the timings of the switches SW3 and SW4 are set to τ.
It may be delayed to τ ₁ . Further, as shown in another example of the timing C in FIG. 3D, each timing may be set to τ ₂ larger than τ.

Further, the detection circuit 12 according to the first and second embodiments.
In A and 12B, the timing of the switch SW3 at the end of the light projection pulse and the timing of the switch SW4 for holding the output are matched, but the timings of the switches SW3 and SW4 are made different as shown in FIG. After sampling with SW3, add or subtract output is switch SW
Alternatively, the sample and hold circuit 27 may be used to hold the sample.

FIG. 9 is a circuit diagram showing the structure of a detection circuit 12C according to the third embodiment of the present invention. In the figure, the output of the amplifier circuit 6 is supplied to the operational amplifier circuit 41 via the capacitor C1.
Connected to the inverting input terminal of. A switch SW5 is connected between the inverting input terminal and the reference voltage source Vref. When the switch SW5 is closed, its input is Vref, and when it is open, the signal of the amplifier circuit 6 is added as an input via the capacitor C1. . The operational amplifier 41 constitutes a voltage follower, the output of which is given to the fifth sample hold circuit 42 composed of the switch SW6 and the capacitor C6, and is also connected to the inverting input terminal of the operational amplifier 43 via the resistor R1. Has been done. Operational amplifier 43
The resistor R2 is connected to the output and the inverting input terminal, and the sample hold circuit 42 is connected to the non-inverting input terminal.
The operational amplifier 43 is a subtraction circuit for subtracting the inverted signal of the output of the voltage follower 41 from the output of the sample hold circuit 42, and its output is given to the sample hold circuit 44 including the switch SW7 and the capacitor C7. The sample hold circuit 44 holds the change point of its output. Here, the detection circuit 12C has switches SW5 to S5 at different timings from those shown in FIG.
It is assumed that the switch signal for opening and closing W7 is given from the frequency dividing circuit 11A.

The operation of the detection circuit 12C shown in FIG. 9 will be described with reference to FIG. FIG. 10A shows a light projection pulse output from the frequency dividing circuit 11. Frequency divider circuit 11A
10B, the light is turned off in synchronization with the rising time t ₁ of the light emitting pulse as shown in FIG. 10B, and is turned on after the end of the light emitting pulse and after the lapse of the same time as the light emitting pulse (t ₃ ). The switch signal SW5 is obtained. The switches SW6 and SW7 have timing signals that are turned off and on at the falling time t ₂ of the light projection pulse and turned on or off at time t ₃ after the elapse of the same time width as the light projection pulse. . Well, Figure 10
Assuming that an input signal Vi as shown in (e) is applied, that signal is applied to the operational amplifier 41 constituting the voltage follower only when the switch SW5 is off, and its output V4 is shown in FIG. 10 (f). It will be as shown in. By sampling and holding this signal at the timing of the switch SW5, the output V5 shown in FIG. 10 (g) is obtained at the non-inverting input terminal of the operational amplifier 43. By adding this output and the inverted output of the output V4 of the voltage follower 41, the operational amplifier 43 of FIG.
The output V6 shown in (h) is obtained. This signal is shown in FIG.
By sampling and holding with the switch SW7 shown in (b), the output Vo shown in FIG. 10 (i) is obtained from the detection circuit 12C.

FIG. 11 is a block diagram showing the overall structure of a photoelectric switch according to the second embodiment of the present invention. In this figure, the same parts as those in the first embodiment described above are designated by the same reference numerals, and detailed description thereof will be omitted. In the present embodiment, the output of the amplifier circuit 6 is given to the detection circuit 12 via the capacitor C1. The detection circuit 12 is the above-mentioned detection circuit 12A, 12B, 12C.
The output of the comparator 51 is given to the comparator 51. The comparator 51 compares the threshold value Vth with the detection output, and the output is given to the gate circuit 52. The gate circuit 52 synchronizes the output of the comparator 51 based on the divided output.
The output of the gate circuit 52 is given to the shift register 53. The shift register 53 sequentially shifts the gate signal in synchronization with the light projection pulse, and its parallel output is given to the AND circuit 54. The AND circuit 54 outputs an object detection signal based on the coincidence of the parallel outputs. In this way, a transmissive or reflective photoelectric switch can be constructed using the above-mentioned detection circuit.

FIG. 12 is a block diagram showing the overall structure of a photoelectric switch according to the third embodiment of the present invention. In this embodiment, the CPU 55 is used to realize the main operation of the photoelectric switch by software. C in this figure
The PU 55 achieves the function of the light projection pulse generation means 55a that generates a periodic light projection pulse, and its output is given to the current amplification circuit 3. The current amplifier circuit 3 drives the light projecting element 4 as in the above-described embodiments. When a light receiving signal is obtained by the light receiving element 5, its output is the amplification circuit 6
Is amplified by and is given to the A / D converter 56 via the capacitor C1. The A / D converter 56 converts the received light signal into a digital signal in a short cycle in synchronization with the clock of the CPU 55. The output of the A / D converter 56 is C
Given to PU55. The CPU 55 also receives light level detecting means 55 for detecting the light level of the A / D converter 56.
b, the function of the synchronous detection means 55c to which the output is given is achieved. The light-reception level detecting means 55b detects the voltage levels V1 to V3 based on the timing immediately before, during, and after the light-emission signal converted into a digital signal as in the above-described embodiments. Is. Further, the synchronous detection means 55c performs an operation for adding the differences between V1 and V2 and V3 and V2, and outputs an object detection signal. That is, each processing of the above-described first embodiment is realized in the microprocessor, and the detailed operation thereof is also as described above. Needless to say, in this operation, the sampling timing may be changed as shown in FIG. 4 or the order of addition and subtraction may be changed.

Next, FIG. 13 is a block diagram showing the overall structure of a photoelectric switch according to a fourth embodiment of the present invention. This embodiment relates to a transmissive photoelectric switch, and other configurations are the same as those in the first embodiment. In this embodiment, since the light transmitter and the light receiver are separated from each other, the timing signal cannot be obtained from the output of the oscillation circuit or its frequency dividing circuit. Therefore, from the output of the amplifier circuit 6 to the clock detection circuit 6
The sync signal is detected by 1. The clock detection circuit 61 is configured by a so-called PLL circuit, and detects the cycle of light reception output to generate a clock signal. This signal is given to the timing signal generation circuit 62. The timing signal generation circuit 62 generates a timing signal immediately before light projection, at the time of light projection, and at a predetermined time after light projection, corresponding to the light projection clock, as in the first embodiment described above. The configuration of the detection circuit 12 is shown in FIG.
7A and the detection circuit 12 shown in FIGS. 7 and 9.
Any detection circuit such as B or 12C may be used. The output of the detection circuit 12 is given to the comparator 14 via the low-pass filter 13 as in the above-described embodiment. By so doing, the present invention can be applied to a transmission type photoelectric switch in which the light projecting section and the light receiving section are not contained in the same housing but are separated.

[0026]

As described above in detail, according to the present invention, there is no malfunction with respect to bursty noise or low frequency noise that continues for a long time, and there is no malfunction with respect to spike noise and stable. It is possible to perform the operation.
In this way, there is no malfunction even with respect to burst noise, continuous noise, and ambient light, and only the object can be detected.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of a photoelectric switch according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of an embodiment of a detection circuit of the present invention.

FIG. 3 is a time chart showing the operation of the detection circuit of this embodiment.

FIG. 4 is a time chart showing the operation of the first embodiment when noise is not superimposed.

FIG. 5 is a time chart showing an operation when low frequency noise of the first embodiment is superimposed.

FIG. 6A is a graph showing an equivalent comb filter configuration of the detection circuit of the first embodiment, and FIGS. 6B and 6C are graphs showing transmittances of the one-stage and two-stage comb filters.

FIG. 7 is a circuit diagram showing a circuit configuration of a second embodiment of the detection circuit of the present invention.

FIG. 8 is a time chart showing another timing example of the switches SW1 to SW4 of the present invention.

FIG. 9 is a circuit diagram showing a configuration of a third embodiment of the detection circuit according to the present invention.

FIG. 10 is a time chart showing the operation of the third embodiment of the detection circuit according to the present invention.

FIG. 11 is a block diagram showing an overall configuration of a photoelectric switch according to a second embodiment of the present invention.

FIG. 12 is a block diagram showing an overall configuration of a photoelectric switch according to a third embodiment of the present invention.

FIG. 13 is a block diagram showing an overall configuration of a photoelectric switch according to a fourth embodiment of the present invention.

FIG. 14 is a block diagram showing an example of a conventional photoelectric switch.

FIG. 15 is a time chart showing the operation of a conventional photoelectric switch.

[Explanation of symbols]

1 oscillator circuit 3 current amplification circuit 4 Projection element 5 Light receiving element 6 amplification circuit 11 frequency divider 12, 12A, 12B, 12C Detection circuit 21-23, 27, 42, 44 Sample and hold circuit 13 Low-pass filter 14,51 comparator 24, 25, 34 subtraction circuit 26,31 adder circuit 32 coefficient unit 41,42 Operational amplifier 52 gate circuit 53 shift register 54 AND Circuit 55 CPU 55a Projection pulse generation means 55b Receiving level detecting means 55c Synchronous detection means 56 A / D converter 61 Clock detection circuit 62 Timing signal generation circuit

Continuation of front page (56) Reference JP-A-63-258113 (JP, A) JP-A-3-229511 (JP, A) JP-B-61-25161 (JP, B1) (58) Fields investigated (Int .Cl. ⁷ , DB name) H03K 17/78

Claims (4)

(57) [Claims] 1. An oscillation circuit that periodically oscillates a light projecting pulse, a light projecting element, a drive circuit that drives the light projecting element by the light projecting pulse, and receives light emitted from the light projecting element. A light receiving element, a first light receiving output immediately before light projection by the light projecting element, a second light receiving output during light projection, and a third light receiving output after light projection, and a second light receiving output. A detection circuit for calculating and adding the difference between the first received light output and the difference between the second and third received light outputs, and a timing for holding the received light output based on the output of the oscillation circuit, A photoelectric switch, comprising: a frequency dividing circuit provided to the circuit and a comparing unit that discriminates an output of the detection circuit by a predetermined threshold value. 2. An oscillation circuit that periodically oscillates a light projecting pulse, a light projecting element, a drive circuit that drives the light projecting element by the light projecting pulse, and receives light emitted from the light projecting element. A light receiving element, a first light receiving output immediately before light projection by the light projecting element, a second light receiving output during light projection, and a third light receiving output after light projection, and a second light receiving output. , A detection circuit for calculating and adding a difference between the first received light output and a difference between the second and third received light outputs, a comparison means for discriminating the output of the detection circuit with a predetermined threshold, and a cycle of the light receiving element A clock detection circuit that extracts a clock signal based on a dynamic output, and a timing signal generation circuit that generates a timing signal to be applied to the detection circuit based on the clock signal obtained from the clock detection circuit. Photoelectric photoelectric switch Ji. 3. The detection circuit includes a first sample and hold circuit that holds a light reception output at a timing immediately before the light reception, a second sample and hold circuit that holds the light reception output at a timing at the time of light reception, and the light reception. A third sample and hold circuit for holding the output at a timing after receiving light, a first subtractor circuit for subtracting the output of the first sample and hold circuit from the output of the second sample and hold circuit, and the second sample A second subtraction circuit that subtracts the output of the third sample hold circuit from the output of the hold circuit, and an adder circuit that adds the outputs of the first and second subtraction circuits. Item 1. The photoelectric switch according to Item 1 or 2. 4. The detection circuit includes a first sample and hold circuit that holds a light reception output at a timing immediately before the light reception, a second sample and hold circuit that holds the light reception output at a timing at the time of light reception, and the light reception. A third sample and hold circuit for holding the output at a timing after receiving light, an adder circuit for adding the outputs of the first and third sample and hold circuits, and a coefficient unit for halving the output of the adder circuit 3. The photoelectric switch according to claim 1, further comprising: a subtraction circuit that subtracts an output of the coefficient unit from an output of the second sample hold circuit.