JP3379575B2 - Cu wiring forming method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inexpensive and highly reliable C used for a semiconductor integrated circuit by an electrolytic plating method.
The present invention relates to a Cu wiring forming method for easily obtaining a u wiring.

[0002]

2. Description of the Related Art In recent years, in order to cope with the speeding up of semiconductor devices, studies have been carried out using Cu, which is a low resistance material, as a wiring material and an organic film having a low dielectric constant (dielectric constant of 3 or less) as an interlayer insulating film. ing. Conventionally, when forming Cu wiring, CVD
Method, sputtering method, electrolytic plating method and the like are used to bury Cu in a previously formed wiring groove, and then chemical polishing (CMP) is used to polish the entire surface of the wafer to form the wiring. .

However, in the case of this CMP method,
When a soft material such as an organic film is used as the underlayer of Cu, there is a problem that CMP treatment is difficult and film peeling or polishing residue occurs, which makes wiring formation difficult.

Further, in the Cu wiring forming method by the dry etching method, since the vapor pressure of the reaction product of Cu is very low, the stage temperature of the processing chamber in the dry etching apparatus must be raised to 200 ° C. or higher. There is a drawback that the reaction product is hard to volatilize, and there is a problem that the cost of the dry etching apparatus becomes very high.

When etching of Cu is carried out under the condition that the stage temperature is as high as about 200 ° C. by using a mixed gas plasma of chlorine and argon, it reacts with moisture when exposed to the atmosphere to cause corrosion. There was a drawback that it occurred.

Further, after the Cu wiring is formed, a through hole is formed through the interlayer film on the Cu wiring to connect with the Cu wiring.
Cu was directly exposed, and corrosion due to oxidation progressed, causing film peeling, which was a cause of open defects in wiring.

Japanese Unexamined Patent Publication (Kokai) No. 63-164241 discloses a method of manufacturing a semiconductor device by electrolytic plating, and Japanese Unexamined Patent Publication No. 4-290249 discloses a method of manufacturing a semiconductor device having multilayer wiring. The publication describes a method of manufacturing a semiconductor device in which a process for forming a protruding electrode portion of a MOS flip chip IC or the like is improved. However, the Cu surface is covered with a specific coating layer, and the dry etching gas or the resist ashing gas is used. There is no specific description about a Cu wiring forming method that can obtain a Cu wiring free from corrosion such as oxidation.

Further, JP-A-2-91333 discloses a method for electrolytic plating of bump electrodes for semiconductor devices, and JP-A-4-27.
Japanese Patent No. 8543 discloses a semiconductor device in which a Cu wiring is provided with an anti-oxidation gold plating layer and a method for manufacturing the same. However, the Cu surface is covered with a specific coating layer and is oxidized by a dry etching gas or a resist ashing gas. There is no specific description about a Cu wiring forming method that can obtain a Cu wiring without corrosion.

[0009]

SUMMARY OF THE INVENTION The present invention has been made in view of the above, and an object thereof is to easily obtain a very inexpensive and highly reliable Cu wiring without the above-mentioned problems. An object of the present invention is to provide an excellent Cu wiring forming method that can be performed.

[0010]

The above-mentioned problems and objects can be solved and achieved by the present invention described below. That is, the present invention provides a method for forming a Cu wiring by an electrolytic plating method, in which a coating layer is formed on the Cu plating power supply layer and Cu before the step of removing the plating power supply layer by the etch back method using Cu corrosive gas. forming a look-containing step, of removing at the same time using an etch-back method the coating layer and the plating power feeding layer, the Cu wiring antioxidant layer is formed on the upper surface
A Cu wiring forming method characterized by the above is disclosed.

The Cu wiring forming method of the present invention is characterized in that the coating layer is a silicon nitride film (SiN) which is an insulating film, tungsten (W) which is a conductive film, and titanium nitride (TiN). Or the step of forming the coating layer is a CVD method or a sputtering method.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION The embodiments of the present invention will be specifically described below, but the present invention is not limited thereto.

The present invention relates to a highly reliable Cu wiring forming process capable of forming a copper (Cu) wiring used in a semiconductor integrated circuit by an electrolytic plating method without corrosion such as oxidation. Before the step of removing the plating power supply layer by the etch back method using
And a silicon nitride film of an insulating film as a coating layer on Cu
(SiN), conductive film tungsten (W), titanium nitride (Ti)
Forming a N) or the like by a CVD method or a sputtering method, the coating layer and the plating power feeding layer using an etch-back method, provided the step of removing at the same time, the Cu wiring, the upper surface
It is characterized in that an antioxidant layer is formed on .

This can solve the problem of wiring formation by the dry etching method of Cu, which originally has a low vapor pressure of the reaction product of Cu and easily causes corrosion. Further, when a soft organic film is used for the interlayer film, it is possible to solve the problem of the wiring forming method by the chemical polishing method (CMP method), which is difficult.

Further, since Cu is not exposed directly during the resist stripping process by the oxygen plasma treatment at the time of forming a through hole penetrating the interlayer film on the Cu wiring in order to connect with the Cu wiring, corrosion due to oxidation is caused. Can be prevented.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the embodiments based on the drawings, but the present invention is not limited thereto.

FIG. 1 is a schematic explanatory view showing an outline of a Cu wiring forming method in an embodiment of the present invention. First, Fig. 1
As shown in (a), aluminum copper (Al9
A low dielectric constant organic film 2 is formed as an interlayer film on the (9.5% -Cu 0.5% ) electrode 1 by a spin coating method. Then, after a part of the organic film 2 is opened by a dry etching method using oxygen gas or the like, 300 (Å) of Ta (tantalum) and Cu (copper) are formed on the entire surface as a plating power supply layer 3.
500 Å are formed by a continuous sputtering method.

Next, the resist 4 is used to form wiring patterning by photolithography. Subsequently, as shown in FIG. 1B, the Cu wiring 5 is formed to 10000 Å by an electrolytic plating method, and Ni (nickel), Au () is used by an electrolytic plating method so that the upper surface of the Cu wiring 5 is not oxidized. The gold layer 6 is formed by electrolytic plating.

Next, the resist 4 is removed by wet processing (see FIG. 1C). Then, as shown in FIG. 1D, a coating layer 7 is formed on the plating power supply layer 3 and the Cu wiring 5.
As an insulating film, a silicon nitride film (SiN), a conductive film of tungsten (W), titanium nitride (TiN), or the like is formed on the entire surface by a CVD method or a sputtering method.

Then, as shown in FIG. 1 (e), the coating layer 7 and the plating power supply layer 3 are removed by an etch back method. The dry etching gas used at this time was chlorine (Cl).
₂ ) By using a mixed gas of Argon (Ar), it becomes possible to physically and chemically remove it.

In this way, Cu wiring is formed.
Here, as the organic film 2, a low dielectric constant film such as BCB (benzocyclobutene) is used. The material used for the plating power supply layer 3 is not limited to Ta and Cu. The coating layer 7 may be any insulating film or conductor, but is not limited to Si of the insulating film.
N, W of the conductive film, and TiN are preferably used. The etching gas for etching back the coating layer 7 and the plating power supply layer 3 is not limited to Cl2 and Ar.

Further, according to the present invention, as shown in FIG.
After forming the interlayer insulating film 8 on the Cu wiring 5, when the through hole 10 penetrating the interlayer insulating film 8 is formed, the Cu wiring 5 serves as an etching gas or a resist ashing gas such as O ₂ gas when the through hole 10 is formed. Since it is not directly exposed, corrosion of the Cu wiring can be prevented, and a highly reliable Cu wiring is realized.

[0023]

According to the present invention, the Cu surface is covered with a coating layer so as not to be corroded, and there is no corrosion such as oxidation by a dry etching gas or a resist ashing gas, which is very inexpensive, easy, and reliable. Provided is an excellent Cu wiring forming method capable of obtaining a high Cu wiring.

[Brief description of drawings]

FIG. 1 is a schematic explanatory view showing an outline of a Cu wiring forming method of the present invention.

FIG. 2 is a schematic diagram showing an example of a conventional Cu wiring forming method.

[Explanation of symbols]

1 Aluminum copper electrode 2 Organic film 3 Plating power supply layer 4 resist 5 Cu wiring 6 Au layer 7 coating layer 8 Interlayer insulation film 9 Si integrated circuit 10 through holes

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ identification code FI H01L 21/3065 H01L 21/302 L 21/3213 21/88 D (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 21/768 H01L 21/28 H01L 21/283 H01L 21/285 301 H01L 21/288 H01L 21/3205 H01L 21/321 H01L 21/3065 H01L 21/3213

Claims (10)

(57) [Claims] 1. A method of forming a Cu wiring by an electrolytic plating method, wherein a coating layer is formed on the plating power supply layer and Cu before the step of removing the plating power supply layer by the etch back method using Cu corrosive gas. forming a look-containing step, of removing the coating layer and the plating power feeding layer the etch-back method simultaneously using the Cu wiring is characterized in that oxidation layer is formed on the upper surface Cu wiring forming method. 2. The coating layer is a silicon nitride film of an insulating film.
(SiN), conductive film tungsten (W), titanium nitride (Ti)
2. The Cu wiring forming method according to claim 1, wherein the Cu wiring is any one of N). 3. The Cu wiring forming method according to claim 1, wherein the step of forming the coating layer is a CVD method or a sputtering method. 4. A method for forming a Cu wiring by an electrolytic plating method, a step of providing a plating power feeding layer on the surface of an interlayer film, a step of forming a Cu wiring on the plating power feeding layer by an electrolytic plating method, and the Cu wiring. A step of forming an anti-oxidation layer on top, a step of forming a coating layer on the Cu power supply layer and the Cu wiring having the anti-oxidation layer on the upper surface, and an etchback method for the coating layer and the plating power supply layer. A method of forming Cu wiring, comprising the steps of: 5. A through hole is formed in the interlayer film, and in the step of providing a plating power supply layer on the surface of the interlayer film,
The Cu wiring forming method according to claim 4, wherein a plating power feeding layer is also provided on the inner wall of the through hole. 6. The Cu wiring forming method according to claim 4, wherein the etch-back method uses a Cu corrosive gas. 7. The method according to claim 4, further comprising: a step of forming an interlayer insulating film on the Cu wiring, and a step of forming a through hole communicating with the Cu wiring in the interlayer insulating film. Cu wiring formation method. 8. The Cu wiring forming method according to claim 7, wherein the step of forming a through hole communicating with the Cu wiring in the interlayer insulating film is a dry etching method using a Cu corrosive gas. 9. The Cu corrosive gas used in the step of forming a through hole communicating with the Cu wiring in the interlayer insulating film is an organic film, and the Cu corrosive gas is O ₂ gas.
The method for forming Cu wiring as described in. 10. The Cu corrosive gas used in the step of simultaneously removing the coating layer and the plating power supply layer using an etch back method is a mixed gas of Cl ₂ and Ar.
9. The Cu wiring forming method according to any one of 9 above.