JP3366354B2 - TFT active matrix liquid crystal display device and driving method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving method of a TFT active matrix liquid crystal display device.

[0002]

2. Description of the Related Art Liquid crystal display devices are widely applied as a representative of flat panel displays. In particular, a TFT active matrix system in which a TFT is provided as a switching element in each pixel and each pixel is controlled independently enables high-quality and large-capacity display.

FIG. 4 shows a block diagram of a TFT active matrix liquid crystal display device. The matrix portion 26 includes the TFTs 2 connected to the plurality of data lines 24 and the plurality of scanning lines 25.
2 and a pixel 23 connected to the TFT are arranged. A data signal is supplied from the data line driver circuit 27 to the data line 24, and a scanning signal is supplied from the scanning line driver circuit 28 to the scanning line 25. A control circuit 29 for processing a clock and display information is connected to the data line driver circuit 27 and the scanning line driver circuit 28.

FIG. 3 shows a conventional driving method. In order to prevent liquid crystal deterioration, burn-in, and flicker, it is necessary for the liquid crystal display device to give a signal to the liquid crystal that is positive and negative polar symmetry and that has no DC component. Are known. FIG. 3 shows an example of frame inversion as indicated by the polarity 20. (A) is a drive waveform, and scanning signals φn and φn + 1 supplied to the nth and n + 1th scanning lines are shown at 31 and 32, respectively. TF
In the T active matrix liquid crystal display device, the scanning line is TF
It is connected to the gate electrode of T and the scanning signals are 31, 3
It becomes a time division selection signal such as 2. The data signal ψm corresponding to the display content on the m-th data line is 33. That is, the data amplitude ΔD of the constant value 35 is applied in both the positive and negative frames indicated by the polarity 20.

(B) and (c) show voltage waveforms applied to the pixel in the ON state and the OFF state. In the TFT, a finite capacitance exists between the pixel electrode and the scanning line, and the voltage written in the selection period is immediately followed by the scanning line potential changing from the selection potential to the non-selection potential. It varies with the amplitude of the drop ΔV. Scan signal waveform 31,3
Since 2 does not depend on the polarity 20 of the frame, the direction of the 36, 39 capacitive coupling voltage drop ΔV is the same regardless of the polarity of the voltage applied to the pixel, and changes in the negative direction in the example of FIG. As described above, since the liquid crystal dislikes the direct current component, the 34 counter signal α given to the counter electrode is generally a signal deviated from the data signal of both positive and negative polarities to ensure symmetry. That is, in FIG. 3, the method of 42> 43 is used.

The magnitude of the capacitive coupling voltage drop ΔV is given by ΔV = VPP × CPR / (CPR + CPX) with respect to the pixel capacitance CPX, the scanning line pixel capacitance CPR, and the scanning signal amplitude VPP.
Here, the pixel capacitance CPX is the sum of the liquid crystal capacitance of the pixel and the additional capacitance. Since the liquid crystal capacitance has a voltage dependency, the pixel capacitance also has a voltage dependency. Generally, the larger the applied voltage, the larger the pixel capacitance. That is, the pixel capacitance CPXON in the ON state is O
In the FF state, it is not larger than the pixel capacity CPXOFF and is not the same.
Therefore, as a result of the previous equation, 36 capacitive coupling voltage drop ΔV1 in ON state becomes VPP × CPR / (CPR + CPXON) and OFF
39 Capacitive coupling voltage drop ΔV2 VPP × CPR
Less than / (CPR + CPXOFF). As a result, if the counter signal 34 is set to 37 = 38 in the ON state (b) so that no DC component is applied to the pixel, 41> 40 in the OFF state (c), and a large DC voltage is applied as shown in the figure. Will end up. That is, when writing the ON state, if the data signal potential in the positive write period is V (ON +) and the data signal potential in the negative write period is V (ON-), the ON potential after the capacitive coupling voltage drop is V (ON +)
-ΔV1 and OFF potential become V (ON-)-ΔV1 and the opposing signal is the average value α1 = {V (ON +) + V
If (ON-)} / 2-ΔV1, it is possible to apply a symmetrical voltage having no DC component to the pixel. However, when writing the OFF state, assuming that the data signal potential in the positive polarity writing period is V (OFF +) and the data signal potential in the negative polarity writing period is V (OFF-), the ON potential after the capacitive coupling voltage drop is V. (OFF +) − ΔV2, the OFF potential becomes V (OFF −) − ΔV2, and in order to apply a symmetrical voltage having no DC component to the pixel, the counter signal is the average value of α2 = {V (OFF +) + V (OFF− )} / 2-ΔV
Must be 2. Data amplitude ΔD = V (ON +)
Considering −V (OFF +) = V (OFF −) − V (OFF +), the DC voltage component of α2−α1 = ΔV1−ΔV2 is applied to the pixel in the OFF state. If the opposite signal is optimized so that the DC component is not applied in the OFF state, the DC component is applied in the ON state on the contrary. In gradation display, a voltage between the ON signal and the OFF signal or a signal having a pulse width is applied. It is possible to adjust the opposite signal so that a symmetrical voltage is applied to only one specific gray scale and no direct current component is present, but it is inevitable that the other gray scale has a direct current component.

A conventional measure has been to reduce the voltage drop ΔV by lowering the relative coupling capacitance value by adding an additional capacitance to the pixel. Since recent liquid crystals have somehow allowed for image sticking and deterioration for DC components within about 0.3V,
It is general to design the additional capacitance so that the largest DC component in the entire gradation range is within the allowable value. However, when the additional capacitance is added two-dimensionally, the aperture ratio is impaired, and when three-dimensionally added due to the multilayer structure, the process becomes complicated and there are many problems. Further, even if an additional capacitor is provided, a DC component of about 0.3 V cannot be avoided, and subtle image sticking or deterioration is still a problem.
Further, although the above has been described only by the effect of capacitive coupling, if the writing characteristics of the TFT are not sufficient, the conventional driving method is more likely to apply direct current, which cannot be solved by the additional capacitance.

[0008]

When an asymmetric voltage is applied to the liquid crystal, flicker, image sticking, deterioration of the liquid crystal, etc. occur. However, in the conventional driving method, the capacitance between the pixel and the scanning line or the insufficient driving capability of the TFT causes the ON state and the OF
It is impossible to apply the symmetrical voltage to all the pixels in the F state or the intermediate gradation state. Further, although it is possible to reduce the direct current application by forming the additional capacitance, this does not solve the problem. Furthermore, the installation of the additional capacitance causes a problem that the process is complicated and the aperture ratio is impaired.

An object of the present invention is to reduce the direct current application due to capacitive coupling without complicating the process or impairing the aperture ratio and the like. Further, it is intended to improve direct current application due to insufficient writing characteristics of the TFT.

[0010]

In order to achieve the above object, in the driving method of the TFT active matrix liquid crystal display device of the present invention, the data signal supplied to the data line writes a positive voltage to the pixel. It is characterized in that the amplitude of the period and the amplitude of the period in which a negative voltage is written to the pixel are different.

That is, the present invention for solving the above problems
The first means of clarity is to use multiple data lines and multiple gate lines.
The TFT connected to the data line and the scanning line and the TFT
TFT active matrix liquid with connected pixels
Data supplied to the data line in the crystal display device
The signal is changed during the period in which the voltage of the first polarity is written to the pixel.
The width and the second polarity of the pixel, which is opposite to the first polarity.
Since the amplitude of the voltage writing period is different,
The first amplitude and the image in the period for writing the voltage of the first polarity
Of the second amplitude during the period of writing the voltage of the second polarity to the element
Difference is scan signal amplitude VPP, scan line pixel capacitance CPR, pixel capacitance
VPP x CPR {1 / (CPR + CPXON) -1 / for quantity CPX
(CPR + CPXOFF)}
It

A second aspect of the present invention for solving the above problems
The means includes a plurality of data lines, a plurality of gate lines, and the data lines.
And a TFT connected to the scanning line and connected to the TFT
TFT active matrix liquid crystal display device having pixels
The data signal supplied to the data line is
Amplitude during writing of voltage of first polarity to pixel and the pixel
Write the voltage of the second polarity which is the opposite polarity to the first polarity to
The amplitude of the plug-in period is different, and the TFT is
The voltage of the data signal to be generated and the pixel electrode from the TFT
The write potential applied to
The amplitude of the period during which the voltage of the first polarity is written to the pixel
Is the amplitude during the period of writing the voltage of the second polarity to the pixel.
The feature is that it is set to a larger value .

[0013]

[0014]

[0015]

[0016]

[0017]

[0018]

[0019]

[0020]

[0021]

[0022]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 shows an embodiment of the driving method of the present invention. Similar to FIG. 3, this is an example of frame inversion as indicated by the polarity 20. (A) is a drive waveform, which is the n-th,
1, 2 scan signals φ supplied to the (n + 1) th scan line
n and φn + 1 are time-division selection signals similar to 31 and 32 in FIG. 3 on the m-th data line according to the display contents
Data signal ψm is applied. (B) and (c) are voltage waveforms applied to the pixel in the ON state and the OFF state. Capacitive coupling voltage drops ΔV1 and ΔV2 are 9,1
2 and ΔV1 = VPP × CPR / (CPR + C
PXON), ΔV2 = VPP × CPR / (CPR + CPXOFF). The counter signal α of 4 given to the counter electrode is a signal deviated to 7 or 8 from the median value of the positive and negative polarities of the data signal. The feature of the present invention resides in that the data amplitude is set to a different value depending on the positive polarity write and the negative polarity write.
That is, in the positive polarity frame, the first data amplitude ΔD of 5
1, the second data amplitude ΔD2 of 6 in the negative polarity frame
And different amplitudes are given respectively.

The conditions for suppressing the direct current application due to the pixel capacitance are set as follows. If the ideal value α1 in the ON state and the ideal value α2 in the OFF state of the counter signal potential α match, it is possible to suppress the DC application by setting the counter signal to the matched value. When the first data amplitude ΔD1 of the positive polarity frame and the second data amplitude ΔD2 of the negative polarity frame are different from each other as in the present embodiment, α2-
α1 is given by ΔD2-ΔD1 + ΔV1-ΔV2.
Therefore, if the condition of (ΔD1−ΔD2) = (ΔV1−ΔV2) is satisfied, the direct current application can be suppressed. In this relationship, ΔD1−ΔD2 is approximately VPP × CPR {1 / with respect to the scanning signal amplitude VPP, the scanning line pixel capacitance CPR, and the pixel capacitance CPX.
(CPR + CPXON) -1 / (CPR + CPXOFF)} is satisfied. Under this condition, the positive voltage 10 and the negative voltage 11 are equal in the ON state of FIG.
In the OFF state, the positive voltage 13 and the negative voltage 14 are equal, and it is possible to apply a symmetrical voltage having no DC component to the pixel in both.

FIG. 2 shows another embodiment of the driving method of the present invention. This embodiment is different from FIG. 1 in that it is an example of inversion for every row as indicated by the polarity 21. (A) is a drive waveform, and the 1 and 2 scanning signals φn and φn + 1 supplied to the nth and n + 1th scanning lines are time division selection signals similar to 31 and 32 in FIG. Fifteen data signals ψm corresponding to the display contents are applied to the m-th data line, but the polarity is inverted corresponding to the polarity of 21 unlike the previous embodiment.
(B) and (c) are voltage waveforms applied to the pixel in the ON state and the OFF state. Capacitive coupling voltage drops ΔV1 and ΔV2 of 9 and 12 and a counter signal α of 4 given to the counter electrode
The values 7 and 8 for the median value of the positive and negative polarities of the data signal are the same as in the previous embodiment.

In this embodiment as well, the data amplitude is set to a different value depending on the positive polarity write and the negative polarity write, as in the previous example. That is, with the polarity of 21, the first data amplitude ΔD1 of 5 is given at the positive polarity timing, and the second data amplitude ΔD2 of 6 is given at the negative polarity timing. That is, (ΔD1−ΔD2) = (ΔV1−ΔV2) = VPP in order to suppress direct current application due to changes in pixel capacitance.
× CPR {1 / (CPR + CPXON) -1 / (CPR + CPXOFF
)} Amplitude difference is given. As a result, the positive voltage 10 and the negative voltage 11 are equal in the ON state of FIG. 2B, and the positive voltage 13 and the negative voltage 14 are equal in the OFF state of FIG. 2C, both of which are symmetrical with no DC component. A voltage is applied to the pixel.

Although the effect of suppressing the direct current application due to the pixel capacitance has been described above, the present invention also has the effect of suppressing the direct current application due to insufficient writing characteristics of the TFT. In the TFT, the current is controlled by the voltage which is the difference between the gate potential and the source or drain potential. When the driving capability is sufficient, if a voltage higher than a certain level is applied, the switch is turned on, and the data signal potential is written as it is to the pixel electrode. However, when the driving capability is insufficient, the writing characteristics depend on the difference between the scanning signal potential (gate potential) and the source or drain voltage (data signal potential), and the potential written to the pixel electrode and the data signal voltage are slightly different. Differences occur. In FIG. 1A, the TFT is an n-channel element and the scanning signals φ n and φ applied to the scanning electrode which is the gate electrode.
A positive potential is applied to n + 1 in the selected section. In such a case, comparing the difference between the scanning signal potential (gate potential) and the source or drain voltage (data signal potential) in the positive writing state and the negative writing state, the positive writing state is more negative. The difference is small compared to the written state. Therefore, in the negative writing state, the TFT has a large writing ability and is sufficiently turned on, and the potential written in the pixel electrode substantially matches the data signal potential. However, in the positive writing state, the writing ability is insufficient and the potential written in the pixel electrode becomes a value slightly smaller than the data signal potential. The present invention can also compensate for such a phenomenon. In such a case, the first data amplitude ΔD1 of the positive polarity timing is set to the second data amplitude ΔD2 of the negative polarity timing.
It can be compensated by setting it to be slightly larger.

FIG. 5 shows drive waveforms of another embodiment of the drive method of the present invention. This embodiment is similar to the embodiment of FIG.
The counter signal α of 54 is an example of inversion for each row as shown in FIG.
Is different. Unlike the embodiment shown in FIGS. 1 and 2, the opposed signal α does not have a constant value but fluctuates corresponding to the polarity 21 like 54. As a result, the central value 55 of the data signal becomes constant and m
In the 53 data signal applied to the th data line, ψm has its polarity inverted corresponding to the 21 polarity with this value as the center. The 1 and 2 scanning signals φn and φn + 1 supplied to the nth and n + 1th scanning lines are time-division selection signals similar to 1 and 2 in FIGS. 1 and 2. By changing the counter signal α as in the present embodiment, it is possible to reduce the overall amplitude of the data signal. For example, in FIG. 2, the total amplitude is a voltage obtained by adding (ΔD1 + ΔD2) / 2 to the voltage represented by 7, 8, whereas in FIG. 5, ΔD2 itself is sufficient. This is effective when it is desired to reduce the voltage of the data line drive circuit.

In this embodiment as well, the data amplitude is set to a different value depending on the positive polarity and negative polarity writing as in the previous example. That is, with the polarity of 21, the first data amplitude ΔD1 of 5 is given at the positive polarity timing, and the second data amplitude ΔD2 of 6 is given at the negative polarity timing. Also in this embodiment, direct current application due to capacitive coupling and insufficient writing characteristics of the TFT is improved.

[0029]

As is apparent from the above embodiments, according to the present invention, it is possible to reduce the direct current application by capacitive coupling without complicating the process or impairing the aperture ratio and the like. Further TF
It is also possible to improve the direct current application due to the insufficient writing characteristics of T.

[Brief description of drawings]

FIG. 1 is each potential waveform in one embodiment of a driving method of the present invention.

FIG. 2 is each potential waveform in another embodiment of the driving method of the present invention.

FIG. 3 is a typical representative waveform of each potential in a driving method.

FIG. 4 is a block diagram of a TFT active matrix liquid crystal display device.

FIG. 5 shows potential waveforms in another embodiment of the driving method of the present invention.

[Explanation of symbols]

1, 2 scan signal 3 data signals 4 Opponent signal 5 First data amplitude 6 Second data amplitude 22 TFT 23 pixels 24 data lines 25 scan lines 26 Matrix part

Claims (2)

(57) [Claims] 1. A TFT active matrix liquid crystal display device having a plurality of data lines, a plurality of gate lines, TFTs connected to the data lines and scanning lines, and pixels connected to the TFTs, wherein the data lines are data signal supplied first to said pixel
First amplitude and said pixel period for writing the voltage polarity
Polarity and the first amplitude and the pixels of the pixel becomes so amplitude different periods of writing voltage of the second polarity is opposite the polarity period for writing the polarity of the voltage of the first second polarity The difference in the second amplitude during the voltage writing period is the scanning signal amplitude VP
P, the scanning line pixel capacitance CPR, V PP × Shi pair in the pixel capacitor CPX
CPR {1 / (CPR + CPXON) -1 / (CPR + CPXOFF
)} Is approximately equivalent to the TFT active matrix liquid crystal display device. Wherein at the TFT active matrix liquid crystal display device having a plurality of data lines and a plurality of pixels connected to the connected TFT and the TFT to the gate lines and the data lines and the scanning lines, the data lines data signal supplied first to said pixel
First amplitude and said pixel period for writing the voltage polarity
The TFT has different amplitudes in a period for writing a voltage having a second polarity which is opposite to the polarity, and the TFT is
Different from the writing potential applied from the TFT to the pixel electrode
And the amplitude of the period for writing the voltage of the first polarity to the pixel is
Than the amplitude during the period of writing the voltage of the second polarity to the pixel
A TFT active matrix liquid crystal display device characterized by being set large .