JP3351803B2 - Method for manufacturing semiconductor integrated circuit device - Google Patents

Method for manufacturing semiconductor integrated circuit device

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Publication number
JP3351803B2
JP3351803B2 JP01372091A JP1372091A JP3351803B2 JP 3351803 B2 JP3351803 B2 JP 3351803B2 JP 01372091 A JP01372091 A JP 01372091A JP 1372091 A JP1372091 A JP 1372091A JP 3351803 B2 JP3351803 B2 JP 3351803B2
Authority
JP
Japan
Prior art keywords
integrated circuit
island
semiconductor region
circuit device
shaped semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP01372091A
Other languages
Japanese (ja)
Other versions
JPH04239154A (en
Inventor
勝 大塚
裕司 瀬川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
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Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP01372091A priority Critical patent/JP3351803B2/en
Publication of JPH04239154A publication Critical patent/JPH04239154A/en
Application granted granted Critical
Publication of JP3351803B2 publication Critical patent/JP3351803B2/en
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Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は,SOI基板を使用した
複数の機能ブロックを有する半導体集積回路装置の製造
方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the manufacture of a semiconductor integrated circuit device having a plurality of functional blocks using an SOI substrate.
About the method .

【0002】近年,半導体集積回路の高集積化,高密度
化に伴い,集積回路を構成する一の機能ブロック内の信
号が他の機能ブロックに伝播してノイズ信号と成り,当
該機能ブロックに悪影響を及ぼす,という機能ブロック
間における信号の相互干渉が集積回路の機能劣化を引き
起こす原因として問題になってきている。
In recent years, as semiconductor integrated circuits have become highly integrated and dense, signals in one functional block constituting the integrated circuit propagate to other functional blocks and become noise signals, which adversely affect the functional blocks. Interference of signals between functional blocks, which causes the deterioration of the function of an integrated circuit, has become a problem.

【0003】この問題を解決するために,集積回路を構
成する各機能ブロックを互いに分離させ,機能ブロック
間の相互干渉を無くす技術が求められている。
[0003] In order to solve this problem, there is a demand for a technique for separating each functional block constituting an integrated circuit from each other and eliminating mutual interference between the functional blocks.

【0004】[0004]

【従来の技術】図3は,従来の複数の機能ブロックを有
する半導体集積回路装置の1例を示す図である。
BACKGROUND ART FIG. 3, have a plurality of conventional functional blocks
FIG. 1 is a diagram showing an example of a semiconductor integrated circuit device .

【0005】この図3に示す従来例の技術は,SOI
(Silicon On Insulator) 基板を用い,トレンチ(溝)
によって集積回路を構成する各機能ブロックを分離し,
機能ブロック間における信号の相互干渉を防止するよう
にしたものである。
[0005] The prior art shown in FIG.
(Silicon On Insulator) Using a substrate, trench
Each functional block that constitutes the integrated circuit is separated by
This is to prevent mutual interference of signals between functional blocks.

【0006】図3において,31は支持基板,32は絶
縁体,33はトレンチ,34,35および36は島状半
導体領域である。
In FIG. 3, 31 is a supporting substrate, 32 is an insulator, 33 is a trench, and 34, 35 and 36 are island-shaped semiconductor regions.

【0007】この従来例の技術では,通常の方法によっ
て作製したSOI基板表面の半導体層に絶縁体32に達
するトレンチ33を形成する。その結果,トレンチ33
a,33b,33c,33dによって相互に分離された
複数の島状半導体領域34,35および36が形成され
る。
In this conventional technique , a trench 33 reaching the insulator 32 is formed in a semiconductor layer on the surface of an SOI substrate manufactured by a usual method. As a result, the trench 33
A plurality of island-shaped semiconductor regions 34, 35 and 36 separated from each other by a, 33b, 33c and 33d are formed.

【0008】集積回路を構成する各機能ブロックは,相
互に分離された複数の島状半導体領域34,35および
36に形成する。
Each functional block constituting the integrated circuit is formed in a plurality of island-shaped semiconductor regions 34, 35 and 36 which are separated from each other.

【0009】[0009]

【発明が解決しようとする課題】図3に示した従来の技
術を用いて製造した半導体集積回路装置においては,相
互に分離された複数の島状半導体領域34,35および
36の間にトレンチ33a,33b,33c,33dを
介して容量が形成される。その結果,島状半導体領域3
4,35および36に形成された,集積回路を構成する
各機能ブロック間に信号の相互干渉が生じる。
Oite the semiconductor integrated circuit device manufactured using the conventional technique shown in FIG. 3 [0007] is, between the plurality of island-shaped semiconductor regions 34, 35 and 36 which are separated from each other Capacitors are formed via the trenches 33a, 33b, 33c, 33d. As a result, the island-shaped semiconductor region 3
Mutual interference of signals occurs between the respective functional blocks constituting the integrated circuit formed in 4, 35 and 36.

【0010】したがって,従来例には,集積回路を構成
する各機能ブロック間における信号の相互干渉を完全に
は防止できない,という問題があった。
[0010] Therefore, the conventional example has a problem that mutual interference of signals between functional blocks constituting an integrated circuit cannot be completely prevented.

【0011】本発明の課題は,各機能ブロック間の相互
干渉を完全に防止することのできる,複数の機能ブロッ
クを有する半導体集積回路装置の製造方法を提供し、こ
の問題の解消を図ることである
[0011] An object of the present invention is to provide to enable you to completely prevent mutual interference between the functional blocks, the method for manufacturing a semiconductor integrated circuit device having the functional blocks of the multiple, this
Is to solve the above problem .

【0012】[0012]

【課題を解決するための手段】上記の課題を解決するた
めに、本発明は、支持基板上に形成された絶縁体と該絶
縁体の表面に設けられた半導体層から構成されるSOI
基板を使用して、それぞれが機能ブロックとなる複数の
島状半導体領域を形成する半導体集積回路装置の製造方
法において、前記SOI基板表面の半導体層に、前記絶
縁体に達する深さのトレンチを形成して前記複数の島状
半導体領域を個々に分離し、前記トレンチの外側の半導
体領域を、所定の電位に固定されるシールド用半導体領
域として形成するように構成する。
In order to solve the above object, according to an aspect of the present onset Ming, and formed on the support substrate insulator insulating
SOI composed of a semiconductor layer provided on the surface of an edge
Using multiple substrates, each of which becomes a functional block
Manufacturing method of semiconductor integrated circuit device forming island-shaped semiconductor region
The semiconductor layer on the surface of the SOI substrate,
Forming a trench with a depth reaching the edge to form the plurality of islands;
Separate the semiconductor regions individually and provide a semiconductor outside the trench
The semiconductor region is fixed to a predetermined potential.
It is configured to be formed as an area.

【0013】図1は,本発明によって製造した半導体集
積回路装置の原理説明図である。
FIG. 1 shows a semiconductor package manufactured according to the present invention.
FIG. 3 is an explanatory view of the principle of the integrated circuit device .

【0014】同図において,1は支持基板,2は絶縁
体,3,4はトレンチ,5,6は島状半導体領域,7は
シールド用半導体領域である。
In FIG. 1, 1 is a supporting substrate, 2 is an insulator, 3 and 4 are trenches, 5 and 6 are island-shaped semiconductor regions, and 7 is a shielding semiconductor region.

【0015】本発明によって製造した半導体集積回路装
置においては,集積回路を構成する機能ブロックが形成
される個々の島状半導体領域5,6をトレンチ3,4に
よって取り囲む。そして,トレンチ3,4の外側の半導
体層を所定の電位に固定してシールド用半導体領域7と
している。
Semiconductor integrated circuit device manufactured according to the present invention
In the arrangement, the individual island-shaped semiconductor regions 5 and 6 where the functional blocks constituting the integrated circuit are formed are surrounded by the trenches 3 and 4. The semiconductor layer outside the trenches 3 and 4 is fixed at a predetermined potential to form the semiconductor region 7 for shielding.

【0016】したがって,機能ブロックが形成される島
状半導体領域5および島状半導体領域6の間に,所定の
電位,例えば電源電位または接地電位でシールドされた
シールド用半導体領域7が介在しているので,島状半導
体領域5と島状半導体領域6との間に容量が形成される
のを防止できる。その結果,島状半導体領域5中に形成
する機能ブロックと島状半導体領域6中に形成する機能
ブロックとの間における信号の相互干渉を完全に防止で
きる。
Therefore, between the island-shaped semiconductor region 5 and the island-shaped semiconductor region 6 where the functional blocks are formed, the shielding semiconductor region 7 shielded by a predetermined potential, for example, a power supply potential or a ground potential is interposed. Therefore, formation of a capacitance between the island-shaped semiconductor regions 5 and 6 can be prevented. As a result, mutual interference of signals between the functional blocks formed in the island-shaped semiconductor region 5 and the functional blocks formed in the island-shaped semiconductor region 6 can be completely prevented.

【0017】[0017]

【実施例】図2は,本発明の一実施例により製造した半
導体集積回路装置を示す図である。
FIG. 2 shows a semi-conductor manufactured according to one embodiment of the present invention.
It is a figure showing a conductor integrated circuit device .

【0018】図2において,11は支持基板としてのS
i 基板,12は絶縁体としてのSiO2 ,13および1
4はトレンチ,15および16はn型Si から成る島状
半導体領域,17はn型Si から成るシールド用半導体
領域,18はn型Si から成る島状半導体領域16中に
形成されたp型ウエル,19はn型Si から成る島状半
導体領域15の表面に形成されたp+ 拡散領域,20は
p型ウエル18の表面に形成されたn+ 拡散領域,21
はn型Si から成るシールド領域17の表面に形成され
たn+ 拡散領域,22はSiO2 から成る表面保護膜,
23および24はポリSi ゲート,25,26および2
7はAl配線である。
In FIG. 2, reference numeral 11 denotes S as a support substrate.
i substrate, 12 is SiO 2 as an insulator, 13 and 1
4 is a trench, 15 and 16 are island-shaped semiconductor regions made of n-type Si, 17 is a shielding semiconductor region made of n-type Si, and 18 is a p-type well formed in the island-shaped semiconductor region 16 made of n-type Si. , 19 are p + diffusion regions formed on the surface of the island-shaped semiconductor region 15 made of n-type Si, 20 are n + diffusion regions formed on the surface of the p-type well 18, 21
Is an n + diffusion region formed on the surface of the shield region 17 made of n-type Si, 22 is a surface protective film made of SiO 2 ,
23 and 24 are poly Si gates, 25, 26 and 2
7 is an Al wiring.

【0019】SOI基板は,次の方法によって作製す
る。
The SOI substrate is manufactured by the following method.

【0020】(1)溶融再結晶化法 これは,絶縁体上にポリシリコンを堆積し,レーザビー
ムなどのエネルギービームによって溶融し,溶融部分を
移動させながら結晶成長を行う方法である。
(1) Melt recrystallization method This is a method in which polysilicon is deposited on an insulator, melted by an energy beam such as a laser beam, and crystal growth is performed while moving the melted portion.

【0021】(2)SIMOX法 これは,シリコン基板中に酸素をイオン注入し,高温熱
処理することによってシリコン基板中にシリコン酸化膜
を形成し,上層にシリコン結晶を残す方法である。
(2) SIMOX method This is a method in which oxygen is ion-implanted into a silicon substrate and a high-temperature heat treatment is performed to form a silicon oxide film in the silicon substrate and leave a silicon crystal in an upper layer.

【0022】(3)張り合わせ法 これは,2枚のシリコンウェーハを表面に形成した酸化
膜を介して張り合わせ,一方のシリコン基板を裏面から
研磨して薄いシリコン層を残す方法である。
(3) Bonding method In this method, two silicon wafers are bonded via an oxide film formed on the front surface, and one silicon substrate is polished from the back surface to leave a thin silicon layer.

【0023】本実施例では,これらの方法によって作製
したSOI基板表面の半導体層に絶縁体12に達するト
レンチ13および14を形成する。その結果,トレンチ
13によって取り囲まれた島状半導体領域15,および
トレンチ14によって取り囲まれた島状半導体領域16
が形成される。そして,トレンチ13およびトレンチ1
4の外側にはシールド領域17が形成される。
In the present embodiment, trenches 13 and 14 reaching the insulator 12 are formed in the semiconductor layer on the surface of the SOI substrate manufactured by these methods. As a result, the island-shaped semiconductor region 15 surrounded by the trench 13 and the island-shaped semiconductor region 16 surrounded by the trench 14
Is formed. Then, the trench 13 and the trench 1
4, a shield region 17 is formed.

【0024】集積回路を構成する各機能ブロックは,相
互に分離されたn型Si から成る島状半導体領域15お
よび16に形成する。図2では,n型Si から成る島状
半導体領域15にPMOSトランジスタを形成し,n型
Si から成る島状半導体領域16にNMOSトランジス
タを形成した例を示した。これに限らず,n型Si から
成る島状半導体領域15,16には,種々のタイプから
成る複数のトランジスタ,および抵抗や容量などの受動
素子を形成して所望の機能ブロックを構成することがで
きる。
Each functional block constituting the integrated circuit is formed in island-shaped semiconductor regions 15 and 16 made of n-type Si separated from each other. FIG. 2 shows an example in which a PMOS transistor is formed in the island-shaped semiconductor region 15 made of n-type Si and an NMOS transistor is formed in the island-shaped semiconductor region 16 made of n-type Si. The present invention is not limited to this. For example, a plurality of transistors of various types and passive elements such as resistors and capacitors may be formed in the island-shaped semiconductor regions 15 and 16 made of n-type Si to form desired functional blocks. it can.

【0025】一方,n型Si から成るシールド用半導体
領域17は,n+ 型コンタクト領域21を介してAl配
線27と接続されている。このAl配線27は,電源電
位VDDまたは接地(GND)電位に固定される。その結
果,n型Si から成るシールド用半導体領域17は,シ
ールド電位となる。
On the other hand, the shielding semiconductor region 17 made of n-type Si is connected to the Al wiring 27 via the n + -type contact region 21. The Al wiring 27 is fixed to the power supply potential VDD or the ground (GND) potential. As a result, the shield semiconductor region 17 made of n-type Si has a shield potential.

【0026】このように,本実施例により製造した半導
体集積回路装置では,n型Si から成る島状半導体領域
15とn型Si から成る島状半導体領域16との間にシ
ールド電位に固定されたn型Si から成るシールド用半
導体領域17が介在しているので,n型Si から成る島
状半導体領域15に形成された機能ブロックとn型Si
から成る島状半導体領域16に形成され機能ブロックと
の間に容量が形成されない。
As described above, the semiconductor device manufactured according to this embodiment is
In the integrated circuit device , a shielding semiconductor region 17 made of n-type Si fixed at a shield potential is interposed between an island-shaped semiconductor region 15 made of n-type Si and an island-shaped semiconductor region 16 made of n-type Si. Therefore, the functional blocks formed in the island-shaped semiconductor region 15 made of n-type Si and the n-type Si
No capacitance is formed between the island-shaped semiconductor region 16 and the functional block.

【0027】その結果,n型Si から成る島状半導体領
域15に形成された機能ブロックとn型Si から成る島
状半導体領域16に形成された機能ブロックとの間にお
ける信号の相互干渉が完全に防止される。
As a result, mutual interference of signals between the functional blocks formed in the island-shaped semiconductor region 15 made of n-type Si and the functional blocks formed in the island-shaped semiconductor region 16 made of n-type Si is completely eliminated. Is prevented.

【0028】本実施例では,支持基板11としてSi を
用いた例を示したが,他の半導体や絶縁体を用いてもよ
い。島状半導体領域およびシールド用半導体領域17に
n型Si を用いた例を示したが,p型Si ,i型Si を
用いてもよい。絶縁体12としてSiO2 を用いた例を
示したが,他の絶縁体を用いてもよい。配線25,26
および27にAlを用いた例を示したが,他の導電物質
を用いてもよい。
In this embodiment, an example is shown in which Si is used as the support substrate 11, but other semiconductors or insulators may be used. Although an example in which n-type Si is used for the island-shaped semiconductor region and the shielding semiconductor region 17 has been described, p-type Si and i-type Si may be used. Although an example in which SiO 2 is used as the insulator 12 has been described, another insulator may be used. Wiring 25, 26
Although the examples using Al are shown in FIGS. 27 and 27, other conductive materials may be used.

【0029】[0029]

【発明の効果】本発明によれば,複数の機能ブロックを
有する半導体集積回路装置において,各機能ブロック間
の相互干渉を完全に防止することが可能になる。したが
って,半導体集積回路装置の高集積化,高密度化に寄与
するところが大きい。
According to the present invention, in a semiconductor integrated circuit device having a plurality of functional blocks, mutual interference between the functional blocks can be completely prevented. Therefore, it greatly contributes to high integration and high density of the semiconductor integrated circuit device.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明により製造した半導体集積回路装置の原
理説明図である。
FIG. 1 is a diagram illustrating the principle of a semiconductor integrated circuit device manufactured according to the present invention.

【図2】本発明の一実施例により製造した半導体集積回
路装置を示す図である。
FIG. 2 shows a semiconductor integrated circuit manufactured according to an embodiment of the present invention.
It is a figure showing a road device .

【図3】従来の複数の機能ブロックを有する半導体集積
回路装置の1例を示す図である。
FIG. 3 shows a conventional semiconductor integrated circuit having a plurality of functional blocks.
It is a figure showing an example of a circuit device .

【符号の説明】[Explanation of symbols]

1 支持基板 2 絶縁体 3,4 トレンチ 5,6 島状半導体領域 7 シールド用半導体領域 DESCRIPTION OF SYMBOLS 1 Support substrate 2 Insulator 3, 4 Trench 5, 6 Island-shaped semiconductor region 7 Semiconductor region for shielding

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平2−148855(JP,A) 特開 昭59−172739(JP,A) 特開 平2−271567(JP,A) ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-2-148855 (JP, A) JP-A-57-172739 (JP, A) JP-A-2-271567 (JP, A)

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 支持基板上に形成された絶縁体と該絶縁
体の表面に設けられた半導体層から構成されるSOI基
板を使用して、それぞれが機能ブロックとなる複数の島
状半導体領域を形成する半導体集積回路装置の製造方法
において、前記SOI基板表面の半導体層に、 前記絶縁体に達する
深さのトレンチを形成して前記複数の島状半導体領域を
個々に分離し前記トレンチの外側の半導体領域を、 所定の電位に固定
されシールド用半導体領域として形成することを特徴
とする半導体集積回路装置の製造方法
An insulator formed on a supporting substrate and the insulator
Using an SOI substrate composed of a semiconductor layer provided on the body surface, a plurality of islands each serving as a functional block
In a method of manufacturing a semiconductor integrated circuit device for forming a semiconductor region, a semiconductor layer on a surface of the SOI substrate reaches the insulator.
Forming a trench having a depth to form the plurality of island-shaped semiconductor regions;
The method of manufacturing a semiconductor integrated circuit device, characterized in that individually separated, forming an outer semiconductor region of said trench, as a shield for a semiconductor region that will be fixed to a predetermined potential.
JP01372091A 1991-01-11 1991-01-11 Method for manufacturing semiconductor integrated circuit device Expired - Lifetime JP3351803B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP01372091A JP3351803B2 (en) 1991-01-11 1991-01-11 Method for manufacturing semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP01372091A JP3351803B2 (en) 1991-01-11 1991-01-11 Method for manufacturing semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPH04239154A JPH04239154A (en) 1992-08-27
JP3351803B2 true JP3351803B2 (en) 2002-12-03

Family

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Application Number Title Priority Date Filing Date
JP01372091A Expired - Lifetime JP3351803B2 (en) 1991-01-11 1991-01-11 Method for manufacturing semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JP3351803B2 (en)

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US5644157A (en) * 1992-12-25 1997-07-01 Nippondenso Co., Ltd. High withstand voltage type semiconductor device having an isolation region
JPH06268054A (en) * 1993-03-10 1994-09-22 Nippondenso Co Ltd Semiconductor device
US6104078A (en) * 1994-03-09 2000-08-15 Denso Corporation Design for a semiconductor device having elements isolated by insulating regions
US6242792B1 (en) 1996-07-02 2001-06-05 Denso Corporation Semiconductor device having oblique portion as reflection
JP2003273231A (en) 2002-03-19 2003-09-26 Fujitsu Ltd Shield structure for semiconductor integrated circuit
JP2004031389A (en) * 2002-06-21 2004-01-29 Fujitsu Ltd Designing method for semiconductor circuit, designing apparatus for semiconductor circuit, program, and semiconductor device
JP5277616B2 (en) * 2007-11-22 2013-08-28 株式会社デンソー Semiconductor device
JP7193053B2 (en) * 2018-07-18 2022-12-20 株式会社東海理化電機製作所 Semiconductor device and its manufacturing method

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