JP3351465B2 - Common memory matching method for multiprocessor system and multiprocessor system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiprocessor system having a signal processor for performing signal processing and a common data management processor having a common memory for holding information common to each signal processor. The present invention relates to a common memory matching method for matching the total number of signal processings to be held and a multiprocessor system for executing the method.

[0002]

2. Description of the Related Art Usually, exchange of signals between exchanges is performed via a telephone line. On the other hand, a system in which a dedicated signal line separate from the communication line is provided, and a signal necessary for the communication is transmitted and received by using the same in many communication lines is called a common line signal system. As the common line signal system, for example, ITU
-TNo. There are seven signaling systems, which are adopted as inter-office signaling systems for realizing ISDN as well as telephone services.

In such a common channel signaling system, switching stations are connected by a plurality of signal links, and the switching stations are provided with a plurality of signal processors for accommodating the respective signal links and performing signal processing. I have. Hereinafter, a conventional multiprocessor system will be described with an example of an exchange that supports the common channel signaling system.

FIG. 4 is a block diagram showing a configuration of a conventional multiprocessor system.

In FIG. 4, a conventional multiprocessor system includes a plurality of (n) signal processors 16-1 to 16-n for performing signal processing, and a signal processor 16-n.
And a common data management processor 11 for managing common data of -1 to 16-n.

Each of the signal processors 16-1 to 16-n has n corresponding signal links 17-1 to 17-n.
n and other multiprocessor systems (here, other exchanges), and the signal processors 16-1 to 16-1.
16-n and the common data management processor 11 are connected via a communication bus 15 respectively.

The common data management processor 11 includes a processing request receiving unit 12 for receiving a signal processing request from the signal processors 16-1 to 16-n, and a multiprocessor system (signal processors 16-1 to 16-n). Equipped with a common memory that holds the total number of signal processing currently being executed,
A common data management unit that determines whether or not to execute the signal processing based on whether or not the total number of signal processings exceeds a preset limit value.

In such a configuration, the operation of the conventional multiprocessor system will now be described with reference to FIG.

FIG. 5 is a diagram showing a processing procedure of the multiprocessor system shown in FIG.

In the following, a description will be given of an example of a processing procedure executed by an arbitrary signal processor 16 and the common data management processor 11 among the n signal processors 16-1 to 16-n.

As shown in FIG. 5, the signal processor 1
6, upon receiving an arbitrary signal via the signal link, transmits a processability determination request to the common data management processor 11 to determine whether or not signal processing can be executed.

The common data management processor 11, which has received the processing possibility determination request, determines whether or not the number of signal processings currently being executed in the multiprocessor system has reached a predetermined limit value set in advance. If the number has reached the limit, the determination result (determination NG) indicating that the signal processing cannot be executed is returned to the signal processor 16 that has issued the processing possibility determination request.

The signal processor 16 having received the result of the determination that the processing is not possible responds to the other multiprocessor system that has transmitted the corresponding signal via the signal link that the signal processing is not possible (NG response), and performs the processing. finish.

On the other hand, when the number of signal processings currently being executed in the multiprocessor system has not reached the limit value, the common data management processor 11 adds 1 to the total number of signal processings held in the common data management unit 13. Then, it returns a determination result (judgment OK) indicating that the signal processing can be executed to the signal processor 16 which has issued the request for judging the processability.

The signal processor 16, which has received the determination result indicating that processing is possible, performs signal processing corresponding to the signal received via the signal link, and notifies the common data management processor 11 of the termination of the signal processing when the signal processing is completed. Send.

The common data management processor 11 that has received the signal processing end notification subtracts 1 from the total number of signal processes held in the common data management unit 13 and returns a response to the end notification.

The signal processor 16 waits for a response from the common data management processor 11, and responds to other multiprocessor systems that have transmitted the corresponding signal via the signal link that signal processing has been completed (OK response). ),
The process ends.

Here, in the conventional multiprocessor system, if the signal processing end notification to the common data management processor 11 fails due to busy resources or the like,
Alternatively, when a response to the end notification from the common data management processor 11 is not returned, the signal processor 16 resends the signal processing end notification to the common data management processor 11 (finite number of times). In this way, the total number of signal processes held in the common data management unit 13 is matched.

At this time, considering that retransmission of the end notification to the common data management processor 11 may fail, the common data management processor 11 periodically (approximately 1 to 2 hours) The number of processes is read out, and if any of the signal processors 16-1 to 16-n is executing signal processing, it is checked whether or not the corresponding signal processor is actually executing signal processing. If not, the number of signal processings is subtracted from the total number of signal processings to match the total number of signal processings.

[0020]

As described above, in the conventional multiprocessor system, when the notification of the termination of the signal processing to the common data management processor fails, or when the response to the notification of the termination from the common data management processor is not returned. In addition, since the signal processor resends the signal processing termination notification to the common data management processor, there is a problem that the processing load of the signal processor increases.

At this time, the end notification is retransmitted a predetermined number of times. If the total number of signal processings reaches the limit value, the total number of signal processings held in the common data management unit is limited. There is a problem that other signal processing cannot be executed until the value becomes equal to or less than the value.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and does not increase the load on the signal processing processor, and can reduce the total signal processing stored in the common memory. An object of the present invention is to provide a common memory matching method for a multiprocessor system in which numbers are matched.

[0023]

In order to achieve the above object, a common memory matching method for a multiprocessor system according to the present invention comprises at least one signal processor for performing signal processing, and a signal processor currently being executed in the multiprocessor system. A common memory for holding a total signal processing number that is a number, a common data management processor that determines whether or not the signal processing can be executed based on whether the total signal processing number exceeds a preset limit value, A common memory matching method for a multiprocessor system for matching the total number of signal processes held in the common memory with the number of signal processes currently being executed in the multiprocessor system, wherein the signal processing processor Calculates the processing time required to execute the signal processing and notifies the common data management processor of the processing time. When the signal processing by the signal processing processor is executable, the data management processor adds the number of signal processings executed by the signal processing processor to the total number of signal processings, sets the processing time in a timer, and starts up. If you, you If the timer has received notification of the end of the signal processing from the signal processor before the time-out or the timer times out, 該Ta
A method of stopping and releasing the imager and subtracting the number of signal processings executed by the signal processor from the total number of signal processings.

At this time, the common data management processor may hold a timer number for identifying the timer and a use state of the timer corresponding to the timer number as management tables, respectively. , A switching center compatible with the common channel signaling system.

Further, the multiprocessor system according to the present invention includes at least one signal processor for performing signal processing and a common memory for holding the total number of signal processing that is currently being executed in the multiprocessor system. A common data management processor that determines whether the signal processing can be executed based on whether the total number of signal processings exceeds a preset limit value, and the total signal processing stored in the common memory. A multiprocessor system in which the number and the number of signal processes currently being executed in the multiprocessor system are matched, wherein the signal processor is:
The common data management processor has a notifying unit that obtains a processing time required to execute the signal processing and notifies the common data management processor, and the common data management processor performs the signal processing by the signal processing processor, The number of signal processings executed by the signal processing processor is added to the total number of signal processings, the processing time is set to a timer, and the processing is started. If you receive, or
If the other is that the timer has timed out, the timer
Is stopped and released, and a common data management unit is provided for subtracting the number of signal processing executed by the signal processor from the total number of signal processing.

At this time, the common data management processor may have a timer management table for holding a timer number for identifying the timer and a use state of the timer corresponding to the timer number, respectively.
The multiprocessor system may be a switching center compatible with a common channel signaling system.

In the above-described common memory matching method and multiprocessor system of the multiprocessor system , the processing time required for the signal processor to execute the signal processing is obtained and notified to the common data management processor. When the signal processing by the signal processor is executable, the common data management processor adds the number of signal processing executed by the signal processor to the total number of signal processing and the processing time transmitted from the signal processor. Set the timer as a timer, start it, and stop and release the timer when it receives a signal processing end notification from the signal processor before the timer times out, or when the timer times out.
Then, the number of signal processes executed by the signal processor is subtracted from the total number of signal processes.

Therefore, when communication fails between the signal processor and the common data management processor, the signal processor does not need to perform retransmission.

When the timer times out, the total number of signal processing is updated by the common data management processor regardless of the processing state of the signal processing processor.

[0030]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one configuration example of the multiprocessor system of the present invention. FIG. 2 shows FIG.
FIG. 3 is a diagram showing a processing procedure of the multiprocessor system shown in FIG. 3, and FIG. 3 is a table showing an example of recorded contents of the timer management unit shown in FIG.

Referring to FIG. 1, the multiprocessor system of the present invention includes a timer management unit 1 in the common data management processor of the conventional multiprocessor system shown in FIG.
4 is further provided. The other configuration is the same as the conventional configuration, and the description thereof will be omitted.

The timer management unit 14 includes a number of timers equal to the total number of signal processings, and a timer management table for managing the use state of each timer. The timer is set to the signal processing time of the signal processing processor + α time, and the common data management processor updates the total signal processing count held in the common data management unit when the timer times out. Here, α is a predetermined margin time to be added to the signal processing time calculated by the signal processing processor.

Next, the operation of the multiprocessor system according to the present invention will be described with reference to FIGS.

As shown in FIG. 2, first, when the signal processor receives an arbitrary signal via the signal link,
A processability determination request is transmitted to the common data management processor. At this time, a maximum processing time required for processing the received signal is also notified. The maximum processing time is the sum of the signal processing time of the signal processor + α time and the time determined by the number of exchanges that relayed the signal. Since the received signal also includes information on the number of exchanges relayed, the signal processor uses the information to calculate the maximum processing time.

The common data management processor that has received the processing possibility determination request determines whether or not the number of signal processings currently being executed in the multiprocessor system has reached a predetermined limit value, and reaches the limit value. If yes, the processing result is returned to the signal processor which has issued the processability determination request (determination NG).

The signal processor having received the result of the determination that the processing is not possible responds to the other multiprocessor system that has transmitted the corresponding signal via the signal link that the signal processing is not possible (NG response), and ends the processing. I do.

On the other hand, if the number of signal processes currently being executed in the multiprocessor system has not reached the limit value, the common data management processor refers to the timer management table 18 of the timer management unit 14 (see FIG. 3). Reserve a timer that is not being used. Timer management table 1
Reference numeral 8 denotes a timer number for identifying each timer and its use state (empty: unused state, closed: used state). The common data management processor secures the timer and uses the timer. The status is rewritten to "blocked", and the timer is started by setting the maximum processing time transmitted from the signal processor to the secured timer.

Further, the common data management processor adds 1 to the total signal processing number held in the common data management unit,
The signal processor that has issued the processing possibility determination request is notified of the processing result (determination OK) and the timer number of the secured timer.

The signal processor that has received the determination result of the processability performs signal processing corresponding to the signal received via the signal link, and transmits a signal processing completion notification to the common data management processor when the signal processing is completed. .

The common data management processor that has received the signal processing end notification stops the timer corresponding to the notified timer number, and rewrites its use state in the timer management table 18 to “empty” to secure it. Release the timer. Further, it subtracts 1 from the total number of signal processes held in the common data management unit, and returns a response to the end notification.

The signal processor waits for a response from the common data management processor, and returns a signal processing completion to another multiprocessor system (exchange station) that has transmitted the corresponding signal via the signal link ( OK response), and terminates the process.

Here, if the notification of the end of the signal processing to the common data management processor has failed, or if a response to the end notification from the common data management processor is not returned, the common data management processor performs The timer corresponding to the time-out of the activated timer is stopped, and its use state in the timer management table is rewritten to “empty”. Further, 1 is subtracted from the total signal processing number held in the common data management unit.

Therefore, when the inter-processor communication with the common data management processor fails, the signal processing processor does not need to resend the signal processing end notification to the common data management processor, thereby increasing the processing load of the signal processing processor. I will not let you.

When the timer times out, the total number of signal processings is updated by the common data management processor irrespective of the signal processing processor, so that the total number of signal processings held in the common memory is surely matched.

Further, since the maximum processing time is notified for each signal processor, it is possible to cope with a case where a signal having a different maximum processing time is received.

[0047]

Since the present invention is configured as described above, the following effects can be obtained.

Even when communication cannot be performed between the signal processor and the common data management processor, the signal processor does not need to perform retransmission, so that the processing load of the signal processor does not increase.

[0049] Further, since the total signal processing speed in the common data management processor regardless of what signal processor is updated when the timer times out, the current total signal processing speed and the multiprocessor system was retained at a common memory
The number of currently processed signal processes is reliably matched.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of a multiprocessor system according to the present invention.

FIG. 2 is a diagram showing a processing procedure of the multiprocessor system shown in FIG.

FIG. 3 is a table illustrating an example of recorded contents of a timer management unit illustrated in FIG. 1;

FIG. 4 is a block diagram showing a configuration of a conventional multiprocessor system.

FIG. 5 is a diagram showing a processing procedure of the multiprocessor system shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Common data management processor 12 Processing request reception part 13 Common data management part 14 Timer management part 15 Communication bus 16-1 to 16-n Signal processing processor 17-1 to 17-n Signal link 18 Timer management table

Claims (6)

(57) [Claims] 1. A multi-processor system comprising: at least one signal processor for performing signal processing; and a common memory for holding a total signal processing number that is a signal processing number currently being executed in a multiprocessor system.
A common data management processor that determines whether the signal processing can be executed based on whether the total signal processing number exceeds a preset limit value, and the total signal processing number held in the common memory; A shared memory matching method for a multiprocessor system for matching the number of signal processings currently being executed in the multiprocessor system, wherein the signal processing processor obtains a processing time required to execute the signal processing. Notifying a common data management processor, the common data management processor adds a signal processing number to be executed by the signal processing processor to the total signal processing number when signal processing by the signal processing processor is executable, The processing time is set in a timer and started, and before the timer times out, the signal is received from the signal processor. If when receiving notification of the end of processing or <br/> the timer has timed out, stop the timer
Stopping and releasing, and subtracting the number of signal processings executed by the signal processor from the total number of signal processings. 2. The multiprocessor system according to claim 1, wherein the common data management processor holds a timer number for identifying the timer and a use state of the timer corresponding to the timer number as a management table. Memory alignment method. 3. The method according to claim 1, wherein the multiprocessor system is an exchange corresponding to a common channel signaling system. 4. A multi-processor system comprising: at least one signal processor for performing signal processing; and a common memory for holding a total number of signal processing that is currently being executed in the multiprocessor system.
A common data management processor that determines whether the signal processing can be executed based on whether the total signal processing number exceeds a preset limit value, and the total signal processing number held in the common memory; A multiprocessor system in which the number of signal processings currently being executed in the multiprocessor system is matched, wherein the signal processing processor obtains a processing time required to execute the signal processing and sends the processing time to the common data management processor. Notifying means for notifying, the common data management processor, when the signal processing by the signal processor is executable, adding the number of signal processing executed by the signal processor to the total number of signal processing, The processing time is set in a timer and started, and the signal processing processor performs the signal processing before the timer times out. If when receiving a completion notification or <br/> the timer has timed out, stop the timer
A multiprocessor system having a common data management unit for stopping and releasing, and subtracting the number of signal processings executed by the signal processor from the total number of signal processings. 5. The multiprocessor system according to claim 4, wherein the common data management processor has a timer management table for holding a timer number for identifying the timer and a use state of the timer corresponding to the timer number. . 6. The multiprocessor system according to claim 4, wherein the multiprocessor system is a switching center compatible with a common channel signaling system.