JP3350246B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which a process in an oxidizing atmosphere while suppressing oxidation of a metal or a metal compound is improved.

[0002]

2. Description of the Related Art At present, polycrystalline silicon is widely used as electrodes and wirings of semiconductor devices. However,
2. Description of the Related Art As semiconductor devices become more highly integrated and operate at higher speeds, signal transmission delay due to resistance of electrodes and wirings has become a serious problem. In particular, in the field of MOS LSI in which large capacity and high integration are progressing, the polycrystalline silicon used for the gate electrode is shared with the first layer wiring. Has become an obstacle.

For these reasons, silicide of a high melting point metal having thermal stability and electrical low resistance is being used as an electrode wiring material instead of polycrystalline silicon. Recently, attempts have been made to use a high melting point metal such as W or Mo as a gate electrode. W, M
A high melting point metal such as o has an electrical resistivity two orders of magnitude lower than that of polycrystalline silicon, and is 1/4 to 1 times lower than the resistivity of silicide.
/ 3, which is promising as a low-resistance electrode wiring material.

As a semiconductor device using the above-mentioned high melting point metal (for example, W) as a constituent material of a gate electrode, a semiconductor device having a structure shown in FIG. 7A is conventionally known. That is, reference numeral 71 in the figure denotes a p-type silicon substrate.
1, a field insulating film 72 for electrically isolating the element region is formed. This field insulating film 72
The n ⁺ -type diffusion layers 73a and 73 serving as a source and a drain electrically separated from each other
b is formed. On the surface of the substrate 71 including the channel region between the diffusion layers 73a and 73b, a gate electrode including a polycrystalline silicon layer 75, a metal nitride layer (for example, a TiN layer) 76 and a W layer 77 via a gate oxide film 74. 78 are provided. The metal nitride layer 76 constituting the gate electrode 78 improves the adhesion of the W layer 77 to the polycrystalline silicon layer 75, and the W layer 77 reacts with the polycrystalline silicon layer 75 to form a single digit resistivity. It acts as a reaction barrier layer that prevents it from rising.

In the process of forming a polycrystalline silicon gate electrode which has been conventionally employed, in order to recover a defect in a thin gate oxide film such as 5 to 50 nm and a gate breakdown voltage deterioration caused by an edge shape of the gate electrode, an oxide film is formed. A heat treatment is performed in an atmosphere (for example, dry oxygen) to perform a process of newly growing a silicon oxide layer on the exposed surface of the polycrystalline silicon layer and the substrate surface serving as the source and drain regions. This step is called a post-gate oxidation step.

However, since a high melting point metal such as W or Mo generally has no resistance to heat treatment in an oxidizing atmosphere, the gate electrode structure shown in FIG. There is a problem that can not be applied.

As a method of solving the above problem, a gate electrode is formed by performing a heat treatment in an atmosphere containing a reducing gas (eg, hydrogen) and an oxidizing gas (eg, water vapor) and further containing nitrogen as a dilution gas. There is well known a silicon selective oxidation technique capable of forming a silicon oxide film without causing oxidation of a metal layer and a metal nitride layer constituting the semiconductor layer and improving a gate withstand voltage (Japanese Patent Laid-Open No. 3-11976).
3).

In this selective oxidation technique, H ₂ is used as the reducing gas and water vapor (H ₂ O) is used as the oxidizing gas.
It is said that when N ₂ is used as a nitrogen-containing gas, it is desirable to set the mixing ratio thereof as follows. That is, the partial pressure of H ₂ , H ₂ O, and N ₂ is changed to P _H2 ,
When P _H2O and P _N2 are set, P _H2 / P _H2O is 0.5 or more,
1.0 × 10 ⁹ or less, and logP _N2 is −22 or more and 14 or less. Further, as a more preferable condition, the temperature is preferably set to 800 to 900 ° C. At this time, PH ₂ / P _{H2O is set} to 1.0 × 10 ³ or more and 1.0 × 10 ^3
4 or less and logP _N2 is -2 or more and 2 or less. By performing the heat treatment under this atmosphere condition, it is possible to oxidize only silicon without oxidizing the metal layer and the metal nitride layer constituting the gate electrode.

However, recent vigorous research has revealed that this type of method has the following problems. First, under the above selective oxidation conditions, P _H2O
, The silicon oxidation rate was very slow because of the low temperature, and it was clarified that high-temperature and long-time heating was necessary to obtain a silicon oxide film necessary for improving the breakdown voltage of the gate electrode.

As an example, a gate electrode 8 is formed in a selective oxidation atmosphere (916 ° C., H ₂ / H ₂ O / N ₂ = 0.164 / 1 × 1).
Be heated 120 min 0 ^-4 /0.836atm),
Only a thickness of about _{2 to 3} nm of SiO ₂ is formed (FIG. 7).
(B)). Therefore, it is necessary to perform heating at a high temperature of 916 ° C. for a long time, and when the heating is performed for a long time, the dopant 75 ′ in the polycrystalline silicon layer 75 of the gate electrode 78 diffuses into the gate oxide film 74 and the gate electrode It has been clarified that the pressure resistance is deteriorated.

In addition to the above problems, there is a problem that the surface of the metal layer is modified in the step of removing the resist on the metal layer. As an example, in the step of removing the resist on the W upper surface after processing the W gate electrode, SH processing (H ₂ S
O ₄ + H ₂ O ₂ ) dissolves W, so O
_{2 The} resist is stripped by asher. At this time, since oxidation of the W surface occurs, it is necessary to reduce the oxide on the surface. As a resist stripping method, CF ₄ + H ₂
Although there is a downflow plasma treatment of O, there is a problem that the surface after the resist is stripped is contaminated with F.

Further, the above-mentioned problem similarly occurs not only with respect to the gate electrode but also with respect to a resist mask on a metal wiring and a resist mask serving as a mask for a through-hole opening.

[0013]

As described above, in the conventional post-gate oxidation step, the resist stripping step in an oxidizing atmosphere, and the like, the characteristics of the semiconductor element such as the withstand voltage of the gate electrode decrease, and the like. And the metal or metal compound layer serving as the electrode wiring is easily oxidized, and the formed oxide must be reduced again, thereby increasing the number of steps. The present invention has been made in view of the above circumstances, and has as its object to provide a method of manufacturing a semiconductor device in which a processing step in an oxidizing atmosphere is improved.

[0014]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a process of generating H and OH by exciting a gas consisting only of water to form a plasma, and forming a silicon-containing region and a metal. or a region of a metal compound is supplied to the H and OH to the substrate was mixed with an oxidation region composed of the silicon, at the same time acid
By selectively reducing the region made of the metal or metal compound to be converted, the region made of silicon is selected.
Selectively oxidizing the semiconductor device .

[0015]

The present invention also provides a step of forming a gate insulating film on a silicon layer, a step of forming a layer of a metal or a metal compound on the gate insulating film, and a step of forming a layer of a metal or a metal compound on the gate insulating film. Forming a gate electrode by etching a layer made of the metal or metal compound using the resist pattern as a mask, removing the resist pattern, and a gas containing only water. To generate H and OH by exciting and turning into plasma, and oxidizing the silicon layer after removing the resist pattern by using the H and OH , and simultaneously oxidizing the silicon layer.
By selectively reducing the layer made from the metal or metal compound is, to provide a method of manufacturing a semiconductor device characterized by comprising a <br/> step of selectively oxidizing the silicon layer .

The present invention also provides a step of forming a gate insulating film on a silicon layer, a step of forming a layer made of a metal or a metal compound on the gate insulating film, and a step of forming a layer made of the metal or a metal compound on the gate insulating film. A step of forming a resist pattern, a step of forming a gate electrode by etching a layer made of the metal or metal compound using the resist pattern as a mask, and exciting a gas consisting only of water to form a plasma. A step of generating H and OH, and removing the resist pattern and oxidizing the silicon layer using the H and OH ;
Further, by selectively reducing the layer of the metal or metal compound that is oxidized simultaneously , the silicon layer
Selectively oxidizing the semiconductor device.

In the present invention described above, the following embodiments are particularly preferable. (1) The step of removing the resist pattern is performed by exciting a gas containing oxygen and hydrogen to convert the gas into plasma, and using the gasified gas containing oxygen and hydrogen.

(2) The step of removing the resist pattern and the step of selectively oxidizing the silicon layer are continuously performed in the same vacuum chamber. (3) After removing the resist pattern, heating is further performed to selectively oxidize the silicon layer at a temperature higher than the temperature of the step of removing the resist pattern.

(4) The gas containing oxygen and hydrogen is turned into a plasma in a region apart from the region made of silicon or a place where the silicon layer is selectively oxidized, and the gas is turned into a region made of silicon. Alternatively, supply to the silicon layer.

(5) Water (H ₂ O) is used as the gas containing oxygen and hydrogen. (6) Tungsten, molybdenum, platinum, palladium, rhodium, ruthenium, nickel, cobalt, tantalum, titanium, or the like, or a compound thereof is used as the region or layer made of the metal or metal compound. Further, aluminum, copper, or a compound thereof may be used.

(7) The gate electrode has a metal layer single-layer structure, a stacked structure of a metal layer / reaction barrier layer, and a metal layer / reaction barrier layer / polycrystalline silicon layer. (8) As a reaction barrier layer, nitride, oxide such as titanium, zirconium, hafnium, tungsten, vanadium, niobium, tantalum, chromium, rhenium, silicon,
Use of nitrided oxide.

(9) A gas containing oxygen and hydrogen, for example, water and a rare gas (Ar, Kr or the like) are mixed, and the mixed gas is used to selectively oxidize the silicon region or the silicon layer. To do.

[0024]

According to the present invention, a gas containing oxygen and hydrogen is excited to generate H and OH by turning the gas into plasma, and a region made of silicon and a region made of metal or metal compound are mixed. Since the H and OH are supplied to the substrate, the region made of silicon can be oxidized by OH or the like, and the region made of a metal or metal compound that is simultaneously oxidized can be effectively reduced by H. Note that, in this case, since H has a weak ability to reduce silicon oxide, it does not reduce the region made of oxidized silicon to silicon.

Therefore, by using a gas containing oxygen and hydrogen in the form of plasma, a layer made of a metal or a metal compound in a gate electrode formed on a silicon layer via a gate insulating film is not oxidized. The selective oxidation of the silicon layer can be performed by a simple process.

That is, the resist stripping or post-gate oxidation step can be easily performed while suppressing the oxidation of the metal layer or the like constituting the gate electrode, and the SiO ₂ film can be formed at a low temperature. The thermal load can be reduced, and the gate withstand voltage can be improved.

In the method of the present invention, in the process of converting a gas containing oxygen and hydrogen into plasma, for example, in the step of discharging water, the partial pressure of water, applied power, applied frequency, and substrate temperature are changed to change the metal. It is possible to vary the selectivity of oxidation of the layer and the silicon layer.

Further, the gas containing oxygen and hydrogen is turned into a plasma in a region apart from the region made of silicon or a place where the silicon layer is selectively oxidized, and the gas is turned into a region made of silicon or By supplying to the silicon layer, selective oxidation of silicon can be performed effectively without damaging the gate insulating film.

[0029]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIGS. 1A to 1D are cross-sectional views showing steps of forming a gate electrode according to a first embodiment of the present invention.

First, as shown in FIG.
Field oxide film 12 is formed by selective oxidation on the surface of type silicon substrate 11, and then subjected to thermal oxidation treatment so that silicon substrate 11 separated by field oxide film 12 has a thickness of 5 to 3 mm.
A 0 nm silicon oxide film 13 was formed.

Next, a 50 nm-thick polycrystalline silicon layer 14 doped with conductive impurities is formed on the silicon oxide film 13.
Then, while the substrate 11 is maintained at a temperature of 473 K, the polycrystalline silicon layer 1 is sputtered by using Ti as a target in a mixed gas of N ₂ and Ar.
On top of this, a 50 nm thick TiN layer 15 was deposited. Subsequently, hydrogen (H ₂ ) and monosilane (S
Using a mixed gas of iH ₄ ) and tungsten hexafluoride (WF ₆ ), H ₂ was maintained at a partial pressure of 0.173 Torr, SiH ₄ was maintained at a partial pressure of 0.013 Torr, and WF ₆ was maintained at a partial pressure of 0.065 Torr. A W layer 16 having a thickness of about 150 nm was deposited on the TiN layer 15 at the substrate temperature (FIG. 1).
(B)).

Subsequently, the W layer 16, the TiN layer 15
Then, the polycrystalline silicon layer 14 is sequentially and selectively etched using ordinary photolithography and reactive ion etching (RIE), and the resist is peeled off with an O ₂ asher to form the gate electrode 18 shown in FIG. Formed.

Next, the partial pressure of steam (H ₂ O) was increased to 25.6 m
Torr, the substrate temperature was set to 530 ° C., H ₂ O was turned into plasma by microwave discharge (2450 MHz, applied power 100 W), and this was flowed down to the silicon substrate 1.
1. This plasma treatment was performed for 30 minutes.

FIG. 2 is a sectional view showing a schematic configuration of a processing apparatus using the microwave discharge. As shown in this figure, a sample 28 (here, the silicon substrate 11) is accommodated in a reaction vessel (quartz tube) 27, and the sample 28 is heated to a desired temperature by a ceramic heater 29. . On the other hand, 21 is a raw material container for storing water. The water in the raw material container 21 is provided with needle valves 22 and 23 for controlling the partial pressure of water and a moisture meter 24 for measuring the partial pressure of water. The gas is supplied to the microwave discharge unit 25 through the gas introduction pipe. In the microwave discharge unit 25, water is excited by the microwave discharge and becomes a plasma 26. The plasmatized water is supplied to a sample 28 provided in the reaction vessel 27. In addition, 3
Numerals 0 and 31 are a turbo molecular pump and a rotary pump, respectively.

According to the oxidation treatment under the above conditions, as shown in FIG. 1D, the side wall of the polycrystalline silicon layer 14 and the silicon substrate 11 are oxidized, and the W surface is not oxidized. It was confirmed that the exposed sidewall of the TiN layer 15 was slightly oxidized to form a TiO ₂ film 17 of about 0.5 nm. This proves that the process temperature can be lowered from 916 ° C. to 530 ° C. as compared with the conventional method, and is effective in suppressing the oxidation of the W layer and the TiN layer. Further, the W surface oxidized by the resist peeling ashing is reduced to a good film. Further, it was confirmed that the thickness of the oxide film in the lower edge region of the gate electrode 18 was increased by about 5 nm by the method of the present embodiment.

Subsequently, n-type impurities, for example, arsenic are ion-implanted and activated using the field oxide film 12 and the gate electrode 18 as a mask to activate the n ⁺ -type diffusion layer 19 a serving as a source and a drain on the surface of the silicon substrate 11. 19
b was formed (FIG. 1E).

According to the present example, it was confirmed that the oxidation of the W layer and the TiN layer in the gate electrode structure can be minimized, and a semiconductor device having good gate electrode insulation resistance can be manufactured by lowering the process temperature. Was done.

FIGS. 3 (a) to 3 (c) show the applied power,
FIG. 4 is a characteristic diagram showing the thickness of a SiO ₂ film and a WO ₃ film with respect to a substrate temperature and a water pressure. The discharge of water shown in this embodiment is:
It can be changed within the range of the conditions of FIGS. The shaded area is a selective oxidation area in which W is not oxidized but only Si is oxidized. The tendency is that the higher the applied power and the substrate temperature, the better the selectivity, and the lower the water pressure, the better the selectivity. Each of these selective oxidation regions changes in various ways depending on the increase and decrease of three parameters of moisture pressure, substrate temperature, and applied power, and the selective oxidation region also differs depending on the type of metal. Here, the water discharge conditions are as follows:
00 mTorr, applied power of 10 to 500 W is preferable,
The substrate temperature is effective in the range from room temperature to 1000 ° C. More preferably, the water pressure is 10 to 1000 mT.
orr, 10 to 50 mTorr, and even 25 mTorr
Is good. In addition, the applied power is 100 W or more, and the substrate temperature is 300.
In the range of に お い て 800 ° C., better results are obtained. In addition to the discharge method using microwaves, there are a parallel plate type using RF, a magnetron type using magnets and electromagnets, and a method using helicon waves.

Next, a manufacturing process of a semiconductor device according to a second embodiment of the present invention will be described with reference to FIGS. First, the W layer 16 is formed in the same manner as in the first embodiment.
Was performed, a resist film 20 was applied on the W layer 16 and patterned by ordinary photolithography. Next, using the resist pattern 20 as a mask, the W layer 16, the TiN layer 15, and the polycrystalline silicon layer 14 are sequentially and selectively etched by reactive ion etching (RIE), thereby obtaining FIG.
Was formed.

Next, water was discharged to remove the 1 μm resist pattern 20 on the gate electrode 18. As the discharge conditions, the partial pressure of water vapor (H ₂ O) was set at 25.
At 6 mTorr and a substrate temperature of 530 ° C., H ₂ O was turned into plasma by microwave discharge and supplied to the silicon substrate 11 in a downflow manner as in the first embodiment. This plasma treatment was performed for 30 minutes.

FIG. 4 shows the results of the water discharge treatment.
As shown in (b), the resist film 20 on the W layer 16 was peeled off. At this time, the surface of the W layer 16 was not oxidized. At this time, the side wall of the polycrystalline silicon layer 14 of the gate electrode 18 and the side wall of the TiN layer 15 are slightly oxidized, and the oxide film in the lower edge region of the gate electrode 18 is about 5 nm thick. confirmed.

Subsequently, using the field oxide film 12 and the gate electrode 18 as a mask, an n-type impurity such as arsenic is ion-implanted and activated to activate the n ⁺ -type diffusion layer 19a serving as a source and a drain on the surface of the silicon substrate 11. , 19
b was formed (FIG. 4C).

The same effect was obtained with carbon as well as resist as the mask on the metal layer. The discharge of water shown in this embodiment can be changed within the range of the conditions shown in the first embodiment.

According to this embodiment, in the water discharge treatment step, the post-gate oxidation step can be performed simultaneously with the resist stripping step, and the process temperature can be lowered simultaneously with the shortening of the step. Furthermore, it was confirmed that a MOS type semiconductor device having good gate electrode insulation resistance can be manufactured.

Next, a manufacturing process of a semiconductor device according to a third embodiment of the present invention will be described with reference to FIGS. First, as in the first and second embodiments, W
After performing the process up to the step of depositing the layer 16, a resist film 20 was applied on the W layer 16 and patterned by ordinary photolithography. Next, using the resist pattern 20 as a mask, the W layer 16, the TiN layer 15, and the polycrystalline silicon layer 14 are subjected to reactive ion etching (RI
5E, the gate electrode 18 shown in FIG. 5A was formed.

Next, water was discharged to remove the 1 μm resist film 20 on the gate electrode 18. As a discharge condition, a partial pressure of water vapor (H ₂ O) was set to 25.6 mTorr.
r, the substrate temperature was set to 100 ° C., and microwave discharge (245
H ₂ O down-flow plasma processing was performed for 30 minutes at 0 MHz and an applied power of 100 W). As a result, FIG.
As shown in (1), the resist film 20 on the W layer 16 was peeled off. At this time, the surface of the W layer 16 was not oxidized.
Further, in order to increase the thickness of the oxide film in the lower edge region of the gate electrode 18, the substrate temperature is maintained while the substrate 11 is disposed in the reaction vessel 27 and the microwave discharge conditions are maintained at the above-described conditions. The temperature was raised to 530 ° C., maintained for 30 minutes, and then lowered. By this water discharge treatment, the gate electrode 18
It was confirmed that the oxide film in the lower edge region was thicker by about 5 nm. At this time, the surface of the W layer 16 was not oxidized. (FIG. 5 (c)).

Subsequently, n-type impurities, for example, arsenic are ion-implanted and activated using the field oxide film 12 and the gate electrode 18 as a mask, thereby activating the n ⁺ -type diffusion layer 19a serving as a source and a drain on the surface of the silicon substrate 11. , 19
b was formed (FIG. 5D).

In this embodiment, after the resist film is stripped at a low temperature, selective oxidation is performed at a high temperature, so that the residual organic matter in the atmosphere due to the resist film stripping hardly reacts with the substrate.
And it is quickly exhausted. According to this method, a favorable gate oxide film which is not affected by organic contamination can be formed, and a highly reliable gate electrode can be obtained.

The substrate temperature at the time of removing the resist film shown in the present embodiment is effective in the range of room temperature to 500 ° C., and the substrate temperature at the time of selective oxidation thereafter is 500 to 1000.
Good results are obtained in the range of ° C. Also the water pressure,
The condition of the applied power can be changed within the range of the condition shown in the first embodiment.

Further, in this embodiment, since the substrate is continuously processed in the same vacuum chamber, the steps such as moving between different chambers are not complicated, and the resist stripping processing and the selective oxidation processing can be performed in simple steps. It can be carried out. Note that in a situation where the complexity of the process is allowed to some extent, the resist stripping process and the selective oxidation process can be performed in different vacuum chambers. In this case, it is preferable that the transfer of the substrate between the chambers be performed in a vacuum, whereby the influence of the residual organic matter on the selective oxidation treatment can be minimized.

Next, a manufacturing process of a semiconductor device according to another example will be described with reference to FIGS. 6 (a) and 6 (b).
In this example, a layer made of a metal or metal compound is formed, a resist pattern is formed on the layer made of the metal or metal compound, and the layer made of the metal or metal compound is etched using the resist pattern as a mask. , Electrodes or wirings are formed, and thereafter, a gas consisting of only water is excited and turned into plasma by the down-flow type apparatus shown in FIG. 2, and the gas is supplied to the substrate to remove the resist pattern. is there.

First, a field oxide film 33 and ap ⁺ diffusion layer 34 are sequentially formed on an n-type silicon substrate 32 having (001) as a main surface. Next, CVD-SiO is used as an interlayer insulating film.
₂ is deposited on the entire surface, a contact hole is formed on the diffusion layer, a TiSi ₂ layer 37 is selectively formed at the bottom of the contact hole, and a W layer is formed in the contact hole. 38 is selectively embedded. Thereafter, a Ti film 39 / TiN film 40 / Al film 41 were sequentially formed and laminated, a resist film 42 was applied thereon, and this was patterned by ordinary photolithography. Next, using the resist pattern 42 as a mask, A
By selectively and selectively etching the l film 41, the TiN film 40, and the Ti film 39 by reactive ion etching (RIE), a wiring layer 43 shown in FIG. 6A was formed.

Next, water was discharged to remove the resist film 42 on the Al film 41. As the discharge conditions, the partial pressure of water vapor (H ₂ O) was set to 10 mTorr, and the substrate temperature was set to 100 mTorr.
° C and microwave discharge (2450 MHz, applied power 1)
00W) of H ₂ O down-flow plasma treatment for 30
Minutes went.

By this water discharge treatment, the resist film 42 on the Al film 41 was peeled off as shown in FIG. At this time, the surface of the Al film 41 in the wiring layer 43 is not oxidized,
Also, it was confirmed that a TiO ₂ film 44 of about 0.5 nm was formed on the side surfaces of the TiN film 40 and the Ti film 39 in the wiring layer 43.

In the conventional method of stripping the resist using an O ₂ asher, the surface of the Al wiring is also oxidized during the stripping process, and
Since l ₂ O ₃ is formed, this Al
It is essential to remove ₂ O ₃ . According to the present embodiment, since the Al wiring surface is not oxidized when the resist is stripped, the step of removing Al ₂ O ₃ is not required, and the number of steps is reduced, and a highly reliable semiconductor device can be manufactured.

In the above example, Al wiring has been described. However, the present invention is not limited to this and can be applied to general metal wiring such as Cu or general metal electrodes. Further, the present invention can be applied to resist stripping on a metal compound layer (such as TiN or TiSi ₂ ).

In the discharge of water shown in the above example,
Good results are obtained when the substrate temperature range is from room temperature to 500 ° C., and the conditions of applied power and water pressure can be changed within the ranges shown in the first embodiment.

The present invention can be applied not only to the resist stripping step but also to a step of removing an organic substance remaining on a metal layer or a metal compound layer after the conventional resist stripping step. The effect was obtained.

The present invention is not limited to the above embodiment. For example, as the gas containing oxygen and hydrogen, hydrogen peroxide, hydrogen, oxygen, or the like can be used in addition to water.
In particular, when water and hydrogen or hydrogen peroxide and hydrogen are used in combination, the effect of selective oxidation is remarkable.

Further, a gas containing oxygen and hydrogen, for example, water and a rare gas (Ar, Kr, or the like) may be mixed, and silicon may be selectively oxidized using the mixed gas. It is also possible to increase the speed.

Although the Al film and the W layer have been described as the metal layers, other metal layers such as molybdenum, platinum, palladium, rhodium, ruthenium, nickel, cobalt, tantalum, titanium, copper and the like may be used. Further, other than the metal layer, for example, a metal compound layer (TiN, TiSi ₂ or the like) may be used.

As a reaction barrier layer sandwiched between a metal layer and a polycrystalline silicon layer, other than titanium nitride, nitride such as zirconium, hafnium, tungsten, vanadium, niobium, tantalum, chromium, rhenium, silicon, etc. Further, oxides such as titanium, zirconium, hafnium, tungsten, vanadium, niobium, tantalum, chromium, rhenium, and silicon, and nitrided oxides may be used.

Further, as the silicon layer, a layer on the surface of a silicon substrate, a silicon layer on a surface of an SOI (Silicon On Insulator) substrate, a silicon layer on an insulating substrate, or the like can be considered. In addition, the present invention can be variously modified and implemented without departing from the gist thereof.

[0064]

According to the present invention, the selective oxidation of the silicon layer with respect to the layer made of a metal or a metal compound can be performed in a simple step by using a gas containing oxygen and hydrogen which has been turned into plasma. It is possible.

Therefore, the resist stripping or post-gate oxidation step can be easily performed while suppressing the oxidation of the metal layer and the like constituting the gate electrode.
Since the O ₂ film can be formed, the thermal load can be reduced, and the gate withstand voltage can be improved.

[Brief description of the drawings]

FIG. 1 is a process sectional view showing a first embodiment of a method of manufacturing a semiconductor device according to the present invention.

FIG. 2 is a sectional view showing a schematic configuration of a processing apparatus using microwave discharge used in the first embodiment.

FIG. 3 shows the relationship between the applied power, the substrate temperature, and the moisture pressure.
Characteristic diagram showing film thickness of ₂ film and WO ₃ film

FIG. 4 is a process sectional view showing a second embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 5 is a process sectional view showing a third embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 6 is a process sectional view showing another example.

FIG. 7 is a process cross-sectional view illustrating a method for manufacturing a conventional semiconductor device.

[Explanation of symbols]

11: p-type silicon substrate 12: field oxide film 13: silicon oxide film 14: polycrystalline silicon layer 15: TiN layer 16: W layer 17: TiO ₂ film 18: gate electrode 19a, 19b: n ⁺ type diffusion layer 20: Resist film 21: Raw material container 22: Needle valve 23: Needle valve 24: Moisture meter 25: Microwave discharge part 26: Plasma 27: Reaction container (quartz tube) 28: Sample (substrate) 29: Ceramic heater 30: Turbo molecular pump 31: Rotary pump 32: n-type silicon substrate 33: field oxide film 34: p ⁺ diffusion layer 35: CVD-SiO ₂ film 36: BPSG film 37: TiSi ₂ layer 38: W layer 39: Ti film 40: TiN film 41 : Al film 42: resist pattern 43: wiring layer 44: TiO ₂ film 71: p-type silicon substrate 72: Fi Field insulating films 73a, 73b: n ⁺ -type diffusion layer 74: gate oxide film 75: polycrystalline silicon 75 ': dopant 76: metal nitride layer 77: W layer 78: Gate electrode

Continuation of the front page (56) References JP-A-1-186675 (JP, A) JP-A-2-237118 (JP, A) JP-A-3-119763 (JP, A) JP-A-4-144226 (JP) JP-A-5-343391 (JP, A) JP-A-6-151386 (JP, A) JP-A-6-163543 (JP, A) JP-A-59-132136 (JP, A) 62-115727 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/336 H01L 29/78 H01L 21/316 H01L 21/28 H01L 21/3205

Claims (8)

(57) [Claims] A step of generating H and OH by exciting a gas consisting only of water to produce plasma, and a step of producing a H and an OH on a substrate in which a region composed of silicon and a region composed of a metal or a metal compound are mixed. and supplying OH, with an oxidation region composed of the silicon, oxidized simultaneously
The region made of silicon is selected by selectively reducing the region made of the metal or metal compound to be formed.
And a step of selectively oxidizing the semiconductor device. 2. A step of forming a gate insulating film on a silicon layer, a step of forming a metal or metal compound layer on the gate insulating film, and forming a resist pattern on the metal or metal compound layer. A step of forming, a step of forming a gate electrode by etching a layer made of the metal or metal compound using the resist pattern as a mask, a step of removing the resist pattern, and exciting a gas consisting of only water A step of generating H and OH by plasma, and using the H and OH to oxidize the silicon layer after removing the resist pattern, and comprising the metal or metal compound that is simultaneously oxidized. especially the selective reduction of the layer
Further comprising the step of selectively oxidizing the silicon layer . 3. A step of removing the resist pattern and oxidizing the silicon layer , and simultaneously oxidizing the silicon layer.
By selectively reducing the layer made from the metal or metal compound is, <br/> step of selectively oxidizing the silicon layer is characterized by continuously be carried out in the same vacuum chamber A method for manufacturing a semiconductor device according to claim 2 . After wherein removing the resist pattern, at a temperature higher than the temperature of removing the resist pattern, performs oxidation of the silicon layer, simultaneously oxide
It is by selectively reducing a layer composed of the metal or metal compound, a semiconductor device according to claim 2, wherein <br/> selectively oxidizing the silicon layer. Forming a wherein a silicon layer gate insulating on the membrane, forming a layer made of a metal or metal compound on the gate insulating film, a resist pattern in a layer on comprised of the metal or metal compound Forming a gate electrode by etching the layer made of the metal or metal compound using the resist pattern as a mask; and exciting H and OH by exciting a gas consisting only of water to form a plasma. Generating, and H
And OH to remove the resist pattern and oxidize the silicon layer ,
The method of manufacturing a semiconductor device which, by the selective reduction of the layer composed of the metal or metal compound, characterized by comprising a <br/> Ru step to selectively oxidize the silicon layer is of. 6. The method according to claim 1 , wherein the step of generating H and OH by exciting the gas consisting of only water to produce plasma is performed in a region made of silicon or a place remote from the silicon layer. the method of manufacturing a semiconductor device according to any one of claims 1 to 5. 7. The method according to claim 1, wherein said metal or metal compound is made of tungsten, molybdenum, platinum, palladium, rhodium, ruthenium, nickel, cobalt, tantalum, titanium, aluminum, copper or a compound thereof. the method of manufacturing a semiconductor device according to any one of claims 1 to 6. Wherein said H and OH, the method according to claim 6, wherein the feeding in downflow for the area or the silicon layer made of the silicon.