JP3348272B2 - Wafer polishing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for polishing a wafer, and more particularly to a method for polishing a semiconductor wafer by using a CMP (Chemical Mechanical Polishing) method.

[0002]

2. Description of the Related Art Conventionally, in the manufacturing process of a semiconductor device,
For the purpose of improving the accuracy of the photolithography process,
After a semiconductor element such as a transistor is formed, a flattening process for flattening the surface of a semiconductor wafer is performed. As such a flattening process, an SOG (spin-on-glass) method is typical. With the progress of miniaturization, flatter flattening is required.

In order to meet such demands, in recent years, CMP using a polishing cloth containing a chemical etching solution has been demanded.
Law attracts attention, Damascene
It is becoming the main technology for flattening including the method.

Here, a polishing method using such a conventional CMP method will be described with reference to FIGS. Referring to FIG. 4A, in a conventional CMP apparatus, a semiconductor wafer 23 to be polished is attached to a head 22 provided at the tip of a spindle 21 by using a backing pad 24 having elasticity and having double-sided tape on both sides. Hold and fix the template 25
This restricts the movement of the semiconductor wafer 23 in the radial direction.

On the other hand, a soft polishing cloth 27 (for example, Suba400 manufactured by Rodale Nitta Co., Ltd .: 1.27 mm thick) having a compression ratio of about 8% is placed on the surface plate 26 and a compression rate of about 1%.
Hard polishing cloth 28 having a Shore hardness (JIS standard hardness) of 57 (for example, IC100 manufactured by Rodel Nitta Co., Ltd.)
0: a thickness of 0.8 mm) is fixed, and the semiconductor wafer 23 is pressed against the hard polishing cloth 28 by lowering the head 22 in the direction of the arrow in FIG.
The semiconductor wafer 23 is polished by rotating the platen 26 while rotating the head 22.

Referring to FIG. 4B, in order to polish the semiconductor wafer 23 with high precision, the entire semiconductor wafer 23 must be pressed uniformly and evenly. , Surface plate 2
6 and the head 22 are polished in a state in which one-side shaving due to surface run-out or the like, or partial unevenness due to warpage or distortion of the semiconductor wafer 23 has occurred.
Polishing was performed by pressing the soft polishing cloth 27 to a state where the soft polishing cloth 27 was slightly bent to the extent that the recess 29 was formed.

However, as shown in FIG. 5 (a), the surface of the semiconductor wafer 23 that requires polishing has local irregularities 30 with a spacing d ₁ of μm due to the formation of semiconductor elements and the associated electrodes and wirings. Interval d
_It is common that ₂ has global irregularities 31 in mm units. In ideal polishing, polishing should start from a high convex portion and gradually move to a low convex portion. The polishing result differs depending on the distribution of such surface irregularities.

For example, when polishing is performed using only a hard backing pad and a hard polishing cloth 28, the hard polishing cloth follows the global irregularities 31 and uniformly presses the entire surface of the wafer. There is a problem that you can not.

[0009] On the other hand, when only the soft polishing cloth 27 is used, since it has cushioning properties, it can follow the local irregularities 30, but the soft polishing cloth 27 is deformed and the global polishing cloth 27 is deformed. There is a drawback in that so-called dishing occurs in which a concave portion is formed by polishing the concave portion in the concave and convex portion 31.

Therefore, as the conventional polishing cloth, a polishing cloth having a stack structure in which the soft polishing cloth 27 and the hard polishing cloth 28 are stacked as described above is used. Due to the characteristics, the entire surface of the semiconductor wafer 23 could not always be pressed uniformly.

Another factor that affects the polishing characteristics simultaneously with the polishing cloth is the hardness of the backing pad. For example, the soft polishing cloth 28 (for example, the above-mentioned Suba 400) is used.
When a backing pad having a lower hardness than the backing pad, for example, a backing pad having a compression ratio of 8% or more is used, the cushioning effect appears on the backing pad side.

On the other hand, when a backing pad having a high hardness, for example, a backing pad having a compression ratio of 8% or less, a cushion effect appears on the polishing cloth side.

[0013]

However, when a backing pad having a low hardness is used, there is a problem that although a certain portion can be polished substantially uniformly, a different portion has significant irregularities.

FIG. 6 shows the polishing result when such a backing pad having a low hardness is used, and shows a substantially uniform polishing distribution within a diameter of 80 mm at the center of the semiconductor wafer. In the range of about 10 mm in the periphery, there is a problem of so-called chipping, which is not polished much. It is considered that the edge of the semiconductor wafer escapes to the soft backing pad side.

When a backing pad having high hardness is used, the edge of the semiconductor wafer does not escape to the backing pad side, so that there is no problem of chipping, but small irregularities are generated as a whole.

FIG. 7 shows the polishing result when such a backing pad having a high hardness is used. Although there is no chipping around the semiconductor wafer, a difference in elevation is observed over the entire surface of the semiconductor wafer. Small irregularities of about 1000 ° (0.1 μm) were observed, which is considered to be the result of dishing in global irregularities.

Accordingly, the present invention provides a method for polishing a semiconductor wafer so as to eliminate unevenness uniformly over the entire surface of the semiconductor wafer;
It is intended to suppress the occurrence of chipping.

[0018]

FIG. 1 is an explanatory view of the principle configuration of the present invention. Referring to FIG. 1, means for solving the problems in the present invention will be described. See FIG. 1. (1) The present invention relates to a wafer polishing method for polishing a wafer using a polishing cloth, wherein a circular soft hard disk provided at a central portion is provided.
Inner pad 2 and a ring-shaped
Bucky that combines outer pad 3 with higher hardness
By Ngupaddo 1, with pressing the wafer, in
The hardness of the polishing pad 2 is made softer than the hardness of the polishing pad .

As described above, by forming the backing pad 1 using pads having different hardnesses, it is possible to partially control the pressing force applied to the wafer, thereby uniformly polishing the entire surface of the wafer. Can be.

[0020]

Further, by hardening the hardness of the outer pad 3 than the hardness of the inner pad 2, the cushioning effect can easily manifested is the polishing cloth side of the peripheral wafer, suppressing generation of scraping pieces around the wafer It is possible,
In addition, since it is easy to appear on the backing pad 1 side in the central portion of the wafer, the occurrence of dishing in the central portion of the wafer can be suppressed.

[0022]

Further, by making the hardness of the inner pad 2 softer than the hardness of the polishing pad, the cushion effect at the central portion appears on the backing pad 1 side, so that the occurrence of dishing at the central portion can be suppressed.

( 2 ) In the present invention, a polishing cloth is used.
In the wafer polishing method for polishing wafers
Circular inner pad 2 of soft hardness and its surroundings
Ring-shaped outer pad 3 of higher hardness
The wafer is pressed by the combined backing pad 1
In addition, the polishing pad is characterized in that the polishing pad is a stack polishing pad composed of a soft base polishing pad and a hard upper pad polishing pad, and that the hardness of the outer pad 3 is higher than the hardness of the base polishing pad.

As described above, when the stack polishing cloth is used as the polishing cloth, the cushion effect in the peripheral portion appears on the backing pad 1 side by making the hardness of the outer pad 3 harder than the hardness of the base polishing cloth. Therefore, the occurrence of chipping around the wafer can be suppressed.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. FIG. 2 shows the structure of the backing pad 11 used in the embodiment of the present invention. The backing pad 11 has a soft inner pad 12 having a diameter φ _i of 100 mm and an inner diameter φ _i having an outer diameter φ _o of 150 mm. It is composed of a 100 mm ring-shaped hard outer pad 13.

As the inner pad 12 in this case,
R with a compressibility of 30% and a thickness of 500 μm (0.5 mm)
201 (trade name of Rodale Nitta Co., Ltd.)
Further, as the outer pad 12, R204 (Rodel-Roller) having a compression ratio of 5% and a thickness of 500 μm (0.5 mm) is used.
Nitta Co., Ltd.).

The CM used in the embodiment of the present invention
The P polishing apparatus and the polishing cloth are the same as those of the conventional polishing method shown in FIG. 4. As the polishing cloth, a Suba400 (commercially available from Rodale Nitta) having a compression ratio of about 8% and a thickness of 1.27 mm is used. An underground polishing cloth made of (trade name) and I having a compression ratio of about 1%, a shore hardness of 57, and a thickness of 0.8 mm
A stack polishing cloth is used in which an upper polishing cloth made of C1000 (trade name, manufactured by Rodale Nitta Co., Ltd.) is laminated.

The rotation speed of the platen is 30 rotations / minute, the rotation speed of the head is 35 rotations / minute, and the load is 500 g / c.
It is intended to polish with the conditions and m ^2, FIG. 3 shows a polishing distribution when polishing the semiconductor wafer 3 minutes under such conditions.

Referring to FIG. 3, as is apparent from FIG. 3, in the embodiment of the present invention, a substantially uniform flat surface, that is, a smooth surface of 250 ° or less in unevenness difference is obtained over the entire surface of the semiconductor wafer. .

Since the inner pad 12 constituting the backing pad 11 is made of R201 which is softer than the Suba 400, the cushion effect at the central portion of the semiconductor wafer appears on the inner pad 12 side, and the polishing cloth is not easily bent. Therefore, it is considered that the dishing is suppressed.

Further, as the outer pad 13 constituting the backing pad 11, an R pad harder than Suba 400 is used.
Since the semiconductor wafer 204 is used, the cushion effect at the peripheral portion of the semiconductor wafer appears on the polishing cloth side, and the edge of the semiconductor wafer does not escape to the backing pad side.

The present invention is not limited to the above-described backing pad, and the sizes of the inner pad 12 and the outer pad 13 may be reduced to a one-sided state depending on the characteristics of the used CMP polishing apparatus. The hardness may be appropriately set according to the requirements, and the hardness may be determined according to the hardness of the stack polishing cloth to be used.

In the above embodiment, the backing pad 11 is constituted by one inner pad 12 and one outer pad 13. However, the present invention is not limited to such a double structure. A ring-shaped intermediate pad having a hardness intermediate between the pad and the outer pad may be provided to form a backing pad having a triple structure or more.

In the above-described embodiment, a stacked polishing cloth composed of Suba400 and IC1000 is used as the polishing cloth. However, the present invention is not limited to such a combination, and may be appropriately selected according to the object to be polished. It is only necessary to use a single polishing cloth.

The object to be polished is a semiconductor wafer or
It is not limited to the insulating layer or the conductive layer provided on the semiconductor wafer, but may be a ferroelectric wafer constituting an optical IC or a ferroelectric device, or an insulating layer or a conductive layer provided on a ferroelectric wafer. It is to be polished.

[0037]

According to the present invention, when the wafer is polished by the CMP method, the backing pad is constituted by a combination of an inner pad and an outer pad having different hardnesses, thereby eliminating the unevenness of the whole wafer and removing the unevenness of the whole wafer. Uniform polishing without shaving can be performed, which greatly contributes to improvement in the degree of integration of the semiconductor device.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a basic configuration of the present invention.

FIG. 2 is an explanatory diagram of an embodiment of the present invention.

FIG. 3 is an explanatory diagram of a polishing result according to the embodiment of the present invention.

FIG. 4 is an explanatory view of a conventional wafer polishing method.

FIG. 5 is an explanatory diagram of a problem in a conventional wafer polishing method.

FIG. 6 is an explanatory diagram of a polishing result when a conventional hard polishing cloth is used.

FIG. 7 is an explanatory diagram of a polishing result when a conventional soft polishing cloth is used.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 backing pad 2 inner pad 3 outer pad 11 backing pad 12 inner pad 13 outer pad 21 spindle 22 head 23 semiconductor wafer 24 backing pad 25 template 26 platen 27 soft polishing cloth 28 hard polishing cloth 29 dent 30 local irregularity 31 global Unevenness

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-5-243197 (JP, A) JP-A-8-264497 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/304

Claims (2)

(57) [Claims] In a wafer polishing method for polishing a wafer using a polishing cloth, a circular soft hardness provided at a central portion.
And an inner pad provided around the inner pad.
Combined with a harder outer pad in the shape of a ring
The backing pad which has, when pressing the wafer
In both cases, the hardness of the inner pad is
A wafer polishing method characterized by being softer than the temperature. 2. A wafer for polishing a wafer using a polishing cloth.
In the polishing method, a circular soft hardness provided at the center
And an inner pad provided around the inner pad.
Combined with a harder outer pad in the shape of a ring
When the wafer is pressed by the backing pad
In both cases, the polishing cloth is made of a soft-
A stack polishing cloth consisting of an upper polishing cloth having a hardness; and
The hardness of the outer pad is determined by the hardness of the underlying polishing cloth.
A wafer polishing method characterized by being harder than a wafer.