JP3347342B2 - Method of forming alloy solder bump - Google Patents
Method of forming alloy solder bumpInfo
- Publication number
- JP3347342B2 JP3347342B2 JP16692491A JP16692491A JP3347342B2 JP 3347342 B2 JP3347342 B2 JP 3347342B2 JP 16692491 A JP16692491 A JP 16692491A JP 16692491 A JP16692491 A JP 16692491A JP 3347342 B2 JP3347342 B2 JP 3347342B2
- Authority
- JP
- Japan
- Prior art keywords
- alloy
- composition
- solder
- solder bump
- alloy solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Physical Vapour Deposition (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明ははんだバンプの形成方法
に係り、特に、半導体素子、回路配線基板等、とりわけ
フリップチップ接合等に用いる合金はんだバンプの形成
方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a solder bump , and more particularly to a method for forming an alloy solder bump used for a semiconductor element, a circuit wiring board, etc., and especially for flip chip bonding.
About the method .
【０００２】[0002]
【従来の技術】コンピュータを高速動作させるために、
実装構造の高密度化、多様化が進み、はんだ接合温度の
階層化が求められている。つまり、様々な接合温度を持
つはんだ材料、ならびに、それらのバンプ形成技術が必
要であり、単一の金属のはんだのみでは対応することは
できない状況になっている。2. Description of the Related Art In order to operate a computer at high speed,
Higher density and diversification of mounting structures are progressing, and a hierarchy of solder bonding temperatures is required. In other words, a solder material having various joining temperatures and a bump forming technology for them are required, and the situation is such that it is impossible to cope with only a single metal solder.
【０００３】そこで、Ｉn,Ｐb,Ｓn 等の金属を用いた合
金はんだが、その接合温度の多様性、良好なはんだ付け
性から現在多く用いられている。しかしながら、はんだ
バンプは膜厚が大きいために、蒸着法によって合金のは
んだバンプを形成するのは困難であった。まず単一のる
つぼで合金はんだバンプを形成する場合、各成分金属の
蒸気圧の違いから、蒸気圧の高い金属が優先的に蒸着さ
れるため、るつぼ中の母合金組成に関わらず、蒸気圧の
高い金属がリッチな組成のはんだバンプしか得ることが
出来ない。複数のるつぼを用いて各組成の金属を別々に
蒸着してはんだバンプを形成する方法では、各成分金属
ごとに蒸着レートをモニターし、これをフィードバック
して蒸着パワーを随時変えながら蒸着する必要がある。
はんだバンプのような厚膜では、蒸着レートのモニター
が困難であること、多元系になればなるほど各成分金属
ごとのモニター、制御は困難であり、目的の組成の合金
のはんだバンプを得ることは困難である。[0003] Therefore, alloy solders using metals such as In, Pb, and Sn are widely used at present because of the variety of joining temperatures and the good solderability. However, since the solder bump has a large film thickness, it is difficult to form an alloy solder bump by a vapor deposition method. First, when forming an alloy solder bump with a single crucible, the metal with the higher vapor pressure is deposited preferentially due to the difference in vapor pressure of each component metal. A high metal can only obtain solder bumps with a rich composition. In the method of forming solder bumps by separately depositing metals of each composition using a plurality of crucibles, it is necessary to monitor the deposition rate for each component metal and feed back this to change the deposition power as needed. is there.
For thick films such as solder bumps, it is difficult to monitor the deposition rate, and the more multi-component systems are, the more difficult it is to monitor and control each component metal. Have difficulty.
【０００４】[0004]
【発明が解決しようとする課題】そこで、本発明は、蒸
着レートの制御等を必要とせずに、簡単な方法を用いる
ことによって、蒸気圧の差、多元系であるかどうかに関
わらず、目的の組成の合金はんだバンプを形成する方法
を提供することを目的とする。SUMMARY OF THE INVENTION Accordingly, the present invention provides a simple method that does not require the control of the deposition rate and the like, irrespective of the difference in vapor pressure and whether or not the system is multi-system. It is an object of the present invention to provide a method for forming an alloy solder bump having the following composition.
【０００５】[0005]
【課題を解決するための手段】本発明は、上記目的を達
成するために、蒸発用るつぼ中に、蒸発し切ったときに
所望の組成及び膜厚の多元系合金膜が得られるように予
め調整した組成及び量の母合金を用意する工程と、前記
母合金の追加補給を行わずに、この母合金を蒸発し切る
ことによって基板上に前記所望の組成及び膜厚の多元系
合金膜を得る工程とからなる合金はんだバンプの形成方
法を提供する。SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a multi-component alloy film having a desired composition and film thickness when completely evaporated in an evaporating crucible. pre to be
Preparing a fit adjusted composition and amount of the mother alloy, wherein
Without additional replenishment of the mother alloy, the multi-component system having the desired composition and film thickness is formed on the substrate by completely evaporating the master alloy.
A method for forming an alloy solder bump comprising a step of obtaining an alloy film .
【０００６】すなわち、本発明では、目的の組成の合金
を蒸着するための母合金組成を予め求めおくことによっ
て、任意の組成の合金の蒸着膜を得る。That is, in the present invention, a vapor deposited film of an alloy having an arbitrary composition is obtained by previously obtaining a mother alloy composition for vapor deposition of an alloy having a desired composition.
【０００７】[0007]
【実施例】図１は、本発明の原理説明図である。図中、
１はるつぼ、２は成分金属Ａ、３は成分金属Ｂである。
このはんだ合金をすべて蒸着しつくすことによって、目
的とする組成のはんだバンプを得ることができる。るつ
ぼ１中の成分金属２，３は合金として存在してもよく、
また成分金属ごとに異なるるつぼを用いてもよい。FIG. 1 is a diagram illustrating the principle of the present invention. In the figure,
1 is a crucible, 2 is a component metal A, and 3 is a component metal B.
By vapor-depositing all of the solder alloy, a solder bump having a desired composition can be obtained. The component metals 2 and 3 in the crucible 1 may exist as an alloy,
Further, a different crucible may be used for each component metal.
【０００８】図２はＩn −Ｐb 系合金のるつぼ中の組成
とこれを蒸発し尽くした場合に得られる蒸着膜の組成と
の関係を求めた補正曲線である。この図から、例えば、
Ｉn−50％Ｐb の合金を蒸着するためには、るつぼ中に
Ｉn −44％Ｐb の組成に相当するＩn とＰb を用意し、
これを蒸着し尽くせばよいことがわかる。本発明が３元
以上の合金にも好適に適用できることは明らかである。FIG. 2 is a correction curve showing the relationship between the composition of the In-Pb alloy in the crucible and the composition of the deposited film obtained when the composition is completely evaporated. From this figure, for example,
In order to deposit an alloy of In-50% Pb, In and Pb corresponding to the composition of In-44% Pb are prepared in a crucible,
It can be seen that this should be completely evaporated. It is clear that the present invention can be suitably applied to ternary and higher alloys.
【０００９】図２の補正曲線にもとづいて、Ｉn −50wt
％Ｐbの合金はんだバンプを作成するために、Ｉn 181
ｇとＰb 142 ｇをるつぼ中に入れ、これを蒸着し尽くす
ことにより、シリコン基板上にＩn −Ｐb 合金を厚さ 1
00μｍに蒸着した。この合金をＩＣＰ発光分析法で組成
分析したところ、Ｉn −50wt％Ｐb であった。On the basis of the correction curve shown in FIG.
% Pb alloy solder bumps, In 181
g and Pb 142 g were placed in a crucible, and the In-Pb alloy was deposited on a silicon substrate to a thickness of 1 by vapor deposition.
It was deposited to a thickness of 00 μm. The composition of this alloy was analyzed by ICP emission spectrometry. As a result, it was found to be In-50 wt% Pb.
【００１０】その他、Ｓb −Ｐb 系合金はんだ、Ｉn −
Ｓn 系合金はんだでも同様のことが確認された。[0010] In addition, Sb-Pb alloy solder, In-
The same was confirmed with the Sn-based alloy solder.
【００１１】[0011]
【発明の効果】本発明によれば、合金を厚く蒸着する際
にも組成の制御が容易である。したがって、任意の組成
のはんだバンプを形成することができ、実装構造をより
多様化することが可能である。According to the present invention, the composition can be easily controlled even when depositing a thick alloy. Therefore, a solder bump having an arbitrary composition can be formed, and the mounting structure can be further diversified.
【図１】発明の原理説明図である。FIG. 1 is a diagram illustrating the principle of the present invention.
【図２】Ｉn −Ｐb 系合金の蒸着用補正曲線である。FIG. 2 is a correction curve for vapor deposition of an In—Pb-based alloy.
１…るつぼ ２…成分金属Ａ ３…成分金属Ｂ 1. Crucible 2. Component metal A 3. Component metal B
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭59−83766（ＪＰ，Ａ) 特開 昭56−47563（ＪＰ，Ａ) 特開 昭62−214170（ＪＰ，Ａ) 日本学術振興会著「薄膜工学ハンドブ ック（エレクトロニクスへの応用）」 （昭39−５−25）オーム社 Ｉ−146〜 Ｉ−148 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-59-83766 (JP, A) JP-A-56-47563 (JP, A) JP-A-62-214170 (JP, A) By Japan Society for the Promotion of Science "Thin Film Engineering Handbook (Application to Electronics)" (39-5-25, 1963) Ohmsha I-146 to I-148
Claims (2)
所望の組成及び膜厚の多元系合金膜が得られるように予
め調整した組成及び量の母合金を用意する工程と、 前記母合金の追加補給を行わずに、この母合金を蒸発し
切ることによって基板上に前記所望の組成及び膜厚の多
元系合金膜を得る工程とからなる合金はんだバンプの形
成方法。1. A during the evaporation crucible, pre as <br/> desired composition and thickness of the multi-component alloy film is obtained when a fully evaporated
Preparing a fit adjusted composition and amount of the mother alloy, said without additional supplementation of the mother alloy, multi of the desired composition and thickness on the substrate by the as possible to evaporate the mother alloy
Shape of alloy solder bumps consisting of a process to obtain a base alloy film
Forming method.
Ｉｎ−Ｓｎ系合金はんだ、又はＩｎ−Ｐｂ系合金はんだ
である請求項１記載の合金はんだバンプの形成方法。2. The method according to claim 1, wherein the alloy film is a Sn—Pb-based alloy solder,
The method for forming an alloy solder bump according to claim 1, wherein the method is an In-Sn-based alloy solder or an In-Pb-based alloy solder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16692491A JP3347342B2 (en) | 1991-07-08 | 1991-07-08 | Method of forming alloy solder bump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16692491A JP3347342B2 (en) | 1991-07-08 | 1991-07-08 | Method of forming alloy solder bump |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH059713A JPH059713A (en) | 1993-01-19 |
| JP3347342B2 true JP3347342B2 (en) | 2002-11-20 |
Family
ID=15840186
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16692491A Expired - Fee Related JP3347342B2 (en) | 1991-07-08 | 1991-07-08 | Method of forming alloy solder bump |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3347342B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4136845B2 (en) | 2002-08-30 | 2008-08-20 | 富士電機ホールディングス株式会社 | Manufacturing method of semiconductor module |
| WO2005086218A1 (en) | 2004-03-02 | 2005-09-15 | Fuji Electric Holdings Co., Ltd. | Process for producing semiconductor module |
| EP1734570A4 (en) * | 2004-03-02 | 2008-03-05 | Fuji Electric Holdings | Method for packaging electronic component |
-
1991
- 1991-07-08 JP JP16692491A patent/JP3347342B2/en not_active Expired - Fee Related
Non-Patent Citations (1)
| Title |
|---|
| 日本学術振興会著「薄膜工学ハンドブック（エレクトロニクスへの応用）」（昭３９−５−２５）オーム社 Ｉ−１４６〜Ｉ−１４８ |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH059713A (en) | 1993-01-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20000509 |
|
| LAPS | Cancellation because of no payment of annual fees |