JP3345160B2 - Semiconductor wafer alignment method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for aligning a semiconductor wafer in a semiconductor wafer exposure apparatus.

[0002]

2. Description of the Related Art A semiconductor wafer, unlike a square shape such as a glass substrate, has a circular shape most often through Si or a compound semiconductor. This is because a crystal is often formed by a pulling method (Czochralski method), and the crystal is rotated in order to improve the uniformity of the crystal, which results in a circular ingot.

[0003] Since a semiconductor wafer is a crystal, its electrical, optical, mechanical, and chemical properties have anisotropy.

[0004] Therefore, the pulled ingot has a plane orientation of ± 0.1 to 0.5 ° by a method such as X-ray diffraction.
It is measured with a precision of the order and sliced.

Prior to slicing, an orientation flat (commonly referred to as an orientation flat) is cut into a cylindrical ingot in order to indicate the crystal orientation in the semiconductor wafer plane. For example, as shown in FIG. 4, a 3 inch diameter GaAs wafer 1 having a (100) plane has a diameter of 2R.
= 75 mm, length L _OF = 22 mm of the orientation flat 3, the direction from the back surface to the front surface of the semiconductor wafer 1 is the (001) direction, the X direction square to the orientation flat 3 is the (110) direction, and the Y direction perpendicular to the orientation flat 3. Is [1, -1 (with bar), 0]
Direction.

The semiconductor wafer 1 is processed using the photolithography technique, and semiconductor devices are formed thereon. Conventionally, the semiconductor device is strictly aligned with the straight line of the orientation flat 3 indicating the in-plane crystal orientation. Accordingly, the formation of element patterns and the layout of IC chips have not been performed.

For example, in a reduction projection exposure machine called a stepper or an exposure machine of a system in which a semiconductor wafer is brought into close contact with a mask called a contact mask aligner, a semiconductor wafer is placed on a wafer chuck for exposure. At another location, the semiconductor wafer is rotated with respect to the center of the semiconductor wafer, the position of the orientation flat on the outer periphery is detected by a transmission or reflection type optical sensor, the rotation of the semiconductor wafer is stopped, and the rotation direction of the semiconductor wafer is positioned. (Angle determination), and then moved again onto the wafer chuck.

Although this re-movement is performed mechanically, a steady error or a fluctuation error often occurs in the rotation angle of the semiconductor wafer due to the re-movement. Whether or not the rotation angle of the semiconductor wafer is exactly 0 ° on the wafer chuck cannot be known unless the exposure and development are actually performed, and even if a deviation occurs, a protractor is required to measure the rotation angle. There was only a low-precision method, such as measuring by applying a force.

[0009]

As described above, in the conventional exposure apparatus described above, the mask pattern cannot be aligned exactly parallel to the orientation flat of the semiconductor wafer. For example, as shown in FIG. 5, the arrangement of the IC chips 4 on the semiconductor wafer 1 rotates by [theta] -90 [deg.]. When a semiconductor device is completed in such a manner, when each chip is separated in a final step (referred to as dicing), disorder of the outer shape of the chip due to deviation of the cleavage property of the crystal itself and the dicing direction is caused. There were problems such as occurrence.

In an active device using a quantum wire, a thin wire channel having a width of several tens to several hundreds of degrees is required to be formed in the (110) direction. The deviation could not be less than ± 0.1 °, excessive electron scattering occurred, and desired characteristics could not be obtained, or an element pattern could not be formed as designed.

According to the present invention, in order to eliminate the above-mentioned problems, the rotation angle of the orientation flat of a semiconductor wafer can be detected on a wafer chuck for performing exposure, and adjusted so as to be exactly zero. and to provide an excellent way method combined semiconductor wafer position in the exposure apparatus.

[0012]

According to the present invention, there is provided a semiconductor wafer having an orientation flat.
(C) to transfer an element pattern onto the semiconductor wafer.
A method for aligning a semiconductor wafer with a mask, the device pattern comprising:
Formed outside the region where the element pattern is formed.
Orientation flat alignment slit
Prepare the luma risk of having a bets, the orientation off
And through the slit rats alignment, the Oriente
The semiconductor wafer is moved by irradiating the semiconductor flat with light.
While moving, align the orientation flat
The orientation of the semiconductor wafer through the alignment slit.
The shape or shape of the light reflected on the entrance flat
Converts the intensity into an electric signal and detects the electric signal.
When the amount of change in the air signal becomes substantially constant,
Is terminated.

[2] The semiconductor wafer position according to the above [1]
In the aligning method, a resist is formed on the semiconductor wafer.
A film is formed, and the light is applied to a photosensitive wave of the resist film.
It is characterized by having a long wavelength.

[3] The semiconductor wafer position according to the above [2]
In combined method, the light is pre-Symbol resist film exposed
Has a longer wavelength than the wavelength of the light used to be
It is characterized by the following.

[4] The semiconductor wafer position according to the above [1]
In the aligning method, the semiconductor wafer has a reduction ratio of 1
/ 1 is set in the exposure apparatus.

[5] The semiconductor wafer position according to the above [1]
In the aligning method, the semiconductor wafer is formed by a projection exposure method.
It is set in an exposure apparatus of the formula.

[6] The semiconductor wafer position according to the above [1]
In the aligning method, a wafer on which the semiconductor wafer is mounted is mounted.
Use an exposure device that prevents the reflection or scattering of light from hastage.
It is characterized by being.

[7] The semiconductor wafer position according to the above [1]
In the alignment method, form a tapered surface on the orientation flat
Characterized in that a semiconductor wafer is used.

[0019]

According to the present invention, as described above, in a semiconductor wafer exposure apparatus, a glass mask having an orientation flat orientation pattern of rectangular slits shorter than the length of the orientation flat and extremely narrow is provided, and the slit is formed. As the transmitted light detects the rotation angle of the semiconductor wafer by using the intensity change of the light blocked or reflected by the orientation flat of the semiconductor wafer, the semiconductor wafer is aligned according to the amount of change in the detected value. It was done.

Therefore, the orientation of the mask pattern and the orientation flat of the semiconductor wafer can be adjusted with high precision, and highly reliable alignment of the semiconductor wafer can be performed.

After the alignment, the semiconductor wafer can be exposed in the same exposure apparatus without transferring the semiconductor wafer, and the processing accuracy of the semiconductor wafer can be improved. .

In addition, by using the glass mask of the present invention, (1) using a pattern for aligning the orientation of the glass mask with the existing contact aligner or the projection exposure method, aligning the pattern with the orientation flat direction of the semiconductor wafer. Can be.

(2) By using a part of the extra area on the glass mask as the slit forming area, the extra area of the glass mask can be minimized, and the entire glass mask can be effectively used. Also, the mask design becomes easy.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a plan view of a glass mask used for exposing a semiconductor wafer according to a first embodiment of the present invention.

As shown in FIG. 1, a mask pattern 12 for device fabrication is formed on a glass mask 11, and a relative positional relationship with a semiconductor wafer (not shown) is shown. This shows a glass mask at the time of performing contact exposure (also called contact exposure), and the mask used at the beginning of a series of semiconductor processes (referred to as a first mask) has any positional relationship with a semiconductor wafer. The position of the device on the semiconductor wafer is determined depending on whether or not the exposure is performed.

The step of etching a part of the surface of the semiconductor wafer with the first mask and engraving alignment marks for aligning the second and subsequent masks with the semiconductor wafer is often performed. In this case, a positive resist is used. If used, most of the device mask patterns are shielded by a chromium film or an emulsion film. Below the orientation flat 13 of the mask, an orientation flat alignment pattern 14 that is not actually exposed on the semiconductor wafer but is used only when the orientation of the semiconductor wafer is aligned is formed.

FIG. 2 is an enlarged view of the orientation flat alignment pattern 14, which is composed of stripes 14a to 14d for shielding or transmitting light. The length L ₁ of these stripes is the same as or smaller than the length of the orientation flat of the semiconductor wafer, and the width W _{1 of} the stripes
And the interval W ₂ determine the sensitivity of angle detection and the shape of the light intensity signal. The width W ₃ being a full width of the orientation flat direction alignment pattern 14. FIG. 3 is an explanatory diagram of a method of actually detecting the rotation angle of the orientation flat of the semiconductor wafer using the orientation flat alignment pattern.

As shown in FIG. 3, exposure is performed by aligning the device mask pattern of the glass mask with the position of the semiconductor wafer 21. Before the exposure, the semiconductor wafer 21 is moved by the movement of the wafer chuck. The wafer is moved so that the orientation flat 22 of the semiconductor wafer 21 enters therein. Then, when the orientation flat 22 of the semiconductor wafer 21 enters into a lattice group formed by the slits 19 formed in the light shielding material on the glass mask, if the orientation flat 22 rotates (the orientation flat 22 is inclined with respect to the slit 19). ,
When the semiconductor wafer 21 is moved in the Y direction, the orientation flat 22
Crosses the slit 19 obliquely.

If this lattice is formed so that it can be identified by the naked eye, when the semiconductor wafer 21 is moved in the -Y direction,
Orientation flat 2 of semiconductor wafer 21 seen from slit 19
The reflected light of 2 appears to move from left to right. At this time, since the semiconductor wafer 21 is rotating counterclockwise as shown in FIG. 3, the semiconductor wafer 21 may be corrected by rotating the semiconductor wafer 21 clockwise.

Thereafter, the rotation is detected again by the above operation,
After the correction is repeated, if the reflected light of the orientation flat 22 of the semiconductor wafer 21 seen from the slit 19 does not move left and right, the rotation correction ends.

In the case of contact exposure or non-contact proxy exposure with a reduction ratio of 1 as in this embodiment, the orientation flat pattern 14 is formed below the device mask pattern 12 of a glass mask. The orientation flat pattern 14 is formed by stripes of W ₁ and W ₂ having a width of a transmitting portion and a light shielding portion (the pattern shown is opposite for a positive mask and a negative mask) as shown in FIG. When viewed with the naked eye, the thickness may be set to 10 μm to 1 mm. In the case of 100 μm, which was actually tried, the rotation of the semiconductor wafer was sufficiently detected and corrected to ± 0.1 ° or less. At this time, the stripe length L1 was 20 mm, but the sensitivity is slightly lowered, but a stripe length L1 of ₁₀ to 5 mm is possible.
The rotation of the semiconductor wafer could be detected and corrected not by the naked eye but by an apparatus.

Next, a second embodiment of the present invention will be described.

As in the first embodiment, in the contact exposure or non-contact proxy exposure apparatus with a reduction rate of 1.times., The orientation flat 13 of the glass mask 11 as shown in FIG. An alignment pattern 14 is provided.

FIG. 6 is a schematic sectional view of an exposure apparatus showing a second embodiment of the present invention. The exposure light source is the same as that of a normal apparatus. That is, 30 is an exposure light source lamp, 31 is a parabolic mirror, 32 is a lamp house, 33 is a shutter, 34
Is the first mirror, 35 is the fly-eye lens, 36 is the second mirror
The mirror 37 has a condenser lens, and the optical path of the exposure light is indicated by an arrow. The glass mask 38 is shown in FIG.
Is set as the left direction in FIG. 6, and the orientation flat is on the right side. Reference numeral 39 denotes a mask plate.

The semiconductor wafer 40 is placed on a wafer stage 41, and X,
Linear motion in three directions of Y and Z and rotational motion about the Z axis can be arbitrarily performed. As shown in FIG. 7B, the orientation flat sensor 43, which is a reflection type optical sensor, includes a light emitting unit 43a and a light receiving unit 43b, and emits light (wavelength: 650 nm) of, for example, a red AlGaAs LED outside the photosensitive wavelength of the resist. Used. Light emitting range of light emitting section 43a and light receiving section 43b
The light receiving range is a region including the orientation flat alignment pattern 14 of the glass mask of FIG. 1. This is for maximizing the detection sensitivity, and the sensitivity is reduced even if it is smaller than the orientation flat alignment pattern 14. Just enough is available.

Therefore, as shown in FIG. 7A, the orientation flat sensor 43 is at a position where the exposure light is not blocked at the time of exposure or standby, and the semiconductor wafer is moved by a transfer system (not shown) for exposure. Set on the chuck,
The distance between the mask and the semiconductor wafer is 3 for mask alignment.
It is raised by the wafer stage drive mechanism so as to be 0 to 100 μm. With this operation, the positional relationship between the semiconductor wafer and the mask becomes the original position.

If a mask alignment mark has already been cut on the semiconductor wafer, the X and Y of the semiconductor wafer and the rotation angle θ are matched by the relative relationship between the mask alignment mark and the alignment mark on the glass mask. In the first photolithography step, since no alignment mark is formed on the semiconductor wafer, the rotation angle θ is first adjusted by the method of the present invention as described below.

As shown in FIG. 7B, the orientation flat sensor 43 is set above the orientation flat alignment pattern 45 on the glass mask 38 by the driving mechanism 44.

Next, the semiconductor wafer moves in the -Y direction,
The orientation flat 46 of the semiconductor wafer 40 is
Pass through the area of the orientation flat alignment pattern 45.

Therefore, when the rotation angle θ of the semiconductor wafer 40 is largely shifted, that is, θ> tan ⁻¹ (W ₃ / L
₁ ) As shown in FIG. 8, the orientation flat 46 of the semiconductor wafer 40 has stripes (slits) 45a, 45b, 45
c may pass at the same time, so if there is a light shielding material around the negative mask and the stripe is a window that transmits light, the semiconductor wafer coated with the resist reflects light from the window and the light receiving part The output voltage waveform of 43b (light receiving element) is as shown in FIG.

That is, the stripe (slit) 45
The output voltage components due to the reflected light components of a, 45b, and 45c are as shown in FIGS. 9A to 9C, respectively. The output voltage waveform of the light receiving unit 43b obtained by summing them is shown in FIG.
As shown by 0, the base value gradually increases from the base value before the movement of the semiconductor wafer 40 and becomes a constant value.

The differential signal of the output voltage is shown in FIG.
As shown in FIG. 7, the value increases stepwise from 0, and then stabilizes at a maximum, then decreases stepwise and becomes zero.

When the rotation angle θ of the semiconductor wafer 40 is too large, all the stripes (slits) 45a,
5b, because 45c semiconductor wafer 40 passes, and also by changing the rotation angle θ, the amplitude Vs of the plateau portion of the differential signal (maximum value) does not change, changes the duration t ₁ of the plateau.

Accordingly, the semiconductor wafer 40 is returned to the original position, the rotation angle θ is changed by a small amount to + or-, and the semiconductor wafer 40 is moved in the -Y direction again, so that the duration t ₁ of the plateau portion of the differential signal becomes
See if it gets bigger or smaller.

Now, since the direction in which the rotation angle θ is moved is known, the rotation angle θ is moved by a small amount in the direction in which the duration t ₁ of the plateau portion of the differential signal is reduced, and −
Continue the linear motion in the Y direction.

If the duration t _{1 of the} plateau decreases, then the linear movement of the semiconductor wafer 40 continues while moving the rotation angle θ so that the amplitude Vs of the plateau of the differential signal decreases.

When the deviation of the rotation angle θ of the semiconductor wafer 40 becomes small, that is, θ <tan ⁻¹ [(W ₁ + W ₂ ) / L
₁ ], as shown in FIG.
Ori-fla 46 has stripes (slits) 45a, 4
5b, since as will Tsu through one by one the 45 c, the output voltage of each slit is as shown in FIG. 13.
In addition, as shown in FIG. 14, the output voltage has a flat portion in small increments as shown in FIG. 14, and the differential signal is not a continuous waveform but a pulse wave train as shown in FIG. At this time,
The linear motion of the semiconductor wafer 40 is continued while moving the rotation angle θ of the semiconductor wafer 40 so that the pulse time t ₂ is shortened, and a desired speed determined by the moving speed of the semiconductor wafer 40 in the −Y direction, the stripe shape, and the orientation flat shape electrode. Rotation angle θ ₀
When tsA or less is reached, the linear motion is stopped, the semiconductor wafer 40 is returned to the original position, the rotation angle θ adjustment of the semiconductor wafer 40 is completed, and the XY adjustment is started.

Here, the pulse time t ₂ does not become infinitely small, but the width W ₁ and the interval W _{2 of the} stripe shown in FIG.
Approaches infinity to the value t ₂ ′ determined by

T ₂ ′ = t ₃ × W ₁ / (W ₁ + W ₂ ) where t ₃ is the period of the differential signal, and is represented by the following equation.

T ₃ = (W ₁ + W ₂ ) / v _y where v _y is the moving speed of the semiconductor wafer 40 in the −Y direction.

When the deviation of the rotation angle θ of the semiconductor wafer 40 becomes extremely small, that is, θ <tan ⁻¹ (W ₁ / L ₁ )
In the case of, as shown in FIG. 16, when a part of the orientation flat starts to be seen from the stripe (slit) 51, when the whole orientation flat is seen, and when a part of the orientation flat starts to be hidden, the light receiving unit 43 b As shown in FIG. 17, the differential signal becomes a three-step pulse as shown in FIG. In FIG. 16, reference numeral 52 denotes a wafer stage driving mechanism.

Actually, L ₁ = 20 mm, W ₁ = W ₂ = 1
In the case of 00 μm and v _y = 5 mm / sec, θ = 0.1 °
Pulse shape when _{the, t 4 = 7msec, t 5} = 1
3 msec, t ₂ = 27 msec, t ₃ = 40 msec
Met.

Although t ₂ / t ₃ = 67.5%, which was sufficiently controllable, to control θ = 0.01 °, t
₄ = 0.7 msec, t ₅ = 19.3 msec, t ₂ =
Since 20.7 msec and t ₂ / t ₃ = 51.8%, the detection sensitivity is low. In this case, it is effective to differentiate the differentiated signal again to generate a twice differentiated signal as shown in FIG. 19, directly obtain the interval t ₄ between positive or negative continuous pulses, and control the interval t ₄ to approach zero. It was a target.

Next, a third embodiment of the present invention will be described.

In a contact exposure or non-contact proxy exposure apparatus having the same reduction rate × 1 as in the second embodiment, and an apparatus having an orientation flat sensor, the orientation flat 63 of the glass mask 61 shown in FIG. Length L ₁ , such as 20,
Providing a stripe 64 of width W ₁ only one. in this case,
The end on the orientation flat 63 side of the device mask pattern 62 may be used as one side of the stripe 64 as shown in FIG. Reference numeral 65 denotes an auxiliary pattern area (light-shielding area) for forming a stripe.

In this case, since the number of stripes 64 is one, there is no change from the continuous waveform of the output voltage waveform to the pulse waveform due to the magnitude of the rotation angle θ of the semiconductor wafer, and the output voltage of FIG. The signal, the waveform within the time t _{2 of the} double differential signal in FIG. 19 appears only once.

(1) When the deviation of the rotation angle θ of the semiconductor wafer 70 is large, that is, θ ≧ tan ⁻¹ (W ₁ / L ₁ )
In the case of, as shown in FIG. 22, t ₄ = W ₁ / v _y and constant t ₅ = (L ₁ tan θ−W ₁ ) / v _y t ₂ = t ₄ × 2 + t ₅ = W ₁ / v _y + L ₁ tan θ / v _y , (2) When the deviation of the rotation angle θ of the semiconductor wafer 70 is small, that is, [θ ≦ tan ^-1 (W ₁ / L ₁ )]
As shown in FIG. 6, t ₄ = L ₁ tan θ / v _y t ₅ = (W ₁ −L ₁ tan θ) / v _y t ₂ = (W ₁ / v _y ) + (L ₁ tan θ / v _y ) Therefore, as a control method of the rotation angle θ of the semiconductor wafer 70, t ₄ and t ₅ are directly obtained from the second derivative signal of the output voltage waveform of the orientation flat sensor 43, and (i) t ₄ is obtained from W ₁ and v _y. Constant (W ₁ / v _y )
Equal to, rotating the t ₅ or _{t 2 (= t 4 × 2} + t 5) semiconductor wafer 70 in the direction of smaller, smaller than (ii) t ₄ is W ₁ / v _y, t ₄ or t
_What is necessary is just to rotate the semiconductor wafer in the direction in which ₂ becomes smaller.

Alternatively, t ₂ is obtained from a one-time differential signal of the output voltage waveform of the orientation flat sensor 43 for detecting the orientation flat 71, and the semiconductor wafer 70 is rotated in a direction in which t ₂ is reduced, and t ₂ becomes W ₁ / v _y. Approaching the semiconductor wafer 70
After the sensitivity of t ₂ to the rotation angle θ of
_A method of switching the semiconductor wafer 70 so as to rotate the semiconductor wafer 70 in a direction in which ₄ becomes smaller may be used.

Next, a fourth embodiment of the present invention will be described.

Unlike the first to third embodiments , the reduction ratio is 1
An example in which the present invention is implemented in the above reduced projection exposure apparatus (referred to as a stepper) will be described.

In the contact exposure or the proxy exposure at a reduction rate of 1, a pattern having the same magnification as the pattern transferred onto the semiconductor wafer is formed on a glass mask.
A pattern such as an IC is repeatedly formed on the mask.

On the other hand, in the stepper, a pattern group such as an IC is formed on the mask, and is repeatedly exposed on the semiconductor wafer 80 as shown in FIG. This repetition unit is referred to as a reticle 81. FIG. 24 shows a schematic view of the stepper.
Factors that determine the array shape of 1 are not only the relative positions of the semiconductor wafer 80 and the mask as in the case of close contact exposure, but also (i) the X and Y directions of the wafer stage drive mechanism 100, and (ii) the wafer stage drive mechanism. The X (or Y) direction of 100 and the rotation angle φ ₁ of the semiconductor wafer 80 (iii) The X (or Y) direction of the wafer stage drive mechanism 100 and the rotation angle φ ₂ of the reticle 81.

When the reticle 81 is not rotating (rotation angle φ ₂ = 0 of the reticle 81), the arrangement of the reticle 81 is as shown in FIG.
As shown in FIG. 3B, the arrangement is correct, but if the reticle 81 is rotating, (the rotation angle φ ₂ ≠ of the reticle 81)
0), as shown in FIG. 23C, the reticles 81 rotated by ψ are arranged in the X and Y directions. ψ can be easily detected and can be set to ψ = 0 when test exposure is performed on the entire surface of the semiconductor wafer 80 by an optical microscope or the like, but φ is set to 0 because the wafer size is large. ,
It was difficult to measure φ with high accuracy.

FIG. 25 is a plan view of a glass mask showing a fourth embodiment of the present invention.

There is a region 121 in which a device pattern is formed at the center, and a region 124 outside the device pattern outside the region 121 is covered with a light shielding material such as a chrome film. 5-5 just outside the region 121 where the device pattern is formed
The region 122 of 10 mm is a region where the tip of the blade (light shield plate having a moving mechanism) 111 of the stepper shown in FIG. 24 is located, and the position control accuracy of the blade is low.
Since the blade is placed above or below the reticle surface, it is not in the focal plane of the optical system, and the shadow image on the blade tip is blurred. Can be

In the outer region 125 outside the device pattern area 124 and the non-pattern non-pattern area 122,
The orientation flat pattern 14 composed of a plurality of stripes of the first embodiment or the orientation flat pattern 123 composed of a single stripe of the third embodiment is provided.

In the case of exposure, first, the glass mask 120 is set on the reticle stage of the stepper shown in FIG. 24, test exposure and development are performed on the resist-coated monitor wafer, and the rotational deviation of the adjacent chips is measured by an optical microscope. And adjust the rotation angle φ between the X direction of the reticle pattern and the X direction of the wafer stage driving mechanism 100 to be zero.

Next, the semiconductor wafer 80 for manufacturing an IC is roughly set with the orientation flat using a transport system of a stepper and a preliminary alignment mechanism of the orientation flat, and then set on a wafer stage 91. The stepper blade 111
The reticle shown in FIG. 25 includes four blades in the up, down, left, and right directions. The reticle upward blade having the orientation flat alignment pattern 123 is pulled back so that the exposure light is irradiated onto the orientation flat alignment pattern 123. I do.

Next, the semiconductor wafer 80 shown in FIG.
To the orientation flat 82 of the semiconductor wafer 80,
An image of the orientation flat pattern 123 shown in FIG. 25 is formed. At this time, the orientation flat sensor 13 shown in FIG.
As indicated by a dotted line, 1 (the standby position is indicated by a solid line) moves in the optical path of the exposure light.

As shown in FIG. 26, the orientation flat sensor 131 is composed of a Harla mirror 141, a lens 142, and a light receiving element 143 for transmitting exposure light and reflecting reflected light from the semiconductor wafer 80 to the right. The reflected light of the image of the orientation flat alignment pattern 123 formed at 82 can be electrically detected.

Here, the wafer stage 91 is moved in the X direction orthogonal to Y by the length of the orientation flat 82, and φ is adjusted by observing the fluctuation of the reflected light from the orientation flat 82. If the reflected light is small, φ is set in the negative direction, and if the reflected light is large, φ is set in the positive direction. The wafer stage 91 is rotated, and the adjustment operation is repeated. When the image of the orientation flat pattern 123 does not exactly hit the orientation flat 82 of the semiconductor wafer 80 by rotating the wafer stage 91, the wafer stage 91 is moved in the Y direction to move the orientation flat 82 from the orientation flat 82 of the appropriate semiconductor wafer 80. Is adjusted so that a signal due to the reflected light of the above appears.

Actually, when the projected image on the semiconductor wafer 80 is the orientation flat alignment pattern 123 having a width of 100 μm and a length of 8 mm, and the orientation flat 82 has a length of 22 mm in the case of a 3-inch diameter semiconductor wafer, The moving distance in the X direction becomes 16 mm. The reflected light of the projected image of the orientation flat pattern 123 having a width of 100 μm is 1
The 6 mm movement of the semiconductor wafer 80 in the X direction also
If φ is adjusted so that it can always be detected, φ <tan
⁻¹ (0.1 / 16) = 0.4 °, but if the sensitivity of the amplifier is increased by a factor of 10, φ <0.04 ° can be achieved, and it can be further reduced.

In the optical system of the stepper, the position where the orientation flat sensor 131 is inserted is not only between the reduction projection lens 112 and the semiconductor wafer 80 shown in FIG. 24 but also between the glass mask 120 and the reduction projection lens 112. Even between the light source 120 and the exposure light source 110, any position may be used as long as the reflected light from the orientation flat 82 of the semiconductor wafer 80 passes therethrough.

With this configuration, (1) the orientation flat of the semiconductor wafer can be quickly performed using the exposure light of the stepper and without changing the reticle.

(2) As described above, in the case of the stepper, the moving direction and alignment of the semiconductor wafer are different from those of the contact aligner. Thus, the direction of the orientation flat and the pattern arrangement direction formed on the semiconductor wafer by the stepper can be controlled to an arbitrary minute angle.

(3) The exposure light transmitted through the reticle can be used as the orientation flat detection light of the semiconductor wafer.

(4) The orientation flat direction and the pattern arrangement direction can be matched with high accuracy.

Next, a fifth embodiment of the present invention will be described.

As described in the fourth embodiment, in the stepper, since the drive mechanism 100 of the wafer stage 91 determines the X and Y directions, if the orientation flat direction of the semiconductor wafer matches the X direction. The X direction of the reticle array on the semiconductor wafer matches the orientation flat direction. That is,
Since it is not always necessary to use light transmitted through a certain pattern of the reticle, the orientation flat sensor 43 having the light emitting unit and the light receiving unit shown in FIGS. 6 and 7 of the second embodiment can be replaced with the reduction projection lens 112 shown in FIG. It is also possible to use a method of inserting between the semiconductor wafer 80 and the semiconductor wafer 80. In FIG. 24,
130 is an orientation flat sensor drive mechanism.

FIG. 28 is a view showing an orientation flat sensor having a light emitting section for a stepper according to a fifth embodiment of the present invention.

As shown in this figure, the light emitting element 151 is composed of an LED or a semiconductor laser having a wavelength that does not expose the resist, and the light passes through the condenser lens 152 and passes through a slit 153 or a pattern (not shown) on a glass mask. Pass through any shape (for example, the same shape of 100 μmφ or 10 ×
(A 100 μm square or the like) and is imaged on the orientation flat 82 of the semiconductor wafer 80 by the condenser lens 152. Here, the light is bent downward by the mirror 154.

Next, the light reflected by the orientation flat 82 of the semiconductor wafer 80 is bent laterally by the mirror 154, and is further condensed on the light receiving element 156 by the lens 155. In FIG. 28, reference numeral 91 denotes a wafer stage, and 157 denotes an orientation flat sensor driving mechanism.

When the semiconductor wafer 80 is moved in the X direction as shown in FIG. 27 while observing the electric signal of the light receiving element 156, if the orientation flat 82 of the semiconductor wafer 80 does not properly match the X movement direction of the stage. Since the signal voltage changes, the rotation angle φ of the semiconductor wafer 80 may be changed while observing the state. The shape of the slit 123 (pattern for aligning the orientation flat) is used to improve the detection sensitivity of the rotation angle φ and the trapping property of the orientation flat when the semiconductor wafer 80 is moved in the X direction (the ability to lose a signal corresponding to the orientation flat). Although related, it can be arbitrarily changed according to the desired performance.

With this configuration, the positional relationship between the orientation flat of the semiconductor wafer and the orientation pattern of the glass mask is detected by the movement of the semiconductor wafer in the X direction, and the alignment of the semiconductor wafer is performed. Can be.

Next, a sixth embodiment of the present invention will be described.

In the first to fifth embodiments, light is applied to the orientation flat portion of the semiconductor wafer. Therefore, if there is reflected light or scattered light from the wafer stage, the change in the reflected light from the orientation flat portion of the semiconductor wafer can be prevented. Therefore, it is preferable to apply a non-reflective coat or a paint, since the signal becomes a noise signal.

It is desirable that the reflected light from the orientation flat portion of the semiconductor wafer changes clearly with the movement of the semiconductor wafer or the wafer stage. As shown in FIGS.
1 is preferably formed with a tapered surface 161a (a chamfered shape: also referred to as beveling) because a flat surface intersecting with the surface is formed.

With this configuration, (1) since there is no reflection or scattering of light from the wafer stage of the stepper or the contact aligner, the sensitivity for visually or electrically detecting rotation in the orientation flat direction can be improved. Can be planned.

(2) Since the taper surface is formed on the orientation flat of the semiconductor wafer, the end of the orientation flat can be clearly detected, and the sensitivity when the rotation in the orientation flat direction is detected visually or electrically can be improved. Can be planned.

Further, in order to determine the amount of change in shape or intensity of light reflected by the orientation flat of the semiconductor wafer through the slit of the glass mask when the semiconductor wafer is moved, the output signal of the orientation flat sensor is differentiated by a differentiation circuit ( The output voltage is connected to a circuit in which the output voltage is proportional to the change rate of the input voltage, and a differentiated signal can be obtained. Further, when a secondary differential signal is required, it can be easily obtained by further outputting the differential signal through a differentiating circuit.

The present invention is not limited to the above-described embodiment, but various modifications can be made based on the gist of the present invention, and these are not excluded from the scope of the present invention.

[0093]

According to the present invention, as described in detail above, according to the present invention, (A) the orientation of the mask pattern and the orientation flat of the semiconductor wafer can be matched with high accuracy, and a highly reliable semiconductor wafer can be obtained. Can be aligned.

After the alignment, the semiconductor wafer can be exposed in the same exposure apparatus without transferring the semiconductor wafer, and the processing accuracy of the semiconductor wafer can be improved. .

Accordingly, it is possible to prevent chipping of a semiconductor wafer by dicing, to control the traveling direction of electrons when forming a quantum effect element with high accuracy, and to control the device manufacturing using anisotropic etching with high accuracy.

(B) By using the glass mask of the present invention, (1) the orientation of the semiconductor wafer is aligned with the orientation flat pattern of the semiconductor wafer using the alignment pattern of the glass mask in both the existing contact aligner and the projection exposure method. be able to.

(2) By using a part of the extra area on the glass mask as the slit forming area, the extra area of the glass mask can be minimized, and the entire glass mask can be effectively used. Also, the mask design becomes easy.

[Brief description of the drawings]

FIG. 1 is a plan view of a glass mask used for exposing a semiconductor wafer according to a first embodiment of the present invention.

FIG. 2 is a plan view of an orientation flat alignment mark of a glass mask showing a first embodiment of the present invention.

FIG. 3 is an explanatory diagram of a method for detecting a rotation angle of an orientation flat of a semiconductor wafer by using an orientation flat alignment pattern according to a first embodiment of the present invention;

FIG. 4 is a plan view of a conventional semiconductor wafer.

FIG. 5 is a plan view showing a processing state of a semiconductor wafer according to a conventional method.

FIG. 6 is a schematic sectional view of an exposure apparatus showing a second embodiment of the present invention.

FIG. 7 is an explanatory diagram for detecting an orientation flat of a semiconductor wafer in an exposure apparatus according to a second embodiment of the present invention.

FIG. 8 is an explanatory diagram of a semiconductor wafer rotation angle detection method (large rotation angle) showing a second embodiment of the present invention.

9 is a diagram showing output voltages from an orientation flat sensor corresponding to each slit of the glass mask shown in FIG.

FIG. 10 is a diagram showing a total output voltage from the orientation flat sensor in the case of FIG. 8;

11 is a diagram showing a differential signal from the orientation flat sensor in the case of FIG. 8;

FIG. 12 is an explanatory diagram of a semiconductor wafer rotation angle detection method (middle rotation angle) showing a second embodiment of the present invention.

FIG. 13 is a diagram showing an output voltage from an orientation flat sensor corresponding to each slit of the glass mask in the case of FIG. 12;

FIG. 14 is a diagram showing a total output voltage from the orientation flat sensor in the case of FIG. 12;

FIG. 15 is a diagram showing a differential signal from the orientation flat sensor in the case of FIG.

FIG. 16 is an explanatory diagram of a semiconductor wafer rotation angle detection method (small rotation angle) showing a second embodiment of the present invention.

FIG. 17 is a diagram showing an output voltage from the orientation flat sensor corresponding to the slit of the glass mask in the case of FIG. 16;

FIG. 18 is a diagram showing a differential signal from the orientation flat sensor in the case of FIG. 16;

FIG. 19 is a diagram showing a secondary differential signal from the orientation flat sensor in the case of FIG. 16;

FIG. 20 is a plan view of a single slit of a glass mask showing a third embodiment of the present invention.

FIG. 21 is a plan view of a slit of a glass mask showing a third embodiment of the present invention.

FIG. 22 is an explanatory diagram of a semiconductor wafer rotation angle detecting method according to a third embodiment of the present invention.

FIG. 23 is a view showing a semiconductor wafer of a projection exposure type semiconductor wafer exposure apparatus according to a fourth embodiment of the present invention.

FIG. 24 is an overall configuration diagram of a projection exposure type semiconductor wafer exposure apparatus showing a fourth embodiment of the present invention.

FIG. 25 is a plan view of a glass mask using a projection exposure type semiconductor wafer exposure apparatus according to a fourth embodiment of the present invention.

FIG. 26 is a configuration diagram of a semiconductor wafer orientation flat sensor of a projection exposure type semiconductor wafer exposure apparatus showing a fourth embodiment of the present invention.

FIG. 27 is an explanatory diagram of a semiconductor wafer rotation angle detection method according to a fifth embodiment of the present invention.

FIG. 28 is a view showing an orientation flat sensor having a light emitting portion for a stepper according to a fifth embodiment of the present invention.

FIG. 29 is a plan view showing an orientation flat of a semiconductor wafer according to a sixth embodiment of the present invention.

FIG. 30 is a sectional view showing an orientation flat of a semiconductor wafer according to a sixth embodiment of the present invention.

[Explanation of symbols]

11, 38, 61, 120 Glass mask 12, 62 Device manufacturing mask pattern 13 Mask orientation flat 14, 45, 123 Orientation orientation alignment pattern 14a to 14d Stripe 19, 153 Slit 21, 40, 70, 80, 160 Semiconductor wafer 22, 46, 63, 82, 161 Orientation flat 30 Exposure light source lamp 31 Parabolic mirror 32 Lamp house 33 Shutter 34 First mirror 35 Fly-eye lens 36 Second mirror 37 Condenser lens 39 Mask plate 41, 91 Wafer stage 42 , 52, 100 Wafer stage driving mechanism 43, 131 Ori-fla sensor 43a Light emitting unit 43b Light receiving unit 44 Driving mechanism 45a, 45b, 45c, 51, 64, 153 Stripe (slit) 65 Auxiliary pattern area (light shielding area) Reference Signs List 81 reticle 110 exposure light source 111 stepper blade 112 reduction projection lens 121 area in which device pattern is formed 122 non-pattern area for blade 124 area outside device pattern 130, 157 orientation flat sensor drive mechanism 141 mirror mirror 142, 155 lens 143, 156 light reception Element 151 Light-emitting element 152 Condensing lens 154 Mirror 161a Tapered surface of orientation flat

Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/027 G03F 1/08 G03F 9/00

Claims (7)

(57) [Claims] 1. A half having an orientation flat
Conductive wafer and device pattern transferred onto the semiconductor wafer
Semiconductor wafer for positioning with a mask for
In the positioning method, (a) the element pattern and the element in the mask
Oriente formed outside the area where the child pattern was formed
Prepare the luma scan <br/> click to have a a slit for Activation flat alignment, and through the (b) scan <br/> slits for the orientation flat alignment light to the orientation flat
And (c) moving the semiconductor wafer while moving the semiconductor wafer.
Through the slit for alignment
In the orientation flat of the semiconductor wafer
Converts the shape or intensity of the reflected light into an electrical signal
Detecting Te, becomes substantially constant amount of change the electric signal detected (d)
Terminating the movement of the semiconductor wafer when
Semiconductor wafer alignment method. 2. The semiconductor wafer alignment according to claim 1,
In the method, a resist film is formed on the semiconductor wafer.
Wherein the light is outside the photosensitive wavelength of the resist film.
Semiconductor wafer alignment characterized by having a wavelength
Method. 3. The semiconductor wafer alignment according to claim 2, wherein
In the method, the light exposes the resist film
Having a wavelength longer than the wavelength of light used for
A semiconductor wafer positioning method characterized by the following. 4. The semiconductor wafer alignment according to claim 1, wherein:
In the method, the semiconductor wafer has a reduction ratio of 1/1 .
Semiconductor wafer alignment method characterized in that it is set to the exposure light device. 5. The semiconductor wafer alignment according to claim 1, wherein:
In the method, the semiconductor wafer, the semiconductor wafer alignment method characterized in that it is set to the exposure <br/> optical device of the projection exposure system. 6. The semiconductor wafer alignment according to claim 1, wherein:
In the method, this using the exposure apparatus to prevent reflection or scattering of light of the wafer stage carrying the semiconductor wafer
And a semiconductor wafer positioning method. 7. The semiconductor wafer alignment according to claim 1, wherein:
In the method, the semiconductor wafer alignment method characterized by there use a semiconductor wafer formed with a tapered surface to the orientation flat portion.