JP3335094B2 - Printer interface system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printer interface system provided between a main control device (host computer) and a printer.

[0002]

2. Description of the Related Art Conventionally, as a standard interface for connecting a host computer and a printer, when transferring a plurality of bytes of data from the host computer to the printer, a BUSY signal is checked for each byte. If it is BUSY, wait for a certain time and return to B
The USY signal is checked, and when the signal is no longer BUSY, data is set, and a STROBE signal is transmitted to transmit 1-byte data. For this reason, when the printer is BUSY, there is a problem that the host computer has a useless waiting time and cannot efficiently transfer data. Also, because of the one-way communication method,
There is also a problem that the number of transmission lines for transmitting the error status is small, and the types of the error status are limited.

To solve this problem, Japanese Patent Laid-Open Publication No.
Japanese Patent Publication No. 453 discloses an interface system capable of knowing details of various error statuses of a printer by providing means for performing serial communication using a control signal line.

[0004] However, the method disclosed in Japanese Patent Application Laid-Open No. 1-302453 has a problem that only an error status can be transferred because serial transfer is performed after an error has occurred, and a non-error status cannot be transferred.

[0005] Incidentally, the Institute of Electrical and Electronics Engineers (IEEE)
Now, to improve the problem of the conventional printer interface, the host computer and peripherals (printer)
The control method of the signal was determined and standardized as P1284 standard. The IEEE-P1284 standard has become the standard for today's printer interface systems because it not only speeds up the above-mentioned conventional standard interface but also allows the data bus to be handled bidirectionally.
A printer interface system based on the IEEE-P1284 standard has several phases as shown in FIG.

The contents of each phase will be described.
The ompatibility phase is compatible with conventional standard interfaces. In this phase, data can be transferred from the host computer to the printer by the data communication method of the conventional standard interface. The IEEE-P1284 standard starts from this phase.

In the Negotiation phase of 2B, the operation enters one of several operation modes defined by the IEEE-P1284 standard. If the negotiation is successful, the operation proceeds to the 2C Setup phase. Then 2
Wait in D's Forward Idle phase.

[0008] If there is data to be sent to the printer, the host computer sends a 2D Forward I
The process shifts from the dle phase to the forward phase of 2E and sends out data. When the transfer is completed, the process returns to the 2D ForwardIdle phase.

On the other hand, when data such as status information is transferred from the printer to the host computer,
From the Forward Idle phase of D to the Fo of 2F
After moving to the backward to reverse phase and switching the input / output of the data bus, the 2G Rev.
Move to the erase idle phase. And 2H
The data is transferred from the printer to the host computer in the reverse phase.

When the transfer of one byte is completed and further transfer is to be performed, the 2G reverse idle and the 2h reverse idle are used.
Loop the reverse phase for an arbitrary number of bytes. Then, when it is desired to end the data transfer to the host computer, 2I Reverse to Forward
After switching the input and output of the bus in the phase, 2D Fo
Return to the backward Idle phase. At the time of termination, the 2D Forward Idle phase is passed through the 2J Termination phase and the 2A
Then, the process proceeds to the Compatibility phase.

FIG. 3 is a flowchart showing data processing between the host computer and the printer. If this processing content is considered as a phase transition of the IEEE-P1284 standard, a flowchart as shown in FIG. 4 is obtained. Steps 3C and 3D in FIG. 3 correspond to Step 4 in FIG.
C, 4D. Since the step 3C is to transmit data from the host computer to the printer, the phase is forward as in the step 4C.
The transition between the Idle phase and the Forward phase is repeated.

Since step 3D is to transmit data from the printer to the host computer, the phase is set to Forward as in step 4D.
toReverse, Reverse Idle, Re
Move to the reverse phase. Then, while the untransferred data exists in the host computer, steps 3C,
Repeat 3D. This means that the phase of steps 4C and 4D is repeatedly shifted.

[0013]

SUMMARY OF THE INVENTION As described above, the IEEE
According to the P1284 standard, when data is transferred from the host computer to the printer in the forward phase, if the user wants to receive the status data of the printer, the data transfer is temporarily interrupted and the forward to reverses is performed.
e phase, and after switching the data bus,
Receive status data in the reverse phase. Then, it is necessary to switch the data bus again in the Reverse to Forward phase, shift to the Forward phase, and restart the data bus transfer.

Therefore, every time the host computer checks the status of the printer, it is necessary to suspend the transfer of the print data.
D in the Forward to Reverse period shown in
It requires a delay time from the ATA change point to the rise of the Error and a delay time from the rise of Init to the change point of the DATA during the Reverse to Forward period.

As a result, there is a problem in that the data transfer efficiency is reduced, and in a printer such as a dumb printer which does not have a memory for one page, an underrun error that print data is lost during printing occurs.

To avoid this underrun error, it is necessary to increase the memory of the printer or reduce the load on the host computer. Increasing the memory increases the cost of the printer, and lowering the load on the host computer requires terminating the running process, which is inconvenient for the user.

Further, in the case of performing serial transfer as means for transmitting the status from the printer to the host computer, it is necessary to provide serial transfer means on the printer side, so that the circuit becomes inconvenient.

[0018]

A printer interface system according to the present invention provides a parallel interface provided between a main control device and a printer during a phase of transmitting data from the main control device to the printer. Processing means for serially transferring the status data via a control signal is provided ;
Using the ct signal as the status data and clocking the Ack signal
Serial communication as IEEE-P1284 standard
It is characterized by being compliant .

Further, the processing means transfers status data to be transferred to the main control device via a control signal directly as a status signal instead of serial transfer.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a printer interface system according to the present invention will be described below with reference to the drawings.

FIG. 1 is an embodiment of a printer interface system according to the present invention, and is a block diagram of a printer interface system including a host computer and a printer.

1A is a host computer, and 1B is a printer. The host computer 1A includes a CPU 1C for controlling the entire system, a ROM 1D for storing the processing procedure of the entire system, a RAM 1E having a storage area as a work area for the CPU 1C, an interface 1H for exchanging data with the printer 1D, The display device 1F includes a display device 1F that displays processing results and the like, and an input device 1G such as a keyboard and a mouse.

Similarly, the inside of the printer 1B also has a CPU.
1I, a ROM 1J, a RAM 1K, a parallel interface 1N, a DRAM 1M for temporarily storing print data sent from the host computer 1A, and a print mechanism 1L including a paper feed mechanism.

FIG. 3 is a flowchart of data processing during a printing process of the host computer 1A based on the system configuration shown in FIG. Upon receiving a print request from the application, the host computer 1A converts the data of the application into a data format that can be processed by the printer by starting printing in step 3A. Before transferring the print data to the printer 1B, the host computer 1A first checks in step 3B whether the printer 1B is currently in use. When the printer 1B is printing,
If an error has occurred, for example, if the printer cannot be used, the printer temporarily waits until the printer becomes printable.

When it is confirmed that the printer 1B is in a printable state, transfer of print data from the host computer 1A to the printer 1B is started by data transfer in step 3C. The printer 1B temporarily stores the received print data in the DRAM 1M, reads the data from the DRAM 1M in response to a print data request from the print mechanism 1L, and sends the data to the print mechanism 1L. The printing mechanism 1L forms the received print data on the paper. The host computer 1A needs to check the status of the printer 1B for errors such as a paper jam even while transferring the print data.

The status information of the printer 1B includes, for example, information relating to errors such as paper jam, running out of paper, underrun error, overrun error, etc.
The printer has various status information, such as information relating to non-errors such as a 1M free space and a passing position of a printing paper. An underrun error is an error indicating that data in the memory becomes empty during printing and there is no more data to be read from the memory. Also, an overrun error is an error indicating that data has been transferred while exceeding the capacity of the memory during printing and the data overflowed.

The first embodiment is used as means for the host computer 1A to check the status information of the printer 1B.
In this configuration, as shown in FIG. 8, a serial communication means is provided using a control signal line of a parallel interface. The control signal lines used are a Select signal and an Ack signal as shown in FIG.
select signal as status data or Ac
The k signal is configured as a clock. Specifically, the bit width of the status data is determined to be, for example, 4 bits, and status data information is defined for each bit. For example, the first bit is the free space of the DRAM,
The second bit is defined as an engine error, the third bit is defined as an underrun error, and the fourth bit is defined as an overrun error. These 4 bits are transferred one bit at a time
On the ct signal, the host computer 1A receives data at the rising edge of the Ack signal. The host computer 1A analyzes the received serial data and determines the status of the printer 1B. The status reception processing in step 3D is performed in this manner.

If the result of the determination is not an error, it is further determined in the next step 3F whether or not there is untransferred print data. If there is untransferred data, the flow returns to step 3C. Then, the data transfer is performed again, and the process of receiving and determining the status in step 3D is repeated until there is no untransferred data.

If it is determined that an error has occurred, the host computer 1A stops the transfer of the print data, and in the error processing of step 3G, displays the content of the error on the display to display to the user. And the process is terminated.

The above processing contents are described in IEEE-P1284.
Focusing on the standard phase transition, a flowchart as shown in FIG. 5 is obtained. Steps 3C and 3D in FIG. 3 correspond to 5B in FIG.
Is equivalent to Since the data transfer in step 3C involves transferring data from the host computer to the printer, the phase is set to Forward as in step 5B.
Repeat the Idle and Forward phases. In the status reception in step 3D, data is transferred from the printer to the host computer. In the first embodiment, status data is transferred by performing serial communication using the control signal line of the parallel interface. Therefore, it is not necessary to shift to the reverse phase as shown in step 4D of FIG.

That is, the transfer of the print data and the transfer of the status can be performed in the same phase. Further, since the control signal lines used in the status transfer use the signal lines not used in the transfer of the print data, it is not necessary to interrupt the transfer of the print data even during the reception of the status.

Next, as a means for checking status data according to the second embodiment, serial communication is used instead of serial communication as shown in FIG.
The case where the control signal line of the parallel interface is substituted for the status signal line as shown in FIG.

In FIG. 8, the Ack signal and the Select signal are configured as status transmission signals. By combining these two signal lines, for example, status information as shown in Table 1 below can be represented.

[0034]

[Table 1]

READY is a status indicating that printing is possible without an error occurring in the printer. The signal lines at this time are Ack, Cell
ct are High level. In DRAM EMPTY, the amount of data stored in the DRAM 1M is 1/100 of the total capacity.
In the state of 5, only the Select signal is designed to be active (Low level).
The MFULL is designed so that only the Ack signal becomes active (Low level) when data is stored up to 4/5 in the DRAM 1M. ERROR is a signal indicating an error state of the printer 1B, and is active (Low) when any one of error information of the printer 1B such as a paper jam or an engine error occurs.
Level).

The host computer 1A first needs to confirm whether the printer 1B is ready for printing. For this purpose, the levels of the Ack signal and the Select signal are checked. If the Ack and Select signals are both active (Low level), it indicates that an error has occurred, and the host computer 1A indicates that an error has occurred. If the printer 1B has a status register, the status register is read, the contents of the error are analyzed, and details of the error are notified to the user by displaying them on a display or the like.

If the Ack and Select signals are inactive (High level), the printer 1B
DY, which indicates that the printer is in a printable state, means that print data can be transferred. When the host computer 1A starts transferring the print data, the DRA
Since data is stored in M1M, the free space of DRAM 1M decreases. Therefore, the host computer 1A
Checks the level of the Ack signal to check the free space of the DRAM 1M of the printer 1B. if,
If inactive (High level), still DRAM
Since there is free space in 1M, if there is data to be transferred continuously, the transfer is continued. If it is active (Low level), it means that the free space in the DRAM 1M is very small, and the host computer temporarily suspends the data transfer.

On the other hand, in response to a print data request from the printing mechanism 1L, the printer 1B reads data from the DRAM 1M and sends the data to the printing mechanism 1L. When data is read from the DRAM 1M, the free space of the DRAM 1M increases, so that the Ack signal becomes inactive again (High level). When the amount of data stored in the DRAM 1M becomes 1/5 of the total capacity, the Select signal becomes active (Low level), and the host computer 1A confirms that the Select signal becomes active (Low level). Thereafter, the transfer of the print data is restarted. These cycles are repeated until there is no untransferred data, and a print result formed on the paper is obtained from the printer 1B.

The second embodiment is suitable for transmitting only the minimum necessary status information to the host computer or for increasing the cost due to the addition of a serial communication circuit.

In the second embodiment, the Select signal and the Ack signal are used as the data and the clock as the serial communication means. However, the combination of these signal lines and the communication system are not limited.

[0041]

As described above, the printer interface system of the present invention has the above-described configuration, and thus the IEEE-P12
In a printer interface system conforming to the G.84 standard, during a phase in which data is transferred from the main control device to the printer, a status is transmitted from the printer to the main control device using a control signal, and a Select signal is sent to the status
The data transfer efficiency is improved by not interrupting the transfer of print data and generating no waiting time due to the delay time at the phase shift by performing serial communication using the Ack signal as the clock and the Ack signal as the clock. And the occurrence of underrun errors can be suppressed.

Also, by using a simple printer or the like which does not have much status information, a circuit for serially transferring status data is not required, and it is possible to easily prevent the occurrence of a waiting time due to a delay time at the time of a phase shift. In addition, data transfer efficiency is improved, and occurrence of underrun errors can be suppressed.

[Brief description of the drawings]

FIG. 1 is a system block diagram based on a first embodiment of a printer interface system of the present invention.

FIG. 2 is an explanatory diagram illustrating a phase shift based on the IEEE-P1284 standard.

FIG. 3 is a flowchart illustrating processing contents of a printer interface system according to the first exemplary embodiment.

FIG. 4 shows an IE in a conventional interface system.
It is explanatory drawing explaining the phase shift based on EE-P1284 standard.

FIG. 5 is an explanatory diagram illustrating a phase shift based on the IEEE-P1284 standard used in the present invention.

FIG. 6 is an explanatory diagram showing timing in a reverse phase of the IEEE-P1284 standard.

FIG. 7 is an explanatory diagram showing timing in the first embodiment of the present invention.

FIG. 8 is a configuration diagram according to the first embodiment of the present invention.

FIG. 9 is a configuration diagram according to a second embodiment of the present invention.

[Explanation of symbols]

 1A Host computer 1B Printer 1C CPU 1D ROM 1E RAM 1F Display device 1G Input device 1H Parallel interface 1I CPU 1J ROM 1K RAM 1L Printing mechanism 1M DRAM 1N Parallel interface

Claims (2)

(57) [Claims] 1. A process of serially transferring status data of a printer via a control signal to a parallel interface provided between a main control device and a printer during a phase of transmitting data from the main control device to the printer. Means , wherein the processing means further comprises a Select signal
With the status data as the Ack signal as the clock
Performs serial communication and complies with the IEEE-P1284 standard.
A printer interface system. 2. The printer interface system according to claim 1, wherein said processing means transfers status data to be transferred to a main control device via a control signal as a status signal directly instead of serially.