JP3334910B2 - Image data compression apparatus and method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for compressing and expanding image data.

[0002]

2. Description of the Related Art In recent years, images created on a computer by DTP or the like are required to have higher image quality, and colorization and multi-gradation are being promoted. The amount of information in this type of image is, for example, A4 size, 400 dpi,
In the case of 256 gradations and three colors, it is about 46 Mbytes. Image data is written in a page description language (Page Dis
If the information is handled as code information such as a script language, the amount of information is reduced. However, there is a problem that it takes time to develop the code information into the image data, and the original image data cannot be reproduced even if the code information is expanded.

As a general compression method of a color multi-valued image, JPEG (Joint Photographic) is used.
ADCT (A) recommended by the Expendable Group
Adaptive Discrete Cosine T
(transform) method. ADCT
The compression method will be described below.

FIG. 12 is a block diagram showing a functional configuration of the ADCT compression apparatus. Reference numeral 3101 denotes a color space conversion unit.
A color space (NTSC-RGB) based on signals (red (R), green (G), and blue (B)) for each color in the NTSC system is represented by a color represented by a luminance signal Y and two color difference signals Cr and Cb. Convert to space (YCrCb). Reference numeral 3102 denotes a sub-sampling unit, which reduces the color difference data by using the characteristic that the human eye is sensitive to luminance and insensitive to color difference. Specifically, the sub-sampling unit 3102
Take the average value of the two color difference data and reduce the amount of color difference data by 1 /
It has been reduced to 2. 3103 is a DCT converter,
The image data input through the sub-sampling unit 3102 is divided into 8 × 8 blocks that are arranged in the horizontal and vertical directions, and is subjected to DCT transform to be converted into a frequency space. 31
A quantization unit 04 divides each of the 64 DCT coefficients by a quantization value having a different step width. A Huffman encoding unit 3105 divides the 64 quantized DCT coefficients into one DC coefficient and 63 AC coefficients, and encodes each coefficient according to a Huffman table recommended by JPEG. The encoded data is stored in a memory with a header such as quantization table data and Huffman table data attached thereto, or transmitted to another device or the like.

FIG. 13 is a block diagram showing a functional configuration of the ADCT decompression device. Reference numeral 3205 denotes a Huffman decryption unit that decrypts the input coded data to generate quantized data. An inverse quantization unit 3204 converts the quantized data generated by the Huffman decoding unit 3205 into DCT coefficient data. This is based on the quantization table data used for quantization in the quantization unit
It is obtained by multiplying the four coefficients by the quantization value. 3
Reference numeral 203 denotes an inverse DCT transform unit, which performs an inverse DCT transform on the DCT coefficient data obtained by the inverse quantization 3204 into real image data. An interpolation unit 3202 interpolates the data of Cr and Cb missing by the sub-sampling unit 3102 at the time of data compression by a simple repetition method. 3
Reference numeral 201 denotes a color space knitting portion, which converts YCrCb data into N
The data is converted into TSC-RGB data or color space data of the device.

[0006]

However, the above A
The DCT compression method is an irreversible compression method that involves loss of data at the time of quantization in a sub-sampling unit and a quantization unit. Therefore, the decompressed data is different from the data before compression.

An advantage of an image (computer-generated image) created on a computer, such as DTP data, is that the outline is clean and noise-free coloring is performed by a single color of one figure (or one character). However, when the image data is processed by the ADCT compression method, only the outline of the figure is blurred and a pseudo edge (called mosquito noise) is generated.
And the change in color due to quantization occurs, and the advantages of computer-generated images are not exhibited. In particular, since the above-described compression method is an 8 × 8 block process, the color greatly changes in the boundary area. When the compression ratio is increased, the AC component is finally lost, block distortion occurs, and an image having a resolution of 1/8 is obtained.

[0008] For this reason, it is conceivable that the image is compressed by quantization so that the deterioration of the image quality is not visible. However, since the image is originally a computer-generated image characterized by a large amount of high-frequency data, the compression ratio is low. Not practical.
Therefore, it is necessary to compress a computer-generated image such as an image generated by DTP by a compression method that can achieve a reversible and high compression ratio.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide a method and apparatus for compressing and decompressing multivalued images created by a computer or the like at a high compression ratio without deterioration. And

[0010]

[Means for Solving the Problems] In order to solve the above-mentioned problems
According to the image data processing device of the present invention,
A palette that stores the pixel data
Storage means (for example, in the pallet memory 7 in the embodiment)
Equivalent), the input pixel data from the original image, and the input image
First comparison for comparing pixel data immediately before elementary data with pixel data
Means (also corresponding to the first comparator 4) and the first comparison
Pixel when both data compared by means do not match
Holding means for holding at least one or more data (also
(Corresponding to the second latch section 3), the input pixel data and
A second method for comparing the pixel data with the pixel data held in the holding unit;
(Also corresponding to the second comparator 5) and the second
In the comparison by the comparing means, the input pixel data and
It does not match any pixel data held in the holding means.
When the input pixel data is stored in the palette storage means.
Search for a match with any of the stored pixel data
And an output for outputting a palette number of the input pixel data.
Means (also equivalent to pallet controller 6)
It is characterized by that.

[0011]

[0012]

[0013]

[0014]

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments according to the present invention will be described below with reference to the accompanying drawings.

Embodiment 1 <Data Compression Apparatus> A data compression apparatus according to Embodiment 1 will be described below.

FIG. 1 is a block diagram showing a functional configuration of the data compression device according to the first embodiment. Reference numeral 1 denotes a pixel data rearranging unit, which is 2 per pixel in the NTSC-RGB format.
Generates 4-bit pixel data. Reference numeral 2 denotes a first latch unit, which stores pixel data (24) from the pixel data rearranging unit 1.
bit). Reference numeral 3 denotes a second latch unit, which holds pixel data (24 bits) output from the first latch unit 2. Reference numeral 4 denotes a first comparing unit which compares the pixel data from the pixel data rearranging unit 1 with the pixel data held in the first latch unit 2. Is output. Reference numeral 5 denotes a second comparing unit which compares the pixel data from the pixel data rearranging unit 1 with the pixel data held in the second latch unit 3, and when the two are equal, “0” is set. Is output.

Reference numeral 6 denotes a pallet control unit, which is operated by an AND signal of the signals 1a and 1b, searches whether or not the pixel data from the pixel data rearranging unit 1 exists in the pallet memory, and if not, increments the counter. Then, the pixel data is newly registered, and the palette number of the pixel data is output.

Reference numeral 7 denotes a pallet memory capable of storing 2 ^m 24-bit pixel data.

Reference numeral 8 denotes a selector section for signals 1a, 1b, 1c,
1d is selected and output when the data corresponding to the depth of the memory 10 is accumulated.

Reference numeral 9 denotes a control unit which controls the operation timing of each of the above-described components from the state of the signals 1a and 1b, and particularly controls the selector unit (selection of each signal and control of the number of effective bits when the signal 1d is selected).

Reference numeral 10 denotes a memory for sequentially storing outputs from the selector section.

The operation of the data compression apparatus having the above configuration will be described below with reference to the flowcharts of FIGS.

FIGS. 2 to 4 are flowcharts showing the processing procedure by the data compression apparatus of the first embodiment. In the following description, the latest updated color data held in the first latch unit 2 is referred to as next [3], and the second latch unit 3
The latest color data before update stored in the
[3]. The pixel data output from the pixel data rearranging unit 1 is referred to as present [3]. ne
xt [3], former [3], present [3]
Is NTSC-RGB format data, which is 1 × 3 array structure data having R, G, and B data.

First, in step S11, the first latch unit 2
And initial setting of the second latch unit 3. That is, next
Initial values are set in [3] and former [3].
In this data compression apparatus, it is assumed that a normal image has a lot of black on a white background, and the initial value is next [3] = $ 255,2
55,255} (white), former [3] = {0,
0,0｝ (black). Next, in step S12, a counter count that counts the number of processed pixels is reset to zero, and a counter colornum that counts the number of pixel data appearing so far is reset to zero. Also, the colornum is 2 ^{m, the} allowable number of palette memories.
Is exceeded, the flag which becomes 1 is reset to 0, outbit representing the output bit length is set to 1, and ccheck which takes the timing to increment the outbit is reset to 2.

In step S13, pixel data present [3] is input from the pixel data rearranging section 1. Then, in step S14, present [3] and next [3] are compared by the first comparing unit 4. As a result of this comparison, present [3] and next [3]
If they are equal, the process proceeds to step S15; otherwise, the process proceeds to step S21 in FIG.

In step S15, the comparison result "0" of the first comparing section 4 is output, and the flow advances to step S16.

In step S16, "count" is incremented, and in step S17, it is checked whether or not processing of all pixels has been completed. That is, co
If unt ≧ the total number of pixels, it is determined that the processing of all pixels has been completed, and the data compression processing ends. Also, cou
If nt <the total number of pixels, unprocessed pixel data remains, so the flow returns to step S13 to repeat the above processing.

Next, referring to the flowchart of FIG.
A description will be given of the processing in the case of “resent [3] ≠ next [3]”.

In step S21, the comparison result "1" of the first comparison unit 4 is output. In step S22, pr
esent [3] and former [3] are compared by the second comparing unit 5. As a result of this comparison,
If [3] = former [3], the process proceeds to step S23, and present [3] @former [3]
If so, the process proceeds to step S28 in FIG.

In step S23, the comparison result "0" of the second comparison section 5 is output, and the flow advances to step S26.

In step S26, the latest pre-update data former [3] is added to the latest post-update data next.
Substitute [3]. Then, in step S27,
The data present [3] currently output from the image generation unit 1 is substituted as the latest updated data. Then, the process proceeds to step S17 in the flowchart of FIG. 2 to execute the above-described processing.

Next, referring to the flowchart of FIG.
The processing in the case of esent [3] @former [3] will be described.

In step S28, the comparison result "1" of the second comparison section 5 is output. In step S29, it is checked whether the flag flag is zero. That is, colo
rnum is determined whether not reached the allowable number 2 ^m of the palette memory, the process proceeds to step S40 when I reached flow proceeds to step S30 if not reached.

In step S30, it is searched whether the pixel data present [3] has already been registered in the pallet memory. That is, the counter i is turned by the number of the previously appearing pixel data colornum, and it is determined whether or not the address i of the pallet memory matches present [3] (S303). Substitution is made (S305). colo
The above processing is performed by the number of rnum, and if there is no address for storing the matching pixel data, present [3]
Is processed as new data, the process proceeds to step S35. In step S35, the address co of the pallet memory
"present" [3] is registered in the lornum, and the address "colornum" is substituted for the pallet number P.

In step S36, colornum is incremented.

In step S37, it is checked whether or not the colornum has reached the allowable number of palette memories of 2 ^m . If it has reached, the process proceeds to step S38 and the flag fr
Substitute 1 for ag.

In step S39, the pallet number P is set to the lower order o.
Output for utbit. Check in step S41
If it is determined that k is equal to colornum, the process proceeds to step S42, and outbit is incremented (step S42), and check is updated by the square of check (step S43). That is, when the pixel at the palette memory address 1 appears, colornum = 2
The out bit is incremented, and the signal representing the pallet memory address becomes 2 bits from the processing of the next pixel. At the same time, the signal check for incrementing the next outbit becomes 4.

Next, when the pixel of the palette memory address 0 × 11 appears, colornum = 4 and outb
It = 3 and check becomes 8. The above processing is performed when the first bit of the signal representing the palette memory address is 1.

On the other hand, in S40 (when the flag is not 0 in step S29 (that is, when the number of pixel data exceeds the allowable number of the palette memory)), the palette memory expression is abandoned and the pixel data of 24 bits is output as it is.

The operation of the above-described data compression device will be described with a more specific example.

FIG. 5 shows an NTSC-R subjected to data compression processing.
It is an example of GB data.

FIG. 6 is an example showing the processing order of pixels by the data compression apparatus. As shown in the figure, the two-dimensional data is rearranged zigzag and processed. By performing zigzag processing at a depth of 8 pixels in this way, inversion of pixel data is increased in a normal image as compared with the raster method, so that compression efficiency is good, and when an image image read by a scanner is mixed, Merging with ADCT processing is simplified.

The above rearrangement processing is executed by the pixel data rearranging section 1 shown in FIG.

First, next [3], former
Initial values are set for each of [3], count, flag, and colornum (steps S11 and S11).
2). Next, present [3] indicating the current value is input from the pixel data rearranging unit 1 (step S13).
First, since the data of pixel 1 is input, present
[3] = {255, 255, 255}. Then the first
The comparing unit 4 compares the present [3] and the next [3]
Are compared (step S14). Where present
[3] and next [3] are both $ 255, 255, 2
Since there is 55 ° data and present [3] is equal to next [3], the process proceeds to step S15. At this time, in the present embodiment, “0” is output from the first comparing unit (step S15). Since the processing for one pixel is completed, the counter is incremented (step S16). At this time, since count = 1, and the processing of all the pixels has not been completed, the process returns to step S13 (step S1).
7).

Since the next pixel 2 has the same value as the pixel 1, the same processing is performed.

Since the next pixel 3 has different data, the processing procedure is different.

The data output from the pixel data rearranging section 1 has a value of {160, 0, 240}.
“resent [3] = {160, 0, 240}” (step S13). Next, present [3] and ne
xt [3] = {255, 255, 255} (Step S14). This time, since both have different values, the process proceeds to step S21, and the first comparing unit outputs “1”.
Is output (step S21).

Further, the present "3" and the form
er [3] = {0, 0, 0} (step S
22). Since both have different values, step S2
Then, the process proceeds to step S8, where "1" is output from the second comparison unit (step S28).

In step S29, the flag flag indicating whether or not the colornum has reached the pallet memory limit value 2 raised to the mth power is checked. flag = 0
Therefore, since it has not reached, it progresses to step S30. In step S30, prepress is stored in the pallet memory.
It is checked whether or not the data of nt [3] has already been registered. However, since colornum = 0 at the present time, and the data has not been registered, the process proceeds to step S35.

In S35, the address 0 of the pallet memory
(= Colorum) present data $ 1
60,0,240｝ is registered. And pallet number P
Is substituted for 0 (step S35). And color
num is incremented (step S36). Next, it is checked whether or not the colornum has reached the limit value 2 of the pallet memory to the m-th power (step S37). In this embodiment, m = 8 and 2 to the m-th power is 256.
It has not been reached because lornum = 1. Therefore, no processing is performed and the process proceeds to step S39. Step S39
Outputs the pallet number P = 0 for one bit (= ou
tbit).

In step S41, colornum =
It is checked whether 1 is equal to check = 2. Here, since they are not equal, no process is performed and the process proceeds to step S27.

Here, next [3] and former
Update the data of [3]. That is, former [3]
Is assigned to next [3], and pres is assigned to next [3].
ent [3] is substituted (steps S26 and S27).
Thus, next [3] = {160,0,240}, f
orr [3] = {255, 255, 255}.

The output state at this point is as follows.

(0) (0) (1/1/0) (Output for one pixel is enclosed in parentheses for clarity, and output in one pixel is divided by slash.)
The contents of the palette memory are as follows.

Content of address <00000000> = 1
0100000/00000000/11110000

Since the next pixel 4 has the same data as next [3], "0" is output from the first comparing section 4.

Next pixel 5 = {255, 255, 255}
Has data different from next [3], but for
Since the value is the same as mer [3], “1” is output from the first comparator 4 and “0” is output from the second comparator 5. Here, the data of next [3] and foamer [3] are updated. Thus, next [3] = $ 255,
255, 255}, former [3] = {160,
0,240 °.

Since the next pixel 6 has the same data as next [3], “0” is output from the first comparing section 4.

Since the next pixel 7 has different data, the processing procedure is different.

The data output from the pixel data rearranging section 1 has a value of {0, 0, 0}.
nt [3] = {0, 0, 0} (step S1
3). Next, present [3] and next [3] =
Compare with {255, 255, 255} (Step S1
4). This time, since both have different values, the process proceeds to step S21, and "1" is output from the first comparing unit (step S21).

Further, the present "3" and the form
er [3] = {160, 0, 240} (step S22). Since the two have different values, the process proceeds to step S28, where "1" is output from the second comparing unit (step S28).

In step S29, the flag flag indicating whether or not the colornum has reached the limit value 2 of the pallet memory to the m-th power is checked. flag = 0
Therefore, since it has not reached, it progresses to step S30. In step S30, prepress is stored in the pallet memory.
It is checked whether or not the data of nt [3] has already been registered. At this time, colornum = 1, and if the pixel data of address 0 is checked, {160,0,
240}, and the pixel data {0, 0, 0} is not registered, so the process proceeds to step S35.

At S35, the address 0 of the pallet memory
(= Colornum), the present data {0, 0, 0} is registered. And 1 for pallet number P
Is substituted (step S35). And colornu
m is incremented (step S36). Then co
It is checked whether lornum has reached the limit value 2 of the palette memory to the m-th power (step S37). here,
Since colornum = 2, it has not been reached. Therefore, no processing is performed and the process proceeds to step S39. Step S
At 39, the pallet number P = 1 is output for one bit (=
outbit).

Next, in step S41, colornum
And check are compared. Both are 2 and equal. Proceeding to step S42, outbit is incremented. Then, check ² = 4 is substituted for check (step S43).

Here, next [3] and former
Update the data of [3]. That is, former [3]
Is assigned to next [3], and pres is assigned to next [3].
ent [3] is substituted (steps S26 and S27).
Thus, next [3] = {0,0,0}, form
r [3] = {255, 255, 255}.

The output state at this point is as follows.

(0) (0) (1/1/0) (0) (1 /
0) (0) (1/1/1)

The contents of the pallet memory are as follows.

Content of address <00000000> = 1
01000000000000000111110000 Contents of address <00000001> = 000000
0000000000000000000

Since the next pixel 8 has the same data as next [3], “0” is output from the first comparing section 4.

The next pixel 9 has a value of {200, 10, 0}, so present [3] = {200, 10,
0 ° (step S13). present [3]
Is the format of next [3] = {0,0,0}
[3] = “255”, 255, 255}, so that “1” is output from the first comparing unit (step S21), and “1” is also output from the second comparing unit. (Step S28).

At step S29, the flag flag indicating whether or not the colornum has reached the limit value 2 of the pallet memory to the m-th power is checked. flag = 0
Therefore, since it has not reached, it progresses to step S30. In step S30, prepress is stored in the pallet memory.
It is checked whether or not the data of nt [3] has already been registered. At this moment, colornum = 2, and if the pixel data of addresses 0 and 1 is checked, $ 16
0, 0, 240 {0, 0, 0}, and the pixel data {200, 10, 0} is not registered, so the flow proceeds to step S35.

At S35, the address 2 of the pallet memory
(= Colornum) present data $ 2
00, 10, 0} is registered. Then, 2 is substituted for the pallet number P (step S35). And color
um is incremented (step S36). Then c
It is checked whether or not colornum has reached the limit value 2 of the palette memory to the power m (step S37). Here, since colornum = 3, it has not been reached. Therefore, no processing is performed and the process proceeds to step S39. In step S39, the pallet number P = 2 for 2 bits (10)
Output (= outbit).

Next, in step S41, colornum
= 3 and check = 4. Since the two are different, no processing is performed and the process proceeds to step S26.

Here, next [3] and former
Update the data of [3]. That is, former [3]
Is assigned to next [3], and pres is assigned to next [3].
ent [3] is substituted (steps S26 and S27).
Thus, next [3] = {210,10,0}, fo
rmer [3] = {0, 0, 0}.

The output state at this point is as follows.

(0) (0) (1/1/0) (0) (1 /
0) (0) (1/1/1) (0) (1/1/10) The contents of the palette memory are as follows.

Content of address <00000000> = 1
01000000000000000111110000 Contents of address <00000001> = 000000
0000000000000000000 Contents of address <00000010> = 1100100
00000101000000000000

The next pixel 10 has data different from next [3], but has the same value as former [3], so that “1” is output from the first comparator 4 and “2” is output from the second comparator 5. "0" is output. Here, next [3] and fo
Update the data of emer [3]. Thus next
[3] = {0,0,0}, former [3] = {21
0, 10, 0}.

The next pixel 11 is # 255, 255, 25
5}, so present [3] = {2
55, 255, 255} (step S13). p
current [3] is next [3] = {0,0,0}
Since both have a different value from former [3] = {210, 10, 0}, “1” is output from the first comparing unit (step S21), and “1” is also output from the second comparing unit. Is performed (step S28).

In step S29, the flag flag indicating whether or not the colornum has reached the pallet memory limit value 2 raised to the mth power is checked. flag = 0
Therefore, since it has not reached, it progresses to step S30. In step S30, prepress is stored in the pallet memory.
It is checked whether or not the data of nt [3] has already been registered. At this moment, colornum = 3, and if pixel data of addresses 0, 1, and 2 are checked, $ 1
60,0,240｝ ｛0,0,0｝ ｛200,10,
0}, and the pixel data {255, 255, 255} has not been registered, so the flow proceeds to step S35.

In S35, the address 3 of the pallet memory
(= Colornum) present data $ 2
55, 255, 255} are registered. Then, 3 is substituted for the pallet number P (step S35). And col
ornum is incremented (step S36).
Next, colornum is m of the limit value 2 of the palette memory.
It is checked whether the power has reached the power (step S37).
Here, colornum is not reached because colornum = 4. Therefore, no processing is performed and the process proceeds to step S39.
In step S39, the pallet number P = 2 is output for 2 bits (11) (= outbit).

Next, in step S41, colornu
m and check are compared. Since both are 4, which are equal to each other, the flow advances to step S42 to increment outbit. Then, check ² = check ² =
8 is substituted (step S43).

Here, next [3] and former
Update the data of [3]. That is, former [3]
Is assigned to next [3], and pres is assigned to next [3].
ent [3] is substituted (steps S26 and S27).
Thus, next [3] = $ 255, 255, 25
5}, and former [3] = {0, 0, 0}.

The output state at this point is as follows.

(0) (0) (1/1/0) (0) (1 /
0) (0) (1/1/1) (0) (1/1/10) (1
/ 0) (1/1/11)

The contents of the pallet memory are as follows.

Content of address <00000000> = 1
01000000000000000111110000 Contents of address <00000001> = 000000
0000000000000000000 Contents of address <00000010> = 1100100
00000101000000000000 Contents of address <0000011> = 1111111
11111111111111111

Since the next pixel 12 has the same data as next [3], “0” is output from the first comparing section 4.

The next pixel 13 has a value of {160,0,240}, so present [3] = {160,
0,240 ° (step S13). presen
t [3] is next [3] = $ 255, 255, 25
Since 5 [] has a different value [former [3] = {0, 0, 0}, "1" is output from the first comparing unit (step S21), and "1" is also output from the second comparing unit. It is output (step S28).

In step S29, the flag flag indicating whether or not the colornum has reached the limit value 2 of the pallet memory to the m-th power is checked. flag = 0
Therefore, since it has not reached, it progresses to step S30. In step S30, prepress is stored in the pallet memory.
It is checked whether the data of nt [3] has already been registered. At the present time, colornum = 4, and when pixel data at addresses 0, 1, 2, and 3 are examined, {160, 0, 240} is registered at address 0, so 0 is substituted for the pallet number P, and the process proceeds to step S39. move on.

Next, at step S41, colornum =
4; check = 8 is compared. Since the two are different, no process is performed and the process proceeds to step S26.

In step S39, the pallet number P = 0 is output for three bits (000) (= outbit).

Here, next [3] and former
Update the data of [3]. That is, former [3]
Is assigned to next [3], and pres is assigned to next [3].
ent [3] is substituted (steps S26 and S27).
Thus, next [3] = {160,0,240}, f
orr [3] = {255, 255, 255}.

The output state at this point is as follows.

(0) (0) (1/1/0) (0) (1 /
0) (0) (1/1/1) (0) (1/1/10) (1
/ 0) (1/1/11) (0) (1/1/000)

There is no change in the palette memory.

The following code data is completed by repeating the above processing for the image of FIG.

(0) (0) (1/1/0) (0) (1 /
0) (0) (1/1/1) (0) (1/1/10) (1/0) (1/1/11) (0)
(1/1/000) (0) (1/0) (0) (0) (0) (1/0) (0) (0) (1/1/01)
0) (0) (0) (1/1/001) (1/0) (0) (0) (0) (1
/ 1/011) (0) (0) (0) (0) (0) (1/0) (0) (1/1/00
0) (1/1/001) (0) (0) (1/1/010) (0) (0) (0) (1/1)
/ 011) (0) (0) (0) (0) (0) (0) (1/1/000) (1/1)
/ 010) (0) (0) (0) (1/1/001) (1/1/000) (1/1)
/ 011) (0) (0) (0) (0) (0) (0) (0) (1/1/100) (0) (0)
(1/1/001) (0) (0) (0) (1/0) (0) (0) (0) (1/1 /
011) (0) (0) (1/0) (0) (1/1/101) (0)
(0) (0) (0) (0) (1/1/001) (1/1/100) (0)
(1/1/101) (1/0) (0) (0) ...

The contents of the pallet memory are as follows.

Content of address <00000000> = 1
01000000000000000111110000 Contents of address <00000001> = 000000
0000000000000000000 Contents of address <00000010> = 1100100
00000101000000000000 Contents of address <0000011> = 1111111
11111111111111111 Contents of address <00000100> = 000000
00000000111111111 Contents of address <0000001> = 0000101
010001111001111000

If the appearance pixel data reaches 256 colors, the palette memory becomes unacceptable. Therefore, a flag is set in step S38. In the subsequent processing, the address signal (1 to 8 bits) of the palette memory is not output. 24 bits of pixel data of present [3] are output (step S40).

<Data Decompression Processing> Next, a data decompression device for restoring the original data to the data compressed by the data compression device will be described.

FIG. 7 is a block diagram showing a functional configuration of the data decompression device according to the first embodiment. In the figure, reference numeral 701 denotes a distribution unit which divides data read from the memory 10 into bit units, and further divides the data into third units under the control of the control unit 710.
Comparing section 702, fourth comparing section 703, palette memory section 7
04, distribute the read data to any of the switches 705. Especially when data is distributed to the pallet memory unit, data interpolation is also performed. A third comparison unit 702 outputs a signal 7a of “0” if the 1-bit data distributed from the distribution unit 701 is equal by comparing the OFF signal of 0, and “1” if they are different. Reference numeral 703 denotes a fourth comparison unit, which is a distribution unit 701.
The 1-bit data distributed from is compared with the OFF signal 0, and outputs a signal 7b of "0" if equal and "1" if different. A palette memory unit 704 outputs 24 bits of pixel data stored at an address indicated by the 8-bit data distributed from the distribution unit 701. A switch 705 is controlled by the control unit 710.
The switching between the 24-bit pixel data from the distribution unit and the 24-bit pixel data from the palette memory is performed. 70
Reference numeral 6 denotes a selector which receives the pixel data from the switch 705 and the pixel data from the fourth latch unit 708, and selects one of them by controlling the output signal 7b of the fourth comparing unit 703. A third latch unit 707 holds the pixel data output from the selector as the signal 7a as a write signal. A fourth latch unit 708 holds the pixel data output from the third latch unit as a write signal using the signal 7a. Reference numeral 709 denotes a pixel data storage unit that holds an output from the third latch unit at a location corresponding to the pixel position.
A control unit 710 controls the operation timing of each unit based on the states of the signals 7a and 7b, and particularly controls the distribution unit (controls the number of bits of each signal and interpolates data to be distributed to the palette memory).

The operation of the data decompression device having the above configuration will be described below with reference to the flowcharts of FIGS.

FIGS. 8 to 10 are flowcharts showing the processing procedure by the data decompression apparatus of the first embodiment. In the following description, the data held in the third latch unit 707 is referred to as next [3], and the data held in the fourth latch unit 708 is referred to as former [3].

In step S81, the third latch unit 707 and the fourth latch unit 708 are initialized, and next [3] and fo are initialized.
Set an initial value to rmer [3]. This initial value is
It is necessary to set the same value as at the time of compression. Here, next
[3] = {255, 255, 255}, former
[3] = {0, 0, 0}. Colornum and colorn for counting appearance pixel data in step S82
indicates that um has exceeded the allowable number of palette memories, and f
o that represents the output bit length while resetting the lag
outbit is set to 1, and check, which takes the timing to increment outbit, is reset to 2. Next, in step S83, 1-bit data is read from the distribution unit 701, and is set as data1. Next, step S8
In 4, the third comparing unit 702 determines whether data1 is “0”. As a result, data1
If = 0, the process proceeds to step S85. Also, data1
If $ 0, the process proceeds to step S91 in FIG.

In step S85, next [3] is output as the pixel at that position. Then, the process proceeds to step S86. If the compressed data still remains, the process returns to step S83 to repeat the above-described processing. If no compressed data remains, the data decompression process is terminated.

Next, the processing when data1 = 1 will be described with reference to the flowchart of FIG. The fact that the value of data1 is 1 means that the color data of the pixel at that position has a value different from the color data of the previous pixel. In step S91, the result output from the third comparing unit 702 is "1", so that 1-bit data is read from the distribution unit and is set as data2. In step S92,
The fourth comparing unit 704 compares whether data2 = 0, and when data2 = 0, proceeds to step S93.
When data2 ≠ 0, the process proceeds to step S101 (FIG. 1).
0).

In step S93, since data2 = 0, the pixel at that position is the same as the color data of former [3].
After exchanging the data between xt [3] and former [3], the process proceeds to step S85 described above. In step S85, the data of next [3] (fo before the replacement is fo)
rmer [3]).

The operation for executing the processing in step S93 will be described with reference to the block diagram of FIG. Fourth comparison unit 70
3 is "0", the selector unit 70
6 is an output from the fourth latch unit 708 (former
[3]) is held. Next, the output data of the third latch unit 707 is held in the fourth latch unit 708 for data replacement later. Then, the data held in the selector unit 706 is held in the third latch unit 707. Then, the data held in the third latch unit 707 is stored in the pixel data storage unit 709. In this way, fo
The rmer [3] data is output as pixel data, and data exchange between next [3] and former [3] is performed.

On the other hand, when data2 = 1, the pixel at that position has new color data that is neither next [3] nor former [3]. Therefore, the new color data or the address of the palette memory of the color data is read from the distribution unit and output to the pixel data storage unit 709, and the data of next [3] and former [3] are updated. First, in step S101, fo
The value of next [3] is substituted for rmer [3].

Next, in step S102, the flag f
It is checked whether lag is 0, that is, whether colorunm has not reached the limit amount 256 of the palette memory.

If it has not reached, the process proceeds to step S103. If it has reached, the process proceeds to step S109.

In step S103, the distribution unit outputs 8-ou.
8-bit data in which higher bits are complemented with 0 for t bits is obtained and input to data3.

In step S104, the pixel data stored in the palette memory address data3 is
Enter in [3].

In step S105, data3 is set to col.
It is checked whether it is equal to ornum, and when it is equal, it becomes new pixel data, and the process proceeds to step S106. If not, the process jumps to step S85 without doing anything. In step S106, colornum is set in step S107.
Then, it is checked whether or not the colornum has reached the limit of the pallet memory.
And if not, the process proceeds to step S85 without performing anything, and outputs next [3].

In step S110, it is checked whether colornum and check are equal. If they are equal to each other, the process proceeds to step S111, and outbit is incremented.
check is updated by the square of check (step S
112).

On the other hand, when the flag is set in step S102, the process proceeds to step S109, where 24-bit data indicating pixel data is extracted from the distribution unit, and next
[3], and the process advances to step S85 to next [3].
Is output.

In accordance with the above flowchart, actual compression data is expanded. The data obtained by compressing the image data shown in FIG.

First, next [3] and former
An initial value is set in [3] (step S81).

[0123] Also, a counter "colornum" for counting appearance pixel data and a flag indicating whether or not "colornum" has not reached the limit value 256 of the pallet memory.
Is reset (step S82).

The distribution unit 701 is provided from the memory 10 to the memory 10
, The data corresponding to the depth bits are taken out and stored, and the required number of bits are distributed to each unit under the control of the control unit 710.
The above processing is repeated until there is no more data in the memory 10. First, 1-bit data is assigned to data from the distribution unit (step S83). Since data = 0, we know that this pixel is equal to next [3],
{255, 255, 255} is output (step S
85). Next, since the data distributed from the distribution unit is also 0, {255, 255, 255} is similarly output. Thus, data corresponding to the pixels 1 and 2 in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data to be distributed from the distribution unit is 1, the flow advances to step S91 to further substitute 1-bit data into data2 from the distribution unit. Furthermore, data2
Is also 1, the process proceeds to step S101, and the
Next [3] is substituted for [3], and former [3] =
{255, 255, 255} (step S10
1). Here, when the flag is checked, it is 0, and the process proceeds to step S103 (step S102).
In step S103, 7 bits (8-out) are sent from the distribution unit.
bit) 8-bit data in which “0” is substituted in the high order, that is, “0”
The data 00000000 obtained by interpolating seven 0s to 1-bit data is substituted for data3.

In step S104, the pixel data {160, 0, 240} at the address data3 = 00000000 of the pallet memory is assigned to next [3]. Here, since data3 = colornum, the process proceeds to step S106 (step S105). And c
colornum is incremented (step S10).
6). Here, it is checked whether colornum = 1 has not reached the limit value 256 of the pallet memory, and since it has not reached, the process proceeds to step S110 without performing any processing (step S107). In step S110, co
lornum = 1 and check = 2 are compared. Here, since the two are different, no processing is performed and step S8 is performed.
Go to 5. In step S85, n is set as the pixel at that position.
ext [3] is output to the pixel data storage unit 709.

Thus, the data corresponding to the pixel “3” in FIG. 5 is stored in the pixel data storage unit 709.

Note that the numbers for specifying the pixels in FIG. 5 are shown with circles.

Next, since the data distributed from the distribution unit is 0, next [3] = {160, 0, 240} is output to the pixel data storage unit 709 as the pixel at that position.

Thus, the data corresponding to the pixel “4” in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data to be distributed from the distribution unit is 1, the flow advances to step S91 to further substitute 1-bit data into data2 from the distribution unit. Since data2 is 0, the process proceeds to step S93, where former [3] and n
ext [3] is exchanged, and then the value of [former [3] = $ 160,
0,240}, next [3] = {255, 255, 2}
55 °. Then, in step S85, next [3]
Is output to the pixel data storage unit 709 as a pixel at that position.

Thus, the data corresponding to the pixel “5” in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data distributed from the distribution unit is 0, next [3] = {255, 255, 255} is output to the pixel data storage unit 709 as the pixel at that position.

Thus, the data corresponding to the pixel “6” in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data to be distributed from the distribution unit is 1, the flow advances to step S91 to further substitute 1-bit data into data2 from the distribution unit. Furthermore, data2
Is also 1, the process proceeds to step S101, and the
Next [3] is substituted for [3], and former [3] =
{255, 255, 255} (step S10
1). Here, when the flag is checked, it is 0, and the process proceeds to step S103 (step S102).
In step S103, 7 bits (8-out) are sent from the distribution unit.
bit) 8-bit data in which 0 is substituted in the high order, that is, 1
The data 00000001 obtained by interpolating seven 0s to the 1-bit data is substituted for data3.

In step S104, the pixel data {0,0,0} at the address data3 = 00000001 of the pallet memory is assigned to next [3]. Here, since data3 = colornum, step S1
It proceeds to 06 (step S105). And color
um is incremented (step S106). Here, colornum = 2 is the limit value 2 of the palette memory.
It is checked whether it has not reached 56, and since it has not reached, the process proceeds to step S110 without performing any processing (step S107). In step S110, colornu
Compare m and check. Since both are 2, the process proceeds to step S111, and outbit is incremented. In step S112, check2 is added to check.
Is assigned. In step S85, next [3] is output to the pixel data storage unit 709 as the pixel at that position.

Thus, the data corresponding to the pixel “7” in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data distributed from the distribution unit is 0, next [3] = {0,0,0} is output to the pixel data storage unit 709 as the pixel at that position.

Thus, the data corresponding to the pixel “8” in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data distributed from the distribution unit is 1, the flow advances to step S91, and the distribution unit substitutes 1-bit data into data2. Furthermore, data2
Is also 1, the process proceeds to step S101, and the
Next [3] is substituted for [3], and the form [3] =
{0, 0, 0} (Step S101). here,
When the flag is checked, it is 0, and the process proceeds to step S103 (step S102). Step S10
In 3, 8-bit data obtained by assigning 0 to the upper 6 bits (8-outbit) from the distribution unit, that is, data 0000 obtained by interpolating 6 higher 0s to 2-bit data 10.
010 is substituted for data3.

In step S104, the pixel data {200, 10, 0} at the address data3 = 00000010 in the pallet memory is substituted for next [3].
Here, since data3 = colornum, the process proceeds to step S106 (step S105). And col
ornum is incremented (step S10)
6). Here, it is checked whether colornum = 3 has not reached the limit value 256 of the pallet memory, and since it has not reached, the process proceeds to step S110 without performing any processing (step S107). In step S110, col
Compare ornum = 3 and check = 4. Since the two are different, no processing is performed, and the process proceeds to step S85. In step S85, next [3] is set as the pixel at that position.
Is output to the pixel data storage unit 709.

Thus, data corresponding to the pixel “9” in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data distributed from the distribution unit is 1, the flow advances to step S91, and the distribution unit substitutes 1-bit data into data2. Since data2 is 0, the process proceeds to step S93, where former [3] and n
ext [3] is exchanged and former [3] = $ 200,
10,0}, next [3] = {0,0,0}.
Then, in step S85, next [3] is output to the pixel data storage unit 709 as a pixel at that position.

Thus, the data corresponding to the pixel “10” in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data to be distributed from the distribution unit is 1, the flow advances to step S91 to further substitute 1-bit data into data2 from the distribution unit. Furthermore, data2
Is also 1, the process proceeds to step S101, and the
Next [3] is substituted for [3], and the form [3] =
{0, 0, 0} (Step S101). here,
When the flag is checked, it is 0, and the process proceeds to step S103 (step S102). Step S10
In 3, 8-bit data in which 0 is assigned to 6 bits (8-outbit) higher from the distribution unit, that is, data 0000 in which 6 0s are interpolated 6 bits higher in 2-bit data 11.
011 is assigned to data3.

In step S104, the pixel data {255, 255, 255} at the address data3 = 00000111 of the pallet memory is substituted for next [3]. Here, since data3 = colornum, the process proceeds to step S106 (step S105). Then, the colornum is incremented (step S1).
06). Here, it is checked whether colornum = 4 has not reached the limit value 256 of the palette memory,
Since it has not reached, the process proceeds to step S110 without performing any processing (step S107). In step S110, co
Compare lornum = 4 and check = 4. Since both are equal, the process proceeds to step S111, and outbit is incremented. In step S112, check2 is substituted for check. In step S85, next [3] is stored as the pixel at that position in the pixel data storage unit 709.
Output to

Thus, the data corresponding to the pixel “11” in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data distributed from the distribution unit is 0, next [3] = {255, 255, 255} is output to the pixel data storage unit 709 as the pixel at that position.

Thus, the data corresponding to the pixel “12” in FIG. 5 is stored in the pixel data storage unit 709.

Next, since the data to be distributed from the distribution unit is 1, the flow advances to step S91 to further substitute 1-bit data into data2 from the distribution unit. Furthermore, data2
Is also 1, the process proceeds to step S101, and the
Next [3] is substituted for [3], and the form [3] =
{255, 255, 255} (step S10
1). Here, when the flag is checked, it is 0, and the process proceeds to step S103 (step S102).
In step S103, the distribution unit sends 5 bits (8-out).
bit) 8-bit data in which “0” is substituted in the high order, that is, “0”
Data 00000000 obtained by interpolating five 0s to 3-bit data of 00 is assigned to data3.

In step S104, the pixel data {160, 0, 240} at the address data3 = 00000000 of the pallet memory is assigned to next [3]. Here, since data3 and colornum are different, no processing is performed and the process proceeds to step S110 (step S110).
105). In step S110, colornum = 5
And check = 8. Since the two are different, the process proceeds to step S85 without performing any processing. In step S85, next [3] is output to the pixel data storage unit 709 as the pixel at that position.

Thus, the data corresponding to the pixel “13” in FIG. 5 is stored in the pixel data storage unit 709.

When the above-described decompression processing is performed on all the compressed data, the RGB data in FIG. 5 can be restored without any change.

As described above, the image data compression / decompression device according to the first embodiment is a reversible compression method and has a feature that the compression ratio is high. In particular, an excellent effect is exhibited for an image such as an image created on a computer in which pixels having the same data are continuous in one area.

The operation of the first latch unit 2 may update the held data based on the comparison result of the first comparison unit 4 as shown in the above-described flowchart, or may operate the pixel data generation unit. The stored data may be updated every time pixel data is input from 1.

(Embodiment 2) In Embodiment 1 described above, the number of the memory unit is one, but the memory unit stores the output from the first comparison unit 4, the memory unit stores the output from the second comparison unit 5, The memory for storing pixel data may be divided into three. In that case, there is an advantage that the hardware configuration is simplified.

(Embodiment 3) In Embodiment 2 described above, the data output from the first comparing section 4 and the second comparing section 5 are constituted by a flag system indicating ON / OFF (1/0). ing. In the second embodiment, the first comparison unit 4
The data output from the second comparison unit 5 is not a flag system but a trigger system. FIG. 11 shows the difference between the flag system and the trigger system. 1101 represents a flag system,
1102 indicates a trigger system. As is clear from the figure, the trigger system 1102 tends to keep the same data longer. By utilizing this property, the first comparison unit 4 and the second comparison unit 4
Regarding the data output from the comparison unit 5, MH
By applying run-length compression such as this, it is possible to achieve a reduction in the amount of data. Not only MH but also Huffman code or Lempel-
Further data compression can be performed by applying Ziv coding or the like.

(Embodiment 4) In the embodiment described above, the number of latches (second latch units) for storing previous pixel data is one, but a plurality of latches may be provided.

For example, if there are three, the previous color data (the 21st latch section, the 22nd latch section, and the 23rd latch section)
, And the number of times of outputting the palette memory address and the 24-bit pixel data is reduced, and the compression ratio is improved.
In that case, the second comparing section (the 21st comparing section, the 22nd comparing section,
The 23rd comparison section) also has three, and the signal corresponding to the signal 1b has a 2-bit value according to the comparison result,
For example, 00: present [3] matches the twenty-first latch part 01: present [3] matches the twenty-second latch part 10: present [3] matches the twenty-third latch part 11: pallet address because none matches Or, it becomes a signal of pixel data output.

At this time, the data of the second latch section updated when the first comparison section does not match is as follows: 1b = 00: The data of the 21st latch section is updated with the data of the first latch section.

= 01: Data in the 22nd latch is updated with data in the first latch.

= 10: The data in the twenty-third latch is updated with the data in the first latch.

= 11: The oldest updated latch section is updated with the data of the first latch section.

Alternatively, when 1b = 11, the 23rd latch section may be updated without fail.

(Embodiment 5) In Embodiment 1 described above, when the number of address bits is m, the data indicating the pallet memory address is variable up to (1 to m) bits according to the value of colornum. Is also good.

In that case, FIG. 1 shows the control of the selector section 8 and FIG.
Control of the distribution unit 701 becomes simpler.

In each of the above embodiments, the compression / expansion method is realized by hardware, but this may be realized by software.

In the pixel data compression apparatus in each of the above embodiments, only one pixel data is held in the second latch section (3), but the present invention is not limited to this. A plurality of pieces of pixel data may be held, such as the pixel data after the previous update and the pixel data after the last update.

The present invention may be applied to a system including a plurality of devices or an apparatus including one device. Needless to say, the present invention can be applied to a case where the present invention is achieved by supplying a program to a system or an apparatus.

[0170]

As described above, according to the data compression apparatus and method of the present invention, a multi-valued image created by a computer or the like can be compressed at a high compression ratio without deterioration.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of a data compression device according to a first embodiment.

FIG. 2 is a flowchart illustrating a processing procedure of the data compression device according to the first embodiment.

FIG. 3 is a flowchart illustrating a processing procedure of the data compression device according to the first embodiment.

FIG. 4 is a flowchart illustrating a processing procedure of the data compression device according to the first embodiment.

FIG. 5 is a diagram illustrating an example of image data.

FIG. 6 is a diagram illustrating the order of pixels to be subjected to data compression processing.

FIG. 7 is a block diagram illustrating a schematic configuration of a data decompression device according to the first embodiment.

FIG. 8 is a flowchart illustrating a processing procedure of the data decompression apparatus according to the first embodiment.

FIG. 9 is a flowchart illustrating a processing procedure of the data decompression device according to the first embodiment.

FIG. 10 is a flowchart illustrating a processing procedure of the data decompression apparatus according to the first embodiment.

FIG. 11 is a diagram illustrating a difference between ON / OFF expressions according to a flag system and a trigger system.

FIG. 12 is a block diagram illustrating a functional configuration of an ADCT compression device.

FIG. 13 is a block diagram illustrating a functional configuration of an ADCT decompression device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Pixel data generation part 2 1st latch part 3 2nd latch part 4 1st comparison part 5 2nd comparison part 6 1st memory part 7 2nd memory part

Continuation of the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) G06T 9/00 H04N 1/41 JICST file (JOIS)

Claims (6)

(57) [Claims] 1. Palette storage means for storing pixel data appearing in the past by assigning a palette number thereto, and a first memory for comparing input pixel data from an original image with pixel data immediately before the input pixel data. A holding unit that holds at least one pixel data when the two data compared by the first comparing unit do not match, and that is held by the input pixel data and the holding unit A second comparing means for comparing the pixel data with the pixel data, wherein, when the input pixel data does not match any pixel data held in the holding means, Output means for searching for any of the pixel data stored in the storage means and outputting a pallet number of the input pixel data. Image data compression apparatus. 2. A storage for storing a comparison result indicating match / mismatch in the first comparison means, a comparison result indicating match / mismatch in the second comparison means, and a pallet number output by the output means. 2. The image data compression apparatus according to claim 1, further comprising means. 3. When the two data compared by the first comparing means do not match, the output means sets one of the pixel data held in the holding means one before the input pixel data. The image data compression apparatus according to claim 1, wherein the image data is updated with the pixel data. 4. A pallet storage process for storing pixel data that appeared in the past by assigning pallet numbers thereto, and comparing input pixel data from an original image with pixel data immediately before the input pixel data. A holding step of holding at least one pixel data when both data compared in the first comparing step do not match each other; and a holding step of holding the input pixel data and the holding step. A second comparison step of comparing the pixel data with the pixel data, and in the comparison by the second comparison step, when the input pixel data does not match any pixel data held in the holding step, the input pixel data is stored in the pallet. An output step of searching for a match with any of the pixel data stored in the storage step and outputting a pallet number of the input pixel data. Image data compression method to be. 5. A comparison result indicating a match / mismatch in the first comparison step, a comparison result indicating a match / mismatch in the second comparison step, and a pallet number output in the output step. The image data compression method according to claim 4, further comprising a storage step. 6. When both data compared in the first comparison step do not match, any one of the pixel data held in the holding step is replaced with the pixel data immediately before the input pixel data. The image data compression method according to claim 4, further comprising an updating step of updating the image data.