JP3324645B2 - AC-DC converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an AC / DC converter having a switching rectifier circuit.

[0002]

2. Description of the Related Art A rectifying and smoothing circuit for rectifying an AC voltage with a diode rectifying circuit and smoothing the rectified voltage with a smoothing capacitor has the disadvantage that voltage adjustment is impossible and the power factor is poor. That is, since the diode rectifying / smoothing circuit does not have the voltage adjustment circuit, the output voltage changes due to the fluctuation of the input voltage and the load. Also, the charging current of the smoothing capacitor flows only at and near the peak of the sine wave AC voltage, the input current waveform does not become a sine wave, and the power factor is poor. As a rectification method for solving this problem, a reactor is connected to the input line of the rectifier circuit, a semiconductor switch such as a transistor is connected in parallel with the rectifier diode, a current for improving the waveform flows through the semiconductor switch, and A method of adjusting a DC output voltage by a duty ratio of a switch is known. By the way, in the case of the above method, a power loss occurs due to a snubber capacitor or a parasitic capacitance connected in parallel to the semiconductor switch for absorbing a surge voltage. In order to reduce this power loss, it is possible to connect a resonance reactor via an auxiliary switch between the DC output terminals of the pair of rectifier circuits and discharge the stored energy of the capacitor or parasitic capacitance before turning on the semiconductor switch. For example, it is known from Japanese Patent Application Laid-Open No. 9-322542.
However, in this method, it is necessary to connect a backflow prevention diode to the output side of the DC output line rather than the auxiliary reactor, and all the current of the rectified output flows there, resulting in a voltage drop and power loss.

[0003] An AC-DC converter capable of improving the waveform and adjusting the voltage, suppressing the surge voltage when the main switch is turned off, and reducing the power loss due to the surge voltage absorbing capacitor. As a converter, for example, “IEEE Semiconductor Power Study Group S
PC-97-24, pp. 63-68, Shinshi Kuni, Kobe,
A converter of the auxiliary resonance commutation arm link type described in the paper "Characteristic analysis of an auxiliary resonance commutation arm link three-phase voltage source sine wave converter" by Matsumoto and Nakaoka is known. In the converter described in this paper,
The output smoothing capacitor is composed of a series circuit of two capacitors, and the interconnection point (voltage division point) of these two capacitors
A resonance reactor is connected between the power supply and the interconnection point of the main switch of each pair of the converters via two bidirectional switches.

[0004]

However, the above-mentioned auxiliary resonance commutation arm link circuit uses a bidirectional switch, so that the circuit becomes complicated, and the control circuit of the bidirectional switch also becomes complicated. Becomes expensive. When converting three-phase alternating current to direct current, it is necessary to provide an auxiliary resonance commutation arm link circuit for each phase, so that three resonance reactors and three bidirectional switches are required, It is large and expensive.

It is an object of the present invention to provide a step-up AC-DC converter capable of reducing power loss with a relatively simple configuration.

[0006]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems and to achieve the above-mentioned object, the present invention provides first, second, and third AC terminals which are bridge-connected to first, second, and third AC terminals. 3, fourth,
Fifth and sixth main switches and the first, second, third, fourth, and
5, and 6 connected in parallel to the main switch, 1st, 2nd,
Third, fourth, fifth and sixth main diodes and first, second,
A three-phase bridge-type switching rectifier circuit having third, fourth, fifth and sixth snubber capacitors or parasitic capacitances; the first, second and third AC terminals and the switching rectifier circuit Between the first, second, and third boosting reactors connected between the first, second, and third AC input terminals and the first and second DC output terminals of the switching rectifier circuit. A series circuit of connected first and second smoothing capacitors, and first and second switching rectifier circuits;
And a three-phase bridge type diode rectifier circuit connected to the third AC input terminal, and an interconnection point between one of the DC output terminals of the diode rectifier circuit and the first and second smoothing capacitors. A first auxiliary reactor connected between the first and second auxiliary switches via a first auxiliary switch, and the other DC output terminal of the diode rectifier circuit and an interconnection point of the first and second smoothing capacitors. A second auxiliary reactor connected in between via a second auxiliary switch, and the first to the third rectifier circuit so as to obtain a boosted output voltage.
A signal for controlling on / off of a sixth main switch at a repetition frequency higher than a frequency of an AC power supply voltage of the first to third AC terminals is formed, and a signal for controlling the first to sixth snubber capacitors is formed. A control circuit for forming a signal for controlling on / off of the first and second auxiliary switches so as to release energy before the first to sixth main switches are turned on. It relates to a DC converter.

Incidentally, as shown in claim 2 and FIG.
One smoothing capacitor C0 is connected between the first and second DC output terminals 4a and 4b, one of the first and second capacitors Ca and Cb is omitted, and the capacity of the capacitor Ca or Cb is smoothed. It can be smaller than the capacitor C0. Further, as shown in claim 3 and FIG. 6, first and second auxiliary diodes Da and Db, first and second clamping capacitors C11 and C12, and first and second clamping resistors. R1 and R2 can be provided. Further, as shown in claim 4 and FIG. 7, first and second auxiliary diodes Da and Db are further connected between the auxiliary bridge type diode rectifier circuit 5 and the first and second DC output terminals, respectively. be able to. As shown in claim 5 and FIG. 8, a common auxiliary reactor L11 is used instead of the first and second auxiliary reactors La and Lb in claim 1.
Can be connected between the first and second auxiliary switches Qa, Qb and the interconnection point P4 of the first and second smoothing capacitors Ca, Cb. Claim 6 and FIG.
, One smoothing capacitor C0 is connected between the first and second DC output terminals, and one of the first and second capacitors Ca, Cb is omitted, and the capacitors Ca,
Alternatively, the capacitance of Cb can be made smaller than that of the smoothing capacitor C0. Further, as shown in claims 7 and 9, the same first and second auxiliary diodes Da and Db as in claims 4 and 7 can be provided in the circuits of claims 5 and 6 as well. As shown in claim 8 and FIG. 10, a common auxiliary reactor L11 is provided, and the first and second auxiliary diodes Da and Db are connected to the other end of the auxiliary reactor L11 and the first and second DC output terminals 4a. , 4b. Further, as shown in claim 9, the first, third and fifth snubber capacitors or the second, fourth and sixth snubber capacitors can be omitted.

[0008]

According to the present invention, a circuit for releasing energy of the snubber capacitor is provided independently for three phases, despite having a three-phase switching rectifier circuit. Is unnecessary, and the circuit configuration is simplified.
Further, since it is not necessary to use a bidirectional switch as the auxiliary switch, the configuration of the device is simple and the cost is low. Ma
In addition, the auxiliary switch can perform zero current switching.
Wear. Further, according to the third aspect of the present invention, no more than 1/2 of the output voltage V0 is applied to the first and second auxiliary switches. Therefore, it is possible to lower the breakdown voltage of the auxiliary switch. Further, according to the inventions of claims 4, 7 and 8, it is possible to regenerate the energy of the overvoltage generated in the diode of the diode rectifier circuit. According to the fifth, seventh and eighth aspects of the present invention, the number of auxiliary reactors can be reduced,
Cost reduction and size reduction are achieved.

[0009]

Embodiments and Examples Next, a step-up type three-phase full-wave rectifier according to embodiments and examples of the present invention will be described with reference to FIGS.

[0010]

First Embodiment An AC-DC converter according to a first embodiment shown in FIG. 1 is a step-up type three-phase full-wave switching rectifier for supplying a three-phase sinusoidal AC power. , Second
And third AC terminals 1a, 1b, 1c, a three-phase bridge type switching rectifier circuit 2, first and second DC terminals 4a, 4b for connecting a load 3, and first and second smoothing terminals. Capacitors Ca, Cb, first, second, and third boosting reactors L1, L2, L3, three-phase bridge type auxiliary diode rectifier circuit 5, and first and second commutation reactors. First and second auxiliary reactors La and Lb, and first and second auxiliary switches Qa, which can also be referred to as first and second commutation switches.
Qb, a control circuit 6, and first, second, and third current detectors 7a, 7b, and 7c.

Three-phase bridge type switching rectifier circuit 2
Is an IGBT (insulated gate bipolar transistor)
The first, second, third, fourth, fifth and sixth main switches Q1, Q2, Q3, Q4, Q5, Q6;
The second, third, fourth, fifth and sixth main diodes D1,
D2, D3, D4, D5, D6, first, second, third,
Fourth, fifth and sixth snubber capacitors C1, C2,
C3, C4, C5 and C6. The first to sixth main switches Q1 to Q6 are connected in a three-phase bridge type.
The first to sixth main diodes D1 to D6 are connected in reverse direction to the first to sixth main switches Q1 to Q6, and are configured as diodes built in the first to sixth main switches Q1 to Q6. ing. The first to sixth main diodes D
1 to D6 may be separate from the first to sixth main switches Q1 to Q6. First to sixth snubber capacitors C1 to C
Reference numeral 6 denotes an individual capacitor or a parasitic capacitance connected in parallel to the first to sixth main switches, which contributes to a reduction in switching loss and a surge voltage absorption when the first to sixth main switches Q1 to Q6 are turned off. . Series circuit (first arm) of first and second main switches Q1, Q2 and series circuit (second arm) of third and fourth main switches Q3, Q4
And a series circuit (third arm) of the fifth and sixth main switches Q5 and Q6 are connected in parallel with each other, and this parallel circuit is connected between the first and second DC output terminals 4a and 4b. ing. The interconnection point P1 of the first and second main switches Q1 and Q2 is connected to the first boosting reactor L1 via the first boosting reactor L1.
Are connected to the AC terminal 1a. The interconnection point P2 between the third and fourth switches Q3 and Q4 is connected to the second AC terminal 1b via the second boosting reactor L2. The interconnection point P3 of the fifth and sixth main switches Q5 and Q6 is connected to the third AC terminal 1c via the third boosting reactor L3.

The three-phase bridge type auxiliary diode rectifier circuit 5 according to the present invention can also be called a commutation rectifier circuit, and includes first, second, third, fourth, fifth and sixth rectifiers. It is composed of a circuit in which diodes 8a, 8b, 8c, 8d, 8e and 8f are bridge-connected. The interconnection point of the first and second rectifier diodes 8a, 8b is connected to the interconnection point P1 of the first and second main switches Q1, Q2.
The interconnection point of the third and fourth rectifier diodes 8c, 8d is the interconnection point P of the third and fourth main switches Q3, Q4.
Connected to 2. Fifth and sixth rectifier diodes 8
e, 8f are connected to the fifth and sixth main switches Q5
, Q6 at the interconnection point P3.

The first and second smoothing capacitors Ca, C
b have the same capacitance value and are connected in series with each other, and this series circuit is connected between the first and second DC output terminals 4a and 4b. The first and second smoothing capacitors Ca and Cb have a function of dividing the DC output voltage V0 by half, and each function as a power source of V0 / 2.

A three-phase blitch type auxiliary diode rectifier circuit 5
Between the positive side output terminal 5a and the interconnection point P4 of the first and second smoothing capacitors Ca and Cb via a first auxiliary reactor La, which can also be called a first commutation reactor. The first auxiliary switch Qa is connected. A second auxiliary switch Qb is connected between the negative output terminal 5b of the three-phase rich type auxiliary diode rectifier circuit 5 and the connection point P4 via a second auxiliary reactor Lb.

First, second and third AC terminals 1a, 1
b, 1c are connected to the control circuit 6 by lines 9a, 9b, 9c. The first, second and third current detectors 7a, 7b and 7c are connected to the first, second and third AC terminals 1
a, 1b, 1c and first, second and third connection points P1, P2
The current flowing in the line between P2 and P3 is detected and sent to the control circuit 6 through lines 10a, 10b and 10c. Line 11 has first and second DC output terminals 4a, 4a
The voltage between b is sent to the control circuit 6.

The control circuit 6 includes first to sixth main switches Q
The gate electrodes (control terminals) of 1 to Q6 are shown in FIG.
The first to sixth main gate signals G1 to G6 shown in (F) are supplied, and the gate electrodes (control terminals) of the first and second auxiliary switches Qa and Qb are shown in FIGS. It is configured to supply first and second auxiliary gate signals Ga and Gb. First to sixth main switches Q by control circuit 6
1 to Q6 are controlled by first to third AC terminals 1a, 1b,
A constant DC output voltage V0 higher than the AC voltage of 1c is obtained, and the waveform of the current flowing through the AC terminals 1a, 1b, 1c is made to be an approximate sine wave. The control of the first and second auxiliary switches Qa and Qb by the control circuit 6 is performed by using the energy of the first to sixth snubber capacitors C1 to C6 before the first to sixth main switches Q1 to Q6 are turned on. It is performed to release.

As shown in FIG. 2, the control circuit 6 of FIG. 1 includes an input voltage detection circuit 21, an output voltage detection circuit 22, a current detection circuit 23, an arithmetic circuit 24, a voltage reference signal forming circuit 25, A first comparison circuit 26, a sawtooth wave generator 27,
Current polarity signal forming circuit 28, main switch gate signal distribution circuit 29, reference value generator 30, second comparison circuit 3
1, a pulse adding circuit 32, a distribution control circuit 33, and an auxiliary switch gate signal distribution circuit 34. The main switch gate signal distribution circuit 29 outputs the first to sixth signals shown in FIGS. Of the main gate signals G1 to G6
To the gate electrodes (control terminals) of the main switches Q1 to Q6 of FIG.
(G) The first and second auxiliary switch gate signals Ga, Gb shown in (H) are applied to the first and second auxiliary switches Qa, Q
b. Although the control circuit 6 is shown as an analog circuit in FIG. 2, a part or all of the control circuit 6 can be formed by a digital signal processing circuit.

The input voltage detection circuit 21 shown in FIG.
a, 9b, and 9c, the first to third AC terminals 1 of FIG.
a, 1b, 1c, which are connected to
The detection voltages Vu, Vv and Vw of the phase, V phase and W phase are output. Here, for the sake of simplicity, both the input and output of the input voltage detection circuit 21 are indicated by the same symbols.

The arithmetic circuit 24 calculates the amplitudes of the sine wave first, second and third detection voltages Vu, Vv, Vw of the sine wave so that the DC output voltage V0 becomes the target value. And the first, second and third detection voltages Vu, Vv, Vw by the current detection signals Iu, Iv, Iw of the current detection circuit 23 so as to make the input currents Iu, Iv, Iw sinusoidal. And outputs the first, second and third corrected sine wave voltages Vu1 ', Vv1' and Vw1 '.
For this reason, the arithmetic circuit 24 includes a means for forming an error signal between the output voltage reference value and the DC output detection voltage V0, a multiplication means for multiplying the error signal by the AC detection voltages Vu, Vv, Vw, and a multiplication means. And a circuit for forming an error signal (comparison signal) of the current detection signal. This type of circuit is well known and will not be described in detail.

The voltage reference signal forming circuit 25 is shown in FIG.
, The first, second and third voltage reference signals Vu1, Vv1,
Vw1 is obtained. The first voltage reference signal Vu1 is indicated by a thick solid line in FIG.
Take a value corresponding to a sinusoidal waveform of 210 to 270 degrees in a section of 0 to 60 degrees and a section of 180 to 240 degrees in t3 to t4, and a section of 60 to 120 degrees in t1 to t2 and 240 to 300 in t4 to t5. Take a value below the lowest level of the sawtooth voltage Vt in the 120 ° -180 ° section from t2 to t3 and t
Sine wave 270 to 3 in the 300 to 360 degree section from 5 to t6
Take a value corresponding to a 30 degree waveform. The second voltage reference signal Vv1 is indicated by a thin solid line in FIG.
0 to 60 degree section of t1 and 180 to 240 of t3 to t4
Takes a value below the lowest level of the sawtooth voltage Vt in the
60-120 degree section from 1 to t2 and 240 from t4 to t5
It takes a value corresponding to a sine wave waveform of 270 to 330 degrees in a section of 300 to 300 degrees, and a sine wave of 210 in a section of 120 to 180 degrees from t2 to t3 and a section of 300 to 360 degrees from t5 to t6.
A value corresponding to a waveform of up to 270 degrees is taken. The third voltage reference signal Vw1 is indicated by a broken line in FIG.
0 to 60 degree section of t1 and 180 to 240 of t3 to t4
A value corresponding to a sine wave waveform of 270 to 330 degrees is taken in a degree section, and a 60 to 120 degree section of t1 to t2 and t4 to t
5 takes a value corresponding to a sinusoidal waveform of 210 to 270 degrees in the 240 to 300 degrees section, and takes a value of 120 to 18 of t2 to t3.
The sawtooth voltage Vt takes a value equal to or lower than the minimum level in the 0 degree section and in the 300 to 360 degree section from t5 to t6. The indication of 0 to 360 degrees in FIG. 4A is shown based on one cycle of the U-phase detection voltage Vu or the U-phase current Iu. The first, second and third voltage reference signals Vu in the section between t1 and t2 in FIG.
1, Vv1 and Vw1 can be expressed by the following equations. Vu1 = -1 Vv1 = 1-V1 cos (.theta.) Vw1 = 1-V1 cos (.theta .-. Pi./3) where the maximum value of the sawtooth voltage Vt is +1 and the minimum value is -1, and V
1 is the voltage amplitude reference value in the range of 0 to 2, and t1 is θ = 0. In sections other than t1 to t2 in FIG. 4, Vu1, Vv1, and Vw1 can be obtained in the same manner as in t1 to t2. This voltage reference signal forming circuit 25
The first, second and third voltage reference signals Vu1, Vu in FIG.
It is connected to an arithmetic circuit 24 and a current polarity signal forming circuit 28 to form v1 and Vw1.

The output voltage detecting circuit 22 detects the DC output voltage V0 of the line 11 and sends it to the arithmetic circuit 24.
In FIG. 2, both the input and output of the output voltage detection circuit 22 are indicated by V0 for the sake of simplicity. In this embodiment, a circuit for forming an error signal between the reference value indicating the target output voltage and the output detection voltage is provided on the arithmetic circuit 24 side, but this circuit may be provided on the detection circuit 22.

The sawtooth wave generating circuit 27 generates the sawtooth voltage Vt shown in FIG. The sawtooth voltage Vt is equal to the power supply voltage Vu,
A triangular wave (carrier) is generated at a repetition frequency (for example, 25 kHz) sufficiently higher than the frequencies of Vv and Vw (for example, 50 Hz). As shown in FIG. 5A, the sawtooth voltage Vt has a waveform that rises with a slope and then falls vertically.

The first comparison circuit 26 comprises three comparators (comparators) for comparing the first, second and third voltage reference signals Vu1, Vv1, Vw1 with the sawtooth voltage Vt.
(E) First, second, and third comparison outputs Pu, Pv, and Pw shown in (F) and (G) are output. The first comparison output Pu has a PWM pulse in a section between t0 and t1, a section between t2 and t4, and a section between t5 and t6 in FIG. The second comparison output Pv is t1
A PWM pulse is provided in a section from t3 to t3 and in a section from t4 to t6.
The third comparison output Pw has a PWM pulse in a section between t0 and t2 and a section between t3 and t5.

The first, second and third comparison outputs Pu, Pv and Pw of FIGS. 4 (E), (F) and (G) are distributed by the distribution circuit 29 to the first to third comparison outputs of FIGS. Sixth gate signal G1
G6. In order to perform this distribution, a current detection circuit 23 and a current polarity signal forming circuit 28 are provided. The current detection circuit 23 is connected to the lines 10a, 1
0b and 10c are connected to the first, second and third current detectors 7a, 7b and 7c of FIG.
4 (B), (C) and (D) shown in FIGS. 4 (B), (C) and (D) which flow through the third AC terminals 1a, 1b, 1c and the first, second and third boosting reactors L1, L2, L3. W-phase current I
u, Iv and Iw are detected. In FIG. 2, for simplification of description, both the input and the output of the current detection circuit 23 are indicated by the same Iu, Iv, Iw.

The current polarity signal forming circuit 28 shows the sine wave or the approximate sine wave of FIGS. 4B, 4C, and 4D obtained from the current detecting circuit 23 in FIGS. The first, second and third current polarity signals Iu1, Iv1,.
It comprises three waveform shaping circuits for shaping to Iw1. As is apparent from a comparison between FIGS. 4B, 4C, and 4D and FIGS. 4H, 4I, and 4J, each of the current polarity signals Iu1 during the positive half-wave period of the currents Iu, Iv, and Iw. , Iv1, Iw1 become high level (H), and during the period of the negative half-wave, each current polarity signal Iv1
u1, Iv1, and Iw1 go low (L). The first, second, and third current polarity signals Iu1, Iv1, and Iw1 obtained from the current polarity signal forming circuit 28 are output from the voltage reference forming circuit 25, the first
To the distribution circuit 29 and the distribution control circuit 33. The voltage reference signal forming circuit 25 converts the corrected sine wave voltages Vu1 ', Vv1', Vw1 'obtained from the arithmetic circuit 24 based on the first, second, and third current polarity signals Iu1, Iv1, Iw1 in FIG. To the voltage reference signals Vu1, Vv1, Vw1. The first distribution circuit 29 includes first, second, and third current polarity signals Iu1, Iu.
During the high-level period of v1, Iw1, the first, second and third comparison outputs Pu, Pv, Pw of FIGS. 4 (E), (F), (G) are extracted and are shown in FIGS. 3 (B), (D), (F). ), And sends them to the gates of the second, fourth and sixth main switches Q2, Q4, Q6, and outputs the first, second and fourth gate signals G2, G4, G6 to the gates of the second, fourth and sixth main switches Q2, Q4, Q6. , The second and third current polarity signals Iu1, Iu
During the low level periods of v1 and Iw1, the first, second and third comparison outputs Pu, Pv and Pw of FIGS. 4 (E), (F) and (G) are extracted and are shown in FIGS. 3 (A), (C) and (E). ), The first, third and fifth gate signals G1, G3 and G5 are formed and sent to the gates of the first, third and fifth main switches Q1, Q3 and Q5.

The reference value generator 30 has a reference value Vr consisting of a DC voltage crossing above the sawtooth voltage Vt shown in FIG.
Is to occur. The second comparison circuit 31 compares the sawtooth voltage Vt with the reference value Vr, and generates a pulse P31 having a width corresponding to the period from t1 to t3 as shown in FIG. The adding circuit 32 adds a pulse having a time width Ta to the trailing edge of the comparison output pulse P31 in FIG.
The auxiliary gate signal pulse P32 shown in FIG. The auxiliary gate signal pulse P32 is generated repeatedly in synchronization with the sawtooth voltage Vt of FIG. 4A, as shown in FIG. 4L.

The distribution control circuit 33 is shown in FIG.
(J), first, second and third current polarity signals Iu1,
Based on Iv1 and Iw1, the distribution control signal S shown in FIG.
An exclusive-OR circuit that outputs 33 outputs a high-level output during a period in which only one of the first, second, and third current polarity signals Iu1, Iv1, and Iw1 is high. Others produce low level output. The distribution control signal P33 is
As is apparent from FIG. 4K, the low-level sections and the high-level sections are alternately arranged, and a state change occurs every 60 degrees.

The second distribution circuit 34 applies the auxiliary gate signal pulse P32 of FIG. 4 (L) output from the additional circuit 32 in response to the distribution control signal S33 of FIG. 4 (K).
Distribute as shown in (H). That is, the second distribution circuit 3
4 is t0 to t1, t2 to t3, t4 of the distribution control signal S33.
The pulse P32 of FIG. 4 (L) is extracted during the low level period from .about.t5 to form the first auxiliary gate signal Ga of FIG. 3 (G).
This is supplied to the gate of the first auxiliary switch Qa, and the distribution control signal S33 shown in FIG. 4K has t1 to t2 and t3 to t4.
, T5 to t6 during the high level period, the pulse P3 of FIG.
2 is extracted to form a second auxiliary gate signal shown in FIG. 3 (H), which is supplied to the gate of the second auxiliary switch Qb.

Next, the operation of the AC / DC converter of FIG. 1 will be described with reference to FIGS. The current paths are indicated only by reference numerals of the elements. First to sixth main diodes D
Since 1 to D6 are connected to a three-phase bridge, they have a function as a three-phase full-wave rectifier circuit. However, in the three-phase switching rectifier circuit 2, the first to sixth main switches Q
When two selected from 1 to Q6 are simultaneously turned on, the rectifying function is stopped and the first to third reactors Lu,
A short circuit including two of Lv and Lw is formed. For example, the third and fifth main switches Q3 are applied to the AC power supply terminals 1a, 1b, and 1c during a period in which voltages for turning on the first, fourth, and sixth main diodes D1, D4, and D6 are generated. , Q5 are turned on simultaneously, 1a-L1 -D1-
Closed circuit consisting of Q3-L2-1b and 1a-L1-D1
A closed circuit consisting of -Q5 -L3-1c is formed. As a result, a boosting current and a power factor improving current flow irrespective of the charging current of the smoothing capacitor C1. Switches Q3 and Q
By changing the on-time width of 5, the values of the boosting and power factor improving currents change, so that the output voltage and the power factor can be adjusted to be close to the targets. Although the operation in only a part of the three-phase AC voltage has been described, a similar operation occurs in another part. In the present embodiment, 0 is set to reduce the number of times of switching of the first to sixth main switches Q1 to Q6.
A non-switching period of 60 degrees is provided in each half-wave of the AC voltages Vu, Vv, Vw without performing high-frequency switching in the entire period of up to 360 degrees. 3 (A) to 3 (F)
When the first to sixth main switches Q1 to Q6 are turned on and off by the sixth to sixth gate signals G1 to G6, the currents Iq1 to Iq6 and the first to sixth currents of the first to sixth main switches Q1 to Q6 are changed.
The currents Id1 to Id6 of the main diodes D1 to D6 of FIG.
It flows as shown in (I)-(N). FIG. 3 (I)-
In (N), the first to sixth main switches Q1 to Q6
Are shown as positive currents, and the forward currents of the first to sixth main diodes D1 to D6 are shown as negative currents. That is, the current I of the first to sixth main switches Q1 to Q6 is provided in the upper half of each of FIGS.
q1 to Iq6 are shown, and currents Id1 to Id6 of the first to sixth main diodes D1 to D6 are shown in respective lower halves. When two selected from the first to sixth main switches Q1 to Q6 are turned on, the power supply voltages Vu, Vv, V
The current having an amplitude corresponding to the amplitude of w
Through Q6 and the main diodes D1 through D6. Therefore, the input currents Iu, Iv, Iw can be approximated to a sine wave. As described above, for example, t1 to t in FIG.
When the third and fifth main switches Q3 and Q5 are turned on in section 2, energy is accumulated in the first boosting reactor L1, and when the third and fifth main switches Q3 and Q5 are turned off, the U-phase To the power supply voltage Vu of the first step-up reactor L
The output smoothing capacitors Ca, C
b is boosted and charged.

When the main switches Q1 to Q6 are turned off, as is well known, the first to sixth snubber capacitors C1 to C6 contribute to absorbing surge voltage,
And this voltage rises with a slope. As a result, noise and switching loss can be reduced.

First to sixth snubber capacitors C1 to C
6 indicates main diodes D1 to D1 to
When D6 and the main switches Q1 to Q6 are off, they are almost charged to the DC output voltage V0. If, for example, the main switches Q3 and Q5 described above are turned on in this state, the electric charge of the snubber capacitors C3 and C5 is changed to the main switches Q3 and Q5.
Emitted through 5 and results in power loss. Before the voltages of the main switches Q3 and Q5 become 0 V, the reactors L1 and
When a closed circuit current flowing through L2 flows through main switches Q3 and Q5, switching loss occurs. Also, when the discharge current of the snubber capacitors C3 and C5 suddenly flows, this causes noise. In order to solve such a problem, an auxiliary diode rectifier circuit 5, auxiliary reactors La and Lb, and auxiliary switches Qa and Qb are provided.

Next, the operation of reducing the power loss at the time of turn-on according to the present invention will be described with reference to FIG.
This will be described with reference to FIG. The time point t3 in FIG.
r coincides with the time point. Therefore, the third and fifth gate signals G3, G5 of the third and fifth main switches Q3, Q5
Occurs at time t3 in FIG. In order to cause the third and fifth main switches Q3 and Q5 to perform zero voltage switching (ZVS), the charges of the third and fifth snubber capacitors C3 and C5 are substantially zero before time t3 in FIG. In FIG. 5, at time t1, FIG.
A second auxiliary gate signal Gb shown in FIG.
Before time t1, 1a-L1-D1-Ca-Cb-D
4-L2-1b route and 1a-L1-D1-Ca-C
The charging current of the capacitors Ca and Cb flows through the path of b-D6-L3-1c. Prior to the time point t1, the third and fifth main switches Q3 and Q5 are off, and the third and fifth snubber capacitors C3 and C5 are substantially connected to the output voltage V3.
Charged to zero.

[0033]

[T1 to t2 section] In the t1 to t2 section of FIG. 5, since the second auxiliary switch Qb is turned on, in addition to the main rectifier circuit in the section before t1, 1a-L1-D1-Ca-Qb-L
b-8d-L2-1b route and 1a-L1-D1-
The route of Ca-Cb-Qb-Lb-8f-L3-Lc is formed. Since this path includes the auxiliary reactor Lb, the current Ilb of the second auxiliary switch Qb is
As shown in (G), the current gradually increases, and zero current switching (ZCS) of the second auxiliary switch Qb is achieved.
When the current Ib of the second auxiliary switch Qb starts to flow, the currents Id4 and Id6 of the fourth and sixth main diodes D4 and D6 gradually decrease as shown in FIGS. And becomes zero.

[0034]

[T2 to t3 section] In the t2 to t3 section, Cb −
The route of Qb-Lb-8d-C4, Cb-Qb-Lb-8
The f-C6 path gradually charges the fourth and sixth snubber capacitors C4 and C6. These voltages and the voltages Vq4 and Vq6 of the fourth and sixth main switches Q4 and Q6 are shown in FIG. ) As shown in FIG. Also,
C3-Ca-Qb-Lb-8d resonance circuit and C5-Ca
A resonance circuit of -Qb -Lb-8f is formed, and the voltages of the third and fifth snubber capacitors C3 and C5 and the voltages Vq3 and Vq5 of the third and fifth main switches Q3 and Q5 are shown in FIG.
(H) As shown in (L), it gradually decreases and becomes substantially zero at time t3. Therefore, when the third and fifth main switches Q3 and Q5 are turned on at the time t3 by the third and fifth gate signals G3 and G5 shown in FIGS. 5B and 5C, ZVS is achieved. The pulse P31 shown in FIG.
Are set to values that can make the voltages Vq3 and Vq5 of the third and fifth main switches Q3 and Q5 substantially zero at time t3. You. Now, the AC current of the first AC terminal 1a is changed to Iu
Assuming that the output voltage is V0, the inductance of the second auxiliary reactor Lb is L, and the capacitance of the snubber capacitors C1 to C6 is C, 2Iu (L / V0) +2 (LC) in the period t1 to t3 in FIG. It is determined by ^1/2 .

[0035]

[T3 to t4 section] At time t3, the third and fifth main switches Q3 and Q5 are controlled to be turned on and turned on.
1a-L1-D1-Q3-L2-1b path and 1a
The path of -L1 -D1 -Q5 -L3-1c is formed, and the currents Iq3 and Iq5 for boosting and power factor improvement start to flow as shown in FIGS. Second auxiliary reactor Lb
Current Ilb becomes zero at time t4.

[0036]

[T4 to t5 section] Since the third and fifth main switches Q3 and Q5 are turned on in the t4 to t5 section as in the previous t3 to t4 section, as shown in FIGS. These currents Iq3 and Iq5 flow. As shown in FIG.
The gate signal Gb of the auxiliary switch Qb goes low at a time later than the time t3 by the time Ta, and the second auxiliary switch Qb is turned off. Time Ta is t3
It is set to be equal to or more than the time width of t4 to t4 and equal to or less than the time width of t3 to t5. That is, the second auxiliary gate signal Gb is set so that the high-level end of the second auxiliary gate signal Gb is after the time point t4. t
At time 4, the current Ilb of the second auxiliary reactor Lb becomes zero, so that zero current switching (ZCS) of the second auxiliary switch Qb is achieved.

[0037]

[T5 to t6 section] In the t5 to t6 section, the third main switch Q3 is off and the fifth main switch Q5 is on. t
When the third switch Q3 is controlled to be turned off at the time point 5, the third switch Q3 is turned on by the third path along the path 1a-L1-D1-C3-L2-1b.
Is charged, and this voltage and the voltage Vq3 of the third main switch Q3 gradually rise to the power supply voltage as shown in FIG. 5 (H). Thereby, noise suppression and switching loss are reduced. The charge of the fourth snubber capacitor C4 is C4 -L2 -1b-1a.
The voltage is released through the path of -L1-D1-Ca-Cb, and this voltage and the voltage Vq4 of the fourth main switch Q4 become zero at time t6 as shown in FIG. 5 (J).

[0038]

[T6 to t7 section] In the t6 to t7 section, the fifth main switch Q5 is kept on and the fourth main diode D
4 conducts. That is, when the voltage of the fourth snubber capacitor C4 becomes zero at time t6, the fourth main diode D4
4 is released, the fourth main diode D4 is turned on, and the current Id4 of the fourth diode D4 flows as shown in FIG. As a result, during the period from t6 to t7, the route of 1a-L1-D1-Q5-L3-1c and 1a-L1
A path of -L1-D1-Ca-Cb-D4-L2-1b is formed.

[0039]

[Section t7 to t8] When the fifth main switch Q5 is turned off at the time t7 as shown in FIG. 5C, the fifth snubber capacitor C5 is set to 1a-L1-D1-C5-L3.
-1c, the voltage and the voltage Vq5 of the fifth main switch Q5 gradually rise as shown in FIG. 5L, and noise suppression and ZVS are achieved. Further, the electric charge of the sixth snubber capacitor C6 becomes C6 -L3 -1c-
1A-L1-D1-Ca-Cb, and this voltage and the voltage Vq6 of the sixth main switch Q6 are shown in FIG.
As shown in the figure, the temperature gradually decreases and becomes zero at time t8. As a result, the conduction of the sixth main diode D6 becomes possible after time t8, and the state returns to the state before time t1 in FIG.

Although the operation during a certain period in one cycle of the AC voltage has been described above, the same operation occurs in other periods. Note that the first auxiliary switch Qa is shown in FIG.
As is apparent from FIG. 3, t0 to t1, t2 to t3,
It turns on and off during a period from t4 to t5, and the first auxiliary reactor La functions in the same manner as the second auxiliary reactor Lb.

According to this embodiment, the following effects can be obtained. (1) Since the auxiliary diode rectifier circuit 5 is provided and the first and second auxiliary switches composed of unidirectional switches are used to reduce the power loss based on the snubber capacitors C1 to C6, the power loss can be reduced. It can be performed with a simple and low-cost circuit. (2) Since it is not necessary to connect a backflow prevention diode to the DC power supply line preceding the smoothing capacitors Ca and Cb, the problem of power loss due to the backflow prevention diode is eliminated and the efficiency is improved. (3) Since the first and second auxiliary switches Qa and Qb are also zero-current switched, the power loss here is small. (4) By the methods shown in FIGS. 2 and 5, the gate signals G1 to G6 of the first to sixth main switches Q1 to Q6 and the gate signals Ga and Gb of the first and second auxiliary switches Qa and Qb.
Is created, these can be easily and accurately created.

[0042]

Second Embodiment Next, an AC-DC converter according to a second embodiment will be described with reference to FIG. However, in FIG. 6 and FIGS. 7 to 11 described later, substantially the same parts as those in FIGS. 1 to 5 are denoted by the same reference numerals, and the description thereof will be omitted.

The AC-DC converter shown in FIG. 6 includes first and second auxiliary diodes Da and Db and a first
1 and second clamping capacitors C11 and C12 and first and second clamping resistors R1 and R2 are added, and the rest is the same as the circuit of FIG. A series circuit of the first auxiliary diode Da and the first clamping capacitor C11 is connected in parallel to the first auxiliary switch Qa. The first clamping capacitor C11 is connected to the first smoothing capacitor C1 via the first clamping resistor R1.
connected in parallel to a. Second auxiliary diode Db
The series circuit of the capacitor C12 and the second
Are connected in parallel to the auxiliary switch Qb. Also the second
Is connected to a second clamping resistor R12.
2 is connected in parallel to the second smoothing capacitor Cb.

The apparatus is the same as the apparatus shown in FIG. 1 except for the clamping operation in the AC-DC converter shown in FIG. The first and second clamping capacitors C11 and C12 in FIG.
The voltage of the first and second smoothing capacitors Ca and Cb via the clamp resistors R1 and R2 of FIG.
It is charged to 0/2. When a voltage higher than the predetermined voltage V0 / 2 is applied to the first and second auxiliary switches Qa and Qb, the first and second auxiliary diodes Da and Db conduct, and the first and second auxiliary switches are turned on. The voltages of Qa and Qb are limited to the voltage V0 / 2 of the first and second clamping capacitors C11 and C12. Therefore, the first and second auxiliary switches Qa and Qb can be protected from overvoltage, and a relatively low-cost low-voltage switch can be used for the first and second auxiliary switches Qa and Qb. . In addition,
The second embodiment has the same operation and effect as the first embodiment.

[0045]

Third Embodiment An AC-DC converter according to a third embodiment shown in FIG. 7 has first and second auxiliary diodes Da and Db added to the circuit of FIG. They have the same configuration. First and second auxiliary diodes Da, Db
Are the pair of output terminals 5a, 5a of the auxiliary diode rectifier circuit 5.
b and a pair of DC output terminals 4a and 4b.

From the mode in the section from t3 to t4 in FIG.
When the mode shifts to the mode in the section t6, the diodes 8a to 8f of the auxiliary diode rectifier circuit 5 enter the reverse recovery state. At this time, a reverse recovery voltage surge may occur in the diodes 8a to 8f. The auxiliary diodes Da and Db in FIG. 7 are provided to suppress the above-mentioned reverse recovery voltage surge. In FIG. 7, when a reverse recovery voltage surge higher than the output voltage V0 occurs in the auxiliary diode rectifier circuit 5, the auxiliary diode Da or Db conducts, and the voltage of the diodes 8a to 8f of the auxiliary diode rectifier circuit 5 becomes the output voltage. V0. For example, when an overvoltage equal to or higher than the output voltage V0 occurs in the diode 8a, 8a-Da-Ca-Cb
The circuit of -D2 is established, and the energy corresponding to the overvoltage is regenerated to the capacitors Ca and Cb. The third embodiment is the same as the first embodiment.
It also has the same effect as the embodiment.

[0047]

Fourth Embodiment An AC-DC converter according to a fourth embodiment shown in FIG. 8 uses the first and second auxiliary reactors L shown in FIG.
a and Lb are omitted, and instead a common auxiliary point is provided between the interconnection point of the first and second auxiliary switches Qa and Qb and the interconnection point P4 of the first and second smoothing capacitors Ca and Cb. The reactor L11 is connected, and the rest is configured the same as in FIG.

The auxiliary reactor L11 of FIG. 8 has the same function as the first and second auxiliary reactors La and Lb of FIG. Therefore, the circuit of FIG. 8 can reduce the number of auxiliary reactors and reduce cost.
The fourth embodiment of FIG. 8 has the same operation and effect as the first embodiment of FIG.

[0049]

Fifth Embodiment An AC-DC converter according to a fifth embodiment shown in FIG. 9 is different from the circuit according to the fourth embodiment shown in FIG.
The first and second auxiliary diodes Da,
Db is connected, and the other components are the same as those shown in FIG. Therefore, the fifth embodiment of FIG. 9 has the effects of the first embodiment of FIG. 1, the effects of the third embodiment of FIG. 7, and the effects of the fourth embodiment of FIG.

[0050]

Sixth Embodiment A sixth embodiment shown in FIG. 10 has the same configuration as that of FIG. 8 except that auxiliary diodes Da and Db are connected to the circuit of the fourth embodiment shown in FIG. In FIG. 10, the first and second auxiliary diodes Da and Db are connected in parallel to the first and second smoothing capacitors Ca and Cb via a common auxiliary reactor L11.

In the circuit of FIG. 10, the diode 8a of the auxiliary diode rectifier 5 is used as described in the circuit of FIG.
When a reverse recovery voltage surge occurs at .about.8f, one of the first and second auxiliary switches Qa and Qb is in a conductive state at this time, and thus the first and second auxiliary diodes Da and Db
Is formed, and an overvoltage is suppressed. For example, when an overvoltage higher than the output voltage V0 occurs in the diode 8a, 8a-Qa-Da
The path of -Ca-Cb-D1 is established, the energy of the overvoltage is regenerated to the capacitors Ca and Cb, and the diode 8a
Is limited to the output voltage V0. Therefore, the sixth embodiment has the same effect as the first, third, and fourth embodiments.

[0052]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) An output smoothing capacitor having a larger capacity can be connected in parallel with the series circuit of the first and second smoothing capacitors Ca and Cb. Also, as shown in FIGS. 11 and 12, the first and second DC output terminals 4a, 4a,
An output smoothing capacitor C0 can be connected between b and the first capacitor Ca can be omitted, and the second capacitor Cb can be left as an auxiliary capacitor having a smaller capacity than the output smoothing capacitor C0. Further, the second capacitor C shown in FIG.
The output smoothing capacitor C0 can be connected as shown in FIGS. 11 and 12 by omitting b and leaving the first capacitor Ca. The same effects as those of the embodiments can be obtained by the circuits modified as shown in FIGS. (2) The adding circuit 32 shown in FIG. 2 forms a pulse having a width Ta in synchronization with the trailing edge of the pulse P31 shown in FIG. 5D, and adds this pulse to the pulse P31, whereby the pulse shown in FIG. Instead of P32, a reference voltage Vr2 crossing the sawtooth voltage Vt is provided as shown in FIG. 5A, and a pulse having a width Ta is obtained by comparing the reference voltage Vr2 with the sawtooth voltage Vt. And this can be added to the pulse P31 in FIG. 5 (D). (3) The main switches Q1 to Q6 can be semiconductor transistors such as transistors and FETs different from IGBTs. (4) Connect the snubber capacitors C1 to C6 to the main switch Q.
The parasitic capacitance can be 1 to Q6. (5) First, third and fifth snubber capacitors C1,
A configuration in which C3 and C5 are omitted or a configuration in which the second, fourth and sixth snubber capacitors C2, C4 and C6 are omitted can be adopted. (6) The first to sixth main switches Q1 to Q6 and the first to sixth main switches
In place of the main diodes D1 to D6, first to sixth bidirectional switches are provided, which can be controlled so that current flows as shown in FIGS. 3 (I) to (N). (7) The same circuits as the auxiliary diodes Da and Db shown in FIG. 7 showing the third embodiment can be added to the same place in the circuit shown in FIG. 6 showing the second embodiment. (8) The same circuit as the auxiliary diode of FIG. 9 showing the fifth embodiment can be added to the circuit of FIG. 10 showing the sixth embodiment at the same place.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an AC-DC converter according to a first embodiment.

FIG. 2 is a block diagram illustrating a control circuit of FIG. 1 in detail.

FIG. 3 is a waveform diagram showing a state of each unit in FIG. 1;

FIG. 4 is a waveform chart showing a state of each unit in FIG. 2;

FIG. 5 is a waveform chart showing a state of each unit in FIGS. 1 and 2;

FIG. 6 is a circuit diagram illustrating an AC-DC converter according to a second embodiment.

FIG. 7 is a circuit diagram illustrating an AC-DC converter according to a third embodiment.

FIG. 8 is a circuit diagram showing an AC-DC converter according to a fourth embodiment.

FIG. 9 is a circuit diagram showing an AC-DC converter according to a fifth embodiment.

FIG. 10 is a circuit diagram illustrating an AC-DC converter according to a sixth embodiment.

FIG. 11 is a circuit diagram showing an AC-DC converter according to a modification.

FIG. 12 is a circuit diagram showing an AC-DC converter according to another modification.

[Explanation of symbols]

 1a, 1b, 1c AC terminal 2 3-phase bridge type rectifier circuit 3 Load 4a, 4b DC output terminal 5 Auxiliary diode rectifier circuit 6 Control circuit 7a, 7b, 7c Current detector 8a-8f Auxiliary rectifier diode L1, L2 Boost Reactors Q1 to Q6 First to sixth main switches D1 to D6 First to sixth main diodes C1 to C6 First to sixth snubber capacitors Ca, Cb Smoothing capacitors La, Lb Auxiliary reactors Qa, Qb Auxiliary switch

Claims (9)

(57) [Claims] A first, second, and third AC terminals, and first, second, third, fourth, fifth, and sixth bridge-connected terminals.
Main switch and the first, second, third, fourth, fifth, and sixth
First, second, third, fourth, connected in parallel to the main switch of
Fifth and sixth main diodes and first, second, third, fourth,
A three-phase bridge-type switching rectifier circuit having fifth and sixth snubber capacitors or parasitic capacitances; the first, second, and third AC terminals; and the first and second switching rectifier circuits. And a first, second, and third boosting reactor connected between the first and second DC input terminals of the switching rectifier circuit. A series circuit of a second smoothing capacitor; a three-phase bridge type diode rectifier connected to first, second, and third AC input terminals of the switching rectifier; A first auxiliary reactor connected between one DC output terminal and an interconnection point of the first and second smoothing capacitors via a first auxiliary switch, and the other of the diode rectifier circuit DC output terminal and the first The between an interconnection point of beauty second smoothing capacitor
A second auxiliary reactor connected via a second auxiliary switch, and the first to sixth main switches are connected to the first to third AC terminals so that a boosted output voltage is obtained from the switching rectifier circuit. A signal for on / off control at a repetition frequency higher than the frequency of the power supply voltage is formed, and the energy of the first to sixth snubber capacitors is changed to the first to sixth snubber capacitors.
A control circuit for forming a signal for turning on and off the first and second auxiliary switches so as to release them before the sixth main switch is turned on. 2. A first, second, third, fourth, fifth, and sixth bridge-connected first, second, and third AC terminals.
Main switch and the first, second, third, fourth, fifth, and sixth
First, second, third, fourth, connected in parallel to the main switch of
Fifth and sixth main diodes and first, second, third, fourth,
A three-phase bridge-type switching rectifier circuit having fifth and sixth snubber capacitors or parasitic capacitances; the first, second, and third AC terminals; and the first and second switching rectifier circuits. First, second, and third boosting reactors connected between the first and second AC input terminals; and a smoothing capacitor connected between the first and second DC output terminals of the switching rectifier circuit. An auxiliary capacitor having one end connected to the first or second DC output terminal and having a smaller capacity than the smoothing capacitor; and a first, second, and third switching rectifier circuit. And a three-phase bridge type diode rectifier circuit connected to the AC input terminal of the first stage, and a first auxiliary switch connected between one DC output terminal of the diode rectifier circuit and the other end of the auxiliary capacitor. Connected A second auxiliary reactor connected via a second auxiliary switch between the other DC output terminal of the diode rectifier circuit and the other end of the auxiliary capacitor; and the switching rectifier circuit A signal for ON / OFF control of the first to sixth main switches at a repetition frequency higher than the frequency of the AC power supply voltage of the first to third AC terminals so that a boosted output voltage is obtained from the main switch is formed. And the energy of the first to sixth snubber capacitors is changed to the first to sixth snubber capacitors.
A control circuit for forming a signal for turning on and off the first and second auxiliary switches so as to release them before the sixth main switch is turned on. 3. The semiconductor device according to claim 1, further comprising a first and a second auxiliary diode, a first and a second clamping capacitor, and a first and a second clamping resistor. The capacitor is connected to the first auxiliary switch with the first switch.
, The first clamping resistor is connected between the first clamping capacitor and the first DC output terminal, and the second clamping capacitor is connected The second auxiliary switch is connected in parallel via the second auxiliary diode, and the second clamp resistor is connected between the second clamp capacitor and the second DC output terminal. 3. The AC-DC converter according to claim 1, wherein the AC-DC converter is connected between them. A first auxiliary diode connected between one of the DC output terminals of the diode rectifier circuit and the first DC output terminal; and a first auxiliary diode connected to the diode rectifier circuit. A second auxiliary diode connected between the other DC output terminal and the second DC output terminal;
4. The AC-DC converter according to claim 1, wherein the second auxiliary diode is connected in a direction reversely biased by a voltage between the first and second DC output terminals. apparatus. 5. A first, second, third, fourth, fifth and sixth bridge-connected first, second and third AC terminals.
Main switch and the first, second, third, fourth, fifth, and sixth
First, second, third, fourth, connected in parallel to the main switch of
Fifth and sixth main diodes and first, second, third, fourth,
A three-phase bridge-type switching rectifier circuit having fifth and sixth snubber capacitors or parasitic capacitances; the first, second, and third AC terminals; and the first and second switching rectifier circuits. And a first, second, and third boosting reactor connected between the first and second DC input terminals of the switching rectifier circuit. A series circuit of a second smoothing capacitor; a three-phase bridge-type diode rectifier circuit connected to first, second and third AC input terminals of the switching rectifier circuit; An auxiliary reactor connected to the other end; a first auxiliary switch connected between one DC output terminal of the diode rectifier circuit and the other end of the auxiliary reactor; DC output of the other A second auxiliary switch connected between a terminal and the other end of the auxiliary reactor; and the first to sixth main switches connected to the first to sixth main switches so as to obtain a boosted output voltage from the switching rectifier circuit. A signal for on / off control at a repetition frequency higher than the frequency of the AC power supply voltage of the AC terminal of No. 3 and the energy of the first to sixth snubber capacitors is changed to
A control circuit for forming a signal for turning on and off the first and second auxiliary switches so as to release them before the sixth main switch is turned on. 6. A first, second, third, fourth, fifth, and sixth bridge-connected first, second, and third AC terminals.
Main switch and the first, second, third, fourth, fifth, and sixth
First, second, third, fourth, connected in parallel to the main switch of
Fifth and sixth main diodes and first, second, third, fourth,
A three-phase bridge-type switching rectifier circuit having fifth and sixth snubber capacitors or parasitic capacitances; the first, second, and third AC terminals; and the first and second switching rectifier circuits. First, second, and third boosting reactors connected between the first and second AC input terminals; and a smoothing capacitor connected between the first and second DC output terminals of the switching rectifier circuit. An auxiliary capacitor having one end connected to the first or second DC output terminal and having a smaller capacity than the smoothing capacitor; and a first and second switching rectifier circuit. A three-phase bridge type diode rectifier circuit connected to a third AC input terminal; an auxiliary reactor having one end connected to the other end of the auxiliary capacitor; and a DC output of one of the diode rectifier circuits. A first auxiliary switch connected between a terminal and the other end of the auxiliary reactor; and a second auxiliary switch connected between the other DC output terminal of the diode rectifier circuit and the other end of the auxiliary reactor. And the first to sixth main switches are turned on at a repetition frequency higher than the frequency of the AC power supply voltage of the first to third AC terminals so that a boosted output voltage is obtained from the switching rectifier circuit. Forming a signal for off control and changing the energy of the first to sixth snubber capacitors to the first to sixth snubber capacitors;
A control circuit for forming a signal for turning on and off the first and second auxiliary switches so as to release them before the sixth main switch is turned on. 7. A first auxiliary diode connected between one of the DC output terminals of the diode rectifier circuit and the first DC output terminal, and a first auxiliary diode connected to the diode rectifier circuit. A second auxiliary diode connected between the other DC output terminal and the second DC output terminal;
7. The AC-DC converter according to claim 5, wherein the second auxiliary diode is connected in a direction reversely biased by a voltage between the first and second DC output terminals. 8. A first auxiliary diode connected between the other end of the auxiliary reactor and the first DC output terminal, and the other end of the auxiliary reactor and the second DC output And a second auxiliary diode connected between the first and second DC output terminals. The first and second auxiliary diodes are reverse-biased with a voltage between the first and second DC output terminals. 8. The AC / DC converter according to claim 5, wherein the AC / DC converter is connected in a direction. 9. The first, third, and third terminals connected to one of the arms of the three-phase bridge type switching rectifier circuit.
9. The configuration according to claim 1, wherein the fifth snubber capacitor or the second, fourth, and sixth snubber capacitors connected to the other side of the arm are omitted. 2. The AC-DC converter according to claim 1.