JP3322376B2 - Moving image decoding method and moving image decoding device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[Table of Contents] The present invention will be described in the following order. Industrial Application Conventional Technology (FIGS. 13 to 23) Problems to be Solved by the Invention (FIGS. 24 to 26) Means for Solving the Problems (FIGS. 1, 5 and 8) Action (FIG. 1) 5 and 8) Example (1) First Example (FIGS. 1 to 4) (2) Second Example (FIGS. 5 to 7) (3) Third Example (FIGS. 8 to 10) (4) Other Embodiments (FIGS. 11 and 12)

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a moving picture decoding method and a moving picture decoding apparatus, and more particularly to recording and reproducing a moving picture signal on a recording medium such as an optical disk or a magnetic tape and displaying it on a display or a television. It is suitable for transmitting a moving image signal from a transmitting side to a receiving side via a transmission path, such as a conference system, a videophone system, and broadcasting equipment, and receiving and displaying the moving image signal on the receiving side. is there.

[0003]

2. Description of the Related Art For example, in a system for transmitting a moving image signal to a remote place, such as a video conference system, a video telephone system, and a digital TV broadcast, the line correlation of a video signal is used in order to use a transmission line efficiently. The image signal is compression-encoded using the correlation between frames.
FIG. 13 shows the configuration of a moving picture encoding / decoding device that encodes and transmits a moving picture signal and decodes it. The encoding device 1 encodes the input video signal VD and transmits it to the recording medium 3 as a transmission path. The decoding device 2 reproduces a signal recorded on the recording medium 3, decodes the signal, and outputs the decoded signal.

In the coding apparatus 1, an input video signal VD is input to a pre-processing circuit 4, where it is separated into a luminance signal and a chrominance signal (in this case, a color difference signal). , 6 are subjected to analog digital conversion. The video signal which has been converted into a digital signal by analog-to-digital conversion by the A / D converters 5 and 6 is input to a pre-filter 7 and subjected to a filtering process, and then supplied to a frame memory 8 and stored. The frame memory 8
The luminance signal is stored in the luminance signal frame memory 8A, and the color difference signal is stored in the color difference signal frame memory 8B.

[0005] The pre-filter 7 improves the coding efficiency,
Perform processing to improve image quality. This is a filter for removing noise, for example, and a filter for limiting a band, for example. FIG. 14 shows a configuration of a two-dimensional low-pass filter as an example of the pre-filter 7. In FIG. 14, D
Represents one pixel delay. The filter coefficient of this two-dimensional low-pass filter is shown in FIG.
FIG. 15B shows a three-pixel block. A 3 × 3 pixel block around a target pixel e is extracted. In contrast,

(Equation 1) Is the output value of the filter for pixel e. Actually, in the pre-filter 7, the output value after the filtering process is output from the output OUT1, and the original pixel value not subjected to the filtering process is output from the output OUT2 after a predetermined delay. In this filter, uniform filter processing is always performed irrespective of the input image signal and the state of the encoder.

[0006] The format conversion circuit 9 converts the image signal stored in the frame memory 8 into an encoder.
Convert to 10 input formats. The data converted into a predetermined format is supplied from a format conversion circuit 9 to an encoder 10, where the data is encoded. This encoding algorithm is arbitrary, and one example thereof will be described later. The signal encoded by the encoder 10 is output to a transmission path as a bit stream, and is recorded on the recording medium 3, for example.

[0007] The data reproduced from the recording medium 3 is supplied to the decoder 11 of the decoding device 2 and decoded.
The decoding (decoding) algorithm of the decoder 11 is arbitrary, but must be paired with the encoding algorithm. An example of the decoder will be described later. The data decoded by the decoder 11 is input to a format conversion circuit 12 and converted into an output format.

The luminance signal of the frame format is supplied to and stored in a luminance signal frame memory 13A of the frame memory 13, and the chrominance signal is stored in the chrominance signal frame memory 1A.
3B and stored. The luminance signal and the chrominance signal read from the luminance signal frame memory 13A and the chrominance signal frame memory 13B are supplied to a post-filter 14 and subjected to a filtering process.
A) The digital-to-analog conversion is performed by the converters 15 and 16, respectively, and supplied to the post-processing circuit 17 for synthesis.
The output video signal is output and displayed on a display (not shown) such as a CRT.

The post-filter 14 executes a filtering process for improving the image quality, and alleviates the deterioration caused by encoding the image. The post filter 14 is a filter for removing, for example, noise generated in the vicinity of a block distortion or a steep edge or quantization noise. There are various types of post-filters. For example, a two-dimensional low-pass filter similar to that used for the pre-filter 7 as shown in FIG. 14 can be used.

Next, high-efficiency coding of a moving image will be described. Conventionally, since moving image data such as video signals has a very large amount of information, a recording medium having an extremely high data transmission speed is required for recording and reproducing the information for a long time. Therefore, large-sized magnetic tapes and optical disks are required. In addition, even when moving image data is communicated via a transmission line or used for broadcasting, there is a problem that the data amount is too large and communication cannot be performed using an existing transmission line as it is.

Therefore, when a video signal is to be recorded on a much smaller recording medium for a long time or when it is used for communication or broadcasting, the video signal is encoded with high efficiency and recorded, and the read signal is decoded efficiently. Means of transformation are indispensable. In order to meet such a demand, a high-efficiency coding method using correlation of video signals has been proposed.
One is the Moving Picture Experts Group (MPEG) method. This is ISO-IEC / JTC1 / SC2 / WG
It was discussed at 11 and proposed as a draft standard,
Motion compensated predictive coding and discrete cosine transform (DCT (Disc
rete Cosine Transform)) This is a hybrid system that combines encoding.

The motion compensated predictive coding is a method utilizing the correlation in the time axis direction of an image signal, and predicts a currently input image from a signal which has already been decoded and reproduced, and transmits only a prediction error at that time. And compressing the amount of information necessary for encoding. In DCT coding, signal power is concentrated on a specific frequency component using the two-dimensional correlation within a frame of an image signal, and only the concentratedly distributed coefficients are encoded to compress the amount of information. For example, in a portion where the picture is flat and the autocorrelation of the image signal is high, the DCT coefficients are concentratedly distributed in low frequency components. Therefore, in this case, the information amount can be compressed by encoding only the coefficients concentratedly distributed in the low band. Here, MPEG2 is used as the encoder.
An example of the method will be described in detail, but the encoding method is MPEG2.
The present invention is not limited to the scheme, and can be similarly applied to any coding scheme.

The MPEG2 system will be described. When the line correlation is used, the image signal can be compressed by, for example, DCT processing. When the inter-frame correlation is used, the image signal can be further compressed and encoded. For example, as shown in FIG. 16, times t1, t2, t3
, When frame images PC1, PC2, and PC3 are respectively generated, a difference between the image signals of frame images PC1 and PC2 is calculated to generate PC12, and a difference between the image signals of frame images PC2 and PC3 is calculated. The PC 23 is generated. Normally, the images of frames temporally adjacent to each other do not change so much, and when the difference between them is calculated, the difference signal becomes a small value. Therefore, by encoding this difference signal, the code amount can be compressed.

However, if only the difference signal is transmitted, the original image cannot be restored. Therefore, the image of each frame is any one of three types of pictures, i.e., I picture, P picture or B picture, and the image signal is compression-coded. That is, for example, as shown in FIG. 17, image signals of 17 frames from F1 to F17 are set as a group of pictures (GOP) and are set as one unit of processing. The image signal of the first frame F1 of the GOP is encoded as an I-picture, the second frame F2 is encoded as a B-picture, and the third frame F3 is encoded as a P-picture. The fourth and subsequent frames F4 to
F17 is alternately processed as a B picture or a P picture.

As an I-picture image signal, the image signal for one frame is directly encoded and transmitted. On the other hand, as shown in FIG. 17A, an image signal of a P picture basically has an I signal that precedes it in time.
The difference from the picture signal of the picture or the P picture is encoded and transmitted. As the image signal of the B picture, basically, as shown in FIG. 17B, a difference from the average value of both the temporally preceding frame and the temporally succeeding frame is obtained, and the difference is represented by a code. And transmit it.

FIG. 1 shows the principle of a method for encoding a moving picture signal.
FIG. Since the first frame F1 is processed as an I-picture, it is transmitted as it is to the transmission path as transmission data F1X (intra-picture encoding). The second frame F2 is B
Since the image is processed as a picture, the difference between the temporally preceding frame F1 and the average value of the temporally succeeding frame F3 is calculated, and the difference is transmitted as transmission data F2X.

There are four types of B picture processing. The first process is to transmit the data of the original frame F2 as it is as the transmission data F2X (SP
1) (Intra coding), the same processing as in the case of I-picture. The second process is to calculate a difference from the temporally subsequent frame F3 and transmit the difference (SP2) (backward prediction coding). The third process is
The difference (SP3) from the temporally preceding frame F1 is transmitted (forward prediction coding). In the fourth process, a difference (SP4) between the average value of the temporally preceding frame F1 and the average value of the following frame F3 is calculated and transmitted as transmission data F2X (bidirectional predictive coding). .

Of these four methods, the method that minimizes the transmission data is adopted. Here, when transmitting the difference data, a motion vector x1 (a motion vector between frames F1 and F2 in the case of forward prediction) between the image of the frame (prediction image) for which the difference is to be calculated, and x2 (a backward vector) , The motion vector between frames F3 and F2)
Alternatively, both x1 and x2 (in the case of bidirectional prediction) are transmitted together with the difference data.

In the frame F3 of P picture, a difference signal (SP3) from this frame and a motion vector x3 are calculated using the frame F1 preceding in time as a predicted image, and this is transmitted as transmission data F3X ( Forward prediction coding). The data of the original frame F3 is transmitted as it is as the transmission data F3X (SP1) (intra coding). Which method is used for transmission is selected, as in the case of the B picture, so that the amount of transmission data is reduced.

Next, the configuration of the encoder 10 will be described with reference to FIG. Image data B to be encoded
D is a motion vector detection circuit (MV-D) for each macro block converted by the format conversion circuit 9 (FIG. 13).
et) 20. That is, in the format conversion circuit 9, as shown in FIG. 20, data of a frame format in which V lines of H dots are collected per line is divided into N slices in units of 16 lines, and each slice is further divided into N slices. Is divided into M macroblocks. Each macro block is composed of a luminance signal corresponding to 16 × 16 pixels (dots), and this luminance signal is further composed of blocks Y [1] to Y [1] in units of 8 × 8 dots.
[4]. The 16 × 16 dot luminance signal corresponds to an 8 × 8 dot Cb signal and an 8 × 8 dot Cr signal.

The motion vector detecting circuit 20 processes the image data of each frame as an I-picture, a P-picture or a B-picture according to a predetermined sequence set in advance. It is predetermined whether the image of each frame input to the sequence is processed as I, P or B picture. For example, as shown in FIG.
The group of pictures composed of frames F1 to F17 are processed as I, B, P, B, P,.

The image data of a frame (for example, frame F1) processed as an I-picture is sent from the motion vector detecting circuit 20 to the front original image portion 21A of the frame memory 21.
Is transferred and stored. Image data of a frame (for example, frame F2) processed as a B-picture is transferred to and stored in the original image unit 21B. Image data of a frame (for example, frame F3) processed as a P-picture is transferred to and stored in the rear original image unit 21C.

At the next timing, when an image of a frame to be processed as a B-picture (frame F4) or a P-picture (frame F5) is input, the first P image stored in the rear original image section 21C up to that time is input. The image data of the picture (frame F3) is the front original image portion 21A.
Is forwarded to The image data of the next B picture (frame F4) is stored (overwritten) in the original image section 21B, and the image data of the next P picture (frame F5) is stored (overwritten) in the rear original image section 21C. Such operations are sequentially repeated.

The signal of each picture stored in the frame memory 21 is read out from the frame memory 21 and subjected to frame prediction mode processing or field prediction mode processing in a prediction mode switching circuit (Mode-SW) 22. Further, under the control of the prediction determination circuit 23, the calculation unit 24 performs calculation of intra-picture prediction, forward prediction, backward prediction or bidirectional prediction. Of these processes,
Which process is performed is determined in accordance with the prediction error signal (the difference between the reference image to be processed and the predicted image corresponding thereto). For this reason, the motion vector detection circuit 20 generates the sum of the absolute values of the prediction error signals used for this determination (or the sum of squares).

Here, the frame prediction mode and the field prediction mode in the prediction mode switching circuit 22 will be described. When the frame prediction mode is set, the prediction mode switching circuit 22 outputs the four luminance blocks Y [1] to Y [4] supplied from the motion vector detection circuit 20.
Is output as it is to the subsequent operation unit 24. That is, in this case, as shown in FIG. 21A, the data of the odd field lines and the data of the even field lines are mixed in each luminance block. In this frame prediction mode, prediction is performed in units of four luminance blocks (macro blocks), and one motion vector corresponds to the four luminance blocks.

On the other hand, the prediction mode switching circuit 22
In the field prediction mode, the signal input from the motion vector detection circuit 20 with the configuration shown in FIG. 21A is used to convert the signal input from the luminance block Y [ 1] and Y [2] are composed of, for example, only the dots of the odd field lines, and the other two luminance blocks Y [3] and Y [4] are composed of the data of the even field lines. Output to the unit 24.
In this case, one motion vector corresponds to two luminance blocks Y [1] and Y [2], and another motion vector corresponds to the other two luminance blocks Y [3] and Y [4]. Number of motion vectors are corresponded.

The motion vector detection circuit 20 outputs to the prediction mode switching circuit 22 the sum of the absolute values of the prediction errors in the frame prediction mode and the sum of the absolute values of the prediction errors in the field prediction mode. The prediction mode switching circuit 22 compares the sum of the absolute values of the prediction errors in the frame prediction mode and the field prediction mode, performs processing corresponding to the prediction mode in which the value is small, and outputs the data to the calculation unit 24. However, this processing is actually performed by the motion vector detection circuit 20. That is, the motion vector detection circuit 20 outputs a signal having a configuration corresponding to the determined mode to the prediction mode switching circuit 22, and the prediction mode switching circuit 22 outputs the signal as it is to the subsequent operation unit 24.

In the frame prediction mode, the color difference signal is supplied to the arithmetic unit 24 in a state where data of the odd field lines and data of the even field lines are mixed as shown in FIG. In the case of the field prediction mode, as shown in FIG. 21B, the upper half (4 lines) of each of the color difference blocks Cb and Cr is an odd field color difference signal corresponding to the luminance blocks Y [1] and Y [2]. And the lower half (4 lines) is a luminance block Y
It is a color difference signal of an even field corresponding to [3] and Y [4].

Further, the motion vector detecting circuit 20 uses the prediction determining circuit 23 to calculate a prediction error for determining whether to perform intra-picture prediction, forward prediction, backward prediction or bidirectional prediction as follows. Generate the sum of absolute values.
That is, the sum of the absolute values of the macroblock signals Aij of the reference image 絶 対 the absolute value of Aij |
The difference between {Aij | and the absolute value | Aij | of the macroblock signal Aij of the predicted image || Aij | Also, as the sum of absolute values of the prediction errors in the forward prediction, the macroblock signal Aij of the reference image and the macroblock signal B
sum of absolute value | Aij−Bij | of difference Aij−Bij from ij | A
ij−Bij |.

The absolute value sum of the prediction error between the backward prediction and the bidirectional prediction is obtained in the same manner as in the forward prediction (by changing the predicted image to a different predicted image from that in the forward prediction). These absolute value sums are supplied to the prediction determination circuit 23. The prediction determination circuit 23 selects the smallest absolute value sum of the prediction errors of the forward prediction, the backward prediction, and the bidirectional prediction as the sum of the absolute values of the prediction errors of the inter prediction.

Further, the absolute value sum of the prediction error of the inter prediction and the absolute value sum of the prediction error of the intra-picture prediction are compared to select a smaller one, and a mode corresponding to the selected absolute value sum is set to a prediction mode. (P-mode). That is, when the sum of absolute values of the prediction errors in the intra prediction is smaller, the intra prediction mode is set. When the sum of absolute values of the prediction errors in the inter prediction is smaller, the mode having the smallest absolute value sum is set among the forward prediction, backward prediction, and bidirectional prediction modes.

As described above, the motion vector detecting circuit 20
The macroblock signal of the reference image is supplied to the arithmetic unit 24 via the prediction mode switching circuit 22 in a configuration corresponding to the mode selected by the prediction mode switching circuit 22 among the frame or field prediction modes, and the four Among the prediction modes, a motion vector between a predicted image corresponding to the prediction mode (P-mode) selected by the prediction determination circuit 23 and the reference image is detected, and a variable length coding circuit (VL
C) 25 and a motion compensation circuit (M-comp) 26. As described above, as the motion vector, the motion vector that minimizes the sum of the absolute values of the corresponding prediction errors is selected.

When the motion vector detecting circuit 20 reads out I-picture image data from the front original image section 21A, the prediction determining circuit 23 sets an intra-frame (image) prediction mode (mode in which motion compensation is not performed) as a prediction mode. Is set, and the switch S of the calculation unit 24 is switched to the contact a side. As a result, the I-picture image data is input to the DCT mode switching circuit (DCT CTL) 27. As shown in FIG. 22A or 22B, the DCT mode switching circuit 27 converts the data of the four luminance blocks into
The signal is output to the DCT circuit 28 in a state where the odd field lines and the even field lines are mixed (frame DCT mode) or separated (field DCT mode).

That is, the DCT mode switching circuit 27
Mixed data of odd field and even field D
The coding efficiency when CT processing is performed and the DC
A mode having good coding efficiency is selected by comparing the coding efficiency in the case of performing the T processing. For example, as shown in FIG. 22A, the input signal has a configuration in which odd field lines and even field lines are mixed, and the difference between the signal of the odd field line and the signal of the even field line which are vertically adjacent to each other is determined. An arithmetic operation is performed to obtain the sum (or sum of squares) of the absolute values.

As shown in FIG. 22B, the input signal has a configuration in which the odd field and the even field lines are separated from each other, and the signal difference between the vertically adjacent odd field lines and the even field. , And calculates the sum (or sum of squares) of the absolute values of the respective signals. Further, both (sum of absolute values) are compared, and a DCT mode corresponding to a small value is set. That is, if the former is smaller, the frame DCT mode is set,
If the latter is smaller, the field DCT mode is set. The data having the configuration corresponding to the selected DCT mode is output to the DCT circuit 28, and the DCT flag (DCT-FLG) indicating the selected DCT mode is converted into a variable length coding circuit (VLC) 25 and a DCT block rearrangement described later. Output to the circuit (motion compensation circuit 26).

The prediction mode (FIG. 21) in the prediction mode switching circuit 22 and the D mode in the DCT mode switching circuit 27
As is clear from the comparison between the CT mode (FIG. 22), the data structure of each mode is substantially the same with respect to the luminance block. When the prediction mode switching circuit 22 selects the frame prediction mode (mode in which odd lines and even lines are mixed), the DCT mode switching circuit 27 also selects the frame DCT mode (mode in which odd lines and even lines are mixed). Probability is high.

If the prediction mode switching circuit 22 selects the field prediction mode (a mode in which the data of the odd field and the data of the even field are separated), the DCT mode switching circuit 27 also controls the field DCT mode (the mode of the odd field and the even field). (The mode in which the data is separated) is likely to be selected. However, this is not always the case. The mode is determined in the prediction mode switching circuit 22 so that the sum of absolute values of the prediction errors is small, and the mode is determined in the DCT mode switching circuit 27 so that the encoding efficiency is good. It is determined.

The I-picture image data output from the DCT mode switching circuit 27 is input to the DCT circuit 28, where it is subjected to DCT processing and converted into DCT coefficients. This D
The CT coefficients are input to a quantization circuit (Q) 29 and quantized by a quantization scale (QS) corresponding to a data accumulation amount (quantization control signal (B-full)) of a transmission buffer (Buffer) 30. , Are input to the variable length encoding circuit 25.

The variable length encoding circuit 25 converts the image data (in this case, I-picture data) supplied from the quantization circuit 29 into, for example, the image data corresponding to the quantization scale (QS) supplied from the quantization circuit 29. The data is converted into a variable length code such as a Huffman code and output to the transmission buffer 30. The variable length coding circuit 25 indicates whether the quantization scale (QS) is set by the quantization circuit 29 and the prediction mode (intra-picture prediction, forward prediction, backward prediction, or bidirectional prediction is set by the prediction determination circuit 23). Mode (P-mode)), a motion vector (MV) from the motion vector detection circuit 20, and a prediction flag (a flag (P-FLG) indicating whether the frame prediction mode or the field prediction mode is set) from the prediction mode switching circuit 22. And the DCT flag output from the DCT mode switching circuit 27 (frame DCT mode or field D
Flag indicating which CT mode has been set (DCT-
FLG), which are also variable-length coded.

The transmission buffer 30 temporarily stores the input data, and outputs data corresponding to the storage amount to the quantization circuit 29. When the remaining amount of data increases to the allowable upper limit value, the transmission buffer 30 increases the quantization scale (QS) of the quantization circuit 29 by the quantization control signal (B-full) to increase the data amount of the quantized data. Lower. When the remaining data amount decreases to the allowable lower limit, the transmission buffer 30 reduces the quantization scale (QS) of the quantization circuit 29 by the quantization control signal (B-full) to reduce the data amount of the quantized data. Increase. In this way, overflow or underflow of the transmission buffer 30 is prevented. The data stored in the transmission buffer 30 is read out at a predetermined timing, output to the transmission path, and recorded on the recording medium 3, for example.

On the other hand, the I-picture data output from the quantization circuit 29 is input to the inverse quantization circuit (IQ) 31 and the quantization scale (Q
Inverse quantization is performed according to S). The output of the inverse quantization circuit 31 is input to an inverse DCT (IDCT) circuit 32,
After the CT processing, the block rearrangement circuit (BlockC
change), each DCT mode (frame / frame)
Sort fields by field). The output of the block rearrangement circuit 33 is supplied to the forward prediction image section (FP) 35A of the frame memory 35 via the calculator 34 and stored therein.

When processing the image data of each frame input sequentially, for example, as I, B, P, B, P, B... Is processed as an I-picture, and before the image of the next input frame is processed as a B-picture, the image data of the next input frame is further processed as a P-picture. This is because the B picture involves backward prediction and cannot be decoded unless the P picture as the backward predicted image is prepared first.

Then, after processing the I-picture, the motion vector detection circuit 20 starts to process the P-picture image data stored in the rear original image section 21C. In this process, the sum of the absolute values of the inter-frame differences (prediction errors) in macroblock units is supplied from the motion vector detection circuit 20 to the prediction mode switching circuit 22 and the prediction determination circuit 23 in the same manner as described above. The prediction mode switching circuit 22 and the prediction determination circuit 23 predict the frame / field prediction mode or the intra-picture prediction, forward prediction, backward prediction or bidirectional prediction in accordance with the sum of the absolute values of the prediction errors of the P-picture macroblocks. Set the mode.

When the intra-frame prediction mode is set, the operation section 24 switches the switch S to the contact point a as described above. Therefore, this data is, like the I-picture data, the DCT mode switching circuit 27 and the DCT circuit 2.
8. The data is transmitted to the transmission line via the quantization circuit 29, the variable length coding circuit 25, and the transmission buffer 30. The data is supplied to and stored in the backward prediction image section (BP) 35B of the frame memory 35 via the inverse quantization circuit 31, the inverse DCT circuit 32, the block rearrangement circuit 33, and the arithmetic unit 34.

In the forward prediction mode, the switch S is switched to the contact point b, and the image data (in this case, an I-picture image) stored in the forward prediction image section 35A of the frame memory 35 is read out to perform motion compensation. Circuit 26
Accordingly, motion compensation is performed in accordance with the motion vector output from the motion vector detection circuit 20. That is, the motion compensation circuit 2
6 indicates that when the setting of the forward prediction mode is instructed from the prediction determination circuit 23, the read address of the forward prediction image section 35A is changed from the position corresponding to the position of the macro block which the motion vector detection circuit 20 is currently outputting. Data is read out by shifting by an amount corresponding to the vector, and predicted image data is generated.

The predicted image data output from the motion compensation circuit 26 is supplied to a calculator 24A. The arithmetic unit 24A is
The prediction image data corresponding to the macroblock supplied from the motion compensation circuit 26 is subtracted from the macroblock data of the reference image supplied from the prediction mode switching circuit 22, and the difference (prediction error) is output. The difference data is supplied to the DCT mode switching circuit 27 and the DCT circuit 2
8. The data is transmitted to the transmission line via the quantization circuit 29, the variable length coding circuit 25, and the transmission buffer 30. The difference data is locally decoded by an inverse quantization circuit 31 and an inverse DCT circuit 32 and input to a computing unit 34 via a block rearrangement circuit 33.

The same data as the predicted image data supplied to the computing unit 24A is supplied to the computing unit 34. The arithmetic unit 34 adds the predicted image data output from the motion compensation circuit 26 to the difference data output from the inverse DCT circuit 32. Thus, original (decoded) P-picture image data is obtained. The P-picture image data is supplied to and stored in the backward prediction image section 35B of the frame memory 35.

As described above, the motion vector detecting circuit 20 determines whether the data of the I-picture and the P-picture is
A and B are stored in the backward prediction image unit 35B, respectively.
Execute the picture processing. Prediction mode switching circuit 22
And the prediction determination circuit 23 sets a frame / field mode in accordance with the magnitude of the absolute value sum of the inter-frame differences in macroblock units, and sets the prediction mode to the intra-frame prediction mode, the forward prediction mode, or the backward prediction mode. Mode or bidirectional prediction mode. As described above, in the intra-frame prediction mode or the forward prediction mode, the switch S is switched to the contact point a or b. At this time, the same processing as in the case of the P picture is performed and the data is transmitted.

On the other hand, when the backward prediction mode or the bidirectional prediction mode is set, the switch S is switched to the contact point c or d. When the switch S is in the backward prediction mode in which the switch S is switched to the contact point c, the image data (in this case, the P-picture image data) stored in the backward prediction image portion 35B is read out, and the motion compensation circuit 26 Motion compensation is performed corresponding to the motion vector output from the detection circuit 20.

That is, when the setting of the backward prediction mode is instructed from the prediction determining circuit 23, the motion compensating circuit 26 sets the read address of the backward predicted image section 35B to the macro block of which the motion vector detecting circuit 20 is currently outputting. Data is read out from the position corresponding to the position by an amount corresponding to the motion vector, and predicted image data is generated.

The predicted image data output from the motion compensation circuit 26 is supplied to a calculator 24B. The arithmetic unit 24B subtracts the prediction image data supplied from the motion compensation circuit 26 from the macroblock data of the reference image supplied from the prediction mode switching circuit 22, and outputs the difference.
This difference data is supplied to the DCT mode switching circuit 27,
The signal is transmitted to a transmission line via a T circuit 28, a quantization circuit 29, a variable length encoding circuit 25, and a transmission buffer 30.

In the bidirectional prediction mode in which the switch S is switched to the contact point d, the image data stored in the forward prediction image section 35A (in this case, I-picture image data) and the image data stored in the rear prediction image section 35B. Image data (in this case, P-picture image data) is read out, and the motion compensation
Motion compensation is performed corresponding to the motion vector output by 0.

That is, when the setting of the bidirectional prediction mode is instructed by the prediction determination circuit 23,
The read addresses of the forward predicted image section 35A and the backward predicted image section 35B are read from the position corresponding to the position of the macroblock currently output by the motion vector detection circuit 20 as a motion vector (in this case, the motion vector is And two data for the backward prediction image) are read out by shifting the data by an amount corresponding to the data, and predicted image data is generated.

The predicted image data output from the motion compensation circuit 26 is supplied to a calculator 24C. The arithmetic unit 24C subtracts the average value of the prediction image data supplied from the motion compensation circuit 26 from the macroblock data of the reference image supplied from the motion vector detection circuit 20, and outputs the difference. This difference data is stored in the DCT mode switching circuit 2
7, transmitted to the transmission line via the DCT circuit 28, the quantization circuit 29, the variable length coding circuit 25, and the transmission buffer 30. The B-picture image is not stored in the frame memory 35 because it is not used as a predicted image of another image.

Here, in the frame memory 35, the bank can be switched between the forward predicted image section 35A and the backward predicted image section 35B as necessary. Therefore, the image data stored in the forward predicted image section 35A or the backward predicted image section 35B can be switched and output as a forward predicted image or a backward predicted image for a predetermined reference image.

In the above description, the luminance block has been mainly described. Similarly, the chrominance block is processed and transmitted in units of the macro blocks shown in FIGS. 21 and 22. As a motion vector for processing a color difference block, a vector obtained by halving the motion vector of the corresponding luminance block in the vertical and horizontal directions respectively is used.

Next, the decoder 11 will be described with reference to FIG. The encoded image data transmitted via the transmission path (recording medium 3) is received by a receiving circuit (not shown) or reproduced by a reproducing device, and is received by a receiving buffer (Buf).
fer) 40, and then supplied to a variable length decoding circuit (IVLC) 42 of the decoding circuit 41. The variable length decoding circuit 42 performs variable length decoding on the data supplied from the reception buffer 40, and converts the motion vector (MV), prediction mode (P-mode) and prediction flag (P-FLG) into a motion compensation circuit (M- comp) 43. Further, the variable length decoding circuit 42 outputs the DCT flag (DCT-FLG) to the inverse block reordering circuit (Block Change) 44, and outputs the quantization scale (QS) to the inverse quantization circuit (IQ) 45, and decodes them. Inverted quantization circuit 45
Output to

The inverse quantization circuit 45 includes the variable length decoding circuit 4
2 is inversely quantized according to the quantization scale (QS) also supplied from the variable length decoding circuit 42, and is output to an inverse DCT circuit (IDCT) 46.
Data (DCT coefficient) output from the inverse quantization circuit 46
Is subjected to inverse DCT processing by an inverse DCT circuit 46 and supplied to an arithmetic unit 47 through a block rearrangement circuit 44. Inverse DC
When the image data supplied from the T circuit 46 is I-picture data, the data is output from the arithmetic unit 47 and the image data (P or B) input later to the arithmetic unit 47.
In order to generate predicted image data (picture data), a forward predicted image portion (FP) 4 of the frame memory 48 is generated.
8A and stored. This data is output to the format conversion circuit 12 (FIG. 13).

When the image data supplied from the inverse DCT circuit 46 is P-picture data in which the image data one frame before that is predicted image data and is data in the forward prediction mode, the forward prediction image in the frame memory 48 Part 4
The image data (I-picture data) one frame before stored in 8A is read out, and the motion compensation circuit 43 performs motion compensation corresponding to the motion vector output from the variable length decoding circuit 42. Then, in the arithmetic unit 47,
The image data (difference data) supplied from the inverse DCT circuit 46 is added and output. The added data, that is, the decoded P-picture data is used to generate predicted image data of image data (B-picture or P-picture data) to be input to the arithmetic unit 47 later.
Backward predicted image part (BP) 48B of frame memory 48
And stored.

Even in the case of P-picture data, the data in the intra-prediction mode is not subjected to any special processing by the arithmetic unit 47 as in the case of the I-picture data.
B. Since this P picture is an image to be displayed next to the next B picture, it is not yet output to the format conversion circuit 12 at this time (as described above, the P picture input after the B picture is the B picture). Processed and transmitted first).

When the image data supplied from the inverse DCT circuit 46 is B-picture data, the image data is stored in the forward prediction image section 48A of the frame memory 48 in accordance with the prediction mode supplied from the variable length decoding circuit 42. I-picture image data (in the case of the forward prediction mode), P-picture image data (in the case of the backward prediction mode) stored in the backward prediction image section 48B, or both image data (in the case of the bidirectional prediction mode) ) Is read out, and the motion compensation circuit 43 performs motion compensation corresponding to the motion vector output from the variable length decoding circuit 42 to generate a predicted image. However, when motion compensation is not required (in the case of the intra-picture prediction mode), no predicted picture is generated.

The data subjected to the motion compensation by the motion compensation circuit 43 in this way is processed by the arithmetic unit 47 by the inverse DCT.
The output of the circuit 46 is added. This added output is output to the format conversion circuit 12. However, this addition output is B-picture data and is not stored in the frame memory 48 because it is not used for generating a predicted image of another image. After the B-picture image is output, the P-picture image data stored in the backward prediction image unit 48B is read and supplied to the arithmetic unit 47 via the motion compensation circuit 43. However, no motion compensation is performed at this time.

The decoder 11 includes a prediction mode switching circuit 22 in the encoder 10 shown in FIG.
Circuits corresponding to the mode switching circuit 27 are not shown, but the processing corresponding to these circuits, that is, the configuration in which the signals of the odd field and the even field are separated from each other is replaced with the original configuration where necessary. The return process is executed by the motion compensation circuit 43. In the above description, the processing of the luminance signal has been described, but the processing of the color difference signal is similarly performed. In this case, however, a motion vector obtained by halving the motion vector for the luminance signal in the vertical and horizontal directions is used.

[0064]

Generally, a TV monitor is provided with a filter for enhancing (enhancing) an image signal in order to improve an impression of an image.
There are various types of the emphasis processing filters. For example, there are a filter such as a high-pass filter that emphasizes high-frequency components of an image signal, a filter that amplifies (contrast) the amplitude of an image signal, and a filter that converts a density gradation. .

The output signal of the TV monitor is an analog signal, and the above-mentioned emphasis processing is executed after the digital signal is converted into an analog signal. As shown in FIG.
The digital signal input to the V monitor 50 is converted into an analog signal by the D / A converter 51,
2 is displayed on the display 53 after being emphasized. In the case of an analog signal, as shown in FIG. 25, the signal is directly input to an emphasizing filter 52, subjected to an emphasizing process, and displayed on a display 53.

However, such an emphasis filter 52 not only enhances the image signal to improve the visual impression, but also emphasizes the noise contained in the signal. Therefore, in an image containing much noise, the noise becomes noticeable, and the visual impression may be deteriorated. In particular, noise in a digital image signal is mainly random noise such as white noise in an analog image signal, whereas local noise such as quantization noise (mosquito noise) in the vicinity of an edge, while noise in an analog image signal is mainly random noise. The correlation of the noise itself that has occurred is also increasing. Accordingly, the noise (deterioration) in the digital image signal becomes considerably worse when compared with the case where the white noise is emphasized,
There was a problem that caused an unnatural impression.

The digital image signal is usually quantized to 8 bits, and as shown in FIG. 26, when the emphasizing process is performed, the difference of 1 bit is widened. Accordingly, the case where the step of one bit difference is converted into an analog signal (FIG. 22)
(A)), when the emphasis processing is performed, the level difference of one bit becomes large (FIG. 22 (B)). For this reason, there is a case where a level difference of 1 bit can be visually recognized, for example, as a pseudo contour.

When a digitally-compressed image is viewed on a TV monitor that performs such an emphasizing process, noise (deterioration) caused by the compression is emphasized, resulting in a poor impression and unnaturalness. .

The present invention has been made in view of the above points, and provides a moving picture decoding method and a moving picture decoding method capable of reproducing a natural picture even when a digitally compressed picture is viewed on a TV monitor performing an emphasis process. An image decoding device is to be proposed.

[0070]

According to the present invention, a moving picture signal is encoded using a predetermined predicted image signal, a predetermined operation is performed on the encoded signal, and the operation is performed by the operation. In a moving picture decoding method for quantizing an obtained signal and decoding a moving picture signal in which the quantized signal is subjected to variable length coding, the decoding is performed by an image signal display device for displaying the decoded moving picture signal. An inverse conversion process, which is a process opposite to the enhancement process for enhancing the moving image signal applied to the decoded moving image signal, is performed on the decoded moving image signal.

In the present invention, a moving image signal is encoded using a predetermined predicted image signal, a predetermined operation is performed on the encoded signal, and a signal obtained by the operation is quantized and quantized. In a moving picture decoding method for decoding a moving picture signal in which a signal is variable-length coded, the decoding is performed on the decoded moving picture signal by an image signal display device for displaying the decoded moving picture signal. Inverse transform processing means ((62) for performing an inverse transform process, which is a process opposite to the enhancement process for enhancing the moving image signal, on the decoded moving image signal;
(72), (82)) are provided.

[0072]

According to the present invention, an image signal display device for displaying a decoded video signal performs an inverse conversion process, which is a process opposite to an enhancement process for enhancing a video signal applied to the decoded video signal. , Inverse transformation means ((62), (72), (8)
2)) is performed on the decoded moving image signal.
As a result, unnatural deterioration caused by digital compression can be made inconspicuous. Therefore, even when a digitally-compressed image is viewed on a TV monitor that performs emphasis processing, a moving image decoding that can reproduce a natural image can be performed. Device ((61),
(71), (81)) can be realized.

[0073]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.

(1) First Embodiment In FIG. 1 in which parts corresponding to those in FIG. 13 are assigned the same reference numerals, reference numeral 60 denotes a moving picture encoding / decoding apparatus according to a first embodiment of the present invention as a whole. ing. In the first embodiment, a case where contrast enhancement processing is performed on a TV monitor will be described. That is, this moving picture coding /
In the decoding device 60, the post-filter 62 of the decoding device 61 performs an inverse conversion process, which is a process opposite to the contrast enhancement process, to prevent amplification of deterioration.

As shown in FIG. 2, the contrast enhancement processing is an enhancement processing for amplifying the level of an output signal in proportion to the signal level of an input signal. In the case of this enhancement processing, the input signal x and the output signal y are expressed by the following equation (2).

(Equation 2) Can be represented by

In the digital image processing, particularly in the encoding method for processing an image in block units, there is a problem that block distortion and mosquito noise (quantization noise) are visually conspicuous. In addition, the amplitude of such a deterioration is amplified, so that the deterioration becomes conspicuous. Therefore, in the first embodiment, the operation opposite to the contrast enhancement processing is performed by the post filter 62,
The emphasis processing performed by the V monitor is invalidated to prevent deterioration amplification.

FIG. 3 shows the configuration of the post filter 62.
As shown in FIG. 3, the post filter 62 is, for example, RO
Inverting circuit 62A composed of M (read only memory)
And a clip circuit 62B. In the inverse conversion circuit 62A, an output value corresponding to the input value of the input signal is read from the ROM and output to the clip circuit 62B.

That is, the relationship between the input signal x and the output signal y is expressed by the following equation (3) so that the inverse conversion processing in the inverse conversion circuit 62A is the reverse of the contrast enhancement processing expressed by the equation (2).

(Equation 3) Is set to Therefore, as shown in FIG. 2, the contrast enhancement processing and the inverse conversion processing are set in a symmetrical relationship with respect to y = x.

Here, the relationship between the amplitude of the original signal (A) before being input to the inverse conversion circuit 62A, the output signal (B) from the inverse conversion circuit 62A, and the signal (C) after being subjected to contrast enhancement processing by the TV monitor. Is shown in FIG. As shown in FIG.
Even if the output signal (B) from the inverse conversion circuit 62A is emphasized by the TV monitor, the amplitude of the signal (C) after the emphasis processing becomes the same as the amplitude of the original signal (A). Therefore, since the amplitude of the signal is suppressed, it is possible to prevent the deterioration from being emphasized. The output signal subjected to the inverse conversion processing by the inverse conversion circuit 62A is rounded to an 8-bit signal by the clip circuit 62B and output to the D / A converters 15 and 16.

In the above arrangement, a moving image signal is encoded using a predetermined predicted image signal, a predetermined operation is performed on the encoded signal, and a signal obtained by the operation is quantized. A video signal in which the quantized signal has been subjected to variable-length coding is decoded, and an inverse transform process, which is a process opposite to the contrast enhancement process, is performed on the decoded video signal.

According to the above arrangement, the post-filter 62 performs an inverse conversion process, which has an inverse relationship to the contrast enhancement process executed in the TV monitor, on the input signal in advance, so that the input signal is executed in the TV monitor. Since the contrast enhancement processing can be invalidated, it is possible to prevent the deterioration caused by digital compression from being emphasized. Thus, even when a digitally compressed image is viewed on a TV monitor that performs contrast enhancement processing, a natural image can be reproduced.

(2) Second Embodiment In FIG. 5, in which parts corresponding to those in FIG. 1 are assigned the same reference numerals, reference numeral 70 denotes a moving picture encoding / decoding apparatus according to a second embodiment of the present invention as a whole. ing. In the second embodiment, a case will be described in which nonlinear enhancement processing is performed in a TV monitor.

As shown in FIG. 6, this non-linear enhancement processing is an enhancement processing in which the level of an output signal is nonlinearly amplified in proportion to the signal level of an input signal. Can be enhanced. However, when the non-linear enhancement processing is performed, the deterioration becomes noticeable as in the contrast enhancement processing. Therefore, in the second embodiment, the operation opposite to the nonlinear enhancement processing is performed by the post-filter 72, and the enhancement processing performed by the TV monitor is invalidated to prevent amplification of the deterioration.

FIG. 7 shows the structure of the post filter 72.
As shown in FIG. 7, the post filter 72 is composed of an inverse conversion circuit 72A and a clip circuit 72B, like the post filter 62. The inverse conversion circuit 72A has R
An output value corresponding to the input value of the input signal is read out and output to the clip circuit 72B. That is, the inverse conversion processing in the inverse conversion circuit 72A and the non-linear processing in the TV monitor are set in a symmetric relationship with respect to y = x as shown in FIG.

Therefore, even if the output signal from the inverse conversion circuit 72A is subjected to nonlinear enhancement processing by a TV monitor, it is possible to prevent deterioration from being enhanced. The output signal subjected to the inverse conversion processing by the inverse conversion circuit 72A is rounded to an 8-bit signal by the clip circuit 72B and output to the D / A converters 15 and 16.

In the above arrangement, a moving image signal is encoded using a predetermined predicted image signal, a predetermined operation is performed on the encoded signal, and a signal obtained by the operation is quantized. A video signal in which the quantized signal has been subjected to variable-length coding is decoded, and an inverse transformation process, which is a process opposite to the nonlinear enhancement process, is performed on the decoded video signal.

According to the above configuration, the post-filter 72 performs an inverse conversion process, which has an inverse relationship to the nonlinear emphasis process executed in the TV monitor, on the input signal in advance, so that the input signal is executed in the TV monitor. Since the nonlinear enhancement process can be invalidated, it is possible to prevent the degradation caused by digital compression from being enhanced. Thus, a natural image can be reproduced even when a digitally compressed image is viewed on a TV monitor that performs nonlinear enhancement processing.

(3) Third Embodiment In FIG. 8, in which parts corresponding to those in FIG. 1 are assigned the same reference numerals, reference numeral 80 denotes a moving picture encoding / decoding apparatus according to a third embodiment of the present invention as a whole. ing. In the third embodiment, a case will be described in which adaptive nonlinear enhancement processing is performed in a TV monitor. That is, this moving picture coding /
In the decoding device 80, the post filter 82 of the decoding device 81 performs an operation opposite to the adaptive nonlinear enhancement processing in advance, thereby preventing deterioration amplification.

As shown in FIG. 9, the adaptive nonlinear enhancement process is an enhancement process for adaptively nonlinearly amplifying the level of an output signal in proportion to the signal level of an input signal. In FIG. 9, the signal levels “0” and “100” mean 0% and 100% of the possible values of the image signal. For example, in the case of an 8-bit image signal, "0" is 0 and "10"
“0” indicates 255. In this enhancement process, the characteristics of the enhancement process change for each frame of the image signal according to the minimum value in the image signal.

That is, when the minimum value of the image signal is small,
When a weak enhancement process is performed as in the enhancement process A and the minimum value of the image signal is large, a strong enhancement process is performed as in the enhancement process C. Emphasis processing B is in the middle. Therefore, in the adaptive nonlinear enhancement processing, any one of the enhancement processing characteristics A, B, and C is selected according to the minimum value of the image signal, and the enhancement processing is performed based on these characteristics. Here, the enhancement processing characteristics are changed for each frame.

FIG. 10 shows the structure of the post filter 82. As shown in FIG. 10, the input signal is a minimum value detection circuit 8
2A, the minimum value detection circuit 82A obtains the minimum value of the image signal of each frame. The minimum value detected for each frame is recorded in register 82B. The inverse conversion circuit 82C constituted by a ROM reads the minimum value of the image signal from the register 82B and determines the inverse conversion characteristic according to this value.

That is, an output value is read from the inverse conversion circuit 82C according to the minimum value of the image signal read from the register 82B and the input image signal. FIG. 9 shows the relationship between the input and output at this time. As shown in FIG. 9, in the inverse conversion circuit 82C, inverse conversion processes A, B, and C corresponding to the respective enhancement processes A, B, and C are executed. For example, emphasis processing A
, An inverse conversion process B is executed corresponding to the emphasis process B, and an inverse conversion process C is executed corresponding to the emphasis process C.

Here, the emphasizing processes A, B and C and the inverse transform processes A, B and C are symmetrical with respect to y = x. The inverse conversion characteristic changes in units of frames, and in the post filter 82, the minimum value of the image signal one frame before is used when determining the inverse conversion characteristic. Inverting circuit 82C
Is input to the clip circuit 86, rounded to an 8-bit signal, and output to the D / A converters 15 and 16.

In the above arrangement, a moving image signal is encoded using a predetermined predicted image signal, a predetermined operation is performed on the encoded signal, and a signal obtained by the operation is quantized. The quantized signal decodes the moving image signal in which the variable length coding is performed, and the decoded moving image signal is subjected to an inverse transform process which is a process opposite to the adaptive nonlinear enhancement process.

According to the above configuration, the post-filter 82 performs an inverse conversion process, which has an inverse relationship to the adaptive nonlinear emphasis process executed in the TV monitor, on the input signal in advance, thereby executing the inverse conversion process in the TV monitor. Since the adaptive nonlinear emphasis process performed can be invalidated, it is possible to prevent the deterioration caused by digital compression from being emphasized. Thus, even when a digitally compressed image is viewed on a TV monitor that performs adaptive nonlinear enhancement processing, a natural image can be reproduced.

(4) Other Embodiments In the first embodiment described above, the case where the inverse conversion circuit 62B is constituted by a ROM has been described. However, the present invention is not limited to this, and as shown in FIG. The inverse conversion circuit 62B may be configured by a multiplier. In this case, the input signal is multiplied by 1 / a in equation (3).

In the above-described second embodiment, the D / A converter 15 performs an inverse conversion process in the post-filter 72,
Although the case where the signal is converted into an analog signal in step 16 has been described,
The present invention is not limited to this, and may perform an inverse conversion process after converting to an analog signal. In this case, the above-described inverse conversion processing is performed on the analog image signal.

In the third embodiment described above, three types of characteristics are described as characteristics of the adaptive nonlinear emphasis processing in the TV monitor. However, the present invention is not limited to this, and uses four or more types of characteristics. Is also good. In this case, the inverse conversion circuit 82 provides an inverse conversion processing characteristic corresponding to the type of the characteristic.

In the third embodiment, the post-filter 82 is replaced by the minimum value detection circuit 82A and the register 82.
B, the case has been described in which the circuit is constituted by the inverse conversion circuit 82C and the clip circuit 82D. However, the present invention is not limited to this, and FIG.
As shown in FIG. 2, the post filter 82 is connected to the minimum value detection circuit 8.
2A, a register 82B, an inverse conversion circuit 82C, a clip circuit 82D, and a frame memory 82E.

In this case, the image signal output from the minimum value detection circuit 82A is input to the frame memory 82E and is delayed by one frame. Therefore, in the post filter 82, the minimum value of the image signal of the current frame is used when determining the inverse conversion characteristic.

In the third embodiment, the D / A converter 15 performs an inverse conversion process in the post-filter 82,
Although the case where the signal is converted into an analog signal in step 16 has been described,
The present invention is not limited to this, and may perform an inverse conversion process after converting to an analog signal. In this case, the above-described inverse conversion processing is performed on the analog image signal.

In the above-described embodiment, the case where the digital image signal is encoded by the MPEG2 system has been described. However, the present invention is not limited to this, and the digital image signal is encoded by another image signal encoding system. May be encoded.

[0103]

As described above, according to the present invention, a video signal applied to a decoded video signal by a video signal display device for displaying a decoded video signal is emphasized. An inverse transformation process, which is a process opposite to the enhancement process, is performed on the decoded moving image signal by an inverse transformation processing means. As a result, unnatural deterioration caused by digital compression can be made inconspicuous. Therefore, even when a digitally-compressed image is viewed on a TV monitor that performs emphasis processing, a moving image decoding that can reproduce a natural image can be performed. The device can be realized.

[Brief description of the drawings]

FIG. 1 shows a moving picture coding apparatus according to a first embodiment of the present invention.
FIG. 3 is a block diagram showing a decoding device.

FIG. 2 is a graph showing the relationship between contrast enhancement processing and inverse conversion processing.

FIG. 3 is a block diagram showing a configuration of a post filter according to the first embodiment.

FIG. 4 is a schematic diagram for explaining the relationship between the amplitude of an original signal, the amplitude of an output signal from an inverse conversion circuit, and the amplitude of a signal after being emphasized by a TV monitor;

FIG. 5 shows a moving picture coding apparatus according to a second embodiment of the present invention.
FIG. 3 is a block diagram showing a decoding device.

FIG. 6 is a graph showing a relationship between a nonlinear enhancement process and an inverse conversion process.

FIG. 7 is a block diagram showing a configuration of a post filter according to a second embodiment.

FIG. 8 shows a moving picture coding apparatus according to a third embodiment of the present invention.
FIG. 3 is a block diagram showing a decoding device.

FIG. 9 is a graph showing the relationship between adaptive nonlinear enhancement processing and inverse transformation processing.

FIG. 10 is a block diagram showing a configuration of a postfilter according to a third embodiment of the present invention.

FIG. 11 is a block diagram showing a configuration of a post filter according to another embodiment.

FIG. 12 is a block diagram showing a configuration of a post filter according to another embodiment.

FIG. 13 is a block diagram showing a configuration of a conventional moving picture encoding / decoding device.

14 is a connection diagram showing a configuration of a two-dimensional low-pass filter as a pre-filter / post-filter in the moving picture encoding / decoding device of FIG.

FIG. 15 is a schematic diagram for explaining coefficients of the two-dimensional low-pass filter of FIG. 14;

FIG. 16 is a schematic diagram for explaining the principle of high-efficiency encoding of a moving image signal using frame correlation.

FIG. 17 is a schematic diagram for explaining a picture type when a moving image signal is compressed.

FIG. 18 is a schematic diagram used to explain the principle of a moving image signal encoding method.

19 is a block diagram showing a configuration of an encoder in the moving picture encoding / decoding device of FIG.

FIG. 20 is a schematic diagram illustrating a structure of image data as an explanation of a format conversion circuit.

FIG. 21 is a schematic diagram for explaining the operation of a prediction mode switching circuit of the encoder.

FIG. 22 is a schematic diagram for explaining the operation of a DCT mode switching circuit of the encoder.

23 is a block diagram showing a configuration of a decoder in the moving picture encoding / decoding device of FIG.

FIG. 24 is a block diagram for explaining an emphasizing process in the TV monitor;

FIG. 25 is a block diagram for explaining an emphasizing process in the TV monitor.

FIG. 26 is a schematic diagram for explaining a problem that occurs due to the emphasis processing;

[Explanation of symbols]

1 ... Encoding device, 2, 61, 71, 81 ... Decoding device, 3 ... Recording medium / transmission path, 4 ... Preprocessing circuit, 5,
6 ... A / D converter, 7 ... Prefilter, 8,13,
21, 35, 48, 72A ... frame memory, 8A,
13A: luminance signal frame memory, 8B, 13B ...
Color difference signal frame memory, 9, 12, format conversion circuit, 10, encoder, 11, 82, decoder, 14, 62, 72, 82, post filter, 1
5, 16, 51... D / A converter, 17... Post-processing circuit, 20... Motion vector detection circuit, 21A... Forward original image section, 21B... Reference original image section, 21C. , 22... Prediction mode switching circuit, 23... Prediction mode determination circuit, 24... Calculation unit, 24A, 24B, 24
C, 34, 47, 62C: arithmetic unit, 25, 42, 84
…… Variable length coding circuit, 26, 43 …… Motion compensation circuit,
27 DCT mode switching circuit 28 DCT circuit 29 Quantization circuit 30 Transmission buffer 3
1, 45 ... inverse quantization circuit, 32, 46 ... inverse DCT circuit, 33, 44 ... DCT block rearrangement circuit, 35
A, 48A: forward predicted image section, 35B, 48B: backward predicted image section, 40: reception buffer, 41: decoding circuit, 42: variable length decoding circuit, 50: TV monitor
52: highlight filter, 53: display, 60,
70, 80... Moving image encoding / decoding device, 62
A, 72A, 82C... Inverse conversion circuit, 62B, 72B,
82D: a clip circuit; 82A: a minimum value detection circuit;
82B ... register, 82E ... frame memory.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N ^7/ 24-7/68 H04N 5/14-5/217 H04N 5/57-5/59

Claims (8)

(57) [Claims] A moving picture signal is encoded using a predetermined predicted image signal, a predetermined operation is performed on the encoded signal, a signal obtained by the operation is quantized, and the quantized signal is a variable-length signal. In a moving picture decoding method for decoding an encoded moving picture signal, a moving picture signal applied to the decoded moving picture signal by an image signal display device for displaying the decoded moving picture signal is enhanced. The inverse conversion process, which is the reverse of the emphasis process,
A moving picture decoding method, which is performed on the decoded moving picture signal. 2. The video processing apparatus according to claim 1, wherein said emphasizing process is a process for amplifying the amplitude of said video signal, and performing an inverse conversion process of said emphasizing process on said decoded video signal. 3. The moving picture decoding method according to claim 1. 3. The enhancement process is a process of non-linearly amplifying the video signal in accordance with a visual characteristic, and performing an inverse conversion process of the enhancement process on the decoded video signal. The moving picture decoding method according to claim 1, wherein: 4. The emphasizing process is a process in which the characteristics of the emphasizing process change non-linearly with respect to each frame of the moving image signal in accordance with a minimum value in the moving image signal. The moving picture decoding method according to claim 1, wherein the conversion processing is performed on the decoded moving picture signal. 5. A moving image signal is encoded using a predetermined predicted image signal, a predetermined operation is performed on the encoded signal, a signal obtained by the operation is quantized, and the quantized signal has a variable length. A moving picture decoding apparatus for decoding an encoded moving picture signal, comprising: a moving picture signal applied to the decoded moving picture signal by an image signal display apparatus for displaying the decoded moving picture signal. A moving image decoding apparatus comprising: an inverse conversion processing unit that performs an inverse conversion process, which is a process reverse to an emphasis process, on the decoded video signal. 6. The emphasizing process is a process for amplifying the amplitude of the moving image signal, and the inverse transforming means executes an inverse transforming process of the emphasizing process on the decoded moving image signal. The moving picture decoding apparatus according to claim 5, wherein: 7. The enhancement process is a process for non-linearly amplifying the video signal in accordance with a visual characteristic, and the inverse conversion processing means performs an inverse conversion process of the enhancement process on the decoded video signal. 6. The moving picture decoding apparatus according to claim 5, wherein the moving picture decoding apparatus executes the processing. 8. The emphasizing process, wherein the characteristics of the emphasizing process change non-linearly for each frame of the moving image signal in accordance with a minimum value in the moving image signal. The moving picture decoding apparatus according to claim 5, wherein the inverse transform processing of the emphasizing processing is performed on the decoded moving picture signal.