JP3317169B2 - Decoding and reproducing apparatus for digitally compressed data - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for reading digitally compressed data from a recording medium such as an optical disk and decoding / reproducing the data. The present invention relates to a decoding and reproducing apparatus for digitally compressed data which outputs while repeating decoding of the data while connecting different sequences.

[0002]

2. Description of the Related Art In recent years, with the growing need for multimedia devices, there has been an increasing demand for recording and reproducing digitally compressed data on recording media such as optical disks. As an apparatus for this, for example, Japanese Patent Application Laid-Open No. 8-20
An apparatus as disclosed in Japanese Patent No. 5147 is proposed. In this apparatus, digitally compressed image data is temporarily stored in a buffer memory, then subjected to a decoding process, and stored in a frame memory for reproduction. In order to stop and stop the digitally compressed data input during the stop period, the playback frame memory to be read is fixed and the data in the buffer memory is discarded. It is.

[0003]

However, when such a configuration is used, when handling image data, a considerably large-capacity frame memory is required in addition to a buffer memory, resulting in an expensive system. There is a problem.

In view of the above problem, the present invention reduces the capacity of a frame memory for reproduction and, even when a different sequence is connected, realizes a digitally-compressed data which can realize a smooth connection as in the past. An object of the present invention is to provide a decoding and reproducing apparatus.

[0005]

According to the present invention, in order to achieve the above object, in the case of normal processing, digitally compressed data is stored in a buffer memory, and this data is read out, decoded and reproduced, and a different sequence is obtained. When a command indicating the connection is input from the outside, the data currently being decoded and reproduced is repeatedly decoded and reproduced, and the data of the new sequence is stored in the buffer memory immediately after the data currently being decoded and reproduced. It is a configuration.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention is a storage means for storing digitally compressed data, a digitally compressed data input from the outside, and a data remaining amount of the storage means and an external storage. Transfer control means for controlling transfer to the storage means in accordance with a command signal input from the storage means; decoding and reproducing the digitally compressed data stored in the storage means at predetermined time intervals; Data decoding means for outputting a signal indicating the end of decoding processing of data to be reproduced during the period, a command signal input from the outside, and a read address of the storage means according to a signal indicating the progress of decoding processing output from the data decoding means. Address generating means for generating an address, and an externally input command signal for outputting an address output from the read address generating means. And an address which holds the first address and the second address which is temporally newer than the first address over a data decoding time corresponding to two periods of the predetermined reproduction period based on the signal indicating the end of the decoding process output from the data decoding means. Holding means, and a write address generating means for generating a write address for the storage means based on the held second address, a command signal input from the outside, and a transfer signal output from the transfer control means. In the case of normal processing, digitally compressed data is stored in a buffer memory, this data is read out, reproduced while decoding, and when a command indicating a different sequence connection is input from outside. Is to repeatedly decode and play back the data currently being decoded and played back while buffering a new sequence of data. Since the data is stored immediately after the data currently being decoded and reproduced on the memory, the frame memory is reduced for data that can be output while decoding even when a large amount of frame memory is required for decoding. In addition, even if a connection in a different sequence is performed, there is an effect that the reproduction can be realized without a sense of incongruity as in the related art.

According to a second aspect of the present invention, the read address generating means stores the data stored between the first and second addresses held by the address holding means in accordance with a command signal input from the outside. It is characterized in that addresses are repeatedly generated.

According to a third aspect of the present invention, digitally compressed data includes an I picture coded without the need of another reference frame, and a P picture coded using a past frame as a reference frame. , A B-picture coded using a past frame and a future frame as a reference frame, and the data decoding means temporarily stores the I and P pictures decoded for the decoding process of the B picture. And a decoding process for B pictures using decoded image data of the I and P picture frame memories and B picture data stored in the storage means.
It can handle digitally compressed data according to MPEG2. Even if a different sequence is connected during decoding of a B picture, a frame memory for the B picture is not required and the same as before can be achieved. There is an effect that a sequence connection without a sense of incongruity in a reproduced image can be realized.

According to a fourth aspect of the present invention, the command signal input from the outside is a signal indicating a connection in a different sequence.

Embodiment 1 Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of an apparatus for decoding and reproducing digitally compressed data according to Embodiment 1 of the present invention.

Reference numeral 101 denotes a first input terminal to which digitally compressed data reproduced from a recording medium (not shown) such as an optical disk and subjected to demodulation processing, error correction processing, and the like are input, and 102 is a different sequence. Is a second input terminal to which a command signal indicating the connection is input, 103 is a data transfer control unit for controlling data transfer of digitally compressed data, 104 is a main memory for storing digitally compressed data, and 105 is a main memory. A data decoding processor for decoding and outputting digitally compressed data on the main memory 104; 106, a write address generator for generating a write address of the main memory 104;
A read address generator 108 for generating a read address of an address, an address holding unit 108 for holding a read address of the main memory 104 in accordance with a signal output from the data decoding processor 105, and an output 109 for outputting a decoded signal Terminal.

The operation will be described in detail with reference to FIG.
First, the normal operation, that is, the operation when the command signal input from the second input terminal 102 does not indicate connection in a different sequence will be described. The digitally compressed data input to the first input terminal 101 is transfer-controlled by the data transfer control unit 103 and stored in the main memory 104. The operation of the data transfer control unit 103 is normally executed according to the remaining amount of data in the main memory 104. The remaining data amount can be obtained from the write address and read address of the main memory 104 generated by the write address generator and read address generator described later. The write address of the main memory 104 is generated by a write address generator 106 by an increment process in accordance with a transfer signal output by the data transfer controller. The digitally compressed data stored in the main memory 104 is read from the main memory 104 in accordance with the read address generated by the read address generator 107, decoded by the data decoding processor 105, and output as a decoded signal from the output terminal 109. Is done. The read address generation unit 107 is generated by an increment process according to a signal output from the data decoding processing unit 105 and indicating the progress of the decoding process. The data decryption processing unit 10
5 outputs a signal indicating the end of the data decoding process for a predetermined period to the address holding unit 108, and in accordance with this signal, the address holding unit 108 holds the read address of the main memory 104 at that time. This address is held for two times of the signal output from the data decoding processing unit 105 indicating the end of the data decoding process for a predetermined period. That is, two addresses are held from the second time after the first holding operation.

The above is the normal operation, but the digitally compressed data is an I picture which is encoded without the need for another reference frame as shown in Japanese Patent Application Laid-Open No. 8-205147. And a P picture coded using a past frame as a reference frame and a B picture coded using a past frame and a future frame as a reference frame, the data decoding processing unit 105 includes: A frame memory for temporarily storing the decoded I and P pictures for decoding the B picture is required. However, for B pictures,
If there is decoded image data on the I and P picture frame memories and compressed B picture data on the main memory 104, decoding and reproduction can be performed without a B picture frame memory.

Next, a special operation, that is, the second input terminal 1
The operation of each block when the command signal input from 02 indicates a connection in a different sequence will be described. This command signal is suddenly switched from the outside during normal operation, and is input to each block shown in FIG. When the command signal is switched, the data transfer control unit 103 temporarily stops the subsequent data input, and recognizes that it is a data break when the transfer of already input data to the main memory 104 is completed. The input preparation of a new different sequence as described below is performed, and the operation is resumed when this is completed. The address holding unit 108 outputs the held two addresses to the read address generation unit 107, and outputs the latest address of the two addresses held to the write address generation unit 106. The read address generation unit 107 keeps the address holding unit 108 until the command signal changes to a signal indicating normal reproduction.
The digitally-compressed data on the main memory 104 existing between the two addresses input from the memory is read repeatedly, and the data decoding processing unit 105 performs a decoding process.
The address holding unit 108 does not perform an operation of holding a new address after shifting to the iterative decoding operation.
On the other hand, the write address generation unit 106 is generated by performing an increment process from the address next to the latest address of the two addresses input from the address holding unit 108, and
Data of a different sequence newly input to the main memory 104 is stored. That is, new data is stored immediately after the address where the data read from the main memory 104 is stored for the iterative decoding operation. Digitally compressed data corresponding to the data amount required for reproduction for a predetermined period is input to the first input terminal 1.
After input to 01, the command signal input to the second input terminal 102 is externally changed to a signal indicating normal reproduction, and decoding and reproduction processing of a newly input different sequence is performed thereafter. The above is the operation at the time of different sequence connection.

Digitally compressed data is disclosed in
-205147, an I picture encoded without the need for another reference frame, a P picture encoded using a past frame as a reference frame, a past frame and a future If the B picture includes a B picture encoded using the frame as a reference frame, the decoded picture data of the I and P pictures on the frame memory and the compressed B picture data on the main memory 104 are included in the B picture. For example, it has been described in the normal operation description that decoding and reproduction can be performed without a frame memory for a B picture. However, the present invention provides a different sequence when decoding such a B picture. Is applied to the case where is connected, without the need for a frame memory for B-pictures, It is possible to realize a sequence connection are.

In the first embodiment, digitally compressed data has been described as being reproduced from a recording medium such as an optical disk. However, the present invention is not limited to this, and data is transmitted by wired or wireless communication means. It goes without saying that the same effect can be obtained with respect to decoding and reproducing digitally compressed data.

[0017]

As described above, according to the present invention, in the case of normal processing, digitally compressed data is stored in a buffer memory, and this data is read out and reproduced while being decoded, thereby indicating a different sequence connection. When a command is input from the outside, the data currently being decoded and reproduced is repeatedly decoded and reproduced, and data of a new sequence is stored in the buffer memory immediately after the data currently being decoded and reproduced. Therefore, even if large-capacity frame memory is required for decoding, the frame memory is reduced for data that can be output while decoding, and even if a different sequence is connected, the playback is realized as usual without any discomfort It is possible to construct an inexpensive system.

[Brief description of the drawings]

FIG. 1 is a block diagram of an apparatus for decoding and reproducing digitally compressed data according to a first embodiment of the present invention;

[Explanation of symbols]

 101 first input terminal 102 second input terminal 103 data transfer control unit 104 main memory 105 data decryption processing unit 106 write address generation unit 107 read address generation unit 108 address holding unit 109 output terminal

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03M 7/30 G11B 20/10 321 H04N 5/85

Claims (4)

(57) [Claims] A storage means for storing digitally compressed data, a digitally compressed data input from the outside, and a transfer control to the storage means in accordance with the remaining amount of data in the storage means and a command signal input from the outside. Transfer control means for decoding and reproducing the digitally compressed data stored in the storage means at predetermined time intervals, and a signal indicating the progress of the decoding processing and the end of the decoding processing of the data reproduced at predetermined time intervals. Data decoding means for outputting a signal indicating the progress of a decoding process output from the data decoding means, a command signal input from the outside, and a read address generation means for generating a read address of the storage means. An address output from the read address generating means is used to store an externally input command signal and the data Holding means for holding a first address and a second address which is temporally newer than the first address over a data decoding time of two periods of a predetermined reproduction period based on a signal indicating the end of decoding processing output from the decoding means. And a write address generating means for generating a write address for the storage means based on the held second address, a command signal input from the outside, and a transfer signal output from the transfer control means. An apparatus for decoding and reproducing digitally compressed data. 2. A read address generating means for repeatedly generating an address of data stored between a first address and a second address held by an address holding means in accordance with a command signal input from the outside. 2. The apparatus for decoding and reproducing digitally compressed data according to claim 1, wherein: 3. The digitally compressed data comprises: an I picture encoded without the need for another reference frame;
The data decoding unit includes a P picture coded using a past frame as a reference frame, and a B picture coded using a past frame and a future frame as a reference frame. Has a frame memory for temporarily storing the decoded I and P pictures.
3. The decoding and reproduction of digitally-compressed data according to claim 1, wherein decoding processing is performed using decoded image data of a picture on a frame memory and B-picture data stored in a storage unit. apparatus. 4. The decoding and reproduction of digitally compressed data according to claim 1, wherein the command signal inputted from the outside is a signal indicating connection of a different sequence. apparatus.