JP3302146B2 - Printer device and head drive circuit thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an head drive circuit of the printer and its printer apparatus for printing an image by driving a print head, in particular having a plurality of recording elements
And to a drive circuit for it.

[0002]

2. Description of the Related Art A thermal head of a line type is provided, and a heating element of the thermal head is divided into a plurality of blocks, and recording is performed by energizing each block.
2. Description of the Related Art A thermal printer that suppresses an increase in the power supply capacity of a printer device is known. In such a thermal head driving method, since the heating elements of the thermal head are always divided into blocks and recording is performed regardless of the number of dots recorded in one line, there is a problem that the time required for recording increases. . Therefore, the number of heating elements that can be energized at the same time in one line is obtained based on the power supply capacity, and when the number of dot data corresponding to the number of elements is transferred to the thermal head, the corresponding data is recorded, and the next data is recorded. At the recording timing, of the remaining data, the portion corresponding to the elements that can be energized simultaneously is recorded. This allows
When the number of recording dots in one line is large, the heating element of the thermal head is energized in a plurality of times, and when the number of recording dots in one line is small, one line is recorded by one energization.

[0003]

Usually, in order to perform such processing, a circuit called a sequencer is provided between the control unit of the printer and the thermal head, and the above-described control is performed by this circuit. However, in the control by the sequencer, when it is desired to change the number of elements that can be energized simultaneously in one line, it is difficult to change the number. In order to reduce the time required for recording, the sequencer controls Receiving and analyzing, counting the number of dots,
Since the data transfer to the thermal head and the control of the energization time to the heating element and the like must be performed in parallel, the burden has been heavy.

The present invention has been made in view of the above-mentioned conventional example, and even if the number of dots to be printed exceeds the number of printable elements that can be simultaneously driven, the dot data is stored for each of the printable dots. It is an object of the present invention to provide a head drive circuit of a printer device which can automatically divide a print job into a high-speed print.

[0005]

In order to achieve the above object, a head drive circuit according to the present invention has the following arrangement. That is, a head drive circuit of a printer device that prints an image on a recording medium using a print head having a plurality of recording elements, and can be simultaneously driven with storage means for storing data to be output to the print head. A first register for storing the number of recording elements of the print head, a second register for storing the total number of recording elements used for recording of the print head, and a black dot supplied to the print head from the storage means. Count the number
A black dot counter and data to be output to the print head
And the dot counter for counting the number of dots over data, before
The number of synchronous clocks for data output to the printhead
A division drive counter for counting, and the black dot cow
Counter value is the value held in the first register.
Stop counting for the dot counter when exceeding
And an enable signal for the divided drive.
Output an enable signal to the counter to continue counting.
When the total number of data supplied to the print head is less than the total number of recording elements stored in the second register, empty data is generated and supplied to the data holding means of the print head for printing. Recording operation on head
Control means for executing the dot counter.
If the dot counter is stopped in the
Using the split drive counter and the
The transfer is performed and the next recording operation is performed .

[0006]

With the above arrangement, a black dot counter for counting the number of black dots supplied to the print head, a dot counter for counting the number of dots of data to be output to the print head, and a dot counter for counting the number of dots to be output to the print head. A divided drive counter for counting the number of synchronous clocks, and when the count value of the black dot counter exceeds the number of print elements of the print head that can be driven simultaneously, the counting of the dot counter is stopped. When the total number of data supplied to the print head is less than the total number of recording elements stored in the second register, by supplying an enable signal to perform the counting and outputting an enable signal to continue counting to the divided drive counter. Generates empty data and supplies it to the data holding means of the print head to perform a recording operation on the print head. That. Further, when the dot counter is stopped halfway, data that has not been transferred previously is transferred using the dot counter and the divided drive counter, and the next recording operation is performed.

[0007]

【Example】

Embodiment 1 Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing the configuration of the main part of the thermal printer of this embodiment. In this embodiment, a case of a thermal printer using a thermal head will be described. However, the present invention is not limited to this. For example, a thermal transfer printer, an inkjet printer having an electrothermal converter, or other printers In FIG. 1, reference numeral 5 denotes a thermal head, and FIG. 3 shows the details thereof. Reference numeral 6 denotes a control unit, which is connected to the main memory 2, a character generator (hereinafter referred to as CG) 16, a head drive control unit 17, and the like via a system bus 18.
In addition, a display control unit, a communication control unit, an input control unit such as a keyboard, etc., which are not shown, are provided. The print buffer 10 in the main memory 9
This is an area for the control unit 6 to develop print data. When printing characters, the control unit 6 refers to the CG 16 and develops and stores a bit image with desired font data. The head drive control unit 17 is a feature of the present embodiment, and receives print data stored in the print buffer 10 from the control unit 6 and drives the thermal head 5 as described later with reference to FIG. Various timing signals are generated, and print data is transferred to the thermal head 5. These various timing signals will be described later with reference to the block diagram of the thermal head 5 in FIG.

FIG. 3 is a block diagram showing the configuration of the thermal head 5 of the present embodiment.

In FIG. 3, reference numeral 4 denotes a heating element 1 (recording element).
Is a shift register that inputs and holds serial data for heating the print data, print data 15 is input in synchronization with a shift clock 14, and its parallel output is connected to the input unit of the latch circuit 3, respectively. Latch circuit 3
Is latched by a latch clock 13, and the latched data is connected to the input of a two-input NAND type driver 2, respectively. A strobe signal 12 is commonly connected to the other input of the two-input NAND type driver 2, and the output is connected to each of the heating elements 1. The other end of the heating element 1 is commonly connected to a power supply line 11 from a power supply 8, and a head drive voltage is applied. Therefore, assuming that the number of heating elements (resistors) of the heating element 1 is n, the driver 2 is n, the latch circuit 3 is an n-bit latch circuit, and the shift register 4 is also an n-bit shift register.

As described above, the thermal head 5 of this embodiment
Is constituted integrally with a heating element 1, a driver 2, a latch circuit 3, a shift register 4, and the like. A head drive power line 11, a strobe signal 12, a latch clock 1
3, driven based on signals such as shift clock 14, print data 15, and the like.

FIG. 2 is a block diagram showing a detailed configuration of the head drive control unit 17 of this embodiment. However, only the main connection lines are shown in the figure.

In FIG. 2, reference numeral 20 denotes a frequency dividing circuit which divides a frequency of a clock 34 supplied from the system bus 18,
A clock 35 used for controlling the thermal head 5 is created. This clock 35 usually takes a value of about several hundred KHz to several MHz, but it varies depending on the number of dots of one line of the thermal head 5 to be used. It is a configuration that can be done. Reference numeral 25 denotes a timing control unit for generating various timings of the head control unit 17, and is connected to the system bus 18 by a START signal 54, an interrupt signal 43, and the like. Reference numeral 21 denotes a total dot number setting register, in which the number of dots to be printed in one line is set. A data line 36 is input to the data input unit of the control unit 6 via the system bus 18, and the output 37 is a dot It is connected to the data input section of the counter 22 and the division drive counter 23.

The dot counter 22 and the division drive counter 23 are both down counters, and load the output 37 of the register 21 and count down in synchronization with the clock 35. A data enable signal 42 is supplied from the timing control unit 25 to the count enable terminal (E) of the dot counter 22. The count end signal 52 of the dot counter 22 is input to the timing controller 25, and the dot counter 22
This indicates that the data transfer for one line to the thermal head 5 has been completed. A clock enable signal 41 from the timing control unit 25 is supplied to a count enable terminal (E) of the divided drive counter 23. The count end signal 53 of this counter 23
Is input to the timing control unit 25, and when the heating element of the thermal head 5 is driven by dividing into N, the count end signal 53 is generated N times and the counter is set to N.
Will go around. A comparator 24 compares a count value 38 of the dot counter 22 with a count value 39 of the divided drive counter 23, and outputs a coincidence signal 40 to the timing control unit 25.

With this configuration, the dot counter 22 accurately counts the number of dots transferred to the thermal head 5,
When the number of black dots exceeds the number of simultaneous heats in one line (determined by the output of the black counter 27), the divided drive counter 23 also counts the amount of the remaining data transferred to the thermal head 5 as empty data (data 0). are doing. After the first black dots that can be simultaneously heated are transferred to the thermal head 5 and latched by the latch circuit 3, the division drive counter 23 is set again to the number of dots set in the total dot number setting register 21. Only the division drive counter 23 (the enable signal 42 is off) is the clock 35
When the comparator 24 detects that the count value has become equal to the count value of the dot counter 22, the data enable signal 42 is turned on and the remaining data is transferred to the thermal head 5.

Reference numeral 28 denotes a data input register which inputs and holds print data to be transferred to the thermal head 5. The control unit 6 sends a system bus 1 to the data input unit.
8, data 45 is input to this register 2.
8 is a parallel / serial (PS) converter 2
9 parallel input units. PS converter 29
Outputs the parallel input as serial data 49 in synchronization with the clock 35. This PS converter 29
The timing control unit 2 is connected to the shift enable terminal (E) of
5, the data enable signal 42 is inputted, and the PS conversion is executed only when this signal is at the high level.

Reference numeral 26 denotes a simultaneous heat number setting register in which the number of heat generating elements 1 of the thermal head 5 which can be energized simultaneously is set. The data input unit receives data 44 from the control unit 6 via the system bus 18, and outputs the data 46.
Is connected to the data input section of the black counter 27. The black counter 27 is a down counter, loads the output 46 of the register 26, and counts down in synchronization with the clock 35. The serial enable signal from the PS converter 29 is supplied to the count enable terminal (E) of the black counter 27.
9 is supplied, and the number of black dots is counted by counting the clock 35 when the print data 49 is at a high level, that is, when the print data 49 is black data. When the black counter 27 makes one rotation, it indicates that the number of black dots in one line has exceeded the number of simultaneously heatable black dots, whereby a count end signal 47 is output to the timing control unit 25. When the count end signal 47 is output, the timing controller 25 turns off the data enable signal 42,
The shift clocks 14 are output by the number of stages of the shift register 4 while the count enable signal 41 is kept on.
Thus, in the shift register 4 of the thermal head 5, print data for one block consisting of print data for black dots that can be heated simultaneously and remaining free data is set. The black counter 27 has 1
At the end of line printing, the value set in the simultaneous heat number setting register 26 is preset.

Reference numeral 32 denotes a heat time setting register which sets the time for heating the thermal head 5. Data 50 is input to the data input portion of the control portion 6 from the control portion 6 via the system bus 18. Heat timer 33
Is connected to the data input section. This heat timer 33
Is triggered by the latch clock 13 output from the timing control unit 25, and performs a counting operation for a time corresponding to the value set by the output 51 of the register 32 using the clock 35 as a time base. The strobe signal 12 is output during this counting operation.

Reference numeral 30 denotes a two-input AND gate, which is a P-S
Serial data 49 output from converter 29 and data enable signal 4 output from timing control unit 25
The logical product of the two is taken and output as print data 15. Reference numeral 31 denotes a similar two-input AND gate, which outputs the clock 35 output from the frequency dividing circuit 20 and the timing control unit 2.
AND with the clock enable signal 41 output from the thermal head 5 as the shift clock 14
Output to

The operation of the first embodiment of the present invention having the above configuration will be described with reference to the timing charts shown in FIGS.

FIG. 4A shows a frequency dividing circuit 20.
FIG. 4B shows a serial output 49 of the PS converter 29. FIG. 4 (g)
The timing of writing from the control unit 6 to the data input register 28 is shown. FIG. 4F shows a load signal 55 for loading data from the data input register 28 to the PS converter 29. Here, in order to prevent overrun, the control unit 6 sends the P
Until the data is loaded into the -S converter 29, the next data is not written to the data input register 28. The load signal 55 is normally generated in synchronization with the output of the last bit of the serial output 49 of the PS converter 29. However, the writing of data to the data input register 28 by the control unit 6 is delayed. When the serial data 49 has been output up to the last bit (timing T1),
Both the enable signals 41 and 42 become low level. Then, the clock enable signal 41 (FIG. 4C) and the data enable signal 42 (FIG. 4C) are received until a load signal 402 is generated in response to the write signal 45 indicated by 401 in FIG. d) and are both kept at the low level. As a result, the dot counter 22 and the division drive counter 23 stop counting, and the shift clock 14 (FIG. 4E) to the thermal head 5 is kept at the low level by the AND gate 31. That is, the control unit 6
When the print data is not written into the data input register 28 by the above operation, the operation of the head drive control unit 17 is completely stopped.

FIG. 5 is a timing chart in which one-line recording is performed by driving the heating element 1 of the thermal head 5 in three parts.

In FIG. 5, (a) shows S from the control unit 6.
A TART signal 54 is shown, and the operation of the head drive control unit 17 starts based on this signal. So prior to this,
The control unit 6 sets the frequency division ratio of the frequency dividing circuit 20, the initial value of the total dot number setting register 21, the simultaneous heat number setting register 26, the heat time setting register 32, and the like. It is initially loaded into the drive counter 23, the black counter 27, the heat timer 33 and the like.

When print data is written into the data input register 28 in response to the START signal 54, the data is loaded into the PS converter 29 as shown in FIG. Then, transfer of the print data 15 synchronized with the shift clock 14 (FIG. 5B) is started. At this time, the number of black dots of the serial data 49 is counted by the black counter 27. Data transfer is performed in this way,
The number of black data that can be heated simultaneously is the thermal head 5
The black counter 27 generates a count end signal 47 (501 in FIG. 5C). In response to this, the timing control unit 25 sets the data enable 42 to low level (502 in FIG. 5E), closes the AND gate 30, and inhibits the output of the print data 15. At this time, the counting operation of the dot counter 22 and P-
The shift-out operation of the S converter 29 is also stopped.

At this time, the divided drive counter 23 is in an enabled state, is counted down by the clock 35, and stops the counting operation of the dot counter 22, so that the count values of both counters do not match. As a result, the match signal 40 is no longer output from the comparator 24 (FIG. 5).
(K) 503). However, at this time, the shift clock 14
Is not stopped, so that empty data is transferred to the thermal head 5. That is, this state is an operation for shifting data that has already been transferred to a predetermined position of the shift register 4.

When the transfer of empty data proceeds and the data transfer to the shift register 4 is completed, the count end signal 53 of the divided drive counter 23 (504 in FIG. 5F).
Occurs. In response to this, the timing controller 25 sets the clock enable signal 41 to low level (see FIG. 5).
(505 of (d)), the counting operation of the divided drive counter 23 and the output of the shift clock 14 (FIG. 5 (b)) are stopped.

At the same time, the latch clock 13 is output to the thermal head 5, and the output of the shift register 4 is taken into the latch circuit 3. When this latch operation is completed, the shift register 4 becomes usable again. Therefore, the timing control unit 25 sets the clock enable signal 41 to the high level (506 in FIG. 5D), and performs the counting operation of the divided drive counter 23 and the shift clock. 14 and restart. The print data at this time is still empty data, but when the data transfer proceeds and the count value of the divided drive counter 23 matches the count value of the dot counter 22 that has been stopped previously, the match signal 40 is output from the comparator 24. It is output (507 in FIG. 5 (k)).

The timing controller 25 outputs the coincidence signal 40
In response, a data enable signal 42 is output (FIG. 5).
(E) 508), the countdown operation of the dot counter 22, the shift-out operation of the PS converter 29, and the output of the print data 15 are restarted. Thereafter, as in the above-described operation, a series of operations proceeds until the count end signal 53 of the divided drive counter 23 is generated (509 in FIG. 5F).

On the other hand, when the heat timer 33 receives the latch clock 13 from the timing controller 25 (FIG. 5 (i)).
510) The strobe signal 12 is output (FIG. 5 (j)
511), the heating of the heating element 1 is started by the data latched in the latch circuit 3. This heating is performed only while the strobe signal 12 is being output, and the strobe signal 12 is output until the count of the heat timer 33 ends. Thus, one cycle of the divisional driving of the thermal head 5 is completed.

Here, if the strobe signal 12 is being output (high level) when the count end signal 53 of the divided drive counter 23 is generated (509 in FIG. 5 (f)), the timing control unit 25 outputs the strobe signal 12 5 (j in FIG. 5 (j)), and outputs the latch clock 13 after the latch circuit 3 becomes usable (FIG. 5 (j)).
(I) 513). Then, the strobe signal 12 is immediately set to the high level again (514 in FIG. 5 (j)), and the next heating of the heating element 1 is started.

At the same time, the timing controller 25 outputs the clock enable 41 (51 in FIG. 5D).
5) Restart the count operation of the division drive counter 23 and the output of the shift clock 14. Thereafter, the coincidence signal 40 is generated during the data transfer (516 in FIG. 5 (k)), and the data enable signal 42 becomes high level (FIG. 5 (k)).
(E) 517), switching from empty data to actual data occurs. In the previous two data transfer cycles, the end signal 47 of the black counter 27 was generated during the transfer of the actual data.
If it is less than the end signal 47, the end signal 47 is not generated,
Count end signals 52 and 53 of the dot counter 22 and the division drive counter 23 are generated first (51 in FIG. 5F).
8, (g) 519).

In response, the timing control section 25 attempts to output the latch clock 13. However, at this time, as in the previous case, the state of the strobe signal 12 is checked, and if the strobe signal 12 is being output, the end thereof is awaited before the latch clock 13 is output (520 in FIG. 5 (i)). Since the subsequent heat cycle operates in the same manner as the previous heat cycle, the description is omitted here.

The timing control unit 25 outputs a count end signal 52 of the dot counter 22 (51 in FIG. 5 (g)).
When the heat cycle after receiving 9) is completed (FIG. 5)
(J) 521), the interrupt signal 4
3 is output (FIG. 5 (h)). The control unit 6 can recognize from the interrupt signal 43 that the recording operation for one line has been completed. After that, usually, one line of the recording paper is fed, and then the process proceeds to the recording of the next line, but the description is omitted here.

Although not described above, each of the counters and timers in FIG. 2 loads a set value from each of the setting registers in response to its own count end signal.

In the timing chart of FIG. 5, the number of heating elements of the thermal head 5 is divided into three blocks and recorded according to the number of black dots. If less than 1
It goes without saying that all of the lines are printed.

As described above, in this embodiment, once the control unit 6 has set the initial values of the respective registers of the head drive control unit 17, only the print data is transferred thereafter, automatically and at high speed. In addition, the heating elements of the thermal head 5 can be dividedly driven to the number of heating elements capable of simultaneously heating and recording can be performed.

FIG. 6 shows a control unit 6 of the printer of this embodiment.
9 is a flowchart showing a print process of one page in FIG.

At the start of this processing field, it is assumed that the recording paper has been conveyed to the print position.
Then, the total number of dots of one line is set in the total dot number setting register 21, the frequency division ratio is set in the frequency dividing circuit 20, and the number of heating elements that can be energized simultaneously is set in the simultaneous heat number setting register 26. Next, the process proceeds to step S2, where it is determined whether or not data has been received from an external device such as a host computer (not shown). When the data has been received, the process proceeds to step S3, and the received data is set in the data input register 28. Next, in step S 4, the time for energizing the heating element 1 (the pulse width of the strobe signal 12) is set in the heat time setting register 32, and the start signal 54 is output to the timing control unit 25. With the above processing, the PS converter 29 starts operating, and data transfer to the shift register 4 starts.

Next, the process proceeds to step S5, and waits until the next data is received from the host computer. If received, the process proceeds to step S6, and waits until the data input register 28 is empty and becomes writable. This data input register 2
8 becomes empty immediately before the data input register 28
Is loaded into the PS converter 29,
Even if the next data is written to the data input register 28,
A state in which the previous data is not destroyed.

When the data input register 28 becomes empty, the process proceeds to step S7, and the data received in step S5 is written into the data input register 28. Next, step S
The process proceeds to step 8 to check whether the data transfer for one line has been completed. If the data transfer has not been completed, the process returns to step S5 to repeat the above-described processing. If the data transfer has been completed, the process proceeds to step S9, and waits for the occurrence of an interrupt. This interrupt is caused by an interrupt signal 43 output at the end of one line of heat.

In step S9, an interrupt occurs, and 1
When the heating of the line is completed, the process proceeds to step S10, in which a predetermined amount of paper feed is performed, and the process proceeds to step S11.
In step S11, it is determined whether the printing process for one page has been completed. If the printing process for one page has not been completed, the process returns to step S2 to execute the above-described process. When printing of one page is completed, step S1 is performed.
Proceeding to step 2, the recorded recording paper is discharged, and the process is terminated. [Second Embodiment] In the first embodiment, the control unit 6
The data transfer processing to the thermal head 5 was performed by writing various data to the head drive control unit 17, but by performing this transfer using a direct memory access controller (hereinafter referred to as DMAC), Even faster data transfer can be expected. 7 to 9 show configuration examples in this case, and the second embodiment will be described with reference to these drawings. However, in the following description, only differences from the first embodiment will be described.

FIG. 7 is a block diagram of a main part of a printer according to a second embodiment of the present invention. 7, the difference from the first embodiment is that a DMAC (DMA controller) 70
Are connected to the system bus 18.

FIG. 8 is a block diagram showing a detailed configuration of the head control section 172. However, portions common to the configuration of FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted.

In the second embodiment, the timing control unit 2
52 outputs a DMA request signal 56 to the system bus 18, and receives a DMA response signal 57 from the bus 18. Also, the data input register 28 shown in FIG. 2 is omitted, and the data line 45 is directly connected to the PS converter 29.
It is connected to the.

The data transfer by the DMAC 70 is performed by the DMA request signal 56 and the DMA response signal 57 described above. The timing control signal 252 outputs a DMA request signal 56 to the DMAC 70 when the PS converter 29 is empty. When the DMAC 70 receives the right to use the system bus 18 from the control unit 6, the DMAC 70 puts the print data on the data line 45 and outputs the DMA response signal 5.
Returns 7 The response signal 57 allows the PS converter 29
And the timing control unit 252 withdraws the DMA request signal 56 and
C70 returns the right to use the system bus 18 to the control unit 6.
Thus, the transfer of the print data by the DMA is performed. However, prior to this, the control unit 6
In the AC 70, the print buffer 10 is a DMA transfer source,
The S converter 29 must be initialized so as to be a DMA transfer destination. This is so-called DMA transfer from memory to I / O (Memory to I / O).

As compared with the first embodiment, the control unit 6
This operation will be described in detail with reference to FIG.

First, data is loaded into the PS converter 29 by the DMA response signal 57 (90 in FIG. 9 (g)).
1), the DMA request signal 56 goes low. Thus, the print data 1 is synchronized with the shift clock 14.
5 is started. And the timing control unit 252
Receives the shift end signal (902 in FIG. 9H) of the PS converter 29, outputs the DMA request signal 56 (FIG. 9F), and sets both the clock enable 41 and the data enable 42 together. Keep low level. This allows
Both the dot counter 22 and the division drive counter 23 stop counting down, and the shift clock 14 is kept at a low level by the AND gate 31. At this time, all the operations of the head drive unit control unit 172 are stopped,
This state is released when the DMA response signal 57 causes the withdrawal of the DMA request signal 56 and the re-output of the clock enable 41 and the data enable 42. Therefore, even if the release of the system bus 18 by the control unit 6 is delayed and the response of the DMA response signal 56 is delayed (903 in FIG. 9G), there is no problem.

The operation is almost the same as that of the first embodiment shown in FIG. 6 except that the counters 22 and 23 always stop at the end of the PS conversion, so that the following description is omitted.

The speed of the normal DMA transfer is much higher than that of the serial transfer of the print data. For this reason, in the second embodiment, the data input register 28 of the first embodiment is omitted, but the DMA transfer may be performed with the data input register 28 remaining.

As described above, according to the second embodiment,
The control unit 6 controls each register and the DM of the head drive control unit 172.
It is not necessary to be conscious of the transfer of print data only by initializing the AC 70 once, and it is possible to automatically and quickly drive the heating element of the thermal head 5 by dividing the heating element. The load can be reduced. [Third Embodiment] In the above-described embodiment, the number of heating elements 1 that can be driven simultaneously is fixed, but it may be desired to change the number. That is, the number of elements that can be heated simultaneously is usually determined by the capacity of the power supply. Therefore, in a model that can switch between battery drive and AC adapter drive, the number of simultaneous heats can be increased or the restriction can be eliminated when the AC adapter is used.

Hereinafter, a third embodiment of the present invention will be described with reference to FIGS.

FIG. 10 is a block diagram showing a schematic configuration of the printer of the third embodiment. In the third embodiment, a voltage discriminating circuit 58 is added to the configuration of FIG. 1, and a discrimination signal 59 is input to the head driving unit 173. The discrimination signal 59 outputs a low level signal when driven by a battery, and outputs a high level signal when driven by an AC adapter. In this embodiment, the power supply discriminating circuit 58 should discriminate between, for example, battery drive and AC adapter drive. However, since there are many known means, a detailed description of this circuit will be omitted.

FIG. 11 shows a head driving unit 17 according to the third embodiment.
FIG. 3 is a block diagram showing a configuration of No. 3; In the figure, a simultaneous heat number setting register A26 is a register for setting the number of simultaneous heats when the battery is driven, and a simultaneous heat number setting register B263 is a register for setting the number of simultaneous heats when the AC adapter is driven. Before the operation of both registers is started, the control unit 6 sets initial values. The outputs 46 and 463 of each of these registers are connected to the selector 60.
It is connected to the. A power supply determination signal 59 is input to a select terminal of the selector 60. When the determination signal 59 is at a low level, the output 46 of the register A26 is output.
Is high, the output 46 of the register B 263
3 is selected and output as output 59. This output 59 is input to the data input terminal of the black counter 27.

Thus, the set value of the register 26 is selected when the battery is driven, and the set value of the register 263 is selected when the AC adapter is driven. Is automatically switched.

Here, when the power supply capability of the AC adapter is sufficient and it is not necessary to drive the heating elements of the thermal head 5 separately, a value larger than the total number of dots in one line can be set in the register 262. I just need. As a result, the end of counting by the black counter 27 does not occur, so that the heating elements of the thermal head are not dividedly driven.

Of course, in combination with the above embodiment, the number of simultaneous heats may be changed by rewriting the value of the simultaneous heat number setting register 26 by the control unit 6 according to the power supply used. .

In the third embodiment, a battery and an AC adapter are taken as examples of the type of power supply. However, there are cases where batteries with different capacities are used or AC adapters with different power capacities are used. Needless to say, the present invention can be applied to a case where there are three types, four types and a power source type.

Although this embodiment has been described based on the first embodiment, it goes without saying that the same applies to the case where it is applied to the second embodiment. [Fourth Embodiment] The resistance value of the heating element of the thermal head 5 increases as the temperature increases. Therefore, when the temperature of the thermal head 5 is high, the consumed current is reduced, and the number of simultaneous heat dots can be increased. Also, since the higher the temperature of the battery, the higher the capacity, the higher the temperature, the more the number of simultaneous heat dots can be increased.

Therefore, here, a fourth embodiment in which the number of simultaneous heat dots is changed in response to a temperature change will be described with reference to FIG.
The description will be made with reference to FIG.

FIG. 12 is a block diagram showing the structure of the main part of the printer of the fourth embodiment. The parts common to the above-mentioned drawings are designated by the same reference numerals, and their description is omitted.

In the fourth embodiment, the temperature detector 64, the amplifier 63, and the A / D converter 61 shown in FIG.
Has been added. The temperature detector 64 is composed of a thermistor or the like. The output 67 is amplified by the amplifier 63 and input to the A / D converter 61. The output 65 of the A / D converter 61 is input to the head driving unit 173.

FIG. 13 shows a head driving unit 174 of the fourth embodiment.
FIG. 4 is a block diagram showing the details of.

In FIG. 13, the output 46 of the simultaneous heat number setting register 26 is input to one input terminal of an adder 68, and the other input terminal of the adder 68 is connected to the digital output of the A / D converter 61. 65 is input. The addition output 69 of the adder 68 is input to the data input terminal of the black counter 27.

Thus, when the temperature changes, the digital output 65 of the A / D converter 61 changes, and the addition output 69 of the adder 68 also changes. That is, the number of simultaneous heats can be automatically switched according to the temperature change.

Here, the case where the temperature is 25 ° C. is considered. If the A / D conversion output 65 at that time is “T”, this is automatically added by the adder 68, so the control unit 6 stores this value “T” in the simultaneous heat number setting register 26 in advance. Set the subtracted initial value. This allows
When the temperature is 25.degree. C., the normal number of heat dots is output and set in the black counter 27. When the temperature rises or falls below 25.degree. C., the output of the adder 68 changes accordingly. The number of simultaneous heat dots can be realized. Note that the rate of change of the digital output 65 according to the temperature change can be adjusted by making the type of the temperature detection unit 64 and the gain of the amplifier 63 appropriate.

Needless to say, the controller 6 measures the temperature without taking the configuration as in the fourth embodiment, and in the first and second embodiments, the value of the simultaneous heat number setting register 26 is set. Can be changed to change the number of simultaneous heats.
However, according to the present embodiment, the change can be made without the intervention of the control unit 6. Further, in this embodiment, the description has been given based on the first embodiment, but it goes without saying that the same can be realized in the case of the second embodiment.

The present invention may be applied to a system composed of a plurality of devices or an apparatus composed of one device. Needless to say, the present invention can also be applied to a case where the present invention is achieved by supplying a program for implementing the present invention to a system or an apparatus.

As described above, according to the present embodiment, the print data can be transferred to the thermal head at high speed, and the heating elements can be divided and driven in accordance with the number of simultaneously driving heating elements of the thermal head. is there.

[0069]

As described above, according to the present invention,
Even if the number of dots to be printed exceeds the number of print elements that can be driven simultaneously, the effect is that the dot data can be automatically divided for each number of printable dots and printed at high speed. is there.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of a main part of a printer device according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a head drive control unit in the printer device according to the first embodiment of the present invention.

FIG. 3 is a circuit diagram illustrating a configuration of a thermal head according to the present embodiment.

FIG. 4 is a timing chart for explaining the operation of the head drive control unit according to the first embodiment.

FIG. 5 is a timing chart for explaining divided driving of the head drive control unit according to the first embodiment.

FIG. 6 is a flowchart illustrating an operation of a control unit of the printer device according to the present exemplary embodiment.

FIG. 7 is a block diagram illustrating a schematic configuration of a main part of a printer device according to a second embodiment of the present invention.

FIG. 8 is a block diagram illustrating a configuration of a head drive control unit according to a second embodiment.

FIG. 9 is a timing chart for explaining the operation of the head drive unit of the second embodiment.

FIG. 10 is a block diagram illustrating a schematic configuration of a main part of a printer device according to a third embodiment of the present invention.

FIG. 11 is a block diagram illustrating a partial configuration of a head drive control unit according to a third embodiment.

FIG. 12 is a block diagram illustrating a schematic configuration of a main part of a printer device according to a fourth embodiment of the present invention.

FIG. 13 is a block diagram illustrating a partial configuration of a head drive control unit according to a fourth embodiment.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 heating resistor (heating element) 3 latch circuit 4 shift register 5 thermal head 6 control unit 9 main memory 10 print buffer 17, 172, 173, 174 head drive control unit 21 total dot number setting register 22 dot counter 23 divided drive counter 25 Timing control unit 26 Simultaneous heat number setting register 27 Black counter 32 Heat time setting register

Claims (8)

(57) [Claims] 1. A head drive circuit of a printer device for printing an image on a recording medium using a print head having a plurality of recording elements, comprising: storage means for storing data to be output to the print head; A first register for holding the number of print elements of the print head which can be driven simultaneously, a second register for storing the total number of print elements used for printing of the print head, and A black dot counter for counting the number of black dots, and a dot number for data to be output to the print head.
Counter and the number of synchronous clocks of data output to the print head
And a count value of the black dot counter is stored in the first register.
When the value exceeds the value held, the dot counter
Supplying an enable signal to stop counting
The rice which continues counting to the division drive counter is
By outputting a cable signal , empty data is generated when the total number of data supplied to the print head is less than the total number of recording elements stored in the second register, and the empty data is generated by the data holding means of the print head. Supply and pudding
Control means for causing the recording head to perform a recording operation, and when the dot counter is stopped halfway,
First, using the dot counter and the divided drive counter,
A head drive circuit for transferring data that has not been transferred and performing the next recording operation . Wherein said division drive counter head driving circuit according to claim 1, characterized in that also performs counting of the empty data to be supplied to the print head. 3. The head drive circuit according to claim 1, wherein the value held by said first and second registers can be changed to a desired value. 4. A discriminating means for discriminating a type of power supply of the printer device, and a changing means for changing the number of simultaneously drivable recording elements held in the first register according to a discrimination result of the discriminating means. 4. The head drive circuit according to claim 3, further comprising: 5. A temperature measuring means for measuring an environmental temperature, and said first measuring means according to the temperature measured by said temperature measuring means.
4. A changing means for changing the number of simultaneously drivable recording elements held in a register.
3. The head drive circuit according to claim 1. 6. The print head is a line-type head, and the control means determines that the number of recording elements is equal to the number of the recording elements when the number of black dots transferred to the print head matches the value stored in the first register. The print position of the black dot is adjusted accordingly, and printing is performed. Then, while the remaining data is transferred to the print head, it is determined whether or not the number of transferred black dots matches the value stored in the first register. 2. The head drive circuit according to claim 1, wherein the same operation is repeated until one line of data is transferred to the print head and printed. 7. A head drive circuit according to claim 1, further comprising: a print head for receiving and recording the supplied data; and controlling the head drive circuit and the print head. A printer device, comprising: control means for developing print data in a storage means. 8. The control device according to claim 1, wherein
When the counting of one line is completed, the recording operation of one line is completed.
Generating an interrupt signal indicating that the
2. The head drive circuit according to claim 1, wherein: