JP3301550B2 - Clamp circuit and signal clamping method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[Table of Contents] The present invention will be described in the following order. Industrial Application Conventional Technology (FIGS. 3 and 4) Problems to be Solved by the Invention (FIGS. 3 and 4) Means for Solving the Problems (FIGS. 1, 2 and 4) Action (FIG. 1) , FIG. 2 and FIG. 4) Embodiment (FIGS. 1, 2 and 4)

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clamp circuit and a signal clamp method, and is suitably applied to, for example, a clamp circuit for setting a black level of a video signal to a constant level.

[0003]

2. Description of the Related Art Conventionally, in a clamp circuit for adjusting a black level to a constant level by reproducing a DC component of a video signal lost by capacitive coupling, a feedback clamp circuit as shown in FIG. 3 is generally used. Used in Here, the video signal clamp circuit 1 is a black level clamp circuit 2,
Voltage-current converting circuit (so-called g _m amplifier) 3, by the reference voltage source 4 and the capacitor 5 are connexion arrangement, the black level of by connexion input video signal S1 to a black level clamp circuit 2 to the voltage V _c of the capacitor 5 It is clamped and output as an output video signal S2.

Here, the video signal clamp circuit 1 is adapted to feed back the output video signal S2 output from the black level clamp circuit 2 to the inverting input terminal of the voltage / current converting circuit 3, and to the other non-inverting input terminal. The reference voltage source 4 is connected. A clamp signal S3 for setting a timing for clamping the input video signal S1 is input to a control input terminal of the voltage-current conversion circuit 3.

That is, the voltage-current conversion circuit 3 applies the reference voltage V of the reference voltage source 4 during a period (hereinafter referred to as a clamp period) t (FIG. 4B) during which the clamp signal S3 falls.
detects a difference voltage (hereinafter referred offset voltage) [Delta] V between the _ref and the output video signal S2 (FIG. 4 (C)), which is connected to the offset voltage [Delta] V transconductance g _m multiplied by connexion output current i a the capacitor 5 charge and discharge to have been made to control such that the reference voltage of the black level voltage V _c of the capacitor 5.

[0006]

However, in the video signal clamp circuit 1, since a small amount of leakage current is generated in the capacitor 5, the control input terminal of the black level clamp circuit 2 and the circuit board, the clamp period is small. t
Even if the voltage-current conversion circuit 3 matches the black level of the output video signal S2 with the reference voltage _Vref during the period, the voltage V of the capacitor 5 due to the leak current until the next clamp period t.
_c (sag) has occurred.

As a result, after the elapse of the clamp period t,
The output video signal S2 changes as shown in FIG.
In (C), there is a problem that the offset voltage becomes lower than the ideal waveform as shown by the one-dot chain line, and the offset voltage ΔV again occurs between the black level of the video signal and the reference voltage _Vref by the next period of the clamp period t.

[0008] Here, offset voltage ΔV generated in the voltage-current conversion circuit 3 between the clamp period, duty ratio of the sum of the various leakage currents of changing the value of voltage V _c of the capacitor 5 I _L, the clamp signal S3 i.e. Assuming that the ratio between the clamp period t and the clamp cycle is γ,

(Equation 1)And the value of the offset voltage ΔV is reduced.
Leakage current I _LIt is sufficient to reduce the value of
Duty ratio γ and transconductance g_mThe value of
It is good.

[0009] However, when the value of the leakage current I _L is temperature, and by connexion changes in humidity and the like, also for small and stable offset voltage ΔV because there is a limit to increasing the value of duty ratio γ is difficult Atsuta.

Therefore, it is conceivable to reduce the value of the offset voltage ΔV by increasing the value of the mutual conductance g _m . In this case, if the gain of the voltage-to-current conversion circuit 3 becomes too high, the phase margin is increased. Without this, the voltage-current conversion circuit 3 could oscillate.

The present invention has been made in view of the above points, and a clamp circuit and a signal clamp capable of stably setting the value of an offset voltage ΔV generated by sag to a smaller value as compared with the prior art. It proposes a method.

[0012]

According to the present invention, a DC component of an input analog signal S1 is clamped at a clamp level set by a voltage level of a capacitor 5 and output as an output analog signal S2. A signal clamp circuit 2, a comparison circuit 7 for detecting a difference voltage ΔV between the DC level of the output analog signal S2 output from the signal clamp circuit 2 and the reference DC level _Vref, and a difference voltage output from the comparison circuit 7. ΔV is converted into a charging / discharging current i and fed back to the capacitor 5, and the voltage / current converting circuit 7 for setting the capacitor 5 to a voltage level based on the charging / discharging current i; and a gain proportional to the voltage / current converting circuit 7,
And an adjustment signal supply means 9 for supplying an adjustment signal S4 having a signal level set to the comparison circuit 7 in accordance with the value of the mutual conductance gm which is inversely proportional to the voltage level of the difference voltage ΔV.
The adjustment signal supply means 9 includes a voltage-current conversion circuit 7
The set the signal level of the adjustment signal S4 so as to reduce the difference voltage [Delta] V without oscillating, the comparison circuit 7, the difference voltage [Delta] V, proportional to the value of the transconductance g _m corresponding to the signal level of the adjustment signal S4 The charging / discharging current i is converted into the charging / discharging current i.

Further, in the second invention, the difference voltage ΔV is detected from the output analog signal S2 and the reference DC level _Vref , and the adjustment signal S4 is compared with the comparison circuit 7 based on the difference voltage ΔV.
It is supplied to, so that comprise an adjustment circuit 9 to reset the value of the transconductance g _m.

Further, in the third invention, the comparison circuit 7
Is to input the output analog signal S2 and the reference DC level _Vref to input means constituted by a differential amplifier circuit. In the present invention, the input analog signal S
1 is clamped at a clamp level set by the voltage level of the capacitor 5, and the output analog signal S2
A first step of detecting a difference voltage .DELTA.V between the DC level of the output analog signal S2 and the reference DC level _Vref, and converting the difference voltage .DELTA.V into a charge / discharge current i, is fed back, and a second step of setting the capacitor 5 to a voltage level based on the charge and discharge current i, the transconductance g _m which is proportional to the gain of the voltage-current conversion circuit 7, and is inversely proportional to the voltage level of the difference voltage ΔV The signal level adjustment signal S4 is set to a signal level so as to reduce the difference voltage ΔV without causing the voltage-current conversion circuit 7 to oscillate.
And step of the difference voltage [Delta] V, and to provide a fifth step of converting the charging and discharging current i is proportional to the value of the transconductance g _m corresponding to the signal level of the adjustment signal S4.

[0015]

When the DC component of the input analog signal S1 is clamped at the clamp level set by the feedback-controlled voltage level of the capacitor 5 and is output as the output analog signal S2, it is proportional to the gain of the voltage-current conversion circuit 7. And the DC level of the output analog signal S2 and the reference DC level V
the value of the transconductance g _m which is inversely proportional to the voltage level of the differential voltage ΔV between the _ref, by setting the signal level corresponding to the adjustment signal S4 from the outside, the adjustment signal S4
The difference voltage Δ
The signal level can be set so as to reduce V.

[0016]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.

In FIG. 1, in which parts corresponding to those in FIG. 3 are assigned the same reference numerals, reference numeral 6 denotes a synchronous video signal clamp circuit as a whole according to the present invention.
It comprises a voltage-current conversion circuit 7, a reference voltage source 4, and a capacitor 5.

Here, the voltage-to-current converter 7 has the same configuration as the voltage-to-current converter 3 and additionally includes a differential amplifier circuit that inputs the output video signal S2 and the reference voltage _Vref. configuration input stage, and has an adjusting signal input of the transconductance g _m for adjustment, to adjust the value of I connexion transconductance g _m in changing the magnitude of the adjustment signal S4 inputted to the adjustment signal input terminal It has been made possible.

[0019] In the above configuration, a video signal clamping circuit 6 is input video signal adjustment signal S4 so that the value of the advance transconductance g _m before the input is substantially the design value of S1
Is adjusted and input to the adjustment signal input terminal.

Subsequently, when the input video signal S1 is input to the black level clamp circuit 2, the video signal clamp circuit 6 _applies the reference voltage V _ref of the reference voltage source 4 during the clamp period t at the timing when the clamp signal S3 falls. and outputs the offset voltage ΔV between the black level of the video signal S2 detected at the voltage-current conversion circuit 7, charging the charge stored in the capacitor 5 by converting the offset voltage ΔV transconductance g _m multiplied by current i Discharge. Thus the voltage-current conversion circuit 7 is set to the voltage V _c of the capacitor 5 coincides with the reference voltage V _ref.

In this case, if the leak current I _L is large, or if the offset voltage ΔV between the black level of the video signal S2 and the reference voltage V _ref exceeds an allowable range due to variations in the mutual conductance g _m , etc. increase the value of the transconductance g _m by changing the magnitude of the adjustment signal S4, the voltage-current converting circuit 7 the offset voltage ΔV
Is reduced to such an extent that oscillation does not occur. As a result, the video signal clamp circuit 6 outputs the video signal S whose black level does not oscillate and whose value is set as close as possible to the reference voltage _Vref.
2 can be output.

Further reduce the value of the transconductance g _m by changing the magnitude of the adjustment signal S4 when the voltage-current converting circuit 7 the gain is too large by increasing the value of the transconductance g _m is oscillated The offset voltage ΔV is increased to such an extent that the voltage-current conversion circuit 7 does not oscillate. Thus, the video signal clamp circuit 6 can output the video signal S2 set as large as possible within a range where the black level is smaller than the ideal value but does not oscillate.

According to the above configuration, by conventionally to be able by connexion adjusted to adjust signal S4 to provide externally the value of Atsuta transconductance g _m with a fixed, offset voltage generated by the leakage current I _L, etc. ΔV can be easily reduced to such an extent that the voltage-current conversion circuit 7 does not oscillate.

[0024] By allowing by connexion adjusted to adjust signal S4 to provide the value of the transconductance g _m externally easily reduce the influence of variations in the transconductance g _m of individual products generated due to a manufacturing error or the like can do.

Furthermore with the values of the mutual conductance g _m can be easily controlled to an optimum value the value of the offset voltage ΔV since it by connexion adjusted to adjust signal S4 to provide from the outside, circuit it is possible to prevent the risk of oscillation Operational stability can be easily increased.

[0026] Note that in the embodiment described above has dealt with the case of adjusting the value of the transconductance g _m manually, the present invention is not limited thereto, automatically to adjust the value of the transconductance g _m May be.

In FIG. 2, in which parts corresponding to those in FIG. 1 are assigned the same reference numerals, reference numeral 8 denotes a synchronous video signal clamp circuit as a whole, which has the same configuration as the video signal clamp circuit 6 and , A difference voltage detection circuit 9.

An output video signal S2 fed back from the black level clamp circuit 2 and the reference voltage _Vref of the reference voltage source 4 are input to the input terminal of the difference voltage detection circuit 9, and the value of the offset voltage ΔV is detected. Yotsute that Te is output to the adjustment signal input from the output of the adjustment signal S4 having a magnitude corresponding to the value of the offset voltage [Delta] V, automatically adjusts the value of the transconductance g _m of the voltage-current converting circuit 7 offset The voltage ΔV is maintained at a predetermined value.

As described above, the video signal clamp circuit 8 detects a change in various conditions (for example, a leak current I _L ) for changing the value of the offset voltage ΔV by the difference voltage detection circuit 9 as a change in the value of the offset voltage ΔV. And the adjustment signal S4
The value of the offset voltage ΔV by the size and automatic controls for adjusting the value of the transconductance g _m can be kept more stable than conventional.

Further, in the aforementioned embodiment, the differential voltage detection circuit 9 detects only offset voltage [Delta] V, but the value of the transconductance g _m has dealt with the case of automatically adjusting, the present invention is not limited to this, offset the value of the transconductance g _m may be automatically adjusted by detecting the duty ratio γ with voltage [Delta] V.

Further, in the above-described embodiment, the case where the black level of the video signal is clamped to a constant level has been described. However, the present invention is not limited to this, and the DC level of various analog signals is clamped to a predetermined value. Can be widely applied to.

[0032]

As described above, according to the present invention, a clamp circuit for clamping a DC component of an input analog signal at a clamp level set by a voltage level controlled by feedback control of a capacitor, and outputting the clamped circuit as an output analog signal. In the signal clamping method, an adjustment signal having a signal level corresponding to a value of a mutual conductance proportional to a gain of the voltage-current conversion circuit and inversely proportional to a voltage level of a difference voltage between a DC level of an output analog signal and a reference DC level, By setting the signal level so as to reduce the difference voltage without causing the voltage-current conversion circuit to oscillate, charging / discharging the difference voltage in proportion to the value of the mutual conductance corresponding to the signal level of the adjustment signal Can be converted to current,
The difference voltage, which is an offset voltage generated by sag, can be made much smaller and more stable than in the prior art.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a clamp circuit according to the present invention.

FIG. 2 is a block diagram for explaining a video signal clamping circuit according to another embodiment.

FIG. 3 is a block diagram for explaining a conventional video signal clamping circuit.

FIG. 4 is a signal waveform diagram for explaining the operation.

[Explanation of symbols]

1, 6, 8,... Video signal clamp circuit, 2,... Black level clamp circuit, 3, 7,.
Reference voltage source, 5: Capacitor, 9: Difference voltage detection circuit.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-279674 (JP, A) JP-A-60-212068 (JP, A) JP-A-63-56071 (JP, A) 292345 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 5/18 H03G 11/00

Claims (4)

(57) [Claims] 1. A DC component of an input analog signal is, Conden
Set by the voltage level of theClamp at clamp level
Output as an analog signalSignal clamp circuit
When, The output analog output from the signal clamp circuit
Detects the difference voltage between the DC level of the signal and the reference DC level
A comparison circuit; The difference voltage output from the comparison circuit is used as a charge / discharge current.
And feed it back to the capacitor.
Voltage current set to a voltage level based on the charge / discharge current
A conversion circuit; Proportional to the gain of the voltage-to-current converter, and
To the transconductance value, which is inversely proportional to the voltage level of the voltage
The adjustment signal for which the signal level has been set
Adjusting signal supply means for supplying to the road Equipped with the adjustment signal
The supply means does not oscillate the voltage-current conversion circuit.
Signal level of the adjustment signal so as to reduce the difference voltage.
Set the bell, The comparison circuit compares the difference voltage with a signal level of the adjustment signal.
It is proportional to the value of the transconductance according to the bell
Convert to the above charge / discharge current Characterized in that the clamp times
Road. Wherein said difference voltage is detected from the output analog signal and a reference DC level, the upper Sulfur butterfly <br/> integer signal is supplied to the comparator circuit based on the difference voltage, the value of the transconductance 2. The clamp circuit according to claim 1, further comprising an adjusting unit for resetting. 3. The clamp circuit according to claim 1, wherein the comparison circuit inputs the output analog signal and the reference DC level to input means constituted by a differential amplifier circuit. 4. The DC component of an input analog signal is, Conden
Set by the voltage level of theClamp at clamp level
Output as an analog signalSignal clamp method
In And The DC level of the output analog signal and the reference DC level
A first step of detecting a difference voltage between The difference voltage is converted into a charging / discharging current and returned to the capacitor.
And charge the capacitor to a voltage based on the charge / discharge current.
A second step to set the level, Proportional to the gain of the voltage-to-current converter, and
To the transconductance value, which is inversely proportional to the voltage level of the voltage
An adjustment signal having a signal level according to the voltage-current conversion circuit
Signal that reduces the difference voltage without oscillating
A third step to set the signal level, The difference voltage is adjusted according to the signal level of the adjustment signal.
The charge / discharge current is proportional to the transconductance value.
The fourth step to convert Signal characterized by having
No. clamping method.