JP3301274B2 - Decoding device for encoded video data - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a decoding device for decoding and displaying encoded video data which has been encoded and compressed, and more particularly to a decoding device having a function of repeatedly displaying decoded video data.

[0002]

2. Description of the Related Art A digitized video signal has an enormous amount of information, and it is necessary to have a high-speed and large-capacity recording on a recording medium such as an optical disk. In addition, a broadband transmission path is required, and its realization is not easy. For this reason, an encoding method is used which encodes digitized video data with high efficiency and compresses the data amount.

[0003] ISO / IE is used as such an encoding method.
MPEG standard defined by C (“Journal of the Institute of Television Engineers of Japan”; V
ol. 48, no. 1, pp. 44-49). The MPEG standard defines a method for encoding video data and an audio signal, and a method for multiplexing the encoded video data and audio data.

In the MPEG standard, the unit of video data to be encoded is a frame or a field, and is called a picture. Video data is subjected to a motion compensation difference between before and after pictures or both pictures, and is subjected to compression using discrete cosine transform and variable length coding.

[0005] By the reference method of motion compensation, I, P, B
There are pictures that fall into one coding type. This is shown in FIG. Arrows in the figure indicate a reference picture at the start point and a picture to be encoded at the end point. In an I-picture, reference to an image is not performed, and all information necessary for decoding is encoded in the picture (intra-coded image). Although I pictures can be decoded independently, the amount of generated data is the largest. As the P picture, the I picture or P picture decoded immediately before is used as a reference picture (forward predicted picture). The amount of generated data is the second largest after the I picture. For the B picture, the I or P picture existing immediately before and immediately after is used as a reference screen (bidirectional predicted image). The amount of generated data is the smallest.

In the MPEG standard, the amount of data generated for each picture differs as described above. In order to set such a coded video data to a constant bit rate, the coding device and the decoding device are provided with a buffer memory for the coded video data. Encoding and decoding are performed so as not to cause underflow. This will be described with reference to FIG. The figure is a decoded data amount transition model showing the transition of the data amount inside the buffer memory of the decoding device. The horizontal axis represents time, and the vertical axis represents data amount.

[0007] Encoded video data is input, and the data amount inside the buffer increases accordingly. Decoding is performed periodically once per one picture period, and at that time, the data amount in the buffer is reduced by an amount corresponding to one picture. By repeating the above, the transition of the data amount in the buffer becomes saw-toothed as shown in the figure. The slope of the graph when the data increases indicates the transmission rate of the input coded video data.

On the encoding side, assuming the decoded data amount transition model, the peak of the data amount may exceed the specified capacity of the buffer memory, or conversely, the minimum value of the data amount may become zero and the data may become insufficient. The amount of code generation for each picture is controlled so that there is no code.

On the decoding side, it is essential that the decoding start timing be decoded at the timing assumed by the code side in the decoded data amount transition model. If it is earlier than this timing, underflow may occur,
If it is too late, overflow may occur. To enable this, the encoding side multiplexes the encoded video data and adds time information. As this time information, a PCR (Program Clock Referrer) indicating the time is used.
ence) or SCR (System Clock Reference)
e), DTS (Decoding Time Stamp) indicating the decoding start time of the coded video data at the head of the picture, and PTS (Pre) indicating the display time of the decoded picture data.
sentation Time Stamp), PCR or S
The time is matched to the code side by CR, decoding is started at the time indicated by DTS, and display is started at the time indicated by PTS.

Meanwhile, in such an apparatus for decoding encoded video data, not only the decoding assumed on the encoding side, but also the function of displaying a decoded image in the middle of freeze is strongly desired as improving usability. .

On the other hand, with respect to a method for realizing decoding including such a function, according to the MPEG standard, a decoded data amount transition model assumed on the code side is a decoded data amount transition model including a display such as freeze. It is recommended that the contents of the encoded video data be partially modified so as to match the model before decoding.

However, in order to realize this, a device for analyzing and rewriting encoded video data must be provided in front of the decoding device, and the hardware scale increases.
There is a problem that the cost is increased.

[0013]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to realize a decoding function which realizes a display function such as freeze which is not assumed in encoding without increasing the hardware scale. It is to realize.

[0014]

Means for Solving the Problems The above-mentioned problem is one pic.
The amount of code per channel is not constant and is encoded in decoding
Assuming buffering of video data,
Control of encoding can be matched between the encoding side and the decoding side
Encoded video that multiplexes time axis information during encoding
A device that decodes data.
Parser means for extracting time axis information at the time of encoding;
Buffering that temporarily stores encoded video data before decoding
Decoding means for decoding encoded video data,
Decoding means for outputting data, and the buffering means
Sending encoded video data output from the stage to the decoding means;
Data selection means for stopping output, and decrypted video data.
Memory means for holding at least one picture
Controlling the decoding means, the data selection means, and the memory means;
Decoding control means, further comprising:
A stage controlling a decoding operation based on the time axis information;
Decoding mode and command signal input from outside
Second, the decoding operation is controlled by ignoring the time axis information.
And in the second decoding mode,
The decoding control means is adapted to perform trick play.
Special playback by controlling the memory means and data selection means.
This can be improved by a decoding device for encoded video data .

[0015]

The parser extracts the time information at the time of encoding multiplexed on the encoded video data, and supplies information such as the decoding start time to the decoding start controller. The buffering means is
The encoded video data is temporarily stored before decoding, and the decoding unit decodes the encoded video data read from the buffering unit and outputs display video data.

In the first decoding mode, the decoding start control means reads the coded video data from the buffering means based on the information such as the decoding start time and supplies the coded video data to the decoding means to start decoding. Thereby, a standard decoding mode for performing the same decoding as assumed on the code side is realized.

In the second decoding mode, the decoding start control means reads the coded video data from the buffering means based on the monitoring result of the buffering monitoring means and supplies the coded video data to the decoding means to start decoding. This mode is a special decoding mode in which decoding can be performed without using information such as a decoding start time. For example, in this mode, the means for repeatedly displaying the decoded video data repeatedly displays the decoded video data in synchronization with the stop of the decoding. As a result, decoding corresponding to freeze display or high-speed display can be performed by intentionally stopping the supply of the coded video data to the decoding means or skipping the coded video data of some pictures.

[0018]

An embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a diagram showing an apparatus for decoding coded video data and coded audio data, wherein 1 is a clock generator, 2 is a system parser, 3 is a data selector, 4 is a control interface, 5 Is the video data decoding unit,
Reference numeral 6 denotes a main memory unit, and 7 denotes an audio data decoding unit.

The coded video data and coded audio data are multiplexed with the timing information described above.
It enters the system parser unit 2 as ta_stream. In the system parser, PCR or SC on data_stream
R clock information (PCR / SCR) is extracted and sent to the clock generator 1. In the clock generator 1, this P
The same time as the encoding side based on CR / SCR (system_clo
ck_time) and generate an operation clock signal (clock_pulse) for each unit. The system_time_clock is sent to the video data decoding unit 5 and the audio data decoding unit 6,
ock_pulse is sent to all blocks.

In the system parser unit 2, data_strea
m to distinguish between coded video data and coded audio data (a_
v) and decoding and display start timing information (DT
S / PTS), coding type information (pic_type) for each picture of the video is identified, and a_v and pict_type are data_str.
The DTS / PTS corresponding to the video data decoding unit 5 and the audio data decoding unit 7 is transmitted to the data distribution unit 3 together with the eam.

In the data distribution unit 3, the system parser unit 2
A_v, pict_type for data_sterem input via, and selction for input from control interface unit 4
With reference to _info, the encoded video data (v_stream) is transmitted to the video data decoding unit 5 and the encoded audio data (a_stream) is transmitted to the audio data decoding unit 7.

An operation command is externally input to the control interface unit 4 by a signal indicated by command in the figure. Further, the video data decoding unit 5 and the audio data decoding unit 7 are supplied with state signals vd_req and ad_req indicating whether or not encoded data can be received, and output them to the outside.

Selction_i output to the data selection / distribution unit 4
nfo is a normal decoding operation mode, that is, a mode in which a decoding operation assumed on the encoding side is performed, v_stream, a decoding desired from a plurality of encoded video data and encoded audio data,
This indicates a_stream, and if data_sterem includes only one set of coded video data and coded audio data, selction_info has no meaning.

On the other hand, in a special decoding operation mode such as freeze, selction_info is used to select a v_stream desired to be decoded, stop the output of v_stream and a_stream from the data selection / distribution unit 3, and specify a specific It carries information for selectively outputting only data of the encoding type.

Further, the video data is transmitted to the video data decoding unit 5.
ignore_TS is a command signal for decoding the coded data to be input to the video data decoding unit 5 as soon as possible without using the above-mentioned DTS / PTS without decoding and displaying the coded video data. When a special decoding operation mode is specified, ignore_T
In S, a decoding operation not using DTS / PTS is instructed.

The video data decoding unit 5 decodes the coded video data input as v_stream, and generates a video signal (vide
o) is output. The decoding operation in the video data decoding unit 5 may be performed based on DTS / PTS by ignore_TS or may be performed ignoring. The main memory 6 is used for buffering encoded video data and storing reference video signal data required in the decoding process. The memory bus (memory_bus) of the main memory 6 is also connected to the video data decoding device 5 and the audio data decoding unit 7,
It is also used for buffering encoded audio data.

FIG. 2 shows the video data decoding unit 5 shown in FIG.
FIG. 3 shows details of the main memory 6. In the video data decoding unit 5, reference numeral 501 denotes an encoded data interface circuit;
Reference numeral 502 denotes a coded video data parser circuit, 503 denotes an inverse quantization circuit, 504 denotes an inverse DCT circuit, 505 denotes a reference video data generation circuit, 506 denotes an addition circuit, 507 denotes an output data interface circuit, and 508 denotes a buffer occupancy management circuit. , 509 are coded data buffer writing circuits, 51
0 is an encoded data buffer read circuit, 511 is a forward reference video data read circuit, 512 is a backward reference data read circuit, 513 is a decoded video data write circuit, and 514 is a display video data read circuit. , 61 is an address decode and data interface circuit, 62 is an encoded data buffer memory,
63, 64 and 65 are frame memories. Although the function of the main memory 6 for buffering the encoded audio data is omitted in FIG. 2, the encoded audio data is extremely small compared to the encoded video data. It does not affect

The encoded video data (v_stream) is transmitted to the encoded data interface circuit 5 in the video data decoding unit 5.
01 and the encoded data buffer writing circuit 50
9, the data is written to the encoded data buffer memory 61 in the main memory 6. At the time of writing, the address of the specific data on the v_stream corresponding to the DTS / PTS stored in the encoded data buffer memory 61 is sent to the encoded data buffer reading circuit 510 (DTS-a).
ddress). In addition, the PTS is converted to DTS, and even if unified control is performed by DTS, the decoded video data (vide
There is no problem if o) and audio data (audio) are output continuously.

Reading from the coded data buffer memory 61 is controlled by a coded data buffer reading circuit 510. To the encoded data buffer reading circuit 510,
The above-mentioned DTS / PTS (PTS is treated as DTS), ignore_TS, system_time_clock, and D
In the mode based on the DTS / PTS, when the TS_address is input and the time indicated by the system_clock_time matches the DTS upon reading from the encoded data buffer memory 61, the specific data on the v_stream corresponding to the DTS is encoded data buffer. The read circuit 510 outputs the encoded video data to the parser circuit 502. In the mode in which the ignore_TS is instructed to ignore the DTS / PTS, the reading operation is continued as long as the v_stream data exists in the coded data buffer memory 61 in a decodable state.

The buffer memory occupancy management circuit 508 includes:
The write address of the encoded data buffer write circuit 509 is compared with the read address of the encoded data buffer read circuit 510, and if there is room to write the encoded video data, the encoded video data is requested externally by vd_req, Prior to reading out the encoded video data corresponding to one picture, if the encoded data for one picture is not in the encoded data buffer memory 61, under_flow
To the encoded data buffer readout circuit 510 and the display video data readout circuit 514.

The encoded video data is sent from the encoded data buffer reading circuit 510 to the encoded video data parser circuit 502. The coded video data parser circuit 502 performs variable-length decoding on variable-length coded DCT transform coefficient data and data such as motion vectors, and performs weighting on the DCT transform coefficient data with an inverse quantization circuit 503. The inverse DCT circuit 504 performs an inverse DCT transform.
The inverse DCT-transformed data is pixel-level data of a motion-predicted video on the encoding side.
In step 6, the image data is added to the image data of the reference screen to obtain decoded image data.

The decoded video data is written to any one of the first to third frame memories 63 to 65 via the decoded video data writing circuit 512. The first frame memory 63 and the second frame memory 64 are used for storing data to be used as video data of a reference screen hereinafter.
Video data belonging to a picture corresponds to this, and the first frame memory 63 and the second frame memory 64 are used alternately for each of I and P pictures. In the first frame memory 63 and the second frame memory 64 , what is written earlier in time is forward reference video data, and what is written later is backward reference video data.
On the other hand, the third frame memory 65 is dedicated to video data belonging to a B picture, and when a picture is defined as a frame, divides the video data of one picture into two interlaced fields suitable for display. Used for

The video data of the reference screen is read out from the first frame memory 63 and the second frame memory 64 by the forward reference video data reading circuit 511 and the backward reference video data reading circuit 512 to read the decoded video data. Either one of the reference video data is selected or two reference video data are averaged, and the reference video data generation circuit 505 generates reference video data used for motion compensation.

The display video data reading circuit 514 reads the video data from one of the three frame memories of the first frame memory 63 to the third frame memory 65 in accordance with the display order of the decoded video data. At this time, if the picture is defined as a frame, the video data of one picture is read out in two interlaced fields suitable for display, and read out via the video output interface circuit 507. Output data (video).

An address decode and data interface circuit 61 in the main memory 6 controls an address signal and a write / read operation via a memory_bus comprising an address and a data bus between the video data decoder 5 and the main memory 6. A signal is received, the address signal is decoded, and control for writing data on the data bus to a predetermined address and reading data from the predetermined address on the data bus is performed.

FIG. 3 shows an operation example of a normal decoding mode by using a decoded data amount transition model. The state of input of coded video data input (v_stream) to the video data decoding unit 5 is shown below the decoded data amount transition model, and the state of display video data (video) is shown above the decoded data amount transition model. In the figure, I, P, and B indicate the coding type of the picture, and the numbers attached to these indicate the display order. In the display video data, one picture is displayed during one picture (frame or field) period. However, the input of the coded video data requires an interval corresponding to the data amount because the amount of data generated per picture differs. Is entered. The decoding start timing is a point in time when an arrow is attached downward in the figure, and one picture is decoded in one picture period in synchronization with the display cycle.
The DTS or the converted value of the PTS into the DTS indicates the decoding start time. However, it is assumed that decoding is performed regularly, such as decoding of one picture in one picture period. It is not necessary for each picture.
It may be multiplexed only to pictures.

FIG. 4 shows an example of a decoding operation including a freeze period. Ignore_TS is shown at the top of the figure. ignor
The e_TS rises in response to the command of FIG. 1 instructing the freeze, and the selection_info is the output of the encoded video data (v_stream) by the data selection / distribution unit 3 while the ignore_TS is at the High level after the next picture break. To stop. As a result, the video data decoding unit 5 has no encoded video data to be decoded.
Receiving the under_flow, the display video data reading circuit 514 repeatedly displays the decoded video data already stored in the first frame memory 63 or the second frame memory 64 regardless of the display time indicated by the PTS. And the display shifts to the freeze display. In the figure, the display of the picture P_1 which is temporally old and not displayed is repeated.

In response to the command instructing the return from the freeze mode, the ignore_TS returns to the Low level. The restoration is performed from I51 which is the next I picture.
This is because an I picture that does not require the decoding result of the coded video data lost during the freeze period as reference video data is suitable for restoration.
Is coded video data (v_stream) from this I picture
Is resumed, and the video data decoding unit 5 sets the system_time_
Decoding is restarted at the timing when the clock and the DTS match.

FIG. 5 shows an example of a trick reproduction mode in which encoded video data is reproduced from a recording medium at high speed, and only I and P pictures are decoded and displayed. The coded video data of the B picture is removed by the data selection and distribution unit 3,
By supplying the encoded video data to the decoding device at high speed, high-speed reproduction is achieved.

When trick play is instructed by the command, the control interface unit 4 sets the ignore_TS
This causes the video decoder unit 5 to ignore system-time_clock. The coded data read circuit 510 in the video decoding unit 5 stores one frame in the coded video data buffer memory 62 in the main memory 2 at a time when decoding can be started, in the figure, at an intermediate time during one frame period of the display image. If there is coded video data for one minute, decoding is started, and if not, decoding is stopped for one frame period. The decoded image data is displayed and output with a delay of 0.5 frame in the example of the figure. However, when the decoding is stopped, the display image data readout circuit 514 receives the under_flow signal and outputs the immediately preceding display image data. Is displayed repeatedly.

[0042]

As described above, according to the present invention, it is possible to perform decoding based on time information at the time of encoding multiplexed on encoded video data and decoding without using them. In particular, in the latter decoding mode, by stopping supply of the coded video data to the decoding means, decoding corresponding to freeze display can be realized, and furthermore, a part of the coded video data, for example, data of a B picture can be skipped. By supplying the data to the decoding means, decoding corresponding to high-speed display can be realized.

[Brief description of the drawings]

FIG. 1 is an example of an apparatus for decoding encoded video data according to the present invention.

FIG. 2 is a configuration example of a video data decoding unit and a main memory in the encoded video data decoding device shown in FIG. 1;

FIG. 3 is a diagram illustrating a decoded data amount transition model in a standard decoding mode.

FIG. 4 is a decoded data amount transition model in a decoding mode corresponding to freeze display.

FIG. 5 shows a decoded data amount transition model in a decoding mode corresponding to high-speed display.

FIG. 6 is a diagram illustrating an encoding method.

FIG. 7 is a view for explaining a decoded data transition model in the encoding method shown in FIG. 6;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Clock generation part, 2 ... System parser part, 3 ... Data selection distribution part, 4 ... Control interface part, 5 ... Video data decoding part, 6 ... Main memory, 508 ... Buffer occupancy management circuit, 510 ... Encoded data Buffer reading circuit, 502: Parser circuit for encoded video data, 5140: Display image data reading circuit.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yutaka Okada 5-2-1, Josuihonmachi, Kodaira-shi, Tokyo Inside the Semiconductor Division, Hitachi, Ltd. (72) Inventor Takeshi Ishinabe Gojojosui, Kodaira-shi, Tokyo No. 20-1, Hitachi, Ltd. Semiconductor Division (56) References JP-A-7-79411 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N ^7/ 24- 7/68 H03M 7/30 H04N 5/91-5/95

Claims (7)

(57) [Claims] 1. The code amount per picture is not constant,
Assuming buffering of encoded video data in decoding, encoded video data obtained by multiplexing time axis information at the time of encoding so that the buffering control can be matched between the encoding side and the decoding side. A decoding means for extracting time axis information at the time of encoding from the encoded video data; a buffering means for temporarily storing the encoded video data before decoding; and decoding the encoded video data. Decoding means for outputting decoded video data; data selecting means for stopping transmission of encoded video data output from the buffering means to the decoding means; and holding at least one picture of decoded video data. And a decoding control unit that controls the decoding unit, the data selection unit, and the memory unit. A first decoding mode for controlling the decoding operation based on the time axis information, and a second decoding mode for controlling the decoding operation by ignoring the time axis information by an instruction signal input from the outside, In the second decoding mode, the data selection unit stops sending encoded video data to the decoding unit, and the decoding control unit repeatedly displays the decoded video data in the memory unit, and freezes. A decoding device for encoded video data, which performs display. 2. The apparatus for decoding encoded video data according to claim 1, further comprising: data monitoring means for monitoring the presence or absence of decodable encoded video data inside said buffering means; Controlling the supply of the encoded video data from the buffering unit to the decoding unit by the data selection unit based on a monitoring result of the data monitoring unit. 3. The code amount per picture is not constant,
Assuming buffering of encoded video data in decoding, encoded video data obtained by multiplexing time axis information at the time of encoding so that the buffering control can be matched between the encoding side and the decoding side. A decoding means for extracting time axis information at the time of encoding from the encoded video data; a buffering means for temporarily storing the encoded video data before decoding; and decoding the encoded video data. Decoding means for outputting decoded video data; data selecting means for selecting a part of the encoded video data output from the buffering means and sending the selected video data to the decoding means; Memory means for holding pictures, decoding control means for controlling the decoding means, data selection means, and memory means; and A first decoding mode that controls a decoding operation based on the time axis information, and a second decoding mode that controls the decoding operation by ignoring the time axis information according to an instruction signal input from the outside. In the second decoding mode, the data selecting unit selects a part of the encoded video data output from the buffering unit, skips a part of the encoded video data, and sends the data to the decoding unit. A decoding device for encoded video data, which performs display. 4. The apparatus for decoding encoded video data according to claim 3, further comprising: data monitoring means for monitoring the presence or absence of decodable encoded video data inside said buffering means; Wherein the decoded video data stored in the memory means is repeatedly displayed when the result of monitoring by the data monitoring means is that there is no decoded video data that can be decoded. Data decoding device. 5. An apparatus for decoding coded video data according to claim 1, further comprising a data buffer means for temporarily storing coded video data, wherein said data buffer means comprises: An apparatus for decoding encoded video data, wherein the apparatus is arranged between a selection unit and the decoding unit. 6. Reference is made to first encoded video data that can be decoded independently, second encoded video data that can be decoded by referring to forward reference video data, or forward reference video data and backward reference video data. A third coded video data that can be decoded by decoding the coded video data, and displaying any of the decoded video data based on the time information. When a command signal for displaying the decoded video data ignoring the time information is input, reading of new encoded video data is stopped, and the decoded video data displayed immediately before is repeatedly displayed. Display method of encoded video data. 7. Reference is made to first coded video data that can be decoded independently, second coded video data that can be decoded with reference to forward reference video data, or forward reference video data and backward reference video data. And a third encoded video data that can be decoded by decoding the encoded video data and displaying any of the decoded video data based on time information. When a command signal for displaying the decoded video data ignoring the time information is input, the decoding of the third encoded video data is not performed, and the first or second encoded video is not performed. A method for displaying encoded video data, characterized by displaying decoded video data obtained by decoding data.