JP3291004B2 - Audio coding circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a speech coding circuit used for digital communication equipment such as a digital car telephone.

[0002]

2. Description of the Related Art As an example of the prior art, FIG. 5 is a block diagram of a voice coding circuit used for digital voice communication. The analog audio input is digitally converted by the A / D converter 1 and interrupt processing is performed each time an interrupt signal (generally using 8 kHz / 125 μS) is input, and audio data is accumulated in the frame memory 3. An audio encoding process is performed on the stored audio data by the encoder 2. As the encoder 2, a digital signal processor (DSP) is used. These processed signals are converted into digital audio data (encoded data).
For example, it is output to the transmission line at a speed of 8 kHz. This DS
P operates in synchronization with the clock.
It operates in synchronization with a 0 MHz clock.

As a speech encoding process performed by the DPS2, a code-driven LPC encoding (CELP: Code excited linear prediction or encoding excitation method), which is one of speech analysis / synthesis methods, has been used.

The CELP system is one of the representative vector quantization systems, and reproduces a synthesized sound from a large number of noise source vectors prepared in an excitation codebook (codebook). In this method, a noise source vector that gives a near synthesized speech is selected and its index (code number) is transmitted.

FIG. 6 shows a CEL in the encoder (DSP) 2.
FIG. 7 is a block diagram showing details of a part to be encoded by the P method, and FIG. 7 is a flowchart showing the processing in units of frames. The voice input in FIG. 6 is a digital voice input from the frame memory 3 fetched on a frame basis in the DSP (step 71 in FIG. 7). This speech input is subjected to encoding processing regardless of the presence or absence of speech.

In FIG. 6 and FIG. 7, first, a linear prediction analysis (hereinafter, referred to as LPC) is performed by the linear prediction analysis / synthesizer 4 (step 72), and the residual portion is subjected to a long-term prediction analysis / synthesis 5 by the long-term prediction analysis / synthesizer 5. Prediction (hereinafter, referred to as LTP) is performed (step 73), and finally the LTP residual is vector-quantized by the vector quantizer 6 (step 7).
4) Encode. Vector quantization finds the code that best fits the residual waveform from a codebook containing multiple white noise samples, and transmits the code number as a code, enabling coding with a high information compression rate. It is an effective method.

FIG. 8 is a time chart showing a processing flow, and FIG. 9 is a time chart showing a processing portion in one frame at this time. Here, the hatched portion in FIG. 9 is an interrupt process for taking in audio data, and the other portion is the time required for the audio encoding process (ENCODE process). The interrupt process operates in synchronization with the interrupt signal, and the normal process operates in synchronization with the clock. Generally, the interrupt signal uses 8 kHz and the clock uses 10 MHz.

[0008]

As a problem of the prior art, there is a waste of power consumption due to voice coding processing in the DSP when there is no voice. That is, when the above-described CELP method is used as the audio coding process, it is effective in that good sound quality can be obtained even at a low bit rate, but requires a large amount of processing and a large amount of calculation for vector search. Even with currently available DSPs, most of the processing at one frame length is occupied. However, in an actual conversation, it is said that one speaker speaks for about 35% of the entire conversation, and there are many parts without speech during a conversation. It consumes useless power because it is doing.

[0009] In the case of BB-CELP / 8 kbps as a typical example of the processing amount of such CELP speech coding, the signal processing amount is as shown in Table 1.

[0010]

[Table 1]

Considering that encoding / decoding is performed by one DSP, 120.4K steps are required from Table 1, and this is performed in a time of 20 msec per frame which is generally used for voice encoding. 6.02M
An ips DSP is required.

Here, DS of 19 Mips / 250 mW
Considering the use of P, the above encoding / decoding processing can be performed within about 61% of the time, so that the power consumption is 152.5 mW. However, it is assumed that the power down mode is used when the DSP is not executing the signal processing, and the power consumption at that time is 0 mW.
SUMMARY OF THE INVENTION It is an object of the present invention to provide a speech encoding circuit that can reduce waste of power consumption of a DSP during silence.

[0013]

SUMMARY OF THE INVENTION A speech encoding circuit according to the present invention inputs a residual signal obtained by performing linear prediction analysis on a framed digital speech input and performing long-term prediction to a vector quantizer. A synthesized sound is reproduced from a plurality of noise source vectors prepared in a code book in a vector quantizer, and a noise source vector which gives a synthesized voice closest to the voice input is selected from among the reproduced sounds, and the code number is output. A speech detector for detecting the presence or absence of the speech of the speech input on a frame basis,
A mode switch for controlling to a power down mode in which a noise source vector search process of the vector quantizer is stopped by a signal from the voice detector when a voice detection result of the voice detector is silent; And a noise generator for transmitting an output from the noise generator instead of the code number from the vector quantizer according to a signal from the voice detector when a voice detection result of the voice detector is silent. And a switching device for performing control as described above.

[0014]

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, reference numerals 4 to 7 denote the same components as in FIG.
In order to reduce an enormous amount of computation for searching for a noise source vector that gives a synthesized speech closest to the input speech from noise source vectors prepared in a codebook in the vector quantizer 6, a speech detector is used. (VAD: voice activity d
(Elector) 8 detects whether the voice input is sound or no sound in units of frames. . As a result, the vector quantizer 6 suspends the arithmetic processing, and the power consumption in this part is eliminated.

When the vector quantizer 6 is stopped, the above-mentioned code number is not output. Therefore, in order to input a random number from the random number generator 10 to the encoder 7 instead of the code number, the speech detector 8 outputs The switch 11 is controlled by a signal. FIG. 2 is a flowchart showing an algorithm of the processing of the present invention. In FIG. 2, after audio data is stored in a frame memory (step 21), L
The PC (step 22) and the LTP (step 23) are performed. Next, by performing voice detection processing (step 24), the presence or absence of voice is determined (step 25), and the processing of the next step is performed based on the result. That is, when the frame is voiced, it is encoded by vector quantization (step 26), and when the frame is unvoiced, a random number is generated (step 2).
7) Then, the encoding is performed by replacing the code number with the value of the random number. This is based on the fact that in the case of noise, only the spectrum information is transmitted, and the sound source information is replaced by random numbers without any problem in terms of hearing. Next, the vector quantizer 6 of the DSP is operated in the power down mode (step 28), and the mode is released (step 29) when the processing moves to the next frame.

FIG. 3 is a time chart showing the flow of the processing of the present invention. The voice detection processing determines that the frame is non-voice, the frame is voiced, and the frame is non-voiced. The DSP is in a power down mode for frames and frames, and the frames are coded by vector quantization.

FIG. 4 is a time chart showing a processing portion in one frame of FIG. FIG. 4A is a time chart in the case where the input voice is silent, and FIG.
Is a time chart when the input voice is voiced. The shaded area indicates interrupt processing (voice data capture),
The hatched portion indicates the processing mode. In addition, a white portion without oblique lines indicates a power down mode. Regardless of the mode, the DSP performs interrupt processing to capture audio data, simultaneously counts the number of interrupts by a counter, and performs voice detection processing when capturing data of one frame length. In the case of the power down mode, at the same time as the data is taken in, the power down mode is released and the processing is switched to the normal processing mode to perform the processing.

BB-CELP / 8 kbps will be compared and described as a typical example of the processing amount of speech coding shown in the example of the prior art. The DSP used here is 10 Mip
s / 250 mW. The processing amount newly added to the conventional example is 1.5K steps required for voice detection.
For input other than audio data, the search process (44K steps) is not required in the codebook search / encoding process. Accordingly, the processing amounts according to the present invention are summarized in Table 2 below.

[0019]

[Table 2]

Next, a case where the encoding process is actually performed according to the embodiment of the present invention will be described. When the time rate of the audio signal processing is 35%, the time rate of the non-audio signal is 65%, and the decoding processing is 100%, the total processing amount is calculated.
This is a 3K step. This sets the frame length to 20 msec.
When executed by a DSP of 10 Mips, the processing amount is 47%, and the average value of the power consumption is 117.5 mW. This value is reduced by 35 mW compared to the conventional case. Thus D
The power consumption of the speech encoder using the SP can be reduced.

In the present invention, no special processing is required on the decoding side by transmitting an appropriate pattern of the code book for the driving sound source information when there is no sound, and the present encoding circuit is used. Since there is no need for any change in the system that performs the above, only the voice encoding circuit needs to be treated, and the industrial use effect is great.

[0022]

As described above in detail, the power consumption of the DSP itself can be reduced by about 20% by implementing the present invention. As a result, the battery-operated wireless device can increase the battery usage time as compared with the conventional method. Further, the present invention does not affect the communication protocol at all, and is compatible only with the voice encoding circuit. Therefore, the present invention is very effective in manufacturing a device from the viewpoint of a system.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main part of an embodiment of the present invention.

FIG. 2 is a flowchart showing an algorithm of the processing of the present invention.

FIG. 3 is a time chart showing a flow of processing according to the present invention.

FIG. 4 is a time chart showing processing distribution of one frame according to the present invention;

FIG. 5 is a block diagram of a speech encoding circuit to which the present invention is applied;

FIG. 6 is a block diagram showing a conventional main part.

FIG. 7 is a flowchart showing an algorithm of a conventional process.

FIG. 8 is a time chart showing a flow of a conventional process.

FIG. 9 is a time chart showing processing distribution of a conventional one frame.

[Explanation of symbols]

 Reference Signs List 1 A / D converter 2 Encoder (DSP) 3 Frame memory 4 Linear prediction analysis / synthesis unit 5 Long-term prediction analysis / synthesis unit 6 Vector quantizer 7 Encoder 8 Voice detector 9 Mode switch 10 Random number generator 11 Switch 21-29 Step number 71-74 Step number

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-86032 (JP, A) JP-A-4-315329 (JP, A) JP-A-61-275900 (JP, A) JP-A-60-1985 500 (JP, A) JP-A-2-36628 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G10L 19/12

Claims (1)

(57) [Claims] 1. A framed digital speech input is subjected to linear prediction analysis and long-term prediction, and a residual signal obtained is input to a vector quantizer, and a plurality of residual signals prepared in a codebook in the vector quantizer are provided. A speech encoding circuit of a CELP system for reproducing a synthesized speech from a noise source vector of the selected speech source, selecting a noise source vector which gives a synthesized speech closest to the speech input, outputting its code number, and transmitting the selected code. A voice detector for detecting the presence or absence of voice of voice input on a frame basis; and when a voice detection result of the voice detector is silent, a noise source vector search process of the vector quantizer based on a signal from the voice detector. A mode switcher for controlling a power down mode for suspending the operation, a noise generator for generating noise, and when the sound detection result of the sound detector is silent, the sound detector Signal by the speech encoding circuit, characterized in that a switch for controlling to transmit the output from the noise generator in place of the code number from the vector quantizer.