JP3287493B2 - Data processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[Table of Contents] The present invention will be described in the following order. Industrial Application Conventional Technology (FIGS. 7 and 8) Problems to be Solved by the Invention (FIGS. 7 and 8) Means for Solving the Problems (FIG. 6) Function (FIG. 6) Example (1) Overall Configuration (FIGS. 1 to 5) (1-1) Configuration of Computer System (1-2) Recording Area on Magnetic Tape (1-3) Format of Recording Track (1-4) Layout of Recording Track (2) Configuration of Format Control Unit (FIG. 6) (3) Other Embodiment Effects of the Invention

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing device,
For example, the present invention can be applied to a device that controls a data recorder as an external storage device of a computer.

[0003]

2. Description of the Related Art Conventionally, in a magnetic recording / reproducing apparatus, there is provided a so-called ID-1 format data recorder in which recording tracks are sequentially formed diagonally on a magnetic tape so that desired data can be recorded and reproduced at high density. Proposed (ANSI x3.175-1990 19mm Type ID-1 Recorded Instru
mentation).

That is, as shown in FIG. 7, in this type of data recorder, the magnetic tape 1 is wound around a rotating drum rotating at a predetermined speed, and the magnetic tape 1 is caused to run at a predetermined speed. The recording tracks TR (TR1, TR1,
TR2, TR3, TR4, TR1, TR2,...), Thereby recording desired data on the recording track TR1.

At this time, the data recorder further comprises a recording track T extending longitudinally at the upper and lower ends of the magnetic tape 1.
A, CTL, and TC are formed, and the track set ID of the recording track TR is recorded in the recording track CTL.

[0006] Here, the track set ID is absolute position information starting from the head of the magnetic tape 1, and is interposed between predetermined synchronization signals so as to be recorded in the recording track TR in four track cycles. I have. Further, the recording tracks TA and TC can record user management data and the like, whereby the recording tracks TA and TC can be recorded.
By reproducing TL and TC, it is possible to easily search data recorded at high density in the recording track TR.

Further, in the data recorder, when data is recorded in the recording track TR, the data is recorded by attaching a parity code for error detection and correction, which is a so-called product code, whereby desired data is recorded. Recording and reproduction can be performed reliably. That is, as shown in FIG. 8, the data recorder uses a predetermined unit (= 36,108 [BI
TE]), and the data D
The ATA is divided into 306 blocks, and a Reed-Solomon error detection and correction code (that is, a C2 code) is added to each block.

Further, after the block is divided into first and second fields FIELD0 and FIELD1, the Reed-Solomon error detection and correction code (that is, the C1 code) is orthogonal to the C2 code for each of the fields FIELD0 and FIELD1. ). Thereby, in the data recorder, the bit error rate can be improved by performing error correction on the reproduced data using the C1 and C2 codes during reproduction.

Further, in the data recorder, when data DATA to which the C1 and C2 codes are added is recorded on the magnetic tape 1, an interleave process is performed for each recording track TR. The data DATA can be surely reproduced. That is, in the data recorder, arrows a1, a2,..., An-1, an, an + 1, a
data D to be input in the order indicated by n + 2,.
Arrows b1, b2,..., Bn-1, bn
As shown in FIG.
The TA is recorded, and the data DATA is interleaved.

Further, at this time, in the data recorder, a synchronization signal SYNC and a sync block data ID are added for each predetermined unit (hereinafter referred to as a sync block), and preamble and postamble data are added as a whole to the data DATA. Record Thus, at the time of reproduction, in the magnetic recording / reproducing apparatus, the synchronization signal SYNC, the sync block data ID, and the data D are based on the track sync data included in the preamble.
The ATA is reproduced, and deinterleaving can be performed based on the synchronization signal SYNC and the sync block data ID.

Further, by performing deinterleaving, even if a dropout or the like occurs, C1 and C1
It is designed to effectively prevent errors exceeding the error correction capability of two codes from concentrating at one location.

[0012]

By the way, in an ID-1 format data recorder for recording and reproducing desired data in this way, about 10 ^-10 which is practically sufficient as a data recording / reproducing apparatus for measurement is mainly used. Bit error rate can be guaranteed. If this bit error rate can be improved to about 10 ^-15 , it is considered that extremely important data can be stored by applying to a magnetic tape device of a computer system used in a bank or the like, for example. Therefore, the usability of this type of data recorder can be improved and the field of application can be expanded accordingly.

In a data processing apparatus for controlling such a data recorder, error correction and error detection are performed only on one-word data or only on a certain series of data streams. However, when processing data on a block basis, even if processing of blocks other than the block that you actually want to process is performed, since the error check code that flows at the same time as the block data was used, The error could not be confirmed for the block being processed.

The present invention has been made in view of the above points, and proposes a data processing apparatus capable of confirming whether data actually being processed is intended data using a simple check code. It is assumed that.

[0015]

According to the present invention, there is provided a data block processing means (20, 20) for processing input data as block data for each block and providing the data to a data recording means 13. 30,
31) and data block processing means (20, 30, 3)
When the block data is processed in 1), first check code data including an error check code for error checking the block data and header information for specifying the block data is created and stored in the memory. Data block management means (21, 22, 26, 32X) for storing the data in the data recording means 13 when the data block management means (21, 22, 26, 32X) stores or reproduces the data. Then, the second check code data including the error check code for error checking the block data is calculated from the block data, and the memory means 2 calculates the second check code data.
2 is compared with the first check code data stored in No. 2 and checked.

Further, in the present invention, the data block management means (21, 22, 26, 32X) includes a process in which the data block processing means (20, 30, 31) adds or deletes data inside the block data. Then, based on the first check code data before the change stored in the memory means 22, the third block code is changed from the block data after the change to the third check code data.
By calculating the above check code data, the block data processed by the data block processing means (20, 30, 31) is checked.

[0017]

The data block processing means (20, 30, 31)
The block data inputted by the block data processing unit is processed in block units, and the data block management means (21, 22,
26, 32X), the check data of the block data is managed, and by checking the block data, it is possible to confirm that the intended data block processing is being performed, so that a simpler check code can be used. Can be used to confirm whether the data actually being processed is the intended data.

[0018]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.

(1) Overall Configuration (1-1) Configuration of Computer System In FIG. 1, reference numeral 10 denotes a general configuration of a computer system to which the present invention is applied, and write data transmitted together with a write request from a host computer 11. W
R is supplied as recording data REC to the data recorder 13 of the ID-1 format through the data recorder control device 12, whereby the write data WR is written on the recording track on the magnetic tape 1.

In response to the read request input from the host computer 11, the magnetic tape 1 of the data recorder 13 is reproduced, and the reproduced data PB obtained as a result is passed through the data recorder control device 12 as read data RD to the host computer. 11 is input.

The data recorder controller 12 includes a host interface controller 14 and a format controller 1
5, a host interface control unit 14 controls a channel interface with the host computer 11, and a format control unit 15
To format data to be transmitted to and received from the data recorder 13. Control information between the host interface control unit 14 and the format control unit 15 is transmitted and received with reference to the control table 17.

Thus, in the computer system 10, the data recorder control device 12 is provided, so that the host computer 11 can connect the data recorder 13 to the external storage device of the host computer 11 with the same interface as the conventional magnetic tape device. It has been made to be usable as.

(1-2) Recording Area on Magnetic Tape In this computer system 10, FIG.
As shown in FIG. 7, the center of the magnetic tape 1 loaded in the data recorder 13 in which the degree of damage to the tape itself is relatively small as viewed in the longitudinal direction is defined as a recording area AREC.
, So that the bit error rate can be improved.

That is, as shown in FIG. 2A, a position behind the physical leading end PBOT of the magnetic tape 1 by, for example, 10 [m] is set as a logical leading end LBOT, and the physical leading end of the magnetic tape 1 is set. For example, a position before 15 m from the end PEOT is set as the logical end LEOT, and the logical end LB
Recording area ARE from OT to logical end LEOT
Used as C.

In this recording area AREC, FIG.
As shown in (B), the area from the logical leading end LBOT to a position behind by, for example, 5 [m] is used as the directory information track area DITA.

The directory information track area D
Following the ITA, a non-recording area NRA of a predetermined length is sandwiched,
The area from the logical end LEOT to the end near NEOT, which is 10 m ahead, for example, is used as the user recording track area UDA.
Is used as the volume end information area VEOVA.

(1-3) Format of Recording Track Here, in this computer system 10, the ID
As shown in FIG. 3, the user data area of 36,108 [BYTE] for one recording track specified by -1 format is formatted, and the formatted data is interleaved in units of 4 tracks. The bit error rate can be improved.

That is, in the computer system 10,
As shown in FIG. 3A, the write data WR from the host computer 11 is 32,768 [BY], for example, one block per recording track TR with four tracks as one set.
TE] is recorded as recording data DATA.

At this time, for one recording track TR, 3
The recording data DATA less than 2,768 [BYTE] is added to the first supplementary data PD1 to make 32,768 [BYTE] as a whole. Also, subcode data SCD for 320 [BYTE] is prepared to store the additional information of this one recording track TR.

In addition to this, the data recorder control device 12
FIG. 3 (B) shows that every 94 [BYTE] of the subcode data SCD, the recording data DATA or the first supplementary data PD1
As shown in FIG. 1, a code for error detection and correction of Reed-Solomon (Reed-Solomon) consisting of 8 [BYTE] using a predetermined generator polynomial (hereinafter, C1 and C2 in ID-1 format)
(Referred to as C3 code C3 depending on the code), which enables more powerful error correction to be performed.
The bit error rate can be further improved.

Also, as shown in FIG.
With respect to the subcode data SCD, the recording data DATA, the first supplementary data PD1 and the C3 code C3, which are formatted in units of recording tracks, the data for four recording tracks TR1, TR2, TR3 and TR4 are tracked in a predetermined manner. Interleave processing over time,
Thus, the bit error rate can be further improved.

As described above, the four recording tracks TR1, T
At the beginning of the data for one recording track interleaved for R2, TR3, and TR4, 204 [BY
TE], the second supplementary data PD2 is added, whereby the data amount of one recording track TR as a whole becomes ID-1.
It is set to 36,108 [BYTE] specified by the format.

Further, since the second supplementary data PD2 is formatted at the beginning, the supplementary data PD2 is inserted into a portion of the recording track where the magnetic tape 1 itself has a high degree of damage and the magnetic head is unstable in tracking. Can be assigned, and the recorded data DATA
It is possible to further improve the bit error rate.

(1-4) Layout of Recording Track Here, in the case of the computer system 10, the additional information of the recording track stored in the subcode data SCD is the track type information TRID indicating the type of the corresponding recording track TR. , The block number BLNO to which the recording track TR belongs, and the file number F to which the recording track TR belongs
LNO, the number of write retries RTCT for the recording track TR, the number of bytes BYCT of data included in the recording track, and the like.

The track type information TRID includes a volume information table VIT and a file information table FI.
T, type information of update information table UIT, dummy data track information DMY, user data track information UDT, tape mark track information TM or recording end information EOR.

Here, as shown in FIG. 5, the track type information TRID of the recording track TR formed in the directory information track area DITA of the magnetic tape 1 is actually shown.
For example, a volume information table VIT, a file information table FIT, an update information table UIT or dummy data track information DMY is used.

This directory information track area DIT
In A, a directory information table DIT for managing files on the magnetic tape 1 as a whole is recorded. First, a rising area RUA of 1.5 [m] from the logical leading end LBOT of the magnetic tape 1 is followed by a volume information table VI.
The recording track consisting of T is recorded in four tracks consisting of tracks.

The recording data DATA of the volume information table VIT includes the start and end position information of the data block recorded in the user recording track area UDA with the entire magnetic tape 1 as one volume, the length information of the file information table FIT and the recording. Sometimes, the block number of the data block for which the write retry has been executed is recorded.

Following the volume information table VIT
The file information table FIT is recorded in 256 recording tracks. Record data D of this file information table FIT
In the ATA, the head position information and the block length of the file are recorded for each file recorded in the user recording track area UDA.

Following the file information table FIT, the dummy data track information DMY with a predetermined number of tracks is provided.
Is recorded, and the update information table U is recorded in the following four recording tracks.
Record IT. In the record data DATA of the update information table UIT, information indicating whether or not there is an update is recorded.

Following the update information table UIT, the directory information track area DITA starts from the top.
Dummy data track information DMY is recorded in the recording track TR up to 2.5 [m], and the remaining 2.5 [m] directory information track area DITA is secured as a spare area MGA.

Next, following the directory information track area DITA of the magnetic tape 1, user data track information UDT and tape are used as track type information TRID of the recording track TR formed in the user recording track area UDA sandwiching the non-recording area NRA. Mark Track Information TM
Alternatively, the recording end information EOR is used.

As the recording track TR of the user recording track area UDA, the user data tracks of a plurality of blocks constituting one file are sandwiched by the recording tracks TR of the tape mark track information TM having four tracks as one unit. The recording track TR of the information UDT is recorded,
Following the end of the user data track information UDT, the recording track TR of the recording end information EORT is recorded.

The recording data DATA of the tape mark track information TM and the recording end information EORT include 32,768
The first supplementary data PD1 for [BYTE] is recorded, and data corresponding to the write data WA input from the host computer 11 is recorded in the recording data DATA of the recording track TR in the user recording track area UDA.

As described above, the computer system 10
In this embodiment, a directory information track area DITA is provided at the beginning of the magnetic tape 1 and the user recording track area U is provided.
By managing the contents of the DA on a file basis, the data recorded in the data recorder 13 as viewed from the host computer 11 can be accessed in the same manner as an external recording device.

(2) Configuration of the Format Control Unit The format control unit 15 of the data recorder control unit 12 in the computer system 10 is configured together with the memory 16 as shown in FIG. That is, as a recording operation of the format controller 15, first, data transfer with the host interface controller 14 is 32 [kb].
yte] unit of packet.

At the head of each packet is header information.
The number of valid data, attributes, and the like of the packet are stored. The user data and header transferred from the host interface control unit 14 have a 32 [kbyte] configuration, but are converted into a 64 [bit] bus once in the format control unit 15 to add an error correction code. I have. Thus, 1-bit correction can be performed by adding an 8/64 error correction code, and the memory for ECC can be reduced.

The header data is stored in a header memory 22 of another system, and the memory control circuit 24 can search what kind of information is stored in the main memory 20. The checksum of the input user data is calculated by the checksum circuit 21 and stored in the header memory 22 together with the header information as check code data for error checking.

To configure a large-capacity, high-speed dual port memory, the main memory 20 is realized by operating the DRAM in the high-speed page mode. In the high-speed page mode, a FIFO is mounted on both sides of the DRAM in order to perform rate buffering between a clock used in the DRAM and an external clock because the high-speed page mode runs by a specific clock.

The status of the main memory 20 is transmitted to the memory control circuit 24, and when the buffer becomes full, the processing on the host interface controller 14 is stopped. When the buffer becomes empty, the data is transferred to the data recorder 13. The processing for stopping is performed.

The subcode control circuit 26 has a header memory 2
The header data for the user data for which subcode synthesis is likely to be performed from the second ID to the next ID is read, and what kind of track configuration is determined. When the next track configuration is determined, the information is written to the packet control circuit 28. The packet control circuit 28 reads the user data from the main memory 20 in accordance with the configuration of the next ID from the information and controls the PAD1 generation circuit 29 to perform the PAD.
1 data.

The data to be recorded is normally stored in the 16-ID buffer 30, the sub-code created by the sub-code control circuit 26 is added from the header information, and the data is transferred to the subsequent 1-ID buffer 31. In the case of this embodiment, if an error is found during recording, a write retry process is performed using the data stored in the 16 ID buffer 30.

When adding a subcode to the output from the 16 ID buffer, the host interface control unit 1
4 is used as check code data for error checking, and a check is made as to whether the data to be written from the main memory 20 to the call 1 ID buffer 31 is user data to which a subcode is to be added. .

The data read from the 1 ID buffer 31 is subjected to the C3 encoding of the DD-1 format by using the four encoders 32, and the shuffling RAM 34 is provided so that the shuffling specified by the DD-1 format can be realized. Is written to.

The data called out from the shuffling RAM 34 is added with the PAD2 of the DD-1 format from the PAD2 generation circuit 36, and then is converted into the 32-8 conversion circuit 38.
In order to match the input form of DD-1, 8 [bi
t], and output to the data recorder 13 via the DIR input / output circuit 39.

On the other hand, as a reproducing operation of the format control unit 15, the data sent from the data recorder 13 is as follows.
After being temporarily stored in a FIFO of the DIR input / output circuit 39 in order to synchronize with the internal operation, it is converted into a 32 [bit] signal for performing internal processing and written into the shuffling RAM 34. At this time, unnecessary PAD2 data is discarded.

After the shuffling is performed from the shuffling RAM 34 in the reverse order of that performed on the encoding side and the signal sequence is restored, decoding is performed using the decoder 32 of four systems, and this signal is written to the 1 ID buffer 31. . By performing these processes almost in synchronization with the timing used on the encoder side, a small-scale timing generation circuit can be used.

The subcode portion of the signal read from the 1 ID buffer 31 is sent to the subcode control circuit 26,
It analyzes what data was read from the tape. At this time, the check sum of the user data is also calculated by the check sum circuit 32X as check code data for error checking and transmitted to the subcode control circuit 26. User data is stored in the 16 ID buffer 30.

The data read from the tape does not know when a write retry to the previous data occurs. Therefore, the reproduction data is once stored in the 16 ID buffer 30, and if a write retry occurs within 16 IDs, processing such as invalidating the data in the 16 ID buffer 30 is performed.

In this way, only the valid data from the output from the 16 ID buffer 30 is written to the main memory 20 by instructing the packet control circuit 28. By such processing, only valid data always exists in the main memory 20. When searching for data in the main memory 20, the memory control circuit 24 searches the header memory 22 to confirm whether there is corresponding data.

The status of the main memory 20 is transmitted to the memory control circuit 24. When the buffer becomes full, the data transfer from the data recorder 13 is stopped. When the buffer becomes empty, the host interface control unit 1 executes the process.
Processing to stop the transfer on the 4 side is performed.

In response to a data transfer request from the host interface control unit 14, the header information is extracted from the header memory 22, the user data from the main memory 20 is synthesized, and the data is sent to the host interface control unit 14.

Thus, the format control unit 15
Is input between the host interface control unit 14 and the data recorder 13, converts a signal transmitted from the host computer 11 into a DD-1 format specified by ANSI, and records the signal in the data recorder 13. Conversely, data reproduced from the data recorder 13 is transferred to the host computer 11.

In the case of the format control unit 15, the checksum is calculated at the time when the data is transferred from the host interface control unit 14. When the user data is stored, another calculation is performed. In the header memory 22, check sum information is stored as check code data for error checking together with the attribute information of the user data.

When user data to be used is taken out from the main memory 20 and stored in the 1 ID buffer 31,
In the check sum circuit 32X, the check sum of the user data is calculated as check code data for error checking, and it is checked whether or not the check sum matches the check sum stored in the header memory 22. As a result, when data of the wrong packet is being processed, it is possible to make a determination by returning error information.

The checksum of the sub-code is added to the checksum calculated when transferred from the host interface control unit 14 to create a new checksum, so that the data output from the 1ID buffer 31 is desired. It is also possible to check for data.

As described above, the checksum of the data to be added or deleted is calculated as the check code data for error checking, and is added to or subtracted from the original data to determine whether or not the data changing variously has been processed normally. Can be inspected.

The data to which the parity is added by the ECC 32 is written to the shuffling RAM 34. In the writing / reading process to the shuffling RAM 34, shuffling specified by the DD-1 format is performed.

When reading from the shuffling RAM 34,
By adding the checksum for the parity added by the ECC 32 and the checksum of the PAD2 to the checksum calculated when the checksum is read from the host interface control unit 14, the checksum of the sub-code is checked to determine whether the data after shuffling is the desired data. You can do it.

In this embodiment, the checksum is used as the error detect code which does not depend on the order of the data. However, the error check code which does not depend on the order of the data, such as parity added in the depth direction of the data in bit units, is used. The same effect can be obtained by using.

According to the above configuration, the error check code of a certain block is caused to flow in a system different from the system in which the signal of the block flows, so that the intended block processing is performed in the system in which the signal flows. You can check that it is being done. Further, by using an error check code that does not depend on the order of data, it is effective for a system that changes the order of data.

When data is added to or deleted from the data block, the error check code of the added / deleted data is calculated from the error check code of the added / deleted data and the error check code of the data before the addition / deletion. By doing so, it is possible to confirm whether or not the processing portion is performing the intended data processing even when data is added or deleted.

(3) Other Embodiments (3-1) In the above-described embodiment, the interleaving process is performed on data for every four tracks.
The present invention is not limited to this. For example, an interleave process may be performed on data for every eight tracks.

(3-2) In the above embodiment, the case where the present invention is applied to an external storage device of a computer has been described. However, the present invention is not limited to this, and is widely applied to various magnetic recording / reproducing devices. be able to.

[0075]

As described above, according to the present invention, the block data input by the data block processing means is processed in block units, and the check data of the block data is managed by the data block management means. In addition, by checking the above block data, it is possible to confirm that the processing of the intended data block has been performed, and the data actually processed using the simpler check code is used. It is possible to realize a data processing device capable of confirming whether or not the data to be processed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an overall configuration of a computer system to which a magnetic recording method according to the present invention is applied.

FIG. 2 is a schematic diagram for explaining a recording area on a magnetic tape;

FIG. 3 is a schematic diagram for explaining a format of a recording track on a magnetic tape;

FIG. 4 is a schematic diagram for explaining an interleaving process between recording tracks.

FIG. 5 is a schematic diagram for explaining a track format on a magnetic tape.

FIG. 6 is a block diagram showing a configuration of a format control unit according to the present invention.

FIG. 7 is a schematic diagram for explaining a recording format on a magnetic tape in an ID-1 format;

FIG. 8 is a schematic diagram for explaining an interleaving process of an ID-1 format;

[Explanation of symbols]

1 ... magnetic tape, 10 ... computer system, 1
1 Host computer system, 12 Data recorder control device, 13 Data recorder, 15 Format control unit, 16 Memory, 20 Main memory, 21, 32 ... Checksum circuit, 22 ... Header memory, 23 System control circuit, 24 Memory control circuit, 25, 33, 35 Counter, 26 Subcode control circuit, 27 Subcode synthesis circuit, 28
…… Packet control circuit, 29… PAD1 generation circuit, 3
0 ... 16 ID buffer, 31 ... 1 ID buffer, 34
... a shuffling RAM, 37 ... a synchronization / clock generation circuit, 38 ... a 32-8 conversion circuit, 39 ... a DIR input / output circuit.

Claims (2)

(57) [Claims] 1. Data block processing means for processing input data as block data for each block unit and providing the data to data recording means. When the data block processing means processes the block data, the block data is processed. Data block management means for generating first check code data including error check code for error checking data and header information for specifying the block data and storing the same in a memory means; The data block management means, when recording or reproducing the block data in the data recording means, performs an error check for checking the block data from the block data.
A data processing apparatus for calculating a second check code data including a check code, and comparing the calculated second check code data with the first check code data stored in the memory means. 2. The data block management means, when the data block processing means performs a process of adding or deleting data inside the block data, the first data block before the change stored in the memory means. based on a checking code data <br/> data, by calculating a third checkstop code data from the blow stick modified data, and characterized by a checking of the blow poke data processed in the data block processing unit The data processing device according to claim 1, wherein