JP3286983B2 - Encoding device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital image signal having a data amount compressed by block coding and transmitted.
That on the marks Goka apparatus.

[0002]

2. Description of the Related Art As high-efficiency encoding of a video signal, block encoding that reduces the average number of bits per pixel by utilizing its spatial and temporal correlation is known. The applicant of the present application obtains a dynamic range defined by the maximum value and the minimum value of a plurality of pixels included in a two-dimensional block as described in Japanese Patent Application Laid-Open No. 61-144,891, and adapts to this dynamic range. Has been proposed. Further, as described in JP-A-62-92620,
There has been proposed an apparatus that performs encoding suitable for a dynamic range with respect to a three-dimensional block formed from pixels in an area included in each of a plurality of frames. Furthermore, Japanese Patent Application No. Sho 62
As described in -128621, a variable length encoding method has been proposed in which the number of bits is converted according to a dynamic range in which the maximum distortion generated when performing quantization is constant.

In an encoding method (referred to as ADRC) that has been proposed for a dynamic range, a dynamic range DR (difference between a maximum value MAX and a minimum value MIN) is used.
Is calculated for each two-dimensional block consisting of (8 lines × 8 pixels = 64 pixels), for example. Further, the minimum level (minimum value) in the block is removed from the input pixel data. The pixel data after the removal of the minimum value is converted to a representative level. This quantization divides the detected dynamic range DR into four level ranges corresponding to a bit number smaller than the original quantization bit number, for example, 2 bits, and detects a level range to which each pixel data in the block belongs. , A process of generating a code signal indicating this level range.

The pixel data included in the minimum level range is encoded as (00), the pixel data included in the next lower level range is encoded as (01), and the pixel data included in the upper level range is encoded. Is encoded as (10), and pixel data included in the maximum level range is encoded as (11). Therefore, the 8-bit data of each pixel is compressed to 2 bits and transmitted. On the receiving side, the received code signal is restored to a representative level. This representative level is the central level of each of the level ranges used for encoding.

An AD adapted to the above dynamic range
The outline of RC coding is related to a two-dimensional block, but the same applies to a three-dimensional ADRC that forms a block that is a unit of ADRC by two two-dimensional regions included in two temporally consecutive frames. . ADRC encoding can significantly reduce the amount of data to be transmitted,
It is suitable for application to a digital VTR. The variable length ADRC in which the number of bits allocated to each pixel data adaptively changes according to the dynamic range DR can increase the compression ratio. However, variable length ADRC
Since the amount of transmitted data varies depending on the content of an image, when using a fixed-rate transmission line such as a digital VTR that records a predetermined amount of data as one track, buffering that controls the amount of generated data to be constant. Is required.

As a buffering method of the variable length ADRC, the present applicant forms a cumulative dynamic range frequency distribution as described in Japanese Patent Application Laid-Open No. 63-111781, and this frequency distribution On the other hand, a threshold value for determining the number of allocated bits prepared in advance is applied to determine a generated information amount for a predetermined period, for example, one frame period, and control so that the generated information amount does not exceed a target value. Has been proposed. For the three-dimensional ADRC, it is determined whether the block is a motion block or a still block. In the case of a still block, the averaged data of the two regions is encoded instead of all the pixel data of each region, that is, By performing the drop, the data amount is further compressed.

As buffering in the three-dimensional ADRC for performing such frame dropping, for example, Japanese Patent Application No. 62-13 / 1987
As shown in Japanese Patent No. 3925, the applicant of the present application has proposed to control the amount of generated information by controlling a motion threshold value for generating a flag indicating whether or not to perform a frame drop process. For this purpose, a frequency distribution table for both the dynamic range DR and the absolute value DF of the frame difference is formed, and this frequency distribution table is converted into a cumulative type.

[0008]

In a three-dimensional ADRC in which one block is composed of an area included in each of two frames, when a scene change occurs in this block, the dynamic range DR of the block becomes considerably large. , The amount of information generated when encoding is increased. For this reason, the buffering process drives a fixed state in which the number of bits that can be used for encoding each pixel is small (for example, each pixel data is encoded into a 0-bit or 1-bit code). This 0
The meaning of the bit means that the encoded code of each pixel is not transmitted, and the receiving side uses the average value of the maximum value and the minimum value of the block as the value of each pixel.

As described above, 0 bits are used for a scene change, and as a result, a block whose restored value is the average value is usually larger than the values of the blocks around the block, and the restored image There was a problem that block distortion was conspicuous. In addition, there is a disadvantage that a visual situation occurs in which the image of the previous frame remains in the restored image.

Therefore, an object of the present invention is to prevent a restored image from deteriorating when a scene change occurs in an encoding device using three-dimensional blocks .
And to provide a mark Goka device.

[0011]

SUMMARY OF THE INVENTION Therefore, according to the present invention, there is provided an encoding apparatus for encoding a digital image signal which has been subjected to block processing with a region extending over a plurality of continuous frames as one unit. First detecting means for obtaining a first maximum value of a plurality of pixel data, a first minimum value of the pixel data, and a first dynamic range included in each block in the obtained digital image signal; Averaging means for averaging each pixel data at a corresponding position between a plurality of frames and outputting an average block, a second maximum value of a plurality of pixel data included in the average block, a second A second detecting means for obtaining a minimum value and a second block range; and the same frame in a plurality of pixel data of each block in the block of digital image signal. Third maximum value of the pixel data on the arm,
A third detecting means for obtaining a third minimum value and a third block range; a motion determining means for detecting a motion of a block based on a pixel in each block in the digital image signal; , Digital image signal
Control means for generating a flag for identifying a threshold set for controlling the amount of information generated when encoding a signal, and scene change detection for detecting a scene change in a digital image signal based on a change in the flag. Means, according to the determination result of the motion determination and the detection result of the scene change,
A selection unit that selects an output from any one of an output from the first detection unit, an output from the second detection unit, and an output from the third detection unit; Encoding means for encoding based on a threshold value indicated by a flag.

[0012]

In the case of a stationary block, the averaged data of the two regions forming one block is converted to the ADRC encoder 13.
. When a scene change is detected,
Instead of the averaged data, one of the two regions is selected,
The selected area is encoded by the ADRC encoder 13. Therefore, it is possible to prevent a block composed of two areas having no correlation from being encoded due to a scene change, and to prevent deterioration in the image quality of the restored image.

[0013]

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, input terminals indicated by 1 are:
For example, a digital video signal obtained by digitizing one pixel data into 8 bits is converted into data having a block structure by a blocking circuit (not shown) and supplied. The block arrangement converts the data arrangement from the scanning line order to the block order. As an example, the screen of each frame is subdivided into regions of (4 × 4 = 16 pixels), and one block is composed of regions that respectively belong to two temporally continuous frames. The blocked digital video signal is supplied to a two-frame delay circuit 2 and a buffering circuit 3. The two-frame delay circuit 2 delays data in the buffering circuit 3 for a time necessary to determine four level-direction threshold values and motion threshold values every two frame periods.

As disclosed in the above-mentioned application, the buffering circuit 3 includes a frequency distribution table for two frame periods of a dynamic range DR and a frame difference (absolute value) DF in order to control the amount of generated information. (That is, the horizontal axis represents the frame difference DF, and the vertical axis represents the dynamic range DR.)
Is formed, this frequency distribution table is converted into a cumulative frequency distribution table, and the amount of generated information is calculated using the cumulative frequency distribution table. The threshold value in the level direction and the motion threshold value are determined so that the amount of generated information does not exceed the target value. In the ADRC encoder 13 to be described later, the number n of allocated bits of each block (0, 1,.
2, 3, or 4 bits).

As described above, by controlling the number of bits of variable length and the frame dropping process, the amount of information generated during two frame periods can be controlled to be constant. Since controlling these thresholds individually complicates the control, a table having a plurality of threshold sets including four level-direction thresholds and motion thresholds is prepared in a memory, By sequentially switching the sets, the amount of generated information is controlled. From the buffering circuit 3, an ID code Pi for identifying the threshold set determined in this way is generated. The ID code Pi of the buffering circuit 3 is supplied to the scene change detection circuit 4. The scene change detection circuit 4 generates a detection signal SCH corresponding to the presence or absence of a scene change.

The video data from the two-frame delay circuit 2 is supplied to the selector 5 and is also supplied to the still processing section 6, the dynamic dynamic range detecting section 7, the static dynamic range detecting section 8, and the frame difference detecting section 9. . The frame difference detecting unit 9 detects a difference between pixel data at the same spatial position in each area of two frames forming one block, totals the difference in one block, and calculates a total value as an absolute value. Convert to The frame difference DF detected by the frame difference detection unit 9 is supplied to the motion determination unit 12. The still processing unit 6, the still dynamic range detecting unit 8, and the motion determining unit 12 provide a scene change detection signal SC.
H is supplied respectively. Further, the ID code Pi from the buffering circuit 3 is supplied to the motion determining unit 12.

One of the output data of the two-frame delay circuit 2 and the output data of the still processing section 6 is selected by the selector 5. As shown in FIG. 2, the still processing unit 6 is configured to provide a still data generating unit 23 and a one-frame data generating unit 24 to an input terminal 21 to which the output of the two-frame delay circuit 2 is supplied.
Are connected. These still data generators 23
And the output of the one-frame data generator 24 is the selector 2
5 is selected and taken out to the output terminal 26. The selector 25 is controlled by a detection signal SCH from the scene change detection circuit 4 supplied through the terminal 22. The video data from the output terminal 26 of the still processing section 6 and the video data from the two-frame delay circuit 2 are supplied to the selector 5, and the output data of the selector 5 is supplied to the A as shown in FIG.
It is supplied to the DRC encoder 13.

The stationary data generating section 23 generates averaged data having a data amount halved by forming an average value of corresponding pixel data values of two areas included in one block. One frame data generation circuit 23
Either one of these two areas is selectively generated. When a scene change is detected by the detection signal SCH, the one-frame data generation circuit 23
The frame data is selected by the selector 25. When a scene change is not detected, the static data generation circuit 23
Is selected by the selector 25.

The dynamic dynamic range detecting section 7 detects the maximum value and the minimum value among the 32 pixels of the three-dimensional block, as in the case of the conventional ADRC, and detects the dynamic range, which is the difference between the two. Dynamic range MDR and minimum value MMI
N is output.

The static dynamic range detector 8 is configured, for example, as shown in FIG. In FIG. 3, video data from a two-frame delay circuit 2 from an input terminal indicated by reference numeral 31 is a static data dynamic range detection circuit 32,
It is supplied to a one-frame data dynamic range detection circuit 33, a still data minimum value detection circuit 34, and a one-frame data minimum value detection circuit 35, respectively. Detection circuit 32
And 33 are supplied to a selector 36, and the outputs of the detection circuits 34 and 35 are supplied to a selector 37. These selectors 36 and 37 are controlled by a scene change detection signal SCH from a terminal 38.

Static data dynamic range detection circuit 3
2 detects the dynamic range of the still data, which is the averaged data of the two regions of the three-dimensional block, as described above. The one-frame data dynamic range detection circuit 33 detects the dynamic range of the one-frame area selected when a scene change is detected, as described above. Therefore, the dynamic range SDR extracted from the selector 36 to the output terminal 39 is the dynamic range of one frame area when a scene change is detected, and is the dynamic range of averaged data when no scene change is detected.

The still data minimum value detecting circuit 34 detects the minimum value of the still data as the averaged data. The one frame data minimum value detection circuit 35 detects the minimum value of the area of one frame. Therefore, the output from the selector 37 to the output terminal 4
The minimum value SMIN taken out to 0 is the minimum value of the area of one frame when a scene change is detected,
When no scene change is detected, it is the minimum value of the averaged data. The detection circuits 32, 33, 34, and 35 are not limited to the configuration in which the static data and the data of the area of one frame are formed by themselves, and are configured to use the data formed by one of the circuits. Alternatively, a configuration using these data generated by the above-described still data processing unit 6 may be used.

As shown in FIG. 1, the MDR from the dynamic dynamic range detecting section 7 and the SDR from the static dynamic range detecting section 8 are supplied to the selector 10, and the output data of the selector 10 as shown in FIG. The signal is supplied to the ADRC encoder 13 and is taken out to the output terminal 15 as the dynamic range DR. On the other hand, the MMIN from the dynamic dynamic range detector 7 and the SMIN from the static dynamic range detector 8 are supplied to the selector 11, and the output data of the selector 11 is supplied to the ADRC encoder 13 as shown in FIG. , Which are taken out to the output terminal 16 as the minimum value MIN.

FIG. 4 shows an example of the scene change detection circuit 4. The ID code Pi supplied from the buffering circuit 3 through the input terminal 41 and the ID code transmitted through the latch 42 are supplied to the ROM 44 as addresses. The latch pulse is supplied from the terminal 43 to the latch 42 at a cycle of two frames. Therefore, the ID code Pi for the current two frames and the ID code for the immediately preceding two frames are supplied to the ROM 44 as addresses. The ROM 44 stores a table for detecting a scene change when a change between these two ID codes is larger than a predetermined value. The signal read from the ROM 44 is taken out to the output terminal 45 as a scene change detection signal SCH.

FIG. 5 shows an example of the configuration of the motion judging section 12. As shown in FIG. 5, the frame difference DF from the frame difference detection unit 9 is supplied to the input terminal 51, the ID code Pi from the buffering circuit 3 is supplied to the input terminal 52, and the scene change detection signal SCH is supplied to the input terminal 53. You. The ID code Pi is supplied to the ROM 54 and the ROM 5
From 4, the motion threshold value corresponding to Pi is read. In other words, the ID code Pi can identify a set of thresholds for keeping the amount of information generated during the two frame periods constant.
And threshold values in the level direction. The motion threshold is obtained from the ROM 54.

The frame difference detecting section 9 is input through an input terminal 51.
Supplies the frame difference DF from the
The motion threshold value from M54 is supplied to the comparison circuit 55. The comparison circuit 55 generates a motion flag for notifying the receiving side of the presence or absence of the frame drop processing. That is, on the transmitting side, if the frame difference DF is greater than the motion threshold, the block is processed as a motion block. If not, the block is dropped as a still block. The motion flag is minimal,
One bit may be used. For example, when this is “0”, it means a still block, and when this is “1”, it means a motion block.

The motion flag from the comparison circuit 55 and the still flag from the still flag generator 56 are supplied to the selector 57. The selector 57 controls the detection signal SCH so that the selector 57 selects the still flag when the scene change is detected, and otherwise selects the motion flag from the comparison circuit 55 when the scene change is detected. Is done. That is, when a scene change is detected,
Regardless of the comparison result between the frame difference DF and the motion threshold, the still flag is forcibly output as the motion flag MFLG. The output of the selector 57 is taken out to the output terminal 58 as a motion flag MFLG. This motion flag M
The FLG is used as a signal for controlling the selectors 5, 10 and 11 as shown in FIG. Further, the output terminal 18 has I
The D code Pi is extracted.

When the motion flag MFLG indicates a motion block, the selector 5 uses the two-frame delay circuit 2
Are selected, the selector 10 selects the dynamic range MDR, and the selector 11 selects the minimum value MMIN. These selected data,
Dynamic range DR and minimum value MIN are ADRC
It is supplied to the encoder 13. On the other hand, the motion flag MFL
When G means a still block or a still flag, the selector 5 selects the output data of the still processing unit 6 and the selector 10 selects the dynamic range S.
DR is selected as DR, and the selector 11 selects the minimum value SMIN. The selected data, the dynamic range DR and the minimum value MIN are supplied to the ADRC encoder 13.

The ADRC encoder 13 receives the data from the selector 5, the dynamic range DR from the selector 10, the minimum value MIN from the selector 11, and I
It receives the D code Pi and generates encoded data DT. The encoded data DT is taken out to the output terminal 14. As described above, the frame drop processing performed in response to whether a block to be coded is moving or stationary is performed by ADR
This is performed before the C encoder 13. Therefore, ADRC
The encoder 13 encodes data of 32 pixels in the case of a motion block, and encodes 16 pixels in the case of a still block.
Encode the pixel data.

In this encoding, four threshold values in the level direction are generated using the ID code Pi, and the number of allocated bits n is determined by the magnitude relation between the threshold values and the dynamic range DR of the block. To determine. The minimum value MIN from the selector 11 is subtracted from the video data from the selector 5 to generate video data from which the minimum value has been removed. The data normalized by the minimum value removal and the quantization step Δ are supplied to a quantization circuit provided in the ADRC encoder 13, and a code having a variable number of bits smaller than the original number of bits (8 bits) is supplied from the quantization circuit. Signal D
T is obtained. The quantization circuit has a dynamic range DR
Is performed in accordance with. That is, the video data from which the minimum value has been removed is divided at the quantization step Δ obtained by equally dividing the dynamic range DR by (2 ⁿ ), and the value obtained by rounding down the quotient and converting it into an integer is used as the code signal DT.

The dynamic range DR, the minimum value MIN,
The code signal DT, the motion flag MFLG, and the ID code Pi are supplied to a framing circuit (not shown) to form transmission data. The framing circuit arranges the dynamic range DR, the minimum value MIN, the code signal DT, the motion flag MFLG, and the ID code Pi in a byte serial manner, and forms transmission data to which a synchronization signal is added. The framing circuit encodes an error correction code. This transmission data is recorded, for example, on a magnetic tape by a rotating head.

Although not shown, on the receiving side (reproducing side), each received data is separated by a frame decomposition circuit,
The code signal DT is decoded by the C decoder, and the minimum value MIN is added to the decoded value, thereby obtaining restored data.
The ADRC decoder detects the number n of bits allocated to the block using the ID code Pi and the dynamic range DR. Decoding is performed by generating a quantization step Δ from the number of allocated bits n and, for example, multiplying the code signal DT by the quantization step Δ. As for a still block, the same restored data decoded as described above is used twice.

In the above embodiment, a scene change is detected from a sudden change in the buffering threshold value. However, a scene change is detected from other methods, for example, from a change in statistical data of the dynamic range DR. You may.

In the above embodiment, the present invention is applied to ADRC. However, the present invention may be applied to block coding other than ADRC. For example, 3
The present invention is also applicable to a high-efficiency coding apparatus using a dimensional DCT (Discrete Cosine Transform).

[0035]

As described above, according to the present invention, in three-dimensional block coding in which one three-dimensional block is formed by regions belonging to a plurality of different frames,
When a scene change is detected, 1
Process pixel data in the area of the frame. Therefore, when a scene change occurs, it is possible to prevent deterioration in image quality caused by encoding an image having no correlation.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a block diagram of a stationary processing unit according to an embodiment of the present invention.

FIG. 3 is a block diagram of a static dynamic range detection unit according to one embodiment of the present invention.

FIG. 4 is a block diagram of a scene change detection unit according to one embodiment of the present invention.

FIG. 5 is a block diagram of a motion determining unit according to one embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Input terminal of block video data 3 Buffering circuit 4 Scene change detection part 6 Still processing part 8 Still dynamic range detection part 12 Motion judgment part 13 ADRC encoder

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N ^7/ 24-7/68

Claims (1)

(57) [Claims] 1. An encoding apparatus for encoding a digital image signal which has been subjected to block processing with a region extending over a plurality of continuous frames as one unit, wherein the block includes a digital image signal included in each block in the digital image signal. First detecting means for obtaining a first maximum value of a plurality of pixel data to be obtained, a first minimum value of the pixel data, and a first dynamic range; Averaging means for averaging each pixel data at the corresponding position and outputting an averaging block;
Second detection means for obtaining a maximum value, a second minimum value, and a second block range of the image data; and a plurality of pixel data of each block in the block of digital image signals, Third detection means for obtaining a third maximum value, a third minimum value, and a third block range; and motion determination means for detecting a motion of a block based on pixels in each block in the digital image signal. Based on the digital image signal, the digital image
Control means for generating a flag for identifying a threshold set for controlling the amount of information generated when encoding the signal; and a scene for detecting a scene change in the digital image signal based on a change in the flag. Change detecting means, an output from the first detecting means, an output from the second detecting means, and an output from the third detecting means in accordance with the result of the motion judgment and the result of the scene change detection. Selecting means for selecting an output from any one of the outputs, and encoding means for encoding the output of the selecting means based on a threshold value indicated by the flag. Encoding device.